1 /*****************************************************************************
3 * ESS Maestro3/Allegro driver for Linux 2.4.x
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 * (c) Copyright 2000 Zach Brown <zab@zabbo.net>
21 * I need to thank many people for helping make this driver happen.
22 * As always, Eric Brombaugh was a hacking machine and killed many bugs
23 * that I was too dumb to notice. Howard Kim at ESS provided reference boards
24 * and as much docs as he could. Todd and Mick at Dell tested snapshots on
25 * an army of laptops. msw and deviant at Red Hat also humoured me by hanging
26 * their laptops every few hours in the name of science.
28 * Shouts go out to Mike "DJ XPCom" Ang.
31 * v1.23 - Jun 5 2002 - Michael Olson <olson@cs.odu.edu>
32 * added a module option to allow selection of GPIO pin number
34 * v1.22 - Feb 28 2001 - Zach Brown <zab@zabbo.net>
35 * allocate mem at insmod/setup, rather than open
36 * limit pci dma addresses to 28bit, thanks guys.
37 * v1.21 - Feb 04 2001 - Zach Brown <zab@zabbo.net>
38 * fix up really dumb notifier -> suspend oops
39 * v1.20 - Jan 30 2001 - Zach Brown <zab@zabbo.net>
40 * get rid of pm callback and use pci_dev suspend/resume instead
41 * m3_probe cleanups, including pm oops think-o
42 * v1.10 - Jan 6 2001 - Zach Brown <zab@zabbo.net>
43 * revert to lame remap_page_range mmap() just to make it work
45 * fix up incredibly broken open/release resource management
46 * duh. fix record format setting.
47 * add SMP locking and cleanup formatting here and there
48 * v1.00 - Dec 16 2000 - Zach Brown <zab@zabbo.net>
49 * port to sexy 2.4 interfaces
50 * properly align instance allocations so recording works
51 * clean up function namespace a little :/
52 * update PCI IDs based on mail from ESS
53 * arbitrarily bump version number to show its 2.4 now,
54 * 2.2 will stay 0., oss_audio port gets 2.
55 * v0.03 - Nov 05 2000 - Zach Brown <zab@zabbo.net>
56 * disable recording but allow dsp to be opened read
57 * pull out most silly compat defines
58 * v0.02 - Nov 04 2000 - Zach Brown <zab@zabbo.net>
59 * changed clocking setup for m3, slowdown fixed.
60 * codec reset is hopefully reliable now
61 * rudimentary apm/power management makes suspend/resume work
62 * v0.01 - Oct 31 2000 - Zach Brown <zab@zabbo.net>
64 * v0.00 - Sep 09 2000 - Zach Brown <zab@zabbo.net>
65 * first pass derivation from maestro.c
68 * in/out allocated contiguously so fullduplex mmap will work?
69 * no beep on init (mute)
70 * resetup msrc data memory if freq changes?
74 * Allow me to ramble a bit about the m3 architecture. The core of the
75 * chip is the 'assp', the custom ESS dsp that runs the show. It has
76 * a small amount of code and data ram. ESS drops binary dsp code images
77 * on our heads, but we don't get to see specs on the dsp.
79 * The constant piece of code on the dsp is the 'kernel'. It also has a
80 * chunk of the dsp memory that is statically set aside for its control
81 * info. This is the KDATA defines in maestro3.h. Part of its core
82 * data is a list of code addresses that point to the pieces of DSP code
83 * that it should walk through in its loop. These other pieces of code
84 * do the real work. The kernel presumably jumps into each of them in turn.
85 * These code images tend to have their own data area, and one can have
86 * multiple data areas representing different states for each of the 'client
87 * instance' code portions. There is generally a list in the kernel data
88 * that points to the data instances for a given piece of code.
90 * We've only been given the binary image for the 'minisrc', mini sample
91 * rate converter. This is rather annoying because it limits the work
92 * we can do on the dsp, but it also greatly simplifies the job of managing
93 * dsp data memory for the code and data for our playing streams :). We
94 * statically allocate the minisrc code into a region we 'know' to be free
95 * based on the map of the binary kernel image we're loading. We also
96 * statically allocate the data areas for the maximum number of pcm streams
97 * we can be dealing with. This max is set by the length of the static list
98 * in the kernel data that records the number of minisrc data regions we
99 * can have. Thats right, all software dsp mixing with static code list
102 * How sound goes in and out is still a relative mystery. It appears
103 * that the dsp has the ability to get input and output through various
104 * 'connections'. To do IO from or to a connection, you put the address
105 * of the minisrc client area in the static kernel data lists for that
106 * input or output. so for pcm -> dsp -> mixer, we put the minisrc data
107 * instance in the DMA list and also in the list for the mixer. I guess
108 * it Just Knows which is in/out, and we give some dma control info that
109 * helps. There are all sorts of cool inputs/outputs that it seems we can't
110 * use without dsp code images that know how to use them.
112 * So at init time we preload all the memory allocation stuff and set some
113 * system wide parameters. When we really get a sound to play we build
114 * up its minisrc header (stream parameters, buffer addresses, input/output
115 * settings). Then we throw its header on the various lists. We also
116 * tickle some KDATA settings that ask the assp to raise clock interrupts
117 * and do some amount of software mixing before handing data to the ac97.
119 * Sorry for the vague details. Feel free to ask Eric or myself if you
120 * happen to be trying to use this driver elsewhere. Please accept my
121 * apologies for the quality of the OSS support code, its passed through
122 * too many hands now and desperately wants to be rethought.
125 /*****************************************************************************/
127 #include <linux/module.h>
128 #include <linux/kernel.h>
129 #include <linux/string.h>
130 #include <linux/ctype.h>
131 #include <linux/ioport.h>
132 #include <linux/sched.h>
133 #include <linux/delay.h>
134 #include <linux/sound.h>
135 #include <linux/slab.h>
136 #include <linux/soundcard.h>
137 #include <linux/pci.h>
138 #include <linux/vmalloc.h>
139 #include <linux/init.h>
140 #include <linux/interrupt.h>
141 #include <linux/poll.h>
142 #include <linux/reboot.h>
143 #include <linux/spinlock.h>
144 #include <linux/ac97_codec.h>
145 #include <linux/wait.h>
146 #include <linux/mutex.h>
151 #include <asm/uaccess.h>
153 #include "maestro3.h"
157 #define DRIVER_VERSION "1.23"
158 #define M3_MODULE_NAME "maestro3"
159 #define PFX M3_MODULE_NAME ": "
161 #define M3_STATE_MAGIC 0x734d724d
162 #define M3_CARD_MAGIC 0x646e6f50
164 #define ESS_FMT_STEREO 0x01
165 #define ESS_FMT_16BIT 0x02
166 #define ESS_FMT_MASK 0x03
167 #define ESS_DAC_SHIFT 0
168 #define ESS_ADC_SHIFT 4
170 #define DAC_RUNNING 1
171 #define ADC_RUNNING 2
173 #define SND_DEV_DSP16 5
177 #define DPMOD 1 /* per module load */
178 #define DPSTR 2 /* per 'stream' */
179 #define DPSYS 3 /* per syscall */
180 #define DPCRAP 4 /* stuff the user shouldn't see unless they're really debuggin */
181 #define DPINT 5 /* per interrupt, LOTS */
182 #define DPRINTK(DP, args...) {if (debug >= (DP)) printk(KERN_DEBUG PFX args);}
193 static int external_amp
= 1;
194 static int gpio_pin
= -1;
198 struct m3_card
*card
;
199 unsigned char fmt
, enable
;
203 /* this locks around the oss state in the driver */
204 /* no, this lock is removed - only use card->lock */
205 /* otherwise: against what are you protecting on SMP
206 when irqhandler uses s->lock
207 and m3_assp_read uses card->lock ?
209 struct mutex open_mutex
;
210 wait_queue_head_t open_wait
;
215 struct assp_instance
{
217 } dac_inst
, adc_inst
;
219 /* should be in dmabuf */
220 unsigned int rateadc
, ratedac
;
227 unsigned hwptr
, swptr
;
228 unsigned total_bytes
;
230 unsigned error
; /* over/underrun */
231 wait_queue_head_t wait
;
232 /* redundant, but makes calculations easier */
235 unsigned fragsamples
;
239 unsigned endcleared
:1;
240 unsigned ossfragshift
;
242 unsigned subdivision
;
244 int mixer_index
, dma_index
, msrc_index
, adc1_index
;
255 struct m3_card
*next
;
257 struct ac97_codec
*ac97
;
258 spinlock_t ac97_lock
;
263 #define MAX_DSPS NR_DSPS
264 struct m3_state channels
[MAX_DSPS
];
266 /* this locks around the physical registers on the card */
269 /* hardware resources */
270 struct pci_dev
*pcidev
;
278 struct m3_list msrc_list
,
283 /* for storing reset state..*/
288 wait_queue_head_t suspend_queue
;
292 * an arbitrary volume we set the internal
293 * volume settings to so that the ac97 volume
294 * range is a little less insane. 0x7fff is
297 #define ARB_VOLUME ( 0x6800 )
299 static const unsigned sample_shift
[] = { 0, 1, 1, 2 };
305 * a maestro3 with 'hardware strapping', only
311 static char *card_names
[] = {
312 [ESS_ALLEGRO
] = "Allegro",
313 [ESS_MAESTRO3
] = "Maestro3(i)",
314 [ESS_MAESTRO3HW
] = "Maestro3(i)hw"
317 #ifndef PCI_VENDOR_ESS
318 #define PCI_VENDOR_ESS 0x125D
321 #define M3_DEVICE(DEV, TYPE) \
323 .vendor = PCI_VENDOR_ESS, \
325 .subvendor = PCI_ANY_ID, \
326 .subdevice = PCI_ANY_ID, \
327 .class = PCI_CLASS_MULTIMEDIA_AUDIO << 8, \
328 .class_mask = 0xffff << 8, \
329 .driver_data = TYPE, \
332 static struct pci_device_id m3_id_table
[] = {
333 M3_DEVICE(0x1988, ESS_ALLEGRO
),
334 M3_DEVICE(0x1998, ESS_MAESTRO3
),
335 M3_DEVICE(0x199a, ESS_MAESTRO3HW
),
339 MODULE_DEVICE_TABLE (pci
, m3_id_table
);
342 * reports seem to indicate that the m3 is limited
343 * to 28bit bus addresses. aaaargggh...
345 #define M3_PCI_DMA_MASK 0x0fffffff
373 static struct m3_card
*devs
;
376 * I'm not very good at laying out functions in a file :)
378 static int m3_notifier(struct notifier_block
*nb
, unsigned long event
, void *buf
);
379 static int m3_suspend(struct pci_dev
*pci_dev
, pm_message_t state
);
380 static void check_suspend(struct m3_card
*card
);
382 static struct notifier_block m3_reboot_nb
= {
383 .notifier_call
= m3_notifier
,
386 static void m3_outw(struct m3_card
*card
,
387 u16 value
, unsigned long reg
)
390 outw(value
, card
->iobase
+ reg
);
393 static u16
m3_inw(struct m3_card
*card
, unsigned long reg
)
396 return inw(card
->iobase
+ reg
);
398 static void m3_outb(struct m3_card
*card
,
399 u8 value
, unsigned long reg
)
402 outb(value
, card
->iobase
+ reg
);
404 static u8
m3_inb(struct m3_card
*card
, unsigned long reg
)
407 return inb(card
->iobase
+ reg
);
411 * access 16bit words to the code or data regions of the dsp's memory.
412 * index addresses 16bit words.
414 static u16
__m3_assp_read(struct m3_card
*card
, u16 region
, u16 index
)
416 m3_outw(card
, region
& MEMTYPE_MASK
, DSP_PORT_MEMORY_TYPE
);
417 m3_outw(card
, index
, DSP_PORT_MEMORY_INDEX
);
418 return m3_inw(card
, DSP_PORT_MEMORY_DATA
);
420 static u16
m3_assp_read(struct m3_card
*card
, u16 region
, u16 index
)
425 spin_lock_irqsave(&(card
->lock
), flags
);
426 ret
= __m3_assp_read(card
, region
, index
);
427 spin_unlock_irqrestore(&(card
->lock
), flags
);
432 static void __m3_assp_write(struct m3_card
*card
,
433 u16 region
, u16 index
, u16 data
)
435 m3_outw(card
, region
& MEMTYPE_MASK
, DSP_PORT_MEMORY_TYPE
);
436 m3_outw(card
, index
, DSP_PORT_MEMORY_INDEX
);
437 m3_outw(card
, data
, DSP_PORT_MEMORY_DATA
);
439 static void m3_assp_write(struct m3_card
*card
,
440 u16 region
, u16 index
, u16 data
)
444 spin_lock_irqsave(&(card
->lock
), flags
);
445 __m3_assp_write(card
, region
, index
, data
);
446 spin_unlock_irqrestore(&(card
->lock
), flags
);
449 static void m3_assp_halt(struct m3_card
*card
)
451 card
->reset_state
= m3_inb(card
, DSP_PORT_CONTROL_REG_B
) & ~REGB_STOP_CLOCK
;
453 m3_outb(card
, card
->reset_state
& ~REGB_ENABLE_RESET
, DSP_PORT_CONTROL_REG_B
);
456 static void m3_assp_continue(struct m3_card
*card
)
458 m3_outb(card
, card
->reset_state
| REGB_ENABLE_RESET
, DSP_PORT_CONTROL_REG_B
);
462 * This makes me sad. the maestro3 has lists
463 * internally that must be packed.. 0 terminates,
464 * apparently, or maybe all unused entries have
465 * to be 0, the lists have static lengths set
466 * by the binary code images.
469 static int m3_add_list(struct m3_card
*card
,
470 struct m3_list
*list
, u16 val
)
472 DPRINTK(DPSTR
, "adding val 0x%x to list 0x%p at pos %d\n",
473 val
, list
, list
->curlen
);
475 m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
476 list
->mem_addr
+ list
->curlen
,
479 return list
->curlen
++;
483 static void m3_remove_list(struct m3_card
*card
,
484 struct m3_list
*list
, int index
)
487 int lastindex
= list
->curlen
- 1;
489 DPRINTK(DPSTR
, "removing ind %d from list 0x%p\n",
492 if(index
!= lastindex
) {
493 val
= m3_assp_read(card
, MEMTYPE_INTERNAL_DATA
,
494 list
->mem_addr
+ lastindex
);
495 m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
496 list
->mem_addr
+ index
,
500 m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
501 list
->mem_addr
+ lastindex
,
507 static void set_fmt(struct m3_state
*s
, unsigned char mask
, unsigned char data
)
511 s
->fmt
= (s
->fmt
& mask
) | data
;
513 tmp
= (s
->fmt
>> ESS_DAC_SHIFT
) & ESS_FMT_MASK
;
515 /* write to 'mono' word */
516 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
517 s
->dac_inst
.data
+ SRC3_DIRECTION_OFFSET
+ 1,
518 (tmp
& ESS_FMT_STEREO
) ? 0 : 1);
519 /* write to '8bit' word */
520 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
521 s
->dac_inst
.data
+ SRC3_DIRECTION_OFFSET
+ 2,
522 (tmp
& ESS_FMT_16BIT
) ? 0 : 1);
524 tmp
= (s
->fmt
>> ESS_ADC_SHIFT
) & ESS_FMT_MASK
;
526 /* write to 'mono' word */
527 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
528 s
->adc_inst
.data
+ SRC3_DIRECTION_OFFSET
+ 1,
529 (tmp
& ESS_FMT_STEREO
) ? 0 : 1);
530 /* write to '8bit' word */
531 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
532 s
->adc_inst
.data
+ SRC3_DIRECTION_OFFSET
+ 2,
533 (tmp
& ESS_FMT_16BIT
) ? 0 : 1);
536 static void set_dac_rate(struct m3_state
*s
, unsigned int rate
)
547 freq
= ((rate
<< 15) + 24000 ) / 48000;
551 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
552 s
->dac_inst
.data
+ CDATA_FREQUENCY
,
556 static void set_adc_rate(struct m3_state
*s
, unsigned int rate
)
567 freq
= ((rate
<< 15) + 24000 ) / 48000;
571 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
572 s
->adc_inst
.data
+ CDATA_FREQUENCY
,
576 static void inc_timer_users(struct m3_card
*card
)
580 spin_lock_irqsave(&card
->lock
, flags
);
583 DPRINTK(DPSYS
, "inc timer users now %d\n",
585 if(card
->timer_users
!= 1)
588 __m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
589 KDATA_TIMER_COUNT_RELOAD
,
592 __m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
593 KDATA_TIMER_COUNT_CURRENT
,
597 m3_inw(card
, HOST_INT_CTRL
) | CLKRUN_GEN_ENABLE
,
600 spin_unlock_irqrestore(&card
->lock
, flags
);
603 static void dec_timer_users(struct m3_card
*card
)
607 spin_lock_irqsave(&card
->lock
, flags
);
610 DPRINTK(DPSYS
, "dec timer users now %d\n",
612 if(card
->timer_users
> 0 )
615 __m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
616 KDATA_TIMER_COUNT_RELOAD
,
619 __m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
620 KDATA_TIMER_COUNT_CURRENT
,
623 m3_outw(card
, m3_inw(card
, HOST_INT_CTRL
) & ~CLKRUN_GEN_ENABLE
,
626 spin_unlock_irqrestore(&card
->lock
, flags
);
630 * {start,stop}_{adc,dac} should be called
631 * while holding the 'state' lock and they
632 * will try to grab the 'card' lock..
634 static void stop_adc(struct m3_state
*s
)
636 if (! (s
->enable
& ADC_RUNNING
))
639 s
->enable
&= ~ADC_RUNNING
;
640 dec_timer_users(s
->card
);
642 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
643 s
->adc_inst
.data
+ CDATA_INSTANCE_READY
, 0);
645 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
646 KDATA_ADC1_REQUEST
, 0);
649 static void stop_dac(struct m3_state
*s
)
651 if (! (s
->enable
& DAC_RUNNING
))
654 DPRINTK(DPSYS
, "stop_dac()\n");
656 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
657 s
->dac_inst
.data
+ CDATA_INSTANCE_READY
, 0);
659 s
->enable
&= ~DAC_RUNNING
;
660 s
->card
->dacs_active
--;
661 dec_timer_users(s
->card
);
663 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
664 KDATA_MIXER_TASK_NUMBER
,
665 s
->card
->dacs_active
) ;
668 static void start_dac(struct m3_state
*s
)
670 if( (!s
->dma_dac
.mapped
&& s
->dma_dac
.count
< 1) ||
672 (s
->enable
& DAC_RUNNING
))
675 DPRINTK(DPSYS
, "start_dac()\n");
677 s
->enable
|= DAC_RUNNING
;
678 s
->card
->dacs_active
++;
679 inc_timer_users(s
->card
);
681 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
682 s
->dac_inst
.data
+ CDATA_INSTANCE_READY
, 1);
684 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
685 KDATA_MIXER_TASK_NUMBER
,
686 s
->card
->dacs_active
) ;
689 static void start_adc(struct m3_state
*s
)
691 if ((! s
->dma_adc
.mapped
&&
692 s
->dma_adc
.count
>= (signed)(s
->dma_adc
.dmasize
- 2*s
->dma_adc
.fragsize
))
694 || (s
->enable
& ADC_RUNNING
) )
697 DPRINTK(DPSYS
, "start_adc()\n");
699 s
->enable
|= ADC_RUNNING
;
700 inc_timer_users(s
->card
);
702 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
703 KDATA_ADC1_REQUEST
, 1);
705 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
706 s
->adc_inst
.data
+ CDATA_INSTANCE_READY
, 1);
709 static struct play_vals
{
712 {CDATA_LEFT_VOLUME
, ARB_VOLUME
},
713 {CDATA_RIGHT_VOLUME
, ARB_VOLUME
},
714 {SRC3_DIRECTION_OFFSET
, 0} ,
715 /* +1, +2 are stereo/16 bit */
716 {SRC3_DIRECTION_OFFSET
+ 3, 0x0000}, /* fraction? */
717 {SRC3_DIRECTION_OFFSET
+ 4, 0}, /* first l */
718 {SRC3_DIRECTION_OFFSET
+ 5, 0}, /* first r */
719 {SRC3_DIRECTION_OFFSET
+ 6, 0}, /* second l */
720 {SRC3_DIRECTION_OFFSET
+ 7, 0}, /* second r */
721 {SRC3_DIRECTION_OFFSET
+ 8, 0}, /* delta l */
722 {SRC3_DIRECTION_OFFSET
+ 9, 0}, /* delta r */
723 {SRC3_DIRECTION_OFFSET
+ 10, 0x8000}, /* round */
724 {SRC3_DIRECTION_OFFSET
+ 11, 0xFF00}, /* higher bute mark */
725 {SRC3_DIRECTION_OFFSET
+ 13, 0}, /* temp0 */
726 {SRC3_DIRECTION_OFFSET
+ 14, 0}, /* c fraction */
727 {SRC3_DIRECTION_OFFSET
+ 15, 0}, /* counter */
728 {SRC3_DIRECTION_OFFSET
+ 16, 8}, /* numin */
729 {SRC3_DIRECTION_OFFSET
+ 17, 50*2}, /* numout */
730 {SRC3_DIRECTION_OFFSET
+ 18, MINISRC_BIQUAD_STAGE
- 1}, /* numstage */
731 {SRC3_DIRECTION_OFFSET
+ 20, 0}, /* filtertap */
732 {SRC3_DIRECTION_OFFSET
+ 21, 0} /* booster */
736 /* the mode passed should be already shifted and masked */
737 static void m3_play_setup(struct m3_state
*s
, int mode
, u32 rate
, void *buffer
, int size
)
739 int dsp_in_size
= MINISRC_IN_BUFFER_SIZE
- (0x20 * 2);
740 int dsp_out_size
= MINISRC_OUT_BUFFER_SIZE
- (0x20 * 2);
741 int dsp_in_buffer
= s
->dac_inst
.data
+ (MINISRC_TMP_BUFFER_SIZE
/ 2);
742 int dsp_out_buffer
= dsp_in_buffer
+ (dsp_in_size
/ 2) + 1;
743 struct dmabuf
*db
= &s
->dma_dac
;
746 DPRINTK(DPSTR
, "mode=%d rate=%d buf=%p len=%d.\n",
747 mode
, rate
, buffer
, size
);
749 #define LO(x) ((x) & 0xffff)
750 #define HI(x) LO((x) >> 16)
752 /* host dma buffer pointers */
754 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
755 s
->dac_inst
.data
+ CDATA_HOST_SRC_ADDRL
,
756 LO(virt_to_bus(buffer
)));
758 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
759 s
->dac_inst
.data
+ CDATA_HOST_SRC_ADDRH
,
760 HI(virt_to_bus(buffer
)));
762 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
763 s
->dac_inst
.data
+ CDATA_HOST_SRC_END_PLUS_1L
,
764 LO(virt_to_bus(buffer
) + size
));
766 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
767 s
->dac_inst
.data
+ CDATA_HOST_SRC_END_PLUS_1H
,
768 HI(virt_to_bus(buffer
) + size
));
770 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
771 s
->dac_inst
.data
+ CDATA_HOST_SRC_CURRENTL
,
772 LO(virt_to_bus(buffer
)));
774 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
775 s
->dac_inst
.data
+ CDATA_HOST_SRC_CURRENTH
,
776 HI(virt_to_bus(buffer
)));
782 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
783 s
->dac_inst
.data
+ CDATA_IN_BUF_BEGIN
,
786 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
787 s
->dac_inst
.data
+ CDATA_IN_BUF_END_PLUS_1
,
788 dsp_in_buffer
+ (dsp_in_size
/ 2));
790 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
791 s
->dac_inst
.data
+ CDATA_IN_BUF_HEAD
,
794 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
795 s
->dac_inst
.data
+ CDATA_IN_BUF_TAIL
,
798 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
799 s
->dac_inst
.data
+ CDATA_OUT_BUF_BEGIN
,
802 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
803 s
->dac_inst
.data
+ CDATA_OUT_BUF_END_PLUS_1
,
804 dsp_out_buffer
+ (dsp_out_size
/ 2));
806 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
807 s
->dac_inst
.data
+ CDATA_OUT_BUF_HEAD
,
810 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
811 s
->dac_inst
.data
+ CDATA_OUT_BUF_TAIL
,
815 * some per client initializers
818 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
819 s
->dac_inst
.data
+ SRC3_DIRECTION_OFFSET
+ 12,
820 s
->dac_inst
.data
+ 40 + 8);
822 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
823 s
->dac_inst
.data
+ SRC3_DIRECTION_OFFSET
+ 19,
824 s
->dac_inst
.code
+ MINISRC_COEF_LOC
);
826 /* enable or disable low pass filter? */
827 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
828 s
->dac_inst
.data
+ SRC3_DIRECTION_OFFSET
+ 22,
829 s
->ratedac
> 45000 ? 0xff : 0 );
831 /* tell it which way dma is going? */
832 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
833 s
->dac_inst
.data
+ CDATA_DMA_CONTROL
,
834 DMACONTROL_AUTOREPEAT
+ DMAC_PAGE3_SELECTOR
+ DMAC_BLOCKF_SELECTOR
);
837 * set an armload of static initializers
839 for(i
= 0 ; i
< (sizeof(pv
) / sizeof(pv
[0])) ; i
++)
840 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
841 s
->dac_inst
.data
+ pv
[i
].addr
, pv
[i
].val
);
844 * put us in the lists if we're not already there
847 if(db
->in_lists
== 0) {
849 db
->msrc_index
= m3_add_list(s
->card
, &s
->card
->msrc_list
,
850 s
->dac_inst
.data
>> DP_SHIFT_COUNT
);
852 db
->dma_index
= m3_add_list(s
->card
, &s
->card
->dma_list
,
853 s
->dac_inst
.data
>> DP_SHIFT_COUNT
);
855 db
->mixer_index
= m3_add_list(s
->card
, &s
->card
->mixer_list
,
856 s
->dac_inst
.data
>> DP_SHIFT_COUNT
);
861 set_dac_rate(s
,rate
);
866 * Native record driver
868 static struct rec_vals
{
871 {CDATA_LEFT_VOLUME
, ARB_VOLUME
},
872 {CDATA_RIGHT_VOLUME
, ARB_VOLUME
},
873 {SRC3_DIRECTION_OFFSET
, 1} ,
874 /* +1, +2 are stereo/16 bit */
875 {SRC3_DIRECTION_OFFSET
+ 3, 0x0000}, /* fraction? */
876 {SRC3_DIRECTION_OFFSET
+ 4, 0}, /* first l */
877 {SRC3_DIRECTION_OFFSET
+ 5, 0}, /* first r */
878 {SRC3_DIRECTION_OFFSET
+ 6, 0}, /* second l */
879 {SRC3_DIRECTION_OFFSET
+ 7, 0}, /* second r */
880 {SRC3_DIRECTION_OFFSET
+ 8, 0}, /* delta l */
881 {SRC3_DIRECTION_OFFSET
+ 9, 0}, /* delta r */
882 {SRC3_DIRECTION_OFFSET
+ 10, 0x8000}, /* round */
883 {SRC3_DIRECTION_OFFSET
+ 11, 0xFF00}, /* higher bute mark */
884 {SRC3_DIRECTION_OFFSET
+ 13, 0}, /* temp0 */
885 {SRC3_DIRECTION_OFFSET
+ 14, 0}, /* c fraction */
886 {SRC3_DIRECTION_OFFSET
+ 15, 0}, /* counter */
887 {SRC3_DIRECTION_OFFSET
+ 16, 50},/* numin */
888 {SRC3_DIRECTION_OFFSET
+ 17, 8}, /* numout */
889 {SRC3_DIRECTION_OFFSET
+ 18, 0}, /* numstage */
890 {SRC3_DIRECTION_OFFSET
+ 19, 0}, /* coef */
891 {SRC3_DIRECTION_OFFSET
+ 20, 0}, /* filtertap */
892 {SRC3_DIRECTION_OFFSET
+ 21, 0}, /* booster */
893 {SRC3_DIRECTION_OFFSET
+ 22, 0xff} /* skip lpf */
896 /* again, passed mode is alrady shifted/masked */
897 static void m3_rec_setup(struct m3_state
*s
, int mode
, u32 rate
, void *buffer
, int size
)
899 int dsp_in_size
= MINISRC_IN_BUFFER_SIZE
+ (0x10 * 2);
900 int dsp_out_size
= MINISRC_OUT_BUFFER_SIZE
- (0x10 * 2);
901 int dsp_in_buffer
= s
->adc_inst
.data
+ (MINISRC_TMP_BUFFER_SIZE
/ 2);
902 int dsp_out_buffer
= dsp_in_buffer
+ (dsp_in_size
/ 2) + 1;
903 struct dmabuf
*db
= &s
->dma_adc
;
906 DPRINTK(DPSTR
, "rec_setup mode=%d rate=%d buf=%p len=%d.\n",
907 mode
, rate
, buffer
, size
);
909 #define LO(x) ((x) & 0xffff)
910 #define HI(x) LO((x) >> 16)
912 /* host dma buffer pointers */
914 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
915 s
->adc_inst
.data
+ CDATA_HOST_SRC_ADDRL
,
916 LO(virt_to_bus(buffer
)));
918 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
919 s
->adc_inst
.data
+ CDATA_HOST_SRC_ADDRH
,
920 HI(virt_to_bus(buffer
)));
922 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
923 s
->adc_inst
.data
+ CDATA_HOST_SRC_END_PLUS_1L
,
924 LO(virt_to_bus(buffer
) + size
));
926 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
927 s
->adc_inst
.data
+ CDATA_HOST_SRC_END_PLUS_1H
,
928 HI(virt_to_bus(buffer
) + size
));
930 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
931 s
->adc_inst
.data
+ CDATA_HOST_SRC_CURRENTL
,
932 LO(virt_to_bus(buffer
)));
934 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
935 s
->adc_inst
.data
+ CDATA_HOST_SRC_CURRENTH
,
936 HI(virt_to_bus(buffer
)));
942 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
943 s
->adc_inst
.data
+ CDATA_IN_BUF_BEGIN
,
946 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
947 s
->adc_inst
.data
+ CDATA_IN_BUF_END_PLUS_1
,
948 dsp_in_buffer
+ (dsp_in_size
/ 2));
950 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
951 s
->adc_inst
.data
+ CDATA_IN_BUF_HEAD
,
954 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
955 s
->adc_inst
.data
+ CDATA_IN_BUF_TAIL
,
958 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
959 s
->adc_inst
.data
+ CDATA_OUT_BUF_BEGIN
,
962 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
963 s
->adc_inst
.data
+ CDATA_OUT_BUF_END_PLUS_1
,
964 dsp_out_buffer
+ (dsp_out_size
/ 2));
966 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
967 s
->adc_inst
.data
+ CDATA_OUT_BUF_HEAD
,
970 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
971 s
->adc_inst
.data
+ CDATA_OUT_BUF_TAIL
,
975 * some per client initializers
978 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
979 s
->adc_inst
.data
+ SRC3_DIRECTION_OFFSET
+ 12,
980 s
->adc_inst
.data
+ 40 + 8);
982 /* tell it which way dma is going? */
983 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
984 s
->adc_inst
.data
+ CDATA_DMA_CONTROL
,
985 DMACONTROL_DIRECTION
+ DMACONTROL_AUTOREPEAT
+
986 DMAC_PAGE3_SELECTOR
+ DMAC_BLOCKF_SELECTOR
);
989 * set an armload of static initializers
991 for(i
= 0 ; i
< (sizeof(rv
) / sizeof(rv
[0])) ; i
++)
992 m3_assp_write(s
->card
, MEMTYPE_INTERNAL_DATA
,
993 s
->adc_inst
.data
+ rv
[i
].addr
, rv
[i
].val
);
996 * put us in the lists if we're not already there
999 if(db
->in_lists
== 0) {
1001 db
->adc1_index
= m3_add_list(s
->card
, &s
->card
->adc1_list
,
1002 s
->adc_inst
.data
>> DP_SHIFT_COUNT
);
1004 db
->dma_index
= m3_add_list(s
->card
, &s
->card
->dma_list
,
1005 s
->adc_inst
.data
>> DP_SHIFT_COUNT
);
1007 db
->msrc_index
= m3_add_list(s
->card
, &s
->card
->msrc_list
,
1008 s
->adc_inst
.data
>> DP_SHIFT_COUNT
);
1013 set_adc_rate(s
,rate
);
1016 /* --------------------------------------------------------------------- */
1018 static void set_dmaa(struct m3_state
*s
, unsigned int addr
, unsigned int count
)
1020 DPRINTK(DPINT
,"set_dmaa??\n");
1023 static void set_dmac(struct m3_state
*s
, unsigned int addr
, unsigned int count
)
1025 DPRINTK(DPINT
,"set_dmac??\n");
1028 static u32
get_dma_pos(struct m3_card
*card
,
1035 * try and get a valid answer
1038 hi
= m3_assp_read(card
, MEMTYPE_INTERNAL_DATA
,
1039 instance_addr
+ CDATA_HOST_SRC_CURRENTH
);
1041 lo
= m3_assp_read(card
, MEMTYPE_INTERNAL_DATA
,
1042 instance_addr
+ CDATA_HOST_SRC_CURRENTL
);
1044 if(hi
== m3_assp_read(card
, MEMTYPE_INTERNAL_DATA
,
1045 instance_addr
+ CDATA_HOST_SRC_CURRENTH
))
1048 return lo
| (hi
<<16);
1051 static u32
get_dmaa(struct m3_state
*s
)
1055 offset
= get_dma_pos(s
->card
, s
->dac_inst
.data
) -
1056 virt_to_bus(s
->dma_dac
.rawbuf
);
1058 DPRINTK(DPINT
,"get_dmaa: 0x%08x\n",offset
);
1063 static u32
get_dmac(struct m3_state
*s
)
1067 offset
= get_dma_pos(s
->card
, s
->adc_inst
.data
) -
1068 virt_to_bus(s
->dma_adc
.rawbuf
);
1070 DPRINTK(DPINT
,"get_dmac: 0x%08x\n",offset
);
1077 prog_dmabuf(struct m3_state
*s
, unsigned rec
)
1079 struct dmabuf
*db
= rec
? &s
->dma_adc
: &s
->dma_dac
;
1080 unsigned rate
= rec
? s
->rateadc
: s
->ratedac
;
1081 unsigned bytepersec
;
1084 unsigned long flags
;
1086 spin_lock_irqsave(&s
->card
->lock
, flags
);
1091 fmt
>>= ESS_ADC_SHIFT
;
1094 fmt
>>= ESS_DAC_SHIFT
;
1096 fmt
&= ESS_FMT_MASK
;
1098 db
->hwptr
= db
->swptr
= db
->total_bytes
= db
->count
= db
->error
= db
->endcleared
= 0;
1100 bytepersec
= rate
<< sample_shift
[fmt
];
1101 bufs
= PAGE_SIZE
<< db
->buforder
;
1102 if (db
->ossfragshift
) {
1103 if ((1000 << db
->ossfragshift
) < bytepersec
)
1104 db
->fragshift
= ld2(bytepersec
/1000);
1106 db
->fragshift
= db
->ossfragshift
;
1108 db
->fragshift
= ld2(bytepersec
/100/(db
->subdivision
? db
->subdivision
: 1));
1109 if (db
->fragshift
< 3)
1112 db
->numfrag
= bufs
>> db
->fragshift
;
1113 while (db
->numfrag
< 4 && db
->fragshift
> 3) {
1115 db
->numfrag
= bufs
>> db
->fragshift
;
1117 db
->fragsize
= 1 << db
->fragshift
;
1118 if (db
->ossmaxfrags
>= 4 && db
->ossmaxfrags
< db
->numfrag
)
1119 db
->numfrag
= db
->ossmaxfrags
;
1120 db
->fragsamples
= db
->fragsize
>> sample_shift
[fmt
];
1121 db
->dmasize
= db
->numfrag
<< db
->fragshift
;
1123 DPRINTK(DPSTR
,"prog_dmabuf: numfrag: %d fragsize: %d dmasize: %d\n",db
->numfrag
,db
->fragsize
,db
->dmasize
);
1125 memset(db
->rawbuf
, (fmt
& ESS_FMT_16BIT
) ? 0 : 0x80, db
->dmasize
);
1128 m3_rec_setup(s
, fmt
, s
->rateadc
, db
->rawbuf
, db
->dmasize
);
1130 m3_play_setup(s
, fmt
, s
->ratedac
, db
->rawbuf
, db
->dmasize
);
1134 spin_unlock_irqrestore(&s
->card
->lock
, flags
);
1139 static void clear_advance(struct m3_state
*s
)
1141 unsigned char c
= ((s
->fmt
>> ESS_DAC_SHIFT
) & ESS_FMT_16BIT
) ? 0 : 0x80;
1143 unsigned char *buf
= s
->dma_dac
.rawbuf
;
1144 unsigned bsize
= s
->dma_dac
.dmasize
;
1145 unsigned bptr
= s
->dma_dac
.swptr
;
1146 unsigned len
= s
->dma_dac
.fragsize
;
1148 if (bptr
+ len
> bsize
) {
1149 unsigned x
= bsize
- bptr
;
1150 memset(buf
+ bptr
, c
, x
);
1151 /* account for wrapping? */
1155 memset(buf
+ bptr
, c
, len
);
1158 /* call with spinlock held! */
1159 static void m3_update_ptr(struct m3_state
*s
)
1164 /* update ADC pointer */
1165 if (s
->dma_adc
.ready
) {
1166 hwptr
= get_dmac(s
) % s
->dma_adc
.dmasize
;
1167 diff
= (s
->dma_adc
.dmasize
+ hwptr
- s
->dma_adc
.hwptr
) % s
->dma_adc
.dmasize
;
1168 s
->dma_adc
.hwptr
= hwptr
;
1169 s
->dma_adc
.total_bytes
+= diff
;
1170 s
->dma_adc
.count
+= diff
;
1171 if (s
->dma_adc
.count
>= (signed)s
->dma_adc
.fragsize
)
1172 wake_up(&s
->dma_adc
.wait
);
1173 if (!s
->dma_adc
.mapped
) {
1174 if (s
->dma_adc
.count
> (signed)(s
->dma_adc
.dmasize
- ((3 * s
->dma_adc
.fragsize
) >> 1))) {
1176 /* brute force everyone back in sync, sigh */
1177 s
->dma_adc
.count
= 0;
1178 s
->dma_adc
.swptr
= 0;
1179 s
->dma_adc
.hwptr
= 0;
1184 /* update DAC pointer */
1185 if (s
->dma_dac
.ready
) {
1186 hwptr
= get_dmaa(s
) % s
->dma_dac
.dmasize
;
1187 diff
= (s
->dma_dac
.dmasize
+ hwptr
- s
->dma_dac
.hwptr
) % s
->dma_dac
.dmasize
;
1189 DPRINTK(DPINT
,"updating dac: hwptr: %6d diff: %6d count: %6d\n",
1190 hwptr
,diff
,s
->dma_dac
.count
);
1192 s
->dma_dac
.hwptr
= hwptr
;
1193 s
->dma_dac
.total_bytes
+= diff
;
1195 if (s
->dma_dac
.mapped
) {
1197 s
->dma_dac
.count
+= diff
;
1198 if (s
->dma_dac
.count
>= (signed)s
->dma_dac
.fragsize
) {
1199 wake_up(&s
->dma_dac
.wait
);
1203 s
->dma_dac
.count
-= diff
;
1205 if (s
->dma_dac
.count
<= 0) {
1206 DPRINTK(DPCRAP
,"underflow! diff: %d (0x%x) count: %d (0x%x) hw: %d (0x%x) sw: %d (0x%x)\n",
1214 /* brute force everyone back in sync, sigh */
1215 s
->dma_dac
.count
= 0;
1216 s
->dma_dac
.swptr
= hwptr
;
1218 } else if (s
->dma_dac
.count
<= (signed)s
->dma_dac
.fragsize
&& !s
->dma_dac
.endcleared
) {
1220 s
->dma_dac
.endcleared
= 1;
1222 if (s
->dma_dac
.count
+ (signed)s
->dma_dac
.fragsize
<= (signed)s
->dma_dac
.dmasize
) {
1223 wake_up(&s
->dma_dac
.wait
);
1224 DPRINTK(DPINT
,"waking up DAC count: %d sw: %d hw: %d\n",
1225 s
->dma_dac
.count
, s
->dma_dac
.swptr
, hwptr
);
1231 static irqreturn_t
m3_interrupt(int irq
, void *dev_id
, struct pt_regs
*regs
)
1233 struct m3_card
*c
= (struct m3_card
*)dev_id
;
1234 struct m3_state
*s
= &c
->channels
[0];
1237 status
= inb(c
->iobase
+0x1A);
1242 /* presumably acking the ints? */
1243 outw(status
, c
->iobase
+0x1A);
1249 * ack an assp int if its running
1250 * and has an int pending
1252 if( status
& ASSP_INT_PENDING
) {
1253 u8 ctl
= inb(c
->iobase
+ ASSP_CONTROL_B
);
1254 if( !(ctl
& STOP_ASSP_CLOCK
)) {
1255 ctl
= inb(c
->iobase
+ ASSP_HOST_INT_STATUS
);
1256 if(ctl
& DSP2HOST_REQ_TIMER
) {
1257 outb( DSP2HOST_REQ_TIMER
, c
->iobase
+ ASSP_HOST_INT_STATUS
);
1258 /* update adc/dac info if it was a timer int */
1259 spin_lock(&c
->lock
);
1261 spin_unlock(&c
->lock
);
1266 /* XXX is this needed? */
1268 outb(0x40, c
->iobase
+0x1A);
1273 /* --------------------------------------------------------------------- */
1275 static const char invalid_magic
[] = KERN_CRIT PFX
"invalid magic value in %s\n";
1277 #define VALIDATE_MAGIC(FOO,MAG) \
1279 if (!(FOO) || (FOO)->magic != MAG) { \
1280 printk(invalid_magic,__FUNCTION__); \
1285 #define VALIDATE_STATE(a) VALIDATE_MAGIC(a,M3_STATE_MAGIC)
1286 #define VALIDATE_CARD(a) VALIDATE_MAGIC(a,M3_CARD_MAGIC)
1288 /* --------------------------------------------------------------------- */
1290 static int drain_dac(struct m3_state
*s
, int nonblock
)
1292 DECLARE_WAITQUEUE(wait
,current
);
1293 unsigned long flags
;
1297 if (s
->dma_dac
.mapped
|| !s
->dma_dac
.ready
)
1299 set_current_state(TASK_INTERRUPTIBLE
);
1300 add_wait_queue(&s
->dma_dac
.wait
, &wait
);
1302 spin_lock_irqsave(&s
->card
->lock
, flags
);
1303 count
= s
->dma_dac
.count
;
1304 spin_unlock_irqrestore(&s
->card
->lock
, flags
);
1307 if (signal_pending(current
))
1310 remove_wait_queue(&s
->dma_dac
.wait
, &wait
);
1311 set_current_state(TASK_RUNNING
);
1314 tmo
= (count
* HZ
) / s
->ratedac
;
1315 tmo
>>= sample_shift
[(s
->fmt
>> ESS_DAC_SHIFT
) & ESS_FMT_MASK
];
1316 /* XXX this is just broken. someone is waking us up alot, or schedule_timeout is broken.
1317 or something. who cares. - zach */
1318 if (!schedule_timeout(tmo
? tmo
: 1) && tmo
)
1319 DPRINTK(DPCRAP
,"dma timed out?? %ld\n",jiffies
);
1321 remove_wait_queue(&s
->dma_dac
.wait
, &wait
);
1322 set_current_state(TASK_RUNNING
);
1323 if (signal_pending(current
))
1324 return -ERESTARTSYS
;
1328 static ssize_t
m3_read(struct file
*file
, char __user
*buffer
, size_t count
, loff_t
*ppos
)
1330 struct m3_state
*s
= (struct m3_state
*)file
->private_data
;
1332 unsigned long flags
;
1337 if (s
->dma_adc
.mapped
)
1339 if (!s
->dma_adc
.ready
&& (ret
= prog_dmabuf(s
, 1)))
1341 if (!access_ok(VERIFY_WRITE
, buffer
, count
))
1345 spin_lock_irqsave(&s
->card
->lock
, flags
);
1350 swptr
= s
->dma_adc
.swptr
;
1351 cnt
= s
->dma_adc
.dmasize
-swptr
;
1352 if (s
->dma_adc
.count
< cnt
)
1353 cnt
= s
->dma_adc
.count
;
1360 if (file
->f_flags
& O_NONBLOCK
)
1362 ret
= ret
? ret
: -EAGAIN
;
1366 spin_unlock_irqrestore(&s
->card
->lock
, flags
);
1367 timed_out
= interruptible_sleep_on_timeout(&s
->dma_adc
.wait
, HZ
) == 0;
1368 spin_lock_irqsave(&s
->card
->lock
, flags
);
1371 printk("read: chip lockup? dmasz %u fragsz %u count %u hwptr %u swptr %u\n",
1372 s
->dma_adc
.dmasize
, s
->dma_adc
.fragsize
, s
->dma_adc
.count
,
1373 s
->dma_adc
.hwptr
, s
->dma_adc
.swptr
);
1375 set_dmac(s
, virt_to_bus(s
->dma_adc
.rawbuf
), s
->dma_adc
.numfrag
<< s
->dma_adc
.fragshift
);
1376 s
->dma_adc
.count
= s
->dma_adc
.hwptr
= s
->dma_adc
.swptr
= 0;
1378 if (signal_pending(current
))
1380 ret
= ret
? ret
: -ERESTARTSYS
;
1386 spin_unlock_irqrestore(&s
->card
->lock
, flags
);
1387 if (copy_to_user(buffer
, s
->dma_adc
.rawbuf
+ swptr
, cnt
)) {
1388 ret
= ret
? ret
: -EFAULT
;
1391 spin_lock_irqsave(&s
->card
->lock
, flags
);
1393 swptr
= (swptr
+ cnt
) % s
->dma_adc
.dmasize
;
1394 s
->dma_adc
.swptr
= swptr
;
1395 s
->dma_adc
.count
-= cnt
;
1403 spin_unlock_irqrestore(&s
->card
->lock
, flags
);
1407 static ssize_t
m3_write(struct file
*file
, const char __user
*buffer
, size_t count
, loff_t
*ppos
)
1409 struct m3_state
*s
= (struct m3_state
*)file
->private_data
;
1411 unsigned long flags
;
1416 if (s
->dma_dac
.mapped
)
1418 if (!s
->dma_dac
.ready
&& (ret
= prog_dmabuf(s
, 0)))
1420 if (!access_ok(VERIFY_READ
, buffer
, count
))
1424 spin_lock_irqsave(&s
->card
->lock
, flags
);
1429 if (s
->dma_dac
.count
< 0) {
1430 s
->dma_dac
.count
= 0;
1431 s
->dma_dac
.swptr
= s
->dma_dac
.hwptr
;
1433 swptr
= s
->dma_dac
.swptr
;
1435 cnt
= s
->dma_dac
.dmasize
-swptr
;
1437 if (s
->dma_dac
.count
+ cnt
> s
->dma_dac
.dmasize
)
1438 cnt
= s
->dma_dac
.dmasize
- s
->dma_dac
.count
;
1446 if (file
->f_flags
& O_NONBLOCK
) {
1447 if(!ret
) ret
= -EAGAIN
;
1450 spin_unlock_irqrestore(&s
->card
->lock
, flags
);
1451 timed_out
= interruptible_sleep_on_timeout(&s
->dma_dac
.wait
, HZ
) == 0;
1452 spin_lock_irqsave(&s
->card
->lock
, flags
);
1454 DPRINTK(DPCRAP
,"write: chip lockup? dmasz %u fragsz %u count %u hwptr %u swptr %u\n",
1455 s
->dma_dac
.dmasize
, s
->dma_dac
.fragsize
, s
->dma_dac
.count
,
1456 s
->dma_dac
.hwptr
, s
->dma_dac
.swptr
);
1458 set_dmaa(s
, virt_to_bus(s
->dma_dac
.rawbuf
), s
->dma_dac
.numfrag
<< s
->dma_dac
.fragshift
);
1459 s
->dma_dac
.count
= s
->dma_dac
.hwptr
= s
->dma_dac
.swptr
= 0;
1461 if (signal_pending(current
)) {
1462 if (!ret
) ret
= -ERESTARTSYS
;
1467 spin_unlock_irqrestore(&s
->card
->lock
, flags
);
1468 if (copy_from_user(s
->dma_dac
.rawbuf
+ swptr
, buffer
, cnt
)) {
1469 if (!ret
) ret
= -EFAULT
;
1472 spin_lock_irqsave(&s
->card
->lock
, flags
);
1474 DPRINTK(DPSYS
,"wrote %6d bytes at sw: %6d cnt: %6d while hw: %6d\n",
1475 cnt
, swptr
, s
->dma_dac
.count
, s
->dma_dac
.hwptr
);
1477 swptr
= (swptr
+ cnt
) % s
->dma_dac
.dmasize
;
1479 s
->dma_dac
.swptr
= swptr
;
1480 s
->dma_dac
.count
+= cnt
;
1481 s
->dma_dac
.endcleared
= 0;
1488 spin_unlock_irqrestore(&s
->card
->lock
, flags
);
1492 static unsigned int m3_poll(struct file
*file
, struct poll_table_struct
*wait
)
1494 struct m3_state
*s
= (struct m3_state
*)file
->private_data
;
1495 unsigned long flags
;
1496 unsigned int mask
= 0;
1499 if (file
->f_mode
& FMODE_WRITE
)
1500 poll_wait(file
, &s
->dma_dac
.wait
, wait
);
1501 if (file
->f_mode
& FMODE_READ
)
1502 poll_wait(file
, &s
->dma_adc
.wait
, wait
);
1504 spin_lock_irqsave(&s
->card
->lock
, flags
);
1507 if (file
->f_mode
& FMODE_READ
) {
1508 if (s
->dma_adc
.count
>= (signed)s
->dma_adc
.fragsize
)
1509 mask
|= POLLIN
| POLLRDNORM
;
1511 if (file
->f_mode
& FMODE_WRITE
) {
1512 if (s
->dma_dac
.mapped
) {
1513 if (s
->dma_dac
.count
>= (signed)s
->dma_dac
.fragsize
)
1514 mask
|= POLLOUT
| POLLWRNORM
;
1516 if ((signed)s
->dma_dac
.dmasize
>= s
->dma_dac
.count
+ (signed)s
->dma_dac
.fragsize
)
1517 mask
|= POLLOUT
| POLLWRNORM
;
1521 spin_unlock_irqrestore(&s
->card
->lock
, flags
);
1525 static int m3_mmap(struct file
*file
, struct vm_area_struct
*vma
)
1527 struct m3_state
*s
= (struct m3_state
*)file
->private_data
;
1528 unsigned long max_size
, size
, start
, offset
;
1533 if (vma
->vm_flags
& VM_WRITE
) {
1534 if ((ret
= prog_dmabuf(s
, 0)) != 0)
1538 if (vma
->vm_flags
& VM_READ
) {
1539 if ((ret
= prog_dmabuf(s
, 1)) != 0)
1545 max_size
= db
->dmasize
;
1547 start
= vma
->vm_start
;
1548 offset
= (vma
->vm_pgoff
<< PAGE_SHIFT
);
1549 size
= vma
->vm_end
- vma
->vm_start
;
1553 if(offset
> max_size
- size
)
1557 * this will be ->nopage() once I can
1558 * ask Jeff what the hell I'm doing wrong.
1561 if (remap_pfn_range(vma
, vma
->vm_start
,
1562 virt_to_phys(db
->rawbuf
) >> PAGE_SHIFT
,
1563 size
, vma
->vm_page_prot
))
1574 * this function is a disaster..
1576 #define get_user_ret(x, ptr, ret) ({ if(get_user(x, ptr)) return ret; })
1577 static int m3_ioctl(struct inode
*inode
, struct file
*file
, unsigned int cmd
, unsigned long arg
)
1579 struct m3_state
*s
= (struct m3_state
*)file
->private_data
;
1580 struct m3_card
*card
=s
->card
;
1581 unsigned long flags
;
1582 audio_buf_info abinfo
;
1584 int val
, mapped
, ret
;
1585 unsigned char fmtm
, fmtd
;
1586 void __user
*argp
= (void __user
*)arg
;
1587 int __user
*p
= argp
;
1591 mapped
= ((file
->f_mode
& FMODE_WRITE
) && s
->dma_dac
.mapped
) ||
1592 ((file
->f_mode
& FMODE_READ
) && s
->dma_adc
.mapped
);
1594 DPRINTK(DPSYS
,"m3_ioctl: cmd %d\n", cmd
);
1597 case OSS_GETVERSION
:
1598 return put_user(SOUND_VERSION
, p
);
1600 case SNDCTL_DSP_SYNC
:
1601 if (file
->f_mode
& FMODE_WRITE
)
1602 return drain_dac(s
, file
->f_flags
& O_NONBLOCK
);
1605 case SNDCTL_DSP_SETDUPLEX
:
1609 case SNDCTL_DSP_GETCAPS
:
1610 return put_user(DSP_CAP_DUPLEX
| DSP_CAP_REALTIME
| DSP_CAP_TRIGGER
| DSP_CAP_MMAP
, p
);
1612 case SNDCTL_DSP_RESET
:
1613 spin_lock_irqsave(&card
->lock
, flags
);
1614 if (file
->f_mode
& FMODE_WRITE
) {
1616 synchronize_irq(s
->card
->pcidev
->irq
);
1617 s
->dma_dac
.swptr
= s
->dma_dac
.hwptr
= s
->dma_dac
.count
= s
->dma_dac
.total_bytes
= 0;
1619 if (file
->f_mode
& FMODE_READ
) {
1621 synchronize_irq(s
->card
->pcidev
->irq
);
1622 s
->dma_adc
.swptr
= s
->dma_adc
.hwptr
= s
->dma_adc
.count
= s
->dma_adc
.total_bytes
= 0;
1624 spin_unlock_irqrestore(&card
->lock
, flags
);
1627 case SNDCTL_DSP_SPEED
:
1628 get_user_ret(val
, p
, -EFAULT
);
1629 spin_lock_irqsave(&card
->lock
, flags
);
1631 if (file
->f_mode
& FMODE_READ
) {
1633 s
->dma_adc
.ready
= 0;
1634 set_adc_rate(s
, val
);
1636 if (file
->f_mode
& FMODE_WRITE
) {
1638 s
->dma_dac
.ready
= 0;
1639 set_dac_rate(s
, val
);
1642 spin_unlock_irqrestore(&card
->lock
, flags
);
1643 return put_user((file
->f_mode
& FMODE_READ
) ? s
->rateadc
: s
->ratedac
, p
);
1645 case SNDCTL_DSP_STEREO
:
1646 get_user_ret(val
, p
, -EFAULT
);
1647 spin_lock_irqsave(&card
->lock
, flags
);
1650 if (file
->f_mode
& FMODE_READ
) {
1652 s
->dma_adc
.ready
= 0;
1654 fmtd
|= ESS_FMT_STEREO
<< ESS_ADC_SHIFT
;
1656 fmtm
&= ~(ESS_FMT_STEREO
<< ESS_ADC_SHIFT
);
1658 if (file
->f_mode
& FMODE_WRITE
) {
1660 s
->dma_dac
.ready
= 0;
1662 fmtd
|= ESS_FMT_STEREO
<< ESS_DAC_SHIFT
;
1664 fmtm
&= ~(ESS_FMT_STEREO
<< ESS_DAC_SHIFT
);
1666 set_fmt(s
, fmtm
, fmtd
);
1667 spin_unlock_irqrestore(&card
->lock
, flags
);
1670 case SNDCTL_DSP_CHANNELS
:
1671 get_user_ret(val
, p
, -EFAULT
);
1672 spin_lock_irqsave(&card
->lock
, flags
);
1676 if (file
->f_mode
& FMODE_READ
) {
1678 s
->dma_adc
.ready
= 0;
1680 fmtd
|= ESS_FMT_STEREO
<< ESS_ADC_SHIFT
;
1682 fmtm
&= ~(ESS_FMT_STEREO
<< ESS_ADC_SHIFT
);
1684 if (file
->f_mode
& FMODE_WRITE
) {
1686 s
->dma_dac
.ready
= 0;
1688 fmtd
|= ESS_FMT_STEREO
<< ESS_DAC_SHIFT
;
1690 fmtm
&= ~(ESS_FMT_STEREO
<< ESS_DAC_SHIFT
);
1692 set_fmt(s
, fmtm
, fmtd
);
1694 spin_unlock_irqrestore(&card
->lock
, flags
);
1695 return put_user((s
->fmt
& ((file
->f_mode
& FMODE_READ
) ? (ESS_FMT_STEREO
<< ESS_ADC_SHIFT
)
1696 : (ESS_FMT_STEREO
<< ESS_DAC_SHIFT
))) ? 2 : 1, p
);
1698 case SNDCTL_DSP_GETFMTS
: /* Returns a mask */
1699 return put_user(AFMT_U8
|AFMT_S16_LE
, p
);
1701 case SNDCTL_DSP_SETFMT
: /* Selects ONE fmt*/
1702 get_user_ret(val
, p
, -EFAULT
);
1703 spin_lock_irqsave(&card
->lock
, flags
);
1704 if (val
!= AFMT_QUERY
) {
1707 if (file
->f_mode
& FMODE_READ
) {
1709 s
->dma_adc
.ready
= 0;
1710 if (val
== AFMT_S16_LE
)
1711 fmtd
|= ESS_FMT_16BIT
<< ESS_ADC_SHIFT
;
1713 fmtm
&= ~(ESS_FMT_16BIT
<< ESS_ADC_SHIFT
);
1715 if (file
->f_mode
& FMODE_WRITE
) {
1717 s
->dma_dac
.ready
= 0;
1718 if (val
== AFMT_S16_LE
)
1719 fmtd
|= ESS_FMT_16BIT
<< ESS_DAC_SHIFT
;
1721 fmtm
&= ~(ESS_FMT_16BIT
<< ESS_DAC_SHIFT
);
1723 set_fmt(s
, fmtm
, fmtd
);
1725 spin_unlock_irqrestore(&card
->lock
, flags
);
1726 return put_user((s
->fmt
& ((file
->f_mode
& FMODE_READ
) ?
1727 (ESS_FMT_16BIT
<< ESS_ADC_SHIFT
)
1728 : (ESS_FMT_16BIT
<< ESS_DAC_SHIFT
))) ?
1733 case SNDCTL_DSP_POST
:
1736 case SNDCTL_DSP_GETTRIGGER
:
1738 if ((file
->f_mode
& FMODE_READ
) && (s
->enable
& ADC_RUNNING
))
1739 val
|= PCM_ENABLE_INPUT
;
1740 if ((file
->f_mode
& FMODE_WRITE
) && (s
->enable
& DAC_RUNNING
))
1741 val
|= PCM_ENABLE_OUTPUT
;
1742 return put_user(val
, p
);
1744 case SNDCTL_DSP_SETTRIGGER
:
1745 get_user_ret(val
, p
, -EFAULT
);
1746 if (file
->f_mode
& FMODE_READ
) {
1747 if (val
& PCM_ENABLE_INPUT
) {
1748 if (!s
->dma_adc
.ready
&& (ret
= prog_dmabuf(s
, 1)))
1754 if (file
->f_mode
& FMODE_WRITE
) {
1755 if (val
& PCM_ENABLE_OUTPUT
) {
1756 if (!s
->dma_dac
.ready
&& (ret
= prog_dmabuf(s
, 0)))
1764 case SNDCTL_DSP_GETOSPACE
:
1765 if (!(file
->f_mode
& FMODE_WRITE
))
1767 if (!(s
->enable
& DAC_RUNNING
) && (val
= prog_dmabuf(s
, 0)) != 0)
1769 spin_lock_irqsave(&card
->lock
, flags
);
1771 abinfo
.fragsize
= s
->dma_dac
.fragsize
;
1772 abinfo
.bytes
= s
->dma_dac
.dmasize
- s
->dma_dac
.count
;
1773 abinfo
.fragstotal
= s
->dma_dac
.numfrag
;
1774 abinfo
.fragments
= abinfo
.bytes
>> s
->dma_dac
.fragshift
;
1775 spin_unlock_irqrestore(&card
->lock
, flags
);
1776 return copy_to_user(argp
, &abinfo
, sizeof(abinfo
)) ? -EFAULT
: 0;
1778 case SNDCTL_DSP_GETISPACE
:
1779 if (!(file
->f_mode
& FMODE_READ
))
1781 if (!(s
->enable
& ADC_RUNNING
) && (val
= prog_dmabuf(s
, 1)) != 0)
1783 spin_lock_irqsave(&card
->lock
, flags
);
1785 abinfo
.fragsize
= s
->dma_adc
.fragsize
;
1786 abinfo
.bytes
= s
->dma_adc
.count
;
1787 abinfo
.fragstotal
= s
->dma_adc
.numfrag
;
1788 abinfo
.fragments
= abinfo
.bytes
>> s
->dma_adc
.fragshift
;
1789 spin_unlock_irqrestore(&card
->lock
, flags
);
1790 return copy_to_user(argp
, &abinfo
, sizeof(abinfo
)) ? -EFAULT
: 0;
1792 case SNDCTL_DSP_NONBLOCK
:
1793 file
->f_flags
|= O_NONBLOCK
;
1796 case SNDCTL_DSP_GETODELAY
:
1797 if (!(file
->f_mode
& FMODE_WRITE
))
1799 spin_lock_irqsave(&card
->lock
, flags
);
1801 val
= s
->dma_dac
.count
;
1802 spin_unlock_irqrestore(&card
->lock
, flags
);
1803 return put_user(val
, p
);
1805 case SNDCTL_DSP_GETIPTR
:
1806 if (!(file
->f_mode
& FMODE_READ
))
1808 spin_lock_irqsave(&card
->lock
, flags
);
1810 cinfo
.bytes
= s
->dma_adc
.total_bytes
;
1811 cinfo
.blocks
= s
->dma_adc
.count
>> s
->dma_adc
.fragshift
;
1812 cinfo
.ptr
= s
->dma_adc
.hwptr
;
1813 if (s
->dma_adc
.mapped
)
1814 s
->dma_adc
.count
&= s
->dma_adc
.fragsize
-1;
1815 spin_unlock_irqrestore(&card
->lock
, flags
);
1816 if (copy_to_user(argp
, &cinfo
, sizeof(cinfo
)))
1820 case SNDCTL_DSP_GETOPTR
:
1821 if (!(file
->f_mode
& FMODE_WRITE
))
1823 spin_lock_irqsave(&card
->lock
, flags
);
1825 cinfo
.bytes
= s
->dma_dac
.total_bytes
;
1826 cinfo
.blocks
= s
->dma_dac
.count
>> s
->dma_dac
.fragshift
;
1827 cinfo
.ptr
= s
->dma_dac
.hwptr
;
1828 if (s
->dma_dac
.mapped
)
1829 s
->dma_dac
.count
&= s
->dma_dac
.fragsize
-1;
1830 spin_unlock_irqrestore(&card
->lock
, flags
);
1831 if (copy_to_user(argp
, &cinfo
, sizeof(cinfo
)))
1835 case SNDCTL_DSP_GETBLKSIZE
:
1836 if (file
->f_mode
& FMODE_WRITE
) {
1837 if ((val
= prog_dmabuf(s
, 0)))
1839 return put_user(s
->dma_dac
.fragsize
, p
);
1841 if ((val
= prog_dmabuf(s
, 1)))
1843 return put_user(s
->dma_adc
.fragsize
, p
);
1845 case SNDCTL_DSP_SETFRAGMENT
:
1846 get_user_ret(val
, p
, -EFAULT
);
1847 spin_lock_irqsave(&card
->lock
, flags
);
1848 if (file
->f_mode
& FMODE_READ
) {
1849 s
->dma_adc
.ossfragshift
= val
& 0xffff;
1850 s
->dma_adc
.ossmaxfrags
= (val
>> 16) & 0xffff;
1851 if (s
->dma_adc
.ossfragshift
< 4)
1852 s
->dma_adc
.ossfragshift
= 4;
1853 if (s
->dma_adc
.ossfragshift
> 15)
1854 s
->dma_adc
.ossfragshift
= 15;
1855 if (s
->dma_adc
.ossmaxfrags
< 4)
1856 s
->dma_adc
.ossmaxfrags
= 4;
1858 if (file
->f_mode
& FMODE_WRITE
) {
1859 s
->dma_dac
.ossfragshift
= val
& 0xffff;
1860 s
->dma_dac
.ossmaxfrags
= (val
>> 16) & 0xffff;
1861 if (s
->dma_dac
.ossfragshift
< 4)
1862 s
->dma_dac
.ossfragshift
= 4;
1863 if (s
->dma_dac
.ossfragshift
> 15)
1864 s
->dma_dac
.ossfragshift
= 15;
1865 if (s
->dma_dac
.ossmaxfrags
< 4)
1866 s
->dma_dac
.ossmaxfrags
= 4;
1868 spin_unlock_irqrestore(&card
->lock
, flags
);
1871 case SNDCTL_DSP_SUBDIVIDE
:
1872 if ((file
->f_mode
& FMODE_READ
&& s
->dma_adc
.subdivision
) ||
1873 (file
->f_mode
& FMODE_WRITE
&& s
->dma_dac
.subdivision
))
1875 get_user_ret(val
, p
, -EFAULT
);
1876 if (val
!= 1 && val
!= 2 && val
!= 4)
1878 if (file
->f_mode
& FMODE_READ
)
1879 s
->dma_adc
.subdivision
= val
;
1880 if (file
->f_mode
& FMODE_WRITE
)
1881 s
->dma_dac
.subdivision
= val
;
1884 case SOUND_PCM_READ_RATE
:
1885 return put_user((file
->f_mode
& FMODE_READ
) ? s
->rateadc
: s
->ratedac
, p
);
1887 case SOUND_PCM_READ_CHANNELS
:
1888 return put_user((s
->fmt
& ((file
->f_mode
& FMODE_READ
) ? (ESS_FMT_STEREO
<< ESS_ADC_SHIFT
)
1889 : (ESS_FMT_STEREO
<< ESS_DAC_SHIFT
))) ? 2 : 1, p
);
1891 case SOUND_PCM_READ_BITS
:
1892 return put_user((s
->fmt
& ((file
->f_mode
& FMODE_READ
) ? (ESS_FMT_16BIT
<< ESS_ADC_SHIFT
)
1893 : (ESS_FMT_16BIT
<< ESS_DAC_SHIFT
))) ? 16 : 8, p
);
1895 case SOUND_PCM_WRITE_FILTER
:
1896 case SNDCTL_DSP_SETSYNCRO
:
1897 case SOUND_PCM_READ_FILTER
:
1905 allocate_dmabuf(struct pci_dev
*pci_dev
, struct dmabuf
*db
)
1909 DPRINTK(DPSTR
,"allocating for dmabuf %p\n", db
);
1912 * alloc as big a chunk as we can, start with
1913 * 64k 'cause we're insane. based on order cause
1914 * the amazingly complicated prog_dmabuf wants it.
1916 * pci_alloc_sonsistent guarantees that it won't cross a natural
1917 * boundary; the m3 hardware can't have dma cross a 64k bus
1920 for (order
= 16-PAGE_SHIFT
; order
>= 1; order
--) {
1921 db
->rawbuf
= pci_alloc_consistent(pci_dev
, PAGE_SIZE
<< order
,
1930 DPRINTK(DPSTR
,"allocated %ld (%d) bytes at %p\n",
1931 PAGE_SIZE
<<order
, order
, db
->rawbuf
);
1934 struct page
*page
, *pend
;
1936 pend
= virt_to_page(db
->rawbuf
+ (PAGE_SIZE
<< order
) - 1);
1937 for (page
= virt_to_page(db
->rawbuf
); page
<= pend
; page
++)
1938 SetPageReserved(page
);
1942 db
->buforder
= order
;
1950 nuke_lists(struct m3_card
*card
, struct dmabuf
*db
)
1952 m3_remove_list(card
, &(card
->dma_list
), db
->dma_index
);
1953 m3_remove_list(card
, &(card
->msrc_list
), db
->msrc_index
);
1958 free_dmabuf(struct pci_dev
*pci_dev
, struct dmabuf
*db
)
1960 if(db
->rawbuf
== NULL
)
1963 DPRINTK(DPSTR
,"freeing %p from dmabuf %p\n",db
->rawbuf
, db
);
1966 struct page
*page
, *pend
;
1967 pend
= virt_to_page(db
->rawbuf
+ (PAGE_SIZE
<< db
->buforder
) - 1);
1968 for (page
= virt_to_page(db
->rawbuf
); page
<= pend
; page
++)
1969 ClearPageReserved(page
);
1973 pci_free_consistent(pci_dev
, PAGE_SIZE
<< db
->buforder
,
1974 db
->rawbuf
, db
->handle
);
1982 static int m3_open(struct inode
*inode
, struct file
*file
)
1984 unsigned int minor
= iminor(inode
);
1986 struct m3_state
*s
= NULL
;
1988 unsigned char fmtm
= ~0, fmts
= 0;
1989 unsigned long flags
;
1992 * Scan the cards and find the channel. We only
1993 * do this at open time so it is ok
1995 for(c
= devs
; c
!= NULL
; c
= c
->next
) {
1997 for(i
=0;i
<NR_DSPS
;i
++) {
1999 if(c
->channels
[i
].dev_audio
< 0)
2001 if((c
->channels
[i
].dev_audio
^ minor
) & ~0xf)
2004 s
= &c
->channels
[i
];
2014 file
->private_data
= s
;
2016 /* wait for device to become free */
2017 mutex_lock(&s
->open_mutex
);
2018 while (s
->open_mode
& file
->f_mode
) {
2019 if (file
->f_flags
& O_NONBLOCK
) {
2020 mutex_unlock(&s
->open_mutex
);
2021 return -EWOULDBLOCK
;
2023 mutex_unlock(&s
->open_mutex
);
2024 interruptible_sleep_on(&s
->open_wait
);
2025 if (signal_pending(current
))
2026 return -ERESTARTSYS
;
2027 mutex_lock(&s
->open_mutex
);
2030 spin_lock_irqsave(&c
->lock
, flags
);
2032 if (file
->f_mode
& FMODE_READ
) {
2033 fmtm
&= ~((ESS_FMT_STEREO
| ESS_FMT_16BIT
) << ESS_ADC_SHIFT
);
2034 if ((minor
& 0xf) == SND_DEV_DSP16
)
2035 fmts
|= ESS_FMT_16BIT
<< ESS_ADC_SHIFT
;
2037 s
->dma_adc
.ossfragshift
= s
->dma_adc
.ossmaxfrags
= s
->dma_adc
.subdivision
= 0;
2038 set_adc_rate(s
, 8000);
2040 if (file
->f_mode
& FMODE_WRITE
) {
2041 fmtm
&= ~((ESS_FMT_STEREO
| ESS_FMT_16BIT
) << ESS_DAC_SHIFT
);
2042 if ((minor
& 0xf) == SND_DEV_DSP16
)
2043 fmts
|= ESS_FMT_16BIT
<< ESS_DAC_SHIFT
;
2045 s
->dma_dac
.ossfragshift
= s
->dma_dac
.ossmaxfrags
= s
->dma_dac
.subdivision
= 0;
2046 set_dac_rate(s
, 8000);
2048 set_fmt(s
, fmtm
, fmts
);
2049 s
->open_mode
|= file
->f_mode
& (FMODE_READ
| FMODE_WRITE
);
2051 mutex_unlock(&s
->open_mutex
);
2052 spin_unlock_irqrestore(&c
->lock
, flags
);
2053 return nonseekable_open(inode
, file
);
2056 static int m3_release(struct inode
*inode
, struct file
*file
)
2058 struct m3_state
*s
= (struct m3_state
*)file
->private_data
;
2059 struct m3_card
*card
=s
->card
;
2060 unsigned long flags
;
2063 if (file
->f_mode
& FMODE_WRITE
)
2064 drain_dac(s
, file
->f_flags
& O_NONBLOCK
);
2066 mutex_lock(&s
->open_mutex
);
2067 spin_lock_irqsave(&card
->lock
, flags
);
2069 if (file
->f_mode
& FMODE_WRITE
) {
2071 if(s
->dma_dac
.in_lists
) {
2072 m3_remove_list(s
->card
, &(s
->card
->mixer_list
), s
->dma_dac
.mixer_index
);
2073 nuke_lists(s
->card
, &(s
->dma_dac
));
2076 if (file
->f_mode
& FMODE_READ
) {
2078 if(s
->dma_adc
.in_lists
) {
2079 m3_remove_list(s
->card
, &(s
->card
->adc1_list
), s
->dma_adc
.adc1_index
);
2080 nuke_lists(s
->card
, &(s
->dma_adc
));
2084 s
->open_mode
&= (~file
->f_mode
) & (FMODE_READ
|FMODE_WRITE
);
2086 spin_unlock_irqrestore(&card
->lock
, flags
);
2087 mutex_unlock(&s
->open_mutex
);
2088 wake_up(&s
->open_wait
);
2094 * Wait for the ac97 serial bus to be free.
2095 * return nonzero if the bus is still busy.
2097 static int m3_ac97_wait(struct m3_card
*card
)
2101 while( (m3_inb(card
, 0x30) & 1) && i
--) ;
2106 static u16
m3_ac97_read(struct ac97_codec
*codec
, u8 reg
)
2109 struct m3_card
*card
= codec
->private_data
;
2111 spin_lock(&card
->ac97_lock
);
2113 if(m3_ac97_wait(card
)) {
2114 printk(KERN_ERR PFX
"serial bus busy reading reg 0x%x\n",reg
);
2118 m3_outb(card
, 0x80 | (reg
& 0x7f), 0x30);
2120 if(m3_ac97_wait(card
)) {
2121 printk(KERN_ERR PFX
"serial bus busy finishing read reg 0x%x\n",reg
);
2125 ret
= m3_inw(card
, 0x32);
2126 DPRINTK(DPCRAP
,"reading 0x%04x from 0x%02x\n",ret
, reg
);
2129 spin_unlock(&card
->ac97_lock
);
2133 static void m3_ac97_write(struct ac97_codec
*codec
, u8 reg
, u16 val
)
2135 struct m3_card
*card
= codec
->private_data
;
2137 spin_lock(&card
->ac97_lock
);
2139 if(m3_ac97_wait(card
)) {
2140 printk(KERN_ERR PFX
"serial bus busy writing 0x%x to 0x%x\n",val
, reg
);
2143 DPRINTK(DPCRAP
,"writing 0x%04x to 0x%02x\n", val
, reg
);
2145 m3_outw(card
, val
, 0x32);
2146 m3_outb(card
, reg
& 0x7f, 0x30);
2148 spin_unlock(&card
->ac97_lock
);
2150 /* OSS /dev/mixer file operation methods */
2151 static int m3_open_mixdev(struct inode
*inode
, struct file
*file
)
2153 unsigned int minor
= iminor(inode
);
2154 struct m3_card
*card
= devs
;
2156 for (card
= devs
; card
!= NULL
; card
= card
->next
) {
2157 if((card
->ac97
!= NULL
) && (card
->ac97
->dev_mixer
== minor
))
2165 file
->private_data
= card
->ac97
;
2167 return nonseekable_open(inode
, file
);
2170 static int m3_release_mixdev(struct inode
*inode
, struct file
*file
)
2175 static int m3_ioctl_mixdev(struct inode
*inode
, struct file
*file
, unsigned int cmd
,
2178 struct ac97_codec
*codec
= (struct ac97_codec
*)file
->private_data
;
2180 return codec
->mixer_ioctl(codec
, cmd
, arg
);
2183 static struct file_operations m3_mixer_fops
= {
2184 .owner
= THIS_MODULE
,
2185 .llseek
= no_llseek
,
2186 .ioctl
= m3_ioctl_mixdev
,
2187 .open
= m3_open_mixdev
,
2188 .release
= m3_release_mixdev
,
2191 static void remote_codec_config(int io
, int isremote
)
2193 isremote
= isremote
? 1 : 0;
2195 outw( (inw(io
+ RING_BUS_CTRL_B
) & ~SECOND_CODEC_ID_MASK
) | isremote
,
2196 io
+ RING_BUS_CTRL_B
);
2197 outw( (inw(io
+ SDO_OUT_DEST_CTRL
) & ~COMMAND_ADDR_OUT
) | isremote
,
2198 io
+ SDO_OUT_DEST_CTRL
);
2199 outw( (inw(io
+ SDO_IN_DEST_CTRL
) & ~STATUS_ADDR_IN
) | isremote
,
2200 io
+ SDO_IN_DEST_CTRL
);
2204 * hack, returns non zero on err
2206 static int try_read_vendor(struct m3_card
*card
)
2210 if(m3_ac97_wait(card
))
2213 m3_outb(card
, 0x80 | (AC97_VENDOR_ID1
& 0x7f), 0x30);
2215 if(m3_ac97_wait(card
))
2218 ret
= m3_inw(card
, 0x32);
2220 return (ret
== 0) || (ret
== 0xffff);
2223 static void m3_codec_reset(struct m3_card
*card
, int busywait
)
2226 int delay1
= 0, delay2
= 0, i
;
2227 int io
= card
->iobase
;
2229 switch (card
->card_type
) {
2231 * the onboard codec on the allegro seems
2232 * to want to wait a very long time before
2233 * coming back to life
2240 case ESS_MAESTRO3HW
:
2246 for(i
= 0; i
< 5; i
++) {
2247 dir
= inw(io
+ GPIO_DIRECTION
);
2248 dir
|= 0x10; /* assuming pci bus master? */
2250 remote_codec_config(io
, 0);
2252 outw(IO_SRAM_ENABLE
, io
+ RING_BUS_CTRL_A
);
2255 outw(dir
& ~GPO_PRIMARY_AC97
, io
+ GPIO_DIRECTION
);
2256 outw(~GPO_PRIMARY_AC97
, io
+ GPIO_MASK
);
2257 outw(0, io
+ GPIO_DATA
);
2258 outw(dir
| GPO_PRIMARY_AC97
, io
+ GPIO_DIRECTION
);
2263 set_current_state(TASK_UNINTERRUPTIBLE
);
2264 schedule_timeout((delay1
* HZ
) / 1000);
2267 outw(GPO_PRIMARY_AC97
, io
+ GPIO_DATA
);
2269 /* ok, bring back the ac-link */
2270 outw(IO_SRAM_ENABLE
| SERIAL_AC_LINK_ENABLE
, io
+ RING_BUS_CTRL_A
);
2271 outw(~0, io
+ GPIO_MASK
);
2276 set_current_state(TASK_UNINTERRUPTIBLE
);
2277 schedule_timeout((delay2
* HZ
) / 1000);
2279 if(! try_read_vendor(card
))
2285 DPRINTK(DPMOD
, "retrying codec reset with delays of %d and %d ms\n",
2290 /* more gung-ho reset that doesn't
2291 * seem to work anywhere :)
2293 tmp
= inw(io
+ RING_BUS_CTRL_A
);
2294 outw(RAC_SDFS_ENABLE
|LAC_SDFS_ENABLE
, io
+ RING_BUS_CTRL_A
);
2296 outw(tmp
, io
+ RING_BUS_CTRL_A
);
2301 static int __devinit
m3_codec_install(struct m3_card
*card
)
2303 struct ac97_codec
*codec
;
2305 if ((codec
= ac97_alloc_codec()) == NULL
)
2308 codec
->private_data
= card
;
2309 codec
->codec_read
= m3_ac97_read
;
2310 codec
->codec_write
= m3_ac97_write
;
2311 /* someday we should support secondary codecs.. */
2314 if (ac97_probe_codec(codec
) == 0) {
2315 printk(KERN_ERR PFX
"codec probe failed\n");
2316 ac97_release_codec(codec
);
2320 if ((codec
->dev_mixer
= register_sound_mixer(&m3_mixer_fops
, -1)) < 0) {
2321 printk(KERN_ERR PFX
"couldn't register mixer!\n");
2322 ac97_release_codec(codec
);
2332 #define MINISRC_LPF_LEN 10
2333 static u16 minisrc_lpf
[MINISRC_LPF_LEN
] = {
2334 0X0743, 0X1104, 0X0A4C, 0XF88D, 0X242C,
2335 0X1023, 0X1AA9, 0X0B60, 0XEFDD, 0X186F
2337 static void m3_assp_init(struct m3_card
*card
)
2341 /* zero kernel data */
2342 for(i
= 0 ; i
< (REV_B_DATA_MEMORY_UNIT_LENGTH
* NUM_UNITS_KERNEL_DATA
) / 2; i
++)
2343 m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
2344 KDATA_BASE_ADDR
+ i
, 0);
2346 /* zero mixer data? */
2347 for(i
= 0 ; i
< (REV_B_DATA_MEMORY_UNIT_LENGTH
* NUM_UNITS_KERNEL_DATA
) / 2; i
++)
2348 m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
2349 KDATA_BASE_ADDR2
+ i
, 0);
2351 /* init dma pointer */
2352 m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
2356 /* write kernel into code memory.. */
2357 for(i
= 0 ; i
< sizeof(assp_kernel_image
) / 2; i
++) {
2358 m3_assp_write(card
, MEMTYPE_INTERNAL_CODE
,
2359 REV_B_CODE_MEMORY_BEGIN
+ i
,
2360 assp_kernel_image
[i
]);
2364 * We only have this one client and we know that 0x400
2365 * is free in our kernel's mem map, so lets just
2366 * drop it there. It seems that the minisrc doesn't
2367 * need vectors, so we won't bother with them..
2369 for(i
= 0 ; i
< sizeof(assp_minisrc_image
) / 2; i
++) {
2370 m3_assp_write(card
, MEMTYPE_INTERNAL_CODE
,
2372 assp_minisrc_image
[i
]);
2376 * write the coefficients for the low pass filter?
2378 for(i
= 0; i
< MINISRC_LPF_LEN
; i
++) {
2379 m3_assp_write(card
, MEMTYPE_INTERNAL_CODE
,
2380 0x400 + MINISRC_COEF_LOC
+ i
,
2384 m3_assp_write(card
, MEMTYPE_INTERNAL_CODE
,
2385 0x400 + MINISRC_COEF_LOC
+ MINISRC_LPF_LEN
,
2389 * the minisrc is the only thing on
2392 m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
2397 * init the mixer number..
2400 m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
2401 KDATA_MIXER_TASK_NUMBER
,0);
2404 * EXTREME KERNEL MASTER VOLUME
2406 m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
2407 KDATA_DAC_LEFT_VOLUME
, ARB_VOLUME
);
2408 m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
2409 KDATA_DAC_RIGHT_VOLUME
, ARB_VOLUME
);
2411 card
->mixer_list
.mem_addr
= KDATA_MIXER_XFER0
;
2412 card
->mixer_list
.max
= MAX_VIRTUAL_MIXER_CHANNELS
;
2413 card
->adc1_list
.mem_addr
= KDATA_ADC1_XFER0
;
2414 card
->adc1_list
.max
= MAX_VIRTUAL_ADC1_CHANNELS
;
2415 card
->dma_list
.mem_addr
= KDATA_DMA_XFER0
;
2416 card
->dma_list
.max
= MAX_VIRTUAL_DMA_CHANNELS
;
2417 card
->msrc_list
.mem_addr
= KDATA_INSTANCE0_MINISRC
;
2418 card
->msrc_list
.max
= MAX_INSTANCE_MINISRC
;
2421 static int setup_msrc(struct m3_card
*card
,
2422 struct assp_instance
*inst
, int index
)
2424 int data_bytes
= 2 * ( MINISRC_TMP_BUFFER_SIZE
/ 2 +
2425 MINISRC_IN_BUFFER_SIZE
/ 2 +
2426 1 + MINISRC_OUT_BUFFER_SIZE
/ 2 + 1 );
2430 * the revb memory map has 0x1100 through 0x1c00
2435 * align instance address to 256 bytes so that it's
2436 * shifted list address is aligned.
2437 * list address = (mem address >> 1) >> 7;
2439 data_bytes
= (data_bytes
+ 255) & ~255;
2440 address
= 0x1100 + ((data_bytes
/2) * index
);
2442 if((address
+ (data_bytes
/2)) >= 0x1c00) {
2443 printk(KERN_ERR PFX
"no memory for %d bytes at ind %d (addr 0x%x)\n",
2444 data_bytes
, index
, address
);
2448 for(i
= 0; i
< data_bytes
/2 ; i
++)
2449 m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
2453 inst
->data
= address
;
2458 static int m3_assp_client_init(struct m3_state
*s
)
2460 setup_msrc(s
->card
, &(s
->dac_inst
), s
->index
* 2);
2461 setup_msrc(s
->card
, &(s
->adc_inst
), (s
->index
* 2) + 1);
2466 static void m3_amp_enable(struct m3_card
*card
, int enable
)
2469 * this works for the reference board, have to find
2472 * this needs more magic for 4 speaker, but..
2474 int io
= card
->iobase
;
2475 u16 gpo
, polarity_port
, polarity
;
2480 if (gpio_pin
>= 0 && gpio_pin
<= 15) {
2481 polarity_port
= 0x1000 + (0x100 * gpio_pin
);
2483 switch (card
->card_type
) {
2485 polarity_port
= 0x1800;
2488 polarity_port
= 0x1100;
2489 /* Panasonic toughbook CF72 has to be different... */
2490 if(card
->pcidev
->subsystem_vendor
== 0x10F7 && card
->pcidev
->subsystem_device
== 0x833D)
2491 polarity_port
= 0x1D00;
2496 gpo
= (polarity_port
>> 8) & 0x0F;
2497 polarity
= polarity_port
>> 12;
2499 polarity
= !polarity
;
2500 polarity
= polarity
<< gpo
;
2503 outw(~gpo
, io
+ GPIO_MASK
);
2505 outw( inw(io
+ GPIO_DIRECTION
) | gpo
,
2506 io
+ GPIO_DIRECTION
);
2508 outw( (GPO_SECONDARY_AC97
| GPO_PRIMARY_AC97
| polarity
) ,
2511 outw(0xffff , io
+ GPIO_MASK
);
2515 maestro_config(struct m3_card
*card
)
2517 struct pci_dev
*pcidev
= card
->pcidev
;
2519 u8 t
; /* makes as much sense as 'n', no? */
2521 pci_read_config_dword(pcidev
, PCI_ALLEGRO_CONFIG
, &n
);
2522 n
&= REDUCED_DEBOUNCE
;
2523 n
|= PM_CTRL_ENABLE
| CLK_DIV_BY_49
| USE_PCI_TIMING
;
2524 pci_write_config_dword(pcidev
, PCI_ALLEGRO_CONFIG
, n
);
2526 outb(RESET_ASSP
, card
->iobase
+ ASSP_CONTROL_B
);
2527 pci_read_config_dword(pcidev
, PCI_ALLEGRO_CONFIG
, &n
);
2528 n
&= ~INT_CLK_SELECT
;
2529 if(card
->card_type
>= ESS_MAESTRO3
) {
2530 n
&= ~INT_CLK_MULT_ENABLE
;
2531 n
|= INT_CLK_SRC_NOT_PCI
;
2533 n
&= ~( CLK_MULT_MODE_SELECT
| CLK_MULT_MODE_SELECT_2
);
2534 pci_write_config_dword(pcidev
, PCI_ALLEGRO_CONFIG
, n
);
2536 if(card
->card_type
<= ESS_ALLEGRO
) {
2537 pci_read_config_dword(pcidev
, PCI_USER_CONFIG
, &n
);
2538 n
|= IN_CLK_12MHZ_SELECT
;
2539 pci_write_config_dword(pcidev
, PCI_USER_CONFIG
, n
);
2542 t
= inb(card
->iobase
+ ASSP_CONTROL_A
);
2543 t
&= ~( DSP_CLK_36MHZ_SELECT
| ASSP_CLK_49MHZ_SELECT
);
2544 t
|= ASSP_CLK_49MHZ_SELECT
;
2545 t
|= ASSP_0_WS_ENABLE
;
2546 outb(t
, card
->iobase
+ ASSP_CONTROL_A
);
2548 outb(RUN_ASSP
, card
->iobase
+ ASSP_CONTROL_B
);
2553 static void m3_enable_ints(struct m3_card
*card
)
2555 unsigned long io
= card
->iobase
;
2557 outw(ASSP_INT_ENABLE
, io
+ HOST_INT_CTRL
);
2558 outb(inb(io
+ ASSP_CONTROL_C
) | ASSP_HOST_INT_ENABLE
,
2559 io
+ ASSP_CONTROL_C
);
2562 static struct file_operations m3_audio_fops
= {
2563 .owner
= THIS_MODULE
,
2564 .llseek
= no_llseek
,
2571 .release
= m3_release
,
2575 static int alloc_dsp_suspendmem(struct m3_card
*card
)
2577 int len
= sizeof(u16
) * (REV_B_CODE_MEMORY_LENGTH
+ REV_B_DATA_MEMORY_LENGTH
);
2579 if( (card
->suspend_mem
= vmalloc(len
)) == NULL
)
2586 #define alloc_dsp_suspendmem(args...) 0
2590 * great day! this function is ugly as hell.
2592 static int __devinit
m3_probe(struct pci_dev
*pci_dev
, const struct pci_device_id
*pci_id
)
2596 struct m3_card
*card
= NULL
;
2598 int card_type
= pci_id
->driver_data
;
2600 DPRINTK(DPMOD
, "in maestro_install\n");
2602 if (pci_enable_device(pci_dev
))
2605 if (pci_set_dma_mask(pci_dev
, M3_PCI_DMA_MASK
)) {
2606 printk(KERN_ERR PFX
"architecture does not support limiting to 28bit PCI bus addresses\n");
2610 pci_set_master(pci_dev
);
2612 if( (card
= kmalloc(sizeof(struct m3_card
), GFP_KERNEL
)) == NULL
) {
2613 printk(KERN_WARNING PFX
"out of memory\n");
2616 memset(card
, 0, sizeof(struct m3_card
));
2617 card
->pcidev
= pci_dev
;
2618 init_waitqueue_head(&card
->suspend_queue
);
2620 if ( ! request_region(pci_resource_start(pci_dev
, 0),
2621 pci_resource_len (pci_dev
, 0), M3_MODULE_NAME
)) {
2623 printk(KERN_WARNING PFX
"unable to reserve I/O space.\n");
2628 card
->iobase
= pci_resource_start(pci_dev
, 0);
2630 if(alloc_dsp_suspendmem(card
)) {
2631 printk(KERN_WARNING PFX
"couldn't alloc %d bytes for saving dsp state on suspend\n",
2632 REV_B_CODE_MEMORY_LENGTH
+ REV_B_DATA_MEMORY_LENGTH
);
2637 card
->card_type
= card_type
;
2638 card
->irq
= pci_dev
->irq
;
2640 card
->magic
= M3_CARD_MAGIC
;
2641 spin_lock_init(&card
->lock
);
2642 spin_lock_init(&card
->ac97_lock
);
2644 for(i
= 0; i
<NR_DSPS
; i
++) {
2645 struct m3_state
*s
= &(card
->channels
[i
]);
2649 printk(KERN_INFO PFX
"Configuring ESS %s found at IO 0x%04X IRQ %d\n",
2650 card_names
[card
->card_type
], card
->iobase
, card
->irq
);
2652 pci_read_config_dword(pci_dev
, PCI_SUBSYSTEM_VENDOR_ID
, &n
);
2653 printk(KERN_INFO PFX
" subvendor id: 0x%08x\n",n
);
2655 maestro_config(card
);
2658 m3_codec_reset(card
, 0);
2660 if(m3_codec_install(card
)) {
2666 m3_amp_enable(card
, 1);
2668 for(i
=0;i
<NR_DSPS
;i
++) {
2669 struct m3_state
*s
=&card
->channels
[i
];
2674 init_waitqueue_head(&s
->dma_adc
.wait
);
2675 init_waitqueue_head(&s
->dma_dac
.wait
);
2676 init_waitqueue_head(&s
->open_wait
);
2677 mutex_init(&(s
->open_mutex
));
2678 s
->magic
= M3_STATE_MAGIC
;
2680 m3_assp_client_init(s
);
2682 if(s
->dma_adc
.ready
|| s
->dma_dac
.ready
|| s
->dma_adc
.rawbuf
)
2683 printk(KERN_WARNING PFX
"initing a dsp device that is already in use?\n");
2684 /* register devices */
2685 if ((s
->dev_audio
= register_sound_dsp(&m3_audio_fops
, -1)) < 0) {
2689 if( allocate_dmabuf(card
->pcidev
, &(s
->dma_adc
)) ||
2690 allocate_dmabuf(card
->pcidev
, &(s
->dma_dac
))) {
2696 if(request_irq(card
->irq
, m3_interrupt
, IRQF_SHARED
, card_names
[card
->card_type
], card
)) {
2698 printk(KERN_ERR PFX
"unable to allocate irq %d,\n", card
->irq
);
2704 pci_set_drvdata(pci_dev
, card
);
2706 m3_enable_ints(card
);
2707 m3_assp_continue(card
);
2712 release_region(pci_resource_start(pci_dev
, 0), pci_resource_len(pci_dev
, 0));
2713 vfree(card
->suspend_mem
);
2715 unregister_sound_mixer(card
->ac97
->dev_mixer
);
2718 for(i
=0;i
<NR_DSPS
;i
++)
2720 struct m3_state
*s
= &card
->channels
[i
];
2721 if(s
->dev_audio
!= -1)
2722 unregister_sound_dsp(s
->dev_audio
);
2730 static void m3_remove(struct pci_dev
*pci_dev
)
2732 struct m3_card
*card
;
2734 unregister_reboot_notifier(&m3_reboot_nb
);
2736 while ((card
= devs
)) {
2740 free_irq(card
->irq
, card
);
2741 unregister_sound_mixer(card
->ac97
->dev_mixer
);
2744 for(i
=0;i
<NR_DSPS
;i
++)
2746 struct m3_state
*s
= &card
->channels
[i
];
2747 if(s
->dev_audio
< 0)
2750 unregister_sound_dsp(s
->dev_audio
);
2751 free_dmabuf(card
->pcidev
, &s
->dma_adc
);
2752 free_dmabuf(card
->pcidev
, &s
->dma_dac
);
2755 release_region(card
->iobase
, 256);
2756 vfree(card
->suspend_mem
);
2763 * some bioses like the sound chip to be powered down
2764 * at shutdown. We're just calling _suspend to
2767 static int m3_notifier(struct notifier_block
*nb
, unsigned long event
, void *buf
)
2769 struct m3_card
*card
;
2771 DPRINTK(DPMOD
, "notifier suspending all cards\n");
2773 for(card
= devs
; card
!= NULL
; card
= card
->next
) {
2774 if(!card
->in_suspend
)
2775 m3_suspend(card
->pcidev
, PMSG_SUSPEND
); /* XXX legal? */
2780 static int m3_suspend(struct pci_dev
*pci_dev
, pm_message_t state
)
2782 unsigned long flags
;
2784 struct m3_card
*card
= pci_get_drvdata(pci_dev
);
2786 /* must be a better way.. */
2787 spin_lock_irqsave(&card
->lock
, flags
);
2789 DPRINTK(DPMOD
, "pm in dev %p\n",card
);
2791 for(i
=0;i
<NR_DSPS
;i
++) {
2792 struct m3_state
*s
= &card
->channels
[i
];
2794 if(s
->dev_audio
== -1)
2797 DPRINTK(DPMOD
, "stop_adc/dac() device %d\n",i
);
2802 mdelay(10); /* give the assp a chance to idle.. */
2806 if(card
->suspend_mem
) {
2809 DPRINTK(DPMOD
, "saving code\n");
2810 for(i
= REV_B_CODE_MEMORY_BEGIN
; i
<= REV_B_CODE_MEMORY_END
; i
++)
2811 card
->suspend_mem
[index
++] =
2812 m3_assp_read(card
, MEMTYPE_INTERNAL_CODE
, i
);
2813 DPRINTK(DPMOD
, "saving data\n");
2814 for(i
= REV_B_DATA_MEMORY_BEGIN
; i
<= REV_B_DATA_MEMORY_END
; i
++)
2815 card
->suspend_mem
[index
++] =
2816 m3_assp_read(card
, MEMTYPE_INTERNAL_DATA
, i
);
2819 DPRINTK(DPMOD
, "powering down apci regs\n");
2820 m3_outw(card
, 0xffff, 0x54);
2821 m3_outw(card
, 0xffff, 0x56);
2823 card
->in_suspend
= 1;
2825 spin_unlock_irqrestore(&card
->lock
, flags
);
2830 static int m3_resume(struct pci_dev
*pci_dev
)
2832 unsigned long flags
;
2835 struct m3_card
*card
= pci_get_drvdata(pci_dev
);
2837 spin_lock_irqsave(&card
->lock
, flags
);
2838 card
->in_suspend
= 0;
2840 DPRINTK(DPMOD
, "resuming\n");
2842 /* first lets just bring everything back. .*/
2844 DPRINTK(DPMOD
, "bringing power back on card 0x%p\n",card
);
2845 m3_outw(card
, 0, 0x54);
2846 m3_outw(card
, 0, 0x56);
2848 DPRINTK(DPMOD
, "restoring pci configs and reseting codec\n");
2849 maestro_config(card
);
2851 m3_codec_reset(card
, 1);
2853 DPRINTK(DPMOD
, "restoring dsp code card\n");
2855 for(i
= REV_B_CODE_MEMORY_BEGIN
; i
<= REV_B_CODE_MEMORY_END
; i
++)
2856 m3_assp_write(card
, MEMTYPE_INTERNAL_CODE
, i
,
2857 card
->suspend_mem
[index
++]);
2858 for(i
= REV_B_DATA_MEMORY_BEGIN
; i
<= REV_B_DATA_MEMORY_END
; i
++)
2859 m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
, i
,
2860 card
->suspend_mem
[index
++]);
2862 /* tell the dma engine to restart itself */
2863 m3_assp_write(card
, MEMTYPE_INTERNAL_DATA
,
2864 KDATA_DMA_ACTIVE
, 0);
2866 DPRINTK(DPMOD
, "resuming dsp\n");
2867 m3_assp_continue(card
);
2869 DPRINTK(DPMOD
, "enabling ints\n");
2870 m3_enable_ints(card
);
2872 /* bring back the old school flavor */
2873 for(i
= 0; i
< SOUND_MIXER_NRDEVICES
; i
++) {
2874 int state
= card
->ac97
->mixer_state
[i
];
2875 if (!supported_mixer(card
->ac97
, i
))
2878 card
->ac97
->write_mixer(card
->ac97
, i
,
2879 state
& 0xff, (state
>> 8) & 0xff);
2882 m3_amp_enable(card
, 1);
2885 * now we flip on the music
2887 for(i
=0;i
<NR_DSPS
;i
++) {
2888 struct m3_state
*s
= &card
->channels
[i
];
2889 if(s
->dev_audio
== -1)
2892 * db->ready makes it so these guys can be
2893 * called unconditionally..
2895 DPRINTK(DPMOD
, "turning on dacs ind %d\n",i
);
2900 spin_unlock_irqrestore(&card
->lock
, flags
);
2903 * all right, we think things are ready,
2904 * wake up people who were using the device
2907 wake_up(&card
->suspend_queue
);
2912 MODULE_AUTHOR("Zach Brown <zab@zabbo.net>");
2913 MODULE_DESCRIPTION("ESS Maestro3/Allegro Driver");
2914 MODULE_LICENSE("GPL");
2917 module_param(debug
, int, 0);
2919 module_param(external_amp
, int, 0);
2920 module_param(gpio_pin
, int, 0);
2922 static struct pci_driver m3_pci_driver
= {
2923 .name
= "ess_m3_audio",
2924 .id_table
= m3_id_table
,
2926 .remove
= m3_remove
,
2927 .suspend
= m3_suspend
,
2928 .resume
= m3_resume
,
2931 static int __init
m3_init_module(void)
2933 printk(KERN_INFO PFX
"version " DRIVER_VERSION
" built at " __TIME__
" " __DATE__
"\n");
2935 if (register_reboot_notifier(&m3_reboot_nb
)) {
2936 printk(KERN_WARNING PFX
"reboot notifier registration failed\n");
2937 return -ENODEV
; /* ? */
2940 if (pci_register_driver(&m3_pci_driver
)) {
2941 unregister_reboot_notifier(&m3_reboot_nb
);
2947 static void __exit
m3_cleanup_module(void)
2949 pci_unregister_driver(&m3_pci_driver
);
2952 module_init(m3_init_module
);
2953 module_exit(m3_cleanup_module
);
2955 void check_suspend(struct m3_card
*card
)
2957 DECLARE_WAITQUEUE(wait
, current
);
2959 if(!card
->in_suspend
)
2963 add_wait_queue(&card
->suspend_queue
, &wait
);
2964 set_current_state(TASK_UNINTERRUPTIBLE
);
2966 remove_wait_queue(&card
->suspend_queue
, &wait
);
2967 set_current_state(TASK_RUNNING
);