1 /****************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
9 * Copyright (C) 2007 Michael Giacomelli
11 * All files in this archive are subject to the GNU General Public License.
12 * See the file COPYING in the source tree root for full license agreement.
14 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
15 * KIND, either express or implied.
17 ****************************************************************************/
19 /* fixed precision code. We use a combination of Sign 15.16 and Sign.31
22 The WMA decoder does not always follow this convention, and occasionally
23 renormalizes values to other formats in order to maximize precision.
24 However, only the two precisions above are provided in this file.
31 #define PRECISION64 16
33 #define fixtof64(x) (float)((float)(x) / (float)(1 << PRECISION64)) //does not work on int64_t!
34 #define ftofix32(x) ((int32_t)((x) * (float)(1 << PRECISION) + ((x) < 0 ? -0.5 : 0.5)))
35 #define itofix64(x) (IntTo64(x))
36 #define itofix32(x) ((x) << PRECISION)
37 #define fixtoi32(x) ((x) >> PRECISION)
38 #define fixtoi64(x) (IntFrom64(x))
42 int64_t IntTo64(int x
);
43 int IntFrom64(int64_t x
);
44 int32_t Fixed32From64(int64_t x
);
45 int64_t Fixed32To64(int32_t x
);
46 int64_t fixmul64byfixed(int64_t x
, int32_t y
);
47 int32_t fixdiv32(int32_t x
, int32_t y
);
48 int64_t fixdiv64(int64_t x
, int64_t y
);
49 int32_t fixsqrt32(int32_t x
);
50 long fsincos(unsigned long phase
, int32_t *cos
);
54 /*Sign-15.16 format */
56 #define fixmul32(x, y) \
60 asm ("smull %0, %1, %3, %4\n\t" \
61 "movs %0, %0, lsr %5\n\t" \
62 "adc %2, %0, %1, lsl %6" \
63 : "=&r" (__lo), "=&r" (__hi), "=r" (__result) \
64 : "%r" (x), "r" (y), \
65 "M" (PRECISION), "M" (32 - PRECISION) \
70 #define fixmul32b(x, y) \
74 asm ("smull %0, %1, %3, %4\n\t" \
75 "movs %2, %1, lsl #1" \
76 : "=&r" (__lo), "=&r" (__hi), "=r" (__result) \
82 #elif defined(CPU_COLDFIRE)
84 static inline int32_t fixmul32(int32_t x
, int32_t y
)
87 #warning Coldfire fixmul32() only works for PRECISION == 16
91 "mac.l %[x], %[y], %%acc0 \n" /* multiply */
92 "mulu.l %[y], %[x] \n" /* get lower half, avoid emac stall */
93 "movclr.l %%acc0, %[t1] \n" /* get higher half */
95 "move.w %[t1], %[x] \n"
97 : [t1
] "=&d" (t1
), [x
] "+d" (x
)
103 static inline int32_t fixmul32b(int32_t x
, int32_t y
)
106 "mac.l %[x], %[y], %%acc0 \n" /* multiply */
107 "movclr.l %%acc0, %[x] \n" /* get higher half */
116 static inline int32_t fixmul32(int32_t x
, int32_t y
)
124 return (int32_t)temp
;
127 static inline int32_t fixmul32b(int32_t x
, int32_t y
)
134 temp
>>= 31; //16+31-16 = 31 bits
136 return (int32_t)temp
;
143 void CMUL(int32_t *x
, int32_t *y
,
144 int32_t a
, int32_t b
,
145 int32_t t
, int32_t v
)
147 /* This version loses one bit of precision. Could be solved at the cost
148 * of 2 extra cycles if it becomes an issue. */
151 "smull %[l], %[y1], %[b], %[t] \n"
152 "smlal %[l], %[y1], %[a], %[v] \n"
153 "rsb %[b], %[b], #0 \n"
154 "smull %[l], %[x1], %[a], %[t] \n"
155 "smlal %[l], %[x1], %[b], %[v] \n"
156 : [l
] "=&r" (l
), [x1
]"=&r" (x1
), [y1
]"=&r" (y1
), [b
] "+r" (b
)
157 : [a
] "r" (a
), [t
] "r" (t
), [v
] "r" (v
)
163 #elif defined CPU_COLDFIRE
165 void CMUL(int32_t *x
, int32_t *y
,
166 int32_t a
, int32_t b
,
167 int32_t t
, int32_t v
)
169 asm volatile ("mac.l %[a], %[t], %%acc0;"
170 "msac.l %[b], %[v], %%acc0;"
171 "mac.l %[b], %[t], %%acc1;"
172 "mac.l %[a], %[v], %%acc1;"
173 "movclr.l %%acc0, %[a];"
174 "move.l %[a], (%[x]);"
175 "movclr.l %%acc1, %[a];"
176 "move.l %[a], (%[y]);"
178 : [x
] "a" (x
), [y
] "a" (y
),
179 [b
] "r" (b
), [t
] "r" (t
), [v
] "r" (v
)
184 void CMUL(int32_t *pre
,
196 int32_t _r1
= fixmul32b(_bref
, _aref
);
197 int32_t _r2
= fixmul32b(_bimf
, _aimf
);
198 int32_t _r3
= fixmul32b(_bref
, _aimf
);
199 int32_t _r4
= fixmul32b(_bimf
, _aref
);