2 -------------------------------------------------------------------------------------------------------------
3 This document is part of the Bochs/VBEBios documentation,
4 it specifies the bochs host <-> vbebios client communication.
6 That means, the display code implementation and the vbebios code depend
7 very heavily on each other. As such, this documents needs be synchronised
8 between bochs CVS and the vgabios CVS.
10 This document does not describe how the VBEBios implements the VBE2/3 spec.
11 This document does not describe how the Bochs display code will display gfx based upon this spec.
16 0xb0c0 supports the following VBE_DISPI_ interfaces (present in Bochs 1.4):
21 VBE_DISPI_INDEX_ENABLE
24 Bpp format supported is:
27 0xb0c1 supports 0xb0c0 VBE_DISPI_ interfaces, additional interfaces (present in Bochs 2.0):
28 VBE_DISPI_INDEX_VIRT_WIDTH
29 VBE_DISPI_INDEX_VIRT_HEIGHT
30 VBE_DISPI_INDEX_X_OFFSET
31 VBE_DISPI_INDEX_Y_OFFSET
33 0xb0c2 supports 0xb0c1 VBE_DISPI_ interfaces, interfaces updated for
34 additional features (present in Bochs 2.1):
35 VBE_DISPI_INDEX_BPP supports >8bpp color depth (value = bits)
36 VBE_DISPI_INDEX_ENABLE supports new flags VBE_DISPI_NOCLEARMEM and VBE_DISPI_LFB_ENABLED
37 VBE i/o registers changed from 0xFF80/81 to 0x01CE/CF
39 0xb0c3 supports 0xb0c2 VBE_DISPI_ interfaces, interfaces updated for
41 VBE_DISPI_INDEX_ENABLE supports new flags VBE_DISPI_GETCAPS and VBE_DISPI_8BIT_DAC
46 Version 0.6 2002 Nov 23 Jeroen Janssen
48 - Added Virt width, height and x,y offset
50 Version 0.5 2002 March 08 Jeroen Janssen
51 - Added documentation about panic behaviour / current limits of the data values.
52 - Changed BPP API (in order to include future (A)RGB formats)
53 - Initial version (based upon extended display text of the vbe bochs display patch)
58 Version 0.6+ [random order]
59 - Add lots of different (A)RGB formats
63 [VBE3] VBE 3 Specification at
64 http://www.vesa.org/vbe3.pdf
66 [BOCHS] Bochs Open Source IA-32 Emulator at
67 http://bochs.sourceforge.net
69 [VBEBIOS] VBE Bios for Bochs at
70 http://savannah.gnu.org/projects/vgabios/
72 [Screenshots] Screenshots of programs using the VBE Bios at
73 http://japj.org/projects/bochs_plex86/screenshots.html
77 VBE Vesa Bios Extension
78 DISPI (Bochs) Display Interface
80 LFB Linear Frame Buffer
85 #define VBE_DISPI_TOTAL_VIDEO_MEMORY_MB 4
86 #define VBE_DISPI_BANK_ADDRESS 0xA0000
87 #define VBE_DISPI_BANK_SIZE_KB 64
89 #define VBE_DISPI_MAX_XRES 1024
90 #define VBE_DISPI_MAX_YRES 768
92 #define VBE_DISPI_IOPORT_INDEX 0x01CE
93 #define VBE_DISPI_IOPORT_DATA 0x01CF
95 #define VBE_DISPI_INDEX_ID 0x0
96 #define VBE_DISPI_INDEX_XRES 0x1
97 #define VBE_DISPI_INDEX_YRES 0x2
98 #define VBE_DISPI_INDEX_BPP 0x3
99 #define VBE_DISPI_INDEX_ENABLE 0x4
100 #define VBE_DISPI_INDEX_BANK 0x5
101 #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
102 #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
103 #define VBE_DISPI_INDEX_X_OFFSET 0x8
104 #define VBE_DISPI_INDEX_Y_OFFSET 0x9
106 #define VBE_DISPI_ID0 0xB0C0
107 #define VBE_DISPI_ID1 0xB0C1
108 #define VBE_DISPI_ID2 0xB0C2
110 #define VBE_DISPI_DISABLED 0x00
111 #define VBE_DISPI_ENABLED 0x01
112 #define VBE_DISPI_VBE_ENABLED 0x40
113 #define VBE_DISPI_NOCLEARMEM 0x80
115 #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
119 The display api works by using a index (VBE_DISPI_IOPORT_INDEX) and
120 data (VBE_DISPI_IOPORT_DATA) ioport. One writes the index of the parameter to the index port.
121 Next, the parameter value can be read or written.
124 * VBE_DISPI_INDEX_ID : WORD {R,W}
125 This parameter can be used to detect the current display API (both bochs & vbebios).
126 The bios writes VBE_DISPI_ID0 to the dataport and reads it back again.
127 This way, the display code knows the vbebios 'ID' and the vbebios can check if the correct
128 display code is present.
129 As a result, a PANIC can be generated if an incompatible vbebios/display code combination is detected.
130 This panic can be generated from the bochs display code (NOT the bios, see Notes).
132 Example values: VBE_DISPI_ID0
134 * VBE_DISPI_INDEX_XRES : WORD {R,W}
135 This parameter can be used to read/write the vbe display X resolution (in pixels).
136 It's illegal to set the XRES when the VBE is enabled (display code should generate PANIC).
138 If the value written exceeds VBE_DISPI_MAX_XRES, the display code needs to generate a PANIC.
140 Example values: 320,640,800,1024
142 * VBE_DISPI_INDEX_YRES : WORD {R,W}
143 This parameter can be used to read/write the vbe display Y resolution (in pixels).
144 It's illegal to set the YRES when the VBE is enabled (display code should generate PANIC).
146 If the value written exceeds VBE_DISPI_MAX_YRES, the display code needs to generate a PANIC.
148 Example values: 200,400,480,600,768
150 * VBE_DISPI_INDEX_BPP : WORD {R,W}
151 This parameter can be used to read/write the vbe display BPP.
152 It's illegal to set the BPP when the VBE is enabled (display code should generate PANIC).
154 If the value written is an incompatible BPP, the display code needs to generate a PANIC.
156 Example values: VBE_DISPI_BPP_8
158 * VBE_DISPI_INDEX_ENABLE : WORD {R,W}
159 This parameter can be used to read/write the vbe ENABLED state.
160 If the bios writes VBE_DISPI_ENABLED then the display code will setup a hostside display mode
161 with the current XRES, YRES and BPP settings.
162 If the bios write VBE_DISPI_DISABLED then the display code will switch back to normal vga mode behaviour.
164 Example values: VBE_DISPI_ENABLED, VBE_DISPI_DISABLED
166 * VBE_DISPI_INDEX_BANK : WORD {R,W}
167 This parameter can be used to read/write the current selected BANK (at 0xA0000).
168 This can be used for switching banks in banked mode.
171 * VBE_DISPI_INDEX_VIRT_WIDTH : WORD {R,W}
172 This parameter can be used to read/write the current virtual width.
173 Upon enabling a mode, this will be set to the current xres
174 Setting this field during enabled mode will result in the virtual width to be changed.
175 Value will be adjusted if current setting is not possible.
177 * VBE_DISPI_INDEX_VIRT_HEIGHT : WORD {R}
178 This parameter can be read in order to obtain the current virtual height.
179 This setting will be adjusted after setting a virtual width in order to stay within limit of video memory.
181 * VBE_DISPI_INDEX_X_OFFSET : WORD {R,W}
182 The current X offset (in pixels!) of the visible screen part.
183 Writing a new offset will also result in a complete screen refresh.
185 * VBE_DISPI_INDEX_Y_OFFSET : WORD {R,W}
186 The current Y offset (in pixels!) of the visible screen part.
187 Writing a new offset will also result in a complete screen refresh.
191 * VBE_DISPI_INDEX_BPP : WORD {R,W}
192 The value written is now the number of bits per pixel. A value of 0 is treated
193 the same as 8 for backward compatibilty. These values are supported: 8, 15,
194 16, 24 and 32. The value of 4 is not yet handled in the VBE code.
195 * VBE_DISPI_INDEX_ENABLE : WORD {R,W}
196 The new flag VBE_DISPI_NOCLEARMEM allows to preserve the VBE video memory.
197 The new flag VBE_DISPI_LFB_ENABLED indicates the usage of the LFB.
200 * VBE_DISPI_INDEX_ENABLE : WORD {R,W}
201 If the new flag VBE_DISPI_GETCAPS is enabled, the xres, yres and bpp registers
202 return the gui capabilities.
203 The new flag VBE_DISPI_8BIT_DAC switches the DAC to 8 bit mode.
205 Displaying GFX (banked mode)
207 What happens is that the total screen is devided in banks of 'VBE_DISPI_BANK_SIZE_KB' KiloByte in size.
208 If you want to set a pixel you can calculate its bank by doing:
210 offset = pixel_x + pixel_y * resolution_x;
211 bank = offset / 64 Kb (rounded 1.9999 -> 1)
213 bank_pixel_pos = offset - bank * 64Kb
215 Now you can set the current bank and put the pixel at VBE_DISPI_BANK_ADDRESS + bank_pixel_pos
217 Displaying GFX (linear frame buffer mode)
223 * Since the XRES/YRES/BPP may not be written when VBE is enabled, if you want to switch from one VBE mode
224 to another, you will need to disable VBE first.
226 * Note when the bios doesn't find a valid DISPI_ID, it can disable the VBE functions. This allows people to
227 use the same bios for both vbe enabled and disabled bochs executables.