2 -------------------------------------------------------------------------------------------------------------
3 This document is part of the Bochs/VBEBios documentation,
4 it specifies the bochs host <-> vbebios client communication.
6 That means, the display code implementation and the vbebios code depend
7 very heavily on each other. As such, this documents needs be synchronised
8 between bochs CVS and the vgabios CVS.
10 This document does not describe hwo the VBEBios implements the VBE2/3 spec.
11 This document does not describe how the Bochs display code will display gfx based upon this spec.
16 0xb0c0 supports the following VBE_DISPI_ interfaces (present in Bochs 1.4):
21 VBE_DISPI_INDEX_ENABLE
24 Bpp format supported is:
27 0xb0c1 supports 0xb0c0 VBE_DISPI_ interfaces, additional interfaces (present in Bochs 2.0):
28 VBE_DISPI_INDEX_VIRT_WIDTH
29 VBE_DISPI_INDEX_VIRT_HEIGHT
30 VBE_DISPI_INDEX_X_OFFSET
31 VBE_DISPI_INDEX_Y_OFFSET
33 0xb0c2 supports 0xb0c1 VBE_DISPI_ interfaces, interfaces updated for additional features:
34 VBE_DISPI_INDEX_BPP supports >8bpp color depth (value = bits)
35 VBE_DISPI_INDEX_ENABLE supports new flags VBE_DISPI_NOCLEARMEM and VBE_DISPI_LFB_ENABLED
41 Version 0.6 2002 Nov 23 Jeroen Janssen
43 - Added Virt width, height and x,y offset
45 Version 0.5 2002 March 08 Jeroen Janssen
46 - Added documentation about panic behaviour / current limits of the data values.
47 - Changed BPP API (in order to include future (A)RGB formats)
48 - Initial version (based upon extended display text of the vbe bochs display patch)
53 Version 0.6 - add virtual width, height, x offset, y offset in bios & bochs
54 (for set/get logical scan line length and set/get display start)
56 Version 0.6+ [random order]
57 - Add lots of different (A)RGB formats
61 [VBE3] VBE 3 Specification at
62 http://www.vesa.org/vbe3.pdf
64 [BOCHS] Bochs Open Source IA-32 Emulator at
65 http://bochs.sourceforge.net
67 [VBEBIOS] VBE Bios for Bochs at
68 http://savannah.gnu.org/projects/vgabios/
70 [Screenshots] Screenshots of programs using the VBE Bios at
71 http://japj.org/projects/bochs_plex86/screenshots.html
75 VBE Vesa Bios Extension
76 DISPI (Bochs) Display Interface
78 LFB Linear Frame Buffer
83 #define VBE_DISPI_TOTAL_VIDEO_MEMORY_MB 4
84 #define VBE_DISPI_BANK_ADDRESS 0xA0000
85 #define VBE_DISPI_BANK_SIZE_KB 64
87 #define VBE_DISPI_MAX_XRES 1024
88 #define VBE_DISPI_MAX_YRES 768
90 #define VBE_DISPI_IOPORT_INDEX 0xFF80
91 #define VBE_DISPI_IOPORT_DATA 0xFF81
93 #define VBE_DISPI_INDEX_ID 0x0
94 #define VBE_DISPI_INDEX_XRES 0x1
95 #define VBE_DISPI_INDEX_YRES 0x2
96 #define VBE_DISPI_INDEX_BPP 0x3
97 #define VBE_DISPI_INDEX_ENABLE 0x4
98 #define VBE_DISPI_INDEX_BANK 0x5
99 #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
100 #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
101 #define VBE_DISPI_INDEX_X_OFFSET 0x8
102 #define VBE_DISPI_INDEX_Y_OFFSET 0x9
104 #define VBE_DISPI_ID0 0xB0C0
105 #define VBE_DISPI_ID1 0xB0C1
106 #define VBE_DISPI_ID2 0xB0C2
108 #define VBE_DISPI_DISABLED 0x00
109 #define VBE_DISPI_ENABLED 0x01
110 #define VBE_DISPI_VBE_ENABLED 0x40
111 #define VBE_DISPI_NOCLEARMEM 0x80
113 #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
117 The display api works by using a index (VBE_DISPI_IOPORT_INDEX) and
118 data (VBE_DISPI_IOPORT_DATA) ioport. One writes the index of the parameter to the index port.
119 Next, the parameter value can be read or written.
122 * VBE_DISPI_INDEX_ID : WORD {R,W}
123 This parameter can be used to detect the current display API (both bochs & vbebios).
124 The bios writes VBE_DISPI_ID0 to the dataport and reads it back again.
125 This way, the display code knows the vbebios 'ID' and the vbebios can check if the correct
126 display code is present.
127 As a result, a PANIC can be generated if an incompatible vbebios/display code combination is detected.
128 This panic can be generated from the bochs display code (NOT the bios, see Notes).
130 Example values: VBE_DISPI_ID0
132 * VBE_DISPI_INDEX_XRES : WORD {R,W}
133 This parameter can be used to read/write the vbe display X resolution (in pixels).
134 It's illegal to set the XRES when the VBE is enabled (display code should generate PANIC).
136 If the value written exceeds VBE_DISPI_MAX_XRES, the display code needs to generate a PANIC.
138 Example values: 320,640,800,1024
140 * VBE_DISPI_INDEX_YRES : WORD {R,W}
141 This parameter can be used to read/write the vbe display Y resolution (in pixels).
142 It's illegal to set the YRES when the VBE is enabled (display code should generate PANIC).
144 If the value written exceeds VBE_DISPI_MAX_YRES, the display code needs to generate a PANIC.
146 Example values: 200,400,480,600,768
148 * VBE_DISPI_INDEX_BPP : WORD {R,W}
149 This parameter can be used to read/write the vbe display BPP.
150 It's illegal to set the BPP when the VBE is enabled (display code should generate PANIC).
152 If the value written is an incompatible BPP, the display code needs to generate a PANIC.
154 Example values: VBE_DISPI_BPP_8
156 * VBE_DISPI_INDEX_ENABLE : WORD {R,W}
157 This parameter can be used to read/write the vbe ENABLED state.
158 If the bios writes VBE_DISPI_ENABLED then the display code will setup a hostside display mode
159 with the current XRES, YRES and BPP settings.
160 If the bios write VBE_DISPI_DISABLED then the display code will switch back to normal vga mode behaviour.
162 Example values: VBE_DISPI_ENABLED, VBE_DISPI_DISABLED
164 * VBE_DISPI_INDEX_BANK : WORD {R,W}
165 This parameter can be used to read/write the current selected BANK (at 0xA0000).
166 This can be used for switching banks in banked mode.
169 * VBE_DISPI_INDEX_VIRT_WIDTH : WORD {R,W}
170 This parameter can be used to read/write the current virtual width.
171 Upon enabling a mode, this will be set to the current xres
172 Setting this field during enabled mode will result in the virtual width to be changed.
173 Value will be adjusted if current setting is not possible.
175 * VBE_DISPI_INDEX_VIRT_HEIGHT : WORD {R}
176 This parameter can be read in order to obtain the current virtual height.
177 This setting will be adjusted after setting a virtual width in order to stay within limit of video memory.
179 * VBE_DISPI_INDEX_X_OFFSET : WORD {R,W}
180 The current X offset (in pixels!) of the visible screen part.
181 Writing a new offset will also result in a complete screen refresh.
183 * VBE_DISPI_INDEX_Y_OFFSET : WORD {R,W}
184 The current Y offset (in pixels!) of the visible screen part.
185 Writing a new offset will also result in a complete screen refresh.
189 * VBE_DISPI_INDEX_BPP : WORD {R,W}
190 The value written is now the number of bits per pixel. A value of 0 is treated
191 the same as 8 for backward compatibilty. These values are supported: 8, 15,
192 16, 24 and 32. The value of 4 is not handled in the VBE code.
193 * VBE_DISPI_INDEX_ENABLE : WORD {R,W}
194 The new flag VBE_DISPI_NOCLEARMEM allows to preserve the VBE video memory.
195 The new flag VBE_DISPI_LFB_ENABLED indicates the usage of the LFB.
199 Currently Linear Frame Buffer support is not available yet.
200 The only other way of displaying (VBE) graphics is using banked modi.
202 What happens is that the total screen is devided in banks of 'VBE_DISPI_BANK_SIZE_KB' KiloByte in size.
203 If you want to set a pixel you can calculate its bank by doing:
205 offset = pixel_x + pixel_y * resolution_x;
206 bank = offset / 64 Kb (rounded 1.9999 -> 1)
208 bank_pixel_pos = offset - bank * 64Kb
210 Now you can set the current bank and put the pixel at VBE_DISPI_BANK_ADDRESS + bank_pixel_pos
215 * Since the XRES/YRES/BPP may not be written when VBE is enabled, if you want to switch from one VBE mode
216 to another, you will need to disable VBE first.
218 * Note when the bios doesn't find a valid DISPI_ID, it can disable the VBE functions. This allows people to
219 use the same bios for both vbe enabled and disabled bochs executables.