| commit | 9b9eb4652fe24d36d5fc2cda53174294e27727f1 | |
| author | Julian Seward <jseward@acm.org> | |
| Mon, 4 Jan 2021 12:33:24 +0000 (4 13:33 +0100) | ||
| committer | Julian Seward <jseward@acm.org> | |
| Mon, 4 Jan 2021 12:33:24 +0000 (4 13:33 +0100) | ||
| tree | 63f01a5c330255e76e368ccb29dd6d244b52be47 | treesnapshot (tar.gz zip) |
| parent | d2a22725450016759f3bbd22d849e5e82fd0c822 | commitdiff |
arm64 insn selector: improved handling of Or1/And1 trees.
This is the exact analog of cadd90993504678607a4f95dfe5d1df5207c1eb0, to the
point of almost being a copy-n-paste. That commit split (amd64) iselCondCode
into two functions, iselCondCode_C (existing) and iselCondCode_R (new). The
latter computes an I1-typed expression into a register rather than a condition
code. The two functions cooperate so as to minimise between conversions between
a condition-code value and a value in a register.
This is the exact analog of cadd90993504678607a4f95dfe5d1df5207c1eb0, to the
point of almost being a copy-n-paste. That commit split (amd64) iselCondCode
into two functions, iselCondCode_C (existing) and iselCondCode_R (new). The
latter computes an I1-typed expression into a register rather than a condition
code. The two functions cooperate so as to minimise between conversions between
a condition-code value and a value in a register.
| VEX/priv/host_arm64_isel.c | diffblobblamehistory |