VEX/priv/ir_defs.c

   1
   2 /*---------------------------------------------------------------*/
   3 /*--- begin                                         ir_defs.c ---*/
   4 /*---------------------------------------------------------------*/
   5
   6 /*
   7    This file is part of Valgrind, a dynamic binary instrumentation
   8    framework.
   9
  10    Copyright (C) 2004-2017 OpenWorks LLP
  11       info@open-works.net
  12
  13    This program is free software; you can redistribute it and/or
  14    modify it under the terms of the GNU General Public License as
  15    published by the Free Software Foundation; either version 2 of the
  16    License, or (at your option) any later version.
  17
  18    This program is distributed in the hope that it will be useful, but
  19    WITHOUT ANY WARRANTY; without even the implied warranty of
  20    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  21    General Public License for more details.
  22
  23    You should have received a copy of the GNU General Public License
  24    along with this program; if not, see <http://www.gnu.org/licenses/>.
  25
  26    The GNU General Public License is contained in the file COPYING.
  27
  28    Neither the names of the U.S. Department of Energy nor the
  29    University of California nor the names of its contributors may be
  30    used to endorse or promote products derived from this software
  31    without prior written permission.
  32 */
  33
  34 #include "libvex_basictypes.h"
  35 #include "libvex_ir.h"
  36 #include "libvex.h"
  37
  38 #include "main_util.h"
  39
  40
  41 /*---------------------------------------------------------------*/
  42 /*--- Printing the IR                                         ---*/
  43 /*---------------------------------------------------------------*/
  44
  45 void ppIRType ( IRType ty )
  46 {
  47    switch (ty) {
  48       case Ity_INVALID: vex_printf("Ity_INVALID"); break;
  49       case Ity_I1:      vex_printf( "I1");   break;
  50       case Ity_I8:      vex_printf( "I8");   break;
  51       case Ity_I16:     vex_printf( "I16");  break;
  52       case Ity_I32:     vex_printf( "I32");  break;
  53       case Ity_I64:     vex_printf( "I64");  break;
  54       case Ity_I128:    vex_printf( "I128"); break;
  55       case Ity_F16:     vex_printf( "F16");  break;
  56       case Ity_F32:     vex_printf( "F32");  break;
  57       case Ity_F64:     vex_printf( "F64");  break;
  58       case Ity_F128:    vex_printf( "F128"); break;
  59       case Ity_D32:     vex_printf( "D32");  break;
  60       case Ity_D64:     vex_printf( "D64");  break;
  61       case Ity_D128:    vex_printf( "D128"); break;
  62       case Ity_V128:    vex_printf( "V128"); break;
  63       case Ity_V256:    vex_printf( "V256"); break;
  64       default: vex_printf("ty = 0x%x\n", (UInt)ty);
  65                vpanic("ppIRType");
  66    }
  67 }
  68
  69 void ppIRConst ( const IRConst* con )
  70 {
  71    union { ULong i64; Double f64; UInt i32; Float f32; } u;
  72    vassert(sizeof(ULong) == sizeof(Double));
  73    switch (con->tag) {
  74       case Ico_U1:   vex_printf( "%d:I1",        con->Ico.U1 ? 1 : 0); break;
  75       case Ico_U8:   vex_printf( "0x%x:I8",      (UInt)(con->Ico.U8)); break;
  76       case Ico_U16:  vex_printf( "0x%x:I16",     (UInt)(con->Ico.U16)); break;
  77       case Ico_U32:  vex_printf( "0x%x:I32",     (UInt)(con->Ico.U32)); break;
  78       case Ico_U64:  vex_printf( "0x%llx:I64",   (ULong)(con->Ico.U64)); break;
  79       case Ico_F32:  u.f32 = con->Ico.F32;
  80                      vex_printf( "F32{0x%x}",   u.i32);
  81                      break;
  82       case Ico_F32i: vex_printf( "F32i{0x%x}",   con->Ico.F32i); break;
  83       case Ico_F64:  u.f64 = con->Ico.F64;
  84                      vex_printf( "F64{0x%llx}",  u.i64);
  85                      break;
  86       case Ico_F64i: vex_printf( "F64i{0x%llx}", con->Ico.F64i); break;
  87       case Ico_V128: vex_printf( "V128{0x%04x}", (UInt)(con->Ico.V128)); break;
  88       case Ico_V256: vex_printf( "V256{0x%08x}", con->Ico.V256); break;
  89       default: vpanic("ppIRConst");
  90    }
  91 }
  92
  93 void ppIRCallee ( const IRCallee* ce )
  94 {
  95    vex_printf("%s", ce->name);
  96    if (ce->regparms > 0)
  97       vex_printf("[rp=%d]", ce->regparms);
  98    if (ce->mcx_mask > 0)
  99       vex_printf("[mcx=0x%x]", ce->mcx_mask);
 100    vex_printf("{%p}", (void*)ce->addr);
 101 }
 102
 103 void ppIRRegArray ( const IRRegArray* arr )
 104 {
 105    vex_printf("(%d:%dx", arr->base, arr->nElems);
 106    ppIRType(arr->elemTy);
 107    vex_printf(")");
 108 }
 109
 110 void ppIRTemp ( IRTemp tmp )
 111 {
 112    if (tmp == IRTemp_INVALID)
 113       vex_printf("IRTemp_INVALID");
 114    else
 115       vex_printf( "t%u", tmp);
 116 }
 117
 118 void ppIROp ( IROp op )
 119 {
 120    const HChar* str = NULL;
 121    IROp   base;
 122    switch (op) {
 123       case Iop_Add8 ... Iop_Add64:
 124          str = "Add"; base = Iop_Add8; break;
 125       case Iop_Sub8 ... Iop_Sub64:
 126          str = "Sub"; base = Iop_Sub8; break;
 127       case Iop_Mul8 ... Iop_Mul64:
 128          str = "Mul"; base = Iop_Mul8; break;
 129       case Iop_Or8 ... Iop_Or64:
 130          str = "Or"; base = Iop_Or8; break;
 131       case Iop_And8 ... Iop_And64:
 132          str = "And"; base = Iop_And8; break;
 133       case Iop_Xor8 ... Iop_Xor64:
 134          str = "Xor"; base = Iop_Xor8; break;
 135       case Iop_Shl8 ... Iop_Shl64:
 136          str = "Shl"; base = Iop_Shl8; break;
 137       case Iop_Shr8 ... Iop_Shr64:
 138          str = "Shr"; base = Iop_Shr8; break;
 139       case Iop_Sar8 ... Iop_Sar64:
 140          str = "Sar"; base = Iop_Sar8; break;
 141       case Iop_CmpEQ8 ... Iop_CmpEQ64:
 142          str = "CmpEQ"; base = Iop_CmpEQ8; break;
 143       case Iop_CmpNE8 ... Iop_CmpNE64:
 144          str = "CmpNE"; base = Iop_CmpNE8; break;
 145       case Iop_CasCmpEQ8 ... Iop_CasCmpEQ64:
 146          str = "CasCmpEQ"; base = Iop_CasCmpEQ8; break;
 147       case Iop_CasCmpNE8 ... Iop_CasCmpNE64:
 148          str = "CasCmpNE"; base = Iop_CasCmpNE8; break;
 149       case Iop_ExpCmpNE8 ... Iop_ExpCmpNE64:
 150          str = "ExpCmpNE"; base = Iop_ExpCmpNE8; break;
 151       case Iop_Not8 ... Iop_Not64:
 152          str = "Not"; base = Iop_Not8; break;
 153       /* other cases must explicitly "return;" */
 154       case Iop_8Uto16:   vex_printf("8Uto16");  return;
 155       case Iop_8Uto32:   vex_printf("8Uto32");  return;
 156       case Iop_16Uto32:  vex_printf("16Uto32"); return;
 157       case Iop_8Sto16:   vex_printf("8Sto16");  return;
 158       case Iop_8Sto32:   vex_printf("8Sto32");  return;
 159       case Iop_16Sto32:  vex_printf("16Sto32"); return;
 160       case Iop_32Sto64:  vex_printf("32Sto64"); return;
 161       case Iop_32Uto64:  vex_printf("32Uto64"); return;
 162       case Iop_32to8:    vex_printf("32to8");   return;
 163       case Iop_16Uto64:  vex_printf("16Uto64"); return;
 164       case Iop_16Sto64:  vex_printf("16Sto64"); return;
 165       case Iop_8Uto64:   vex_printf("8Uto64"); return;
 166       case Iop_8Sto64:   vex_printf("8Sto64"); return;
 167       case Iop_64to16:   vex_printf("64to16"); return;
 168       case Iop_64to8:    vex_printf("64to8");  return;
 169
 170       case Iop_Not1:     vex_printf("Not1");    return;
 171       case Iop_And1:     vex_printf("And1");    return;
 172       case Iop_Or1:      vex_printf("Or1");     return;
 173       case Iop_32to1:    vex_printf("32to1");   return;
 174       case Iop_64to1:    vex_printf("64to1");   return;
 175       case Iop_1Uto8:    vex_printf("1Uto8");   return;
 176       case Iop_1Uto32:   vex_printf("1Uto32");  return;
 177       case Iop_1Uto64:   vex_printf("1Uto64");  return;
 178       case Iop_1Sto8:    vex_printf("1Sto8");  return;
 179       case Iop_1Sto16:   vex_printf("1Sto16");  return;
 180       case Iop_1Sto32:   vex_printf("1Sto32");  return;
 181       case Iop_1Sto64:   vex_printf("1Sto64");  return;
 182
 183       case Iop_MullS8:   vex_printf("MullS8");  return;
 184       case Iop_MullS16:  vex_printf("MullS16"); return;
 185       case Iop_MullS32:  vex_printf("MullS32"); return;
 186       case Iop_MullS64:  vex_printf("MullS64"); return;
 187       case Iop_MullU8:   vex_printf("MullU8");  return;
 188       case Iop_MullU16:  vex_printf("MullU16"); return;
 189       case Iop_MullU32:  vex_printf("MullU32"); return;
 190       case Iop_MullU64:  vex_printf("MullU64"); return;
 191
 192       case Iop_Clz64:    vex_printf("Clz64"); return;
 193       case Iop_Clz32:    vex_printf("Clz32"); return;
 194       case Iop_Ctz64:    vex_printf("Ctz64"); return;
 195       case Iop_Ctz32:    vex_printf("Ctz32"); return;
 196
 197       case Iop_ClzNat64: vex_printf("ClzNat64"); return;
 198       case Iop_ClzNat32: vex_printf("ClzNat32"); return;
 199       case Iop_CtzNat64: vex_printf("CtzNat64"); return;
 200       case Iop_CtzNat32: vex_printf("CtzNat32"); return;
 201
 202       case Iop_PopCount64: vex_printf("PopCount64"); return;
 203       case Iop_PopCount32: vex_printf("PopCount32"); return;
 204
 205       case Iop_CmpLT32S: vex_printf("CmpLT32S"); return;
 206       case Iop_CmpLE32S: vex_printf("CmpLE32S"); return;
 207       case Iop_CmpLT32U: vex_printf("CmpLT32U"); return;
 208       case Iop_CmpLE32U: vex_printf("CmpLE32U"); return;
 209
 210       case Iop_CmpLT64S: vex_printf("CmpLT64S"); return;
 211       case Iop_CmpLE64S: vex_printf("CmpLE64S"); return;
 212       case Iop_CmpLT64U: vex_printf("CmpLT64U"); return;
 213       case Iop_CmpLE64U: vex_printf("CmpLE64U"); return;
 214
 215       case Iop_CmpNEZ8:  vex_printf("CmpNEZ8"); return;
 216       case Iop_CmpNEZ16: vex_printf("CmpNEZ16"); return;
 217       case Iop_CmpNEZ32: vex_printf("CmpNEZ32"); return;
 218       case Iop_CmpNEZ64: vex_printf("CmpNEZ64"); return;
 219
 220       case Iop_CmpwNEZ32: vex_printf("CmpwNEZ32"); return;
 221       case Iop_CmpwNEZ64: vex_printf("CmpwNEZ64"); return;
 222
 223       case Iop_Left8:  vex_printf("Left8"); return;
 224       case Iop_Left16: vex_printf("Left16"); return;
 225       case Iop_Left32: vex_printf("Left32"); return;
 226       case Iop_Left64: vex_printf("Left64"); return;
 227       case Iop_Max32U: vex_printf("Max32U"); return;
 228
 229       case Iop_CmpORD32U: vex_printf("CmpORD32U"); return;
 230       case Iop_CmpORD32S: vex_printf("CmpORD32S"); return;
 231
 232       case Iop_CmpORD64U: vex_printf("CmpORD64U"); return;
 233       case Iop_CmpORD64S: vex_printf("CmpORD64S"); return;
 234
 235       case Iop_DivU32: vex_printf("DivU32"); return;
 236       case Iop_DivS32: vex_printf("DivS32"); return;
 237       case Iop_DivU64: vex_printf("DivU64"); return;
 238       case Iop_DivS64: vex_printf("DivS64"); return;
 239       case Iop_DivU64E: vex_printf("DivU64E"); return;
 240       case Iop_DivS64E: vex_printf("DivS64E"); return;
 241       case Iop_DivU32E: vex_printf("DivU32E"); return;
 242       case Iop_DivS32E: vex_printf("DivS32E"); return;
 243
 244       case Iop_DivModU64to32: vex_printf("DivModU64to32"); return;
 245       case Iop_DivModS64to32: vex_printf("DivModS64to32"); return;
 246
 247       case Iop_DivModU32to32: vex_printf("DivModU32to32"); return;
 248       case Iop_DivModS32to32: vex_printf("DivModS32to32"); return;
 249
 250       case Iop_DivModU128to64: vex_printf("DivModU128to64"); return;
 251       case Iop_DivModS128to64: vex_printf("DivModS128to64"); return;
 252
 253       case Iop_DivModS64to64: vex_printf("DivModS64to64"); return;
 254       case Iop_DivModU64to64: vex_printf("DivModU64to64"); return;
 255
 256       case Iop_16HIto8:  vex_printf("16HIto8"); return;
 257       case Iop_16to8:    vex_printf("16to8");   return;
 258       case Iop_8HLto16:  vex_printf("8HLto16"); return;
 259
 260       case Iop_32HIto16: vex_printf("32HIto16"); return;
 261       case Iop_32to16:   vex_printf("32to16");   return;
 262       case Iop_16HLto32: vex_printf("16HLto32"); return;
 263
 264       case Iop_64HIto32: vex_printf("64HIto32"); return;
 265       case Iop_64to32:   vex_printf("64to32");   return;
 266       case Iop_32HLto64: vex_printf("32HLto64"); return;
 267
 268       case Iop_128HIto64: vex_printf("128HIto64"); return;
 269       case Iop_128to64:   vex_printf("128to64");   return;
 270       case Iop_64HLto128: vex_printf("64HLto128"); return;
 271
 272       case Iop_CmpF32:    vex_printf("CmpF32");    return;
 273       case Iop_F32toI32S: vex_printf("F32toI32S");  return;
 274       case Iop_F32toI64S: vex_printf("F32toI64S");  return;
 275       case Iop_I32StoF32: vex_printf("I32StoF32");  return;
 276       case Iop_I64StoF32: vex_printf("I64StoF32");  return;
 277
 278       case Iop_AddF64:    vex_printf("AddF64"); return;
 279       case Iop_SubF64:    vex_printf("SubF64"); return;
 280       case Iop_MulF64:    vex_printf("MulF64"); return;
 281       case Iop_DivF64:    vex_printf("DivF64"); return;
 282       case Iop_AddF64r32: vex_printf("AddF64r32"); return;
 283       case Iop_SubF64r32: vex_printf("SubF64r32"); return;
 284       case Iop_MulF64r32: vex_printf("MulF64r32"); return;
 285       case Iop_DivF64r32: vex_printf("DivF64r32"); return;
 286       case Iop_AddF32:    vex_printf("AddF32"); return;
 287       case Iop_SubF32:    vex_printf("SubF32"); return;
 288       case Iop_MulF32:    vex_printf("MulF32"); return;
 289       case Iop_DivF32:    vex_printf("DivF32"); return;
 290
 291         /* 128 bit floating point */
 292       case Iop_AddF128:   vex_printf("AddF128");  return;
 293       case Iop_SubF128:   vex_printf("SubF128");  return;
 294       case Iop_MulF128:   vex_printf("MulF128");  return;
 295       case Iop_DivF128:   vex_printf("DivF128");  return;
 296
 297       case Iop_TruncF128toI64S:   vex_printf("TruncF128toI64S");  return;
 298       case Iop_TruncF128toI32S:   vex_printf("TruncF128toI32S");  return;
 299       case Iop_TruncF128toI64U:   vex_printf("TruncF128toI64U");  return;
 300       case Iop_TruncF128toI32U:   vex_printf("TruncF128toI32U");  return;
 301
 302       case Iop_MAddF128:   vex_printf("MAddF128");  return;
 303       case Iop_MSubF128:   vex_printf("MSubF128");  return;
 304       case Iop_NegMAddF128:   vex_printf("NegMAddF128");  return;
 305       case Iop_NegMSubF128:   vex_printf("NegMSubF128");  return;
 306
 307       case Iop_AbsF128:   vex_printf("AbsF128");  return;
 308       case Iop_NegF128:   vex_printf("NegF128");  return;
 309       case Iop_SqrtF128:  vex_printf("SqrtF128"); return;
 310       case Iop_CmpF128:   vex_printf("CmpF128");  return;
 311
 312       case Iop_F64HLtoF128: vex_printf("F64HLtoF128"); return;
 313       case Iop_F128HItoF64: vex_printf("F128HItoF64"); return;
 314       case Iop_F128LOtoF64: vex_printf("F128LOtoF64"); return;
 315       case Iop_I32StoF128: vex_printf("I32StoF128"); return;
 316       case Iop_I64StoF128: vex_printf("I64StoF128"); return;
 317       case Iop_I32UtoF128: vex_printf("I32UtoF128"); return;
 318       case Iop_I64UtoF128: vex_printf("I64UtoF128"); return;
 319       case Iop_F128toI32S: vex_printf("F128toI32S"); return;
 320       case Iop_F128toI64S: vex_printf("F128toI64S"); return;
 321       case Iop_F128toI32U: vex_printf("F128toI32U"); return;
 322       case Iop_F128toI64U: vex_printf("F128toI64U"); return;
 323       case Iop_F32toF128:  vex_printf("F32toF128");  return;
 324       case Iop_F64toF128:  vex_printf("F64toF128");  return;
 325       case Iop_F128toF64:  vex_printf("F128toF64");  return;
 326       case Iop_F128toF32:  vex_printf("F128toF32");  return;
 327       case Iop_F128toI128S: vex_printf("F128toI128");  return;
 328       case Iop_RndF128:    vex_printf("RndF128");  return;
 329
 330         /* s390 specific */
 331       case Iop_MAddF32:    vex_printf("s390_MAddF32"); return;
 332       case Iop_MSubF32:    vex_printf("s390_MSubF32"); return;
 333
 334       case Iop_ScaleF64:      vex_printf("ScaleF64"); return;
 335       case Iop_AtanF64:       vex_printf("AtanF64"); return;
 336       case Iop_Yl2xF64:       vex_printf("Yl2xF64"); return;
 337       case Iop_Yl2xp1F64:     vex_printf("Yl2xp1F64"); return;
 338       case Iop_PRemF64:       vex_printf("PRemF64"); return;
 339       case Iop_PRemC3210F64:  vex_printf("PRemC3210F64"); return;
 340       case Iop_PRem1F64:      vex_printf("PRem1F64"); return;
 341       case Iop_PRem1C3210F64: vex_printf("PRem1C3210F64"); return;
 342       case Iop_NegF64:        vex_printf("NegF64"); return;
 343       case Iop_AbsF64:        vex_printf("AbsF64"); return;
 344       case Iop_NegF32:        vex_printf("NegF32"); return;
 345       case Iop_AbsF32:        vex_printf("AbsF32"); return;
 346       case Iop_SqrtF64:       vex_printf("SqrtF64"); return;
 347       case Iop_SqrtF32:       vex_printf("SqrtF32"); return;
 348       case Iop_SinF64:    vex_printf("SinF64"); return;
 349       case Iop_CosF64:    vex_printf("CosF64"); return;
 350       case Iop_TanF64:    vex_printf("TanF64"); return;
 351       case Iop_2xm1F64:   vex_printf("2xm1F64"); return;
 352
 353       case Iop_MAddF64:    vex_printf("MAddF64"); return;
 354       case Iop_MSubF64:    vex_printf("MSubF64"); return;
 355       case Iop_MAddF64r32: vex_printf("MAddF64r32"); return;
 356       case Iop_MSubF64r32: vex_printf("MSubF64r32"); return;
 357
 358       case Iop_RSqrtEst5GoodF64: vex_printf("RSqrtEst5GoodF64"); return;
 359       case Iop_RoundF64toF64_NEAREST: vex_printf("RoundF64toF64_NEAREST"); return;
 360       case Iop_RoundF64toF64_NegINF: vex_printf("RoundF64toF64_NegINF"); return;
 361       case Iop_RoundF64toF64_PosINF: vex_printf("RoundF64toF64_PosINF"); return;
 362       case Iop_RoundF64toF64_ZERO: vex_printf("RoundF64toF64_ZERO"); return;
 363
 364       case Iop_TruncF64asF32: vex_printf("TruncF64asF32"); return;
 365
 366       case Iop_RecpExpF64: vex_printf("RecpExpF64"); return;
 367       case Iop_RecpExpF32: vex_printf("RecpExpF32"); return;
 368
 369       case Iop_MaxNumF64: vex_printf("MaxNumF64"); return;
 370       case Iop_MinNumF64: vex_printf("MinNumF64"); return;
 371       case Iop_MaxNumF32: vex_printf("MaxNumF32"); return;
 372       case Iop_MinNumF32: vex_printf("MinNumF32"); return;
 373
 374       case Iop_F16toF64: vex_printf("F16toF64"); return;
 375       case Iop_F64toF16: vex_printf("F64toF16"); return;
 376       case Iop_F16toF32: vex_printf("F16toF32"); return;
 377       case Iop_F32toF16: vex_printf("F32toF16"); return;
 378
 379       case Iop_QAdd32S: vex_printf("QAdd32S"); return;
 380       case Iop_QSub32S: vex_printf("QSub32S"); return;
 381       case Iop_Add16x2:   vex_printf("Add16x2"); return;
 382       case Iop_Sub16x2:   vex_printf("Sub16x2"); return;
 383       case Iop_QAdd16Sx2: vex_printf("QAdd16Sx2"); return;
 384       case Iop_QAdd16Ux2: vex_printf("QAdd16Ux2"); return;
 385       case Iop_QSub16Sx2: vex_printf("QSub16Sx2"); return;
 386       case Iop_QSub16Ux2: vex_printf("QSub16Ux2"); return;
 387       case Iop_HAdd16Ux2: vex_printf("HAdd16Ux2"); return;
 388       case Iop_HAdd16Sx2: vex_printf("HAdd16Sx2"); return;
 389       case Iop_HSub16Ux2: vex_printf("HSub16Ux2"); return;
 390       case Iop_HSub16Sx2: vex_printf("HSub16Sx2"); return;
 391
 392       case Iop_Add8x4:   vex_printf("Add8x4"); return;
 393       case Iop_Sub8x4:   vex_printf("Sub8x4"); return;
 394       case Iop_QAdd8Sx4: vex_printf("QAdd8Sx4"); return;
 395       case Iop_QAdd8Ux4: vex_printf("QAdd8Ux4"); return;
 396       case Iop_QSub8Sx4: vex_printf("QSub8Sx4"); return;
 397       case Iop_QSub8Ux4: vex_printf("QSub8Ux4"); return;
 398       case Iop_HAdd8Ux4: vex_printf("HAdd8Ux4"); return;
 399       case Iop_HAdd8Sx4: vex_printf("HAdd8Sx4"); return;
 400       case Iop_HSub8Ux4: vex_printf("HSub8Ux4"); return;
 401       case Iop_HSub8Sx4: vex_printf("HSub8Sx4"); return;
 402       case Iop_Sad8Ux4:  vex_printf("Sad8Ux4"); return;
 403
 404       case Iop_CmpNEZ16x2: vex_printf("CmpNEZ16x2"); return;
 405       case Iop_CmpNEZ8x4:  vex_printf("CmpNEZ8x4"); return;
 406       case Iop_Reverse8sIn32_x1: vex_printf("Reverse8sIn32_x1"); return;
 407
 408       case Iop_CmpF64:    vex_printf("CmpF64"); return;
 409
 410       case Iop_F64toI16S: vex_printf("F64toI16S"); return;
 411       case Iop_F64toI32S: vex_printf("F64toI32S"); return;
 412       case Iop_F64toI64S: vex_printf("F64toI64S"); return;
 413       case Iop_F64toI64U: vex_printf("F64toI64U"); return;
 414       case Iop_F32toI32U: vex_printf("F32toI32U");  return;
 415       case Iop_F32toI64U: vex_printf("F32toI64U");  return;
 416
 417       case Iop_F64toI32U: vex_printf("F64toI32U"); return;
 418
 419       case Iop_I32StoF64: vex_printf("I32StoF64"); return;
 420       case Iop_I64StoF64: vex_printf("I64StoF64"); return;
 421       case Iop_I64UtoF64: vex_printf("I64UtoF64"); return;
 422       case Iop_I32UtoF32: vex_printf("I32UtoF32"); return;
 423       case Iop_I64UtoF32: vex_printf("I64UtoF32"); return;
 424
 425       case Iop_I32UtoF64: vex_printf("I32UtoF64"); return;
 426
 427       case Iop_F32toF64: vex_printf("F32toF64"); return;
 428       case Iop_F64toF32: vex_printf("F64toF32"); return;
 429
 430       case Iop_RoundF128toInt: vex_printf("RoundF128toInt"); return;
 431       case Iop_RoundF64toInt: vex_printf("RoundF64toInt"); return;
 432       case Iop_RoundF32toInt: vex_printf("RoundF32toInt"); return;
 433       case Iop_RoundF64toF32: vex_printf("RoundF64toF32"); return;
 434
 435       case Iop_ReinterpF64asI64: vex_printf("ReinterpF64asI64"); return;
 436       case Iop_ReinterpI64asF64: vex_printf("ReinterpI64asF64"); return;
 437       case Iop_ReinterpF32asI32: vex_printf("ReinterpF32asI32"); return;
 438       case Iop_ReinterpI32asF32: vex_printf("ReinterpI32asF32"); return;
 439
 440       case Iop_I32UtoF32x4_DEP: vex_printf("I32UtoF32x4_DEP"); return;
 441       case Iop_I32StoF32x4_DEP: vex_printf("I32StoF32x4_DEP"); return;
 442
 443       case Iop_I32StoF32x4: vex_printf("I32StoF32x4"); return;
 444       case Iop_F32toI32Sx4: vex_printf("F32toI32Sx4"); return;
 445
 446       case Iop_F32toF16x4_DEP: vex_printf("F32toF16x4_DEP"); return;
 447       case Iop_F32toF16x4: vex_printf("F32toF16x4"); return;
 448       case Iop_F16toF32x4: vex_printf("F16toF32x4"); return;
 449       case Iop_F16toF64x2: vex_printf("F16toF64x2"); return;
 450       case Iop_F64toF16x2_DEP: vex_printf("F64toF16x2_DEP"); return;
 451
 452       case Iop_RSqrtEst32Fx4: vex_printf("RSqrtEst32Fx4"); return;
 453       case Iop_RSqrtEst32Ux4: vex_printf("RSqrtEst32Ux4"); return;
 454       case Iop_RSqrtEst32Fx2: vex_printf("RSqrtEst32Fx2"); return;
 455       case Iop_RSqrtEst32Ux2: vex_printf("RSqrtEst32Ux2"); return;
 456
 457       case Iop_QF32toI32Ux4_RZ: vex_printf("QF32toI32Ux4_RZ"); return;
 458       case Iop_QF32toI32Sx4_RZ: vex_printf("QF32toI32Sx4_RZ"); return;
 459
 460       case Iop_F32toI32Ux4_RZ: vex_printf("F32toI32Ux4_RZ"); return;
 461       case Iop_F32toI32Sx4_RZ: vex_printf("F32toI32Sx4_RZ"); return;
 462
 463       case Iop_I32UtoF32x2_DEP: vex_printf("I32UtoF32x2_DEP"); return;
 464       case Iop_I32StoF32x2_DEP: vex_printf("I32StoF32x2_DEP"); return;
 465
 466       case Iop_F32toI32Ux2_RZ: vex_printf("F32toI32Ux2_RZ"); return;
 467       case Iop_F32toI32Sx2_RZ: vex_printf("F32toI32Sx2_RZ"); return;
 468
 469       case Iop_RoundF32x4_RM: vex_printf("RoundF32x4_RM"); return;
 470       case Iop_RoundF32x4_RP: vex_printf("RoundF32x4_RP"); return;
 471       case Iop_RoundF32x4_RN: vex_printf("RoundF32x4_RN"); return;
 472       case Iop_RoundF32x4_RZ: vex_printf("RoundF32x4_RZ"); return;
 473
 474       case Iop_Abs8x8: vex_printf("Abs8x8"); return;
 475       case Iop_Abs16x4: vex_printf("Abs16x4"); return;
 476       case Iop_Abs32x2: vex_printf("Abs32x2"); return;
 477       case Iop_Add8x8: vex_printf("Add8x8"); return;
 478       case Iop_Add16x4: vex_printf("Add16x4"); return;
 479       case Iop_Add32x2: vex_printf("Add32x2"); return;
 480       case Iop_QAdd8Ux8: vex_printf("QAdd8Ux8"); return;
 481       case Iop_QAdd16Ux4: vex_printf("QAdd16Ux4"); return;
 482       case Iop_QAdd32Ux2: vex_printf("QAdd32Ux2"); return;
 483       case Iop_QAdd64Ux1: vex_printf("QAdd64Ux1"); return;
 484       case Iop_QAdd8Sx8: vex_printf("QAdd8Sx8"); return;
 485       case Iop_QAdd16Sx4: vex_printf("QAdd16Sx4"); return;
 486       case Iop_QAdd32Sx2: vex_printf("QAdd32Sx2"); return;
 487       case Iop_QAdd64Sx1: vex_printf("QAdd64Sx1"); return;
 488       case Iop_PwAdd8x8: vex_printf("PwAdd8x8"); return;
 489       case Iop_PwAdd16x4: vex_printf("PwAdd16x4"); return;
 490       case Iop_PwAdd32x2: vex_printf("PwAdd32x2"); return;
 491       case Iop_PwAdd32Fx2: vex_printf("PwAdd32Fx2"); return;
 492       case Iop_PwAddL8Ux8: vex_printf("PwAddL8Ux8"); return;
 493       case Iop_PwAddL16Ux4: vex_printf("PwAddL16Ux4"); return;
 494       case Iop_PwAddL32Ux2: vex_printf("PwAddL32Ux2"); return;
 495       case Iop_PwAddL8Sx8: vex_printf("PwAddL8Sx8"); return;
 496       case Iop_PwAddL16Sx4: vex_printf("PwAddL16Sx4"); return;
 497       case Iop_PwAddL32Sx2: vex_printf("PwAddL32Sx2"); return;
 498       case Iop_Sub8x8: vex_printf("Sub8x8"); return;
 499       case Iop_Sub16x4: vex_printf("Sub16x4"); return;
 500       case Iop_Sub32x2: vex_printf("Sub32x2"); return;
 501       case Iop_QSub8Ux8: vex_printf("QSub8Ux8"); return;
 502       case Iop_QSub16Ux4: vex_printf("QSub16Ux4"); return;
 503       case Iop_QSub32Ux2: vex_printf("QSub32Ux2"); return;
 504       case Iop_QSub64Ux1: vex_printf("QSub64Ux1"); return;
 505       case Iop_QSub8Sx8: vex_printf("QSub8Sx8"); return;
 506       case Iop_QSub16Sx4: vex_printf("QSub16Sx4"); return;
 507       case Iop_QSub32Sx2: vex_printf("QSub32Sx2"); return;
 508       case Iop_QSub64Sx1: vex_printf("QSub64Sx1"); return;
 509       case Iop_Mul8x8: vex_printf("Mul8x8"); return;
 510       case Iop_Mul16x4: vex_printf("Mul16x4"); return;
 511       case Iop_Mul32x2: vex_printf("Mul32x2"); return;
 512       case Iop_Mul32Fx2: vex_printf("Mul32Fx2"); return;
 513       case Iop_PolynomialMul8x8: vex_printf("PolynomialMul8x8"); return;
 514       case Iop_MulHi16Ux4: vex_printf("MulHi16Ux4"); return;
 515       case Iop_MulHi16Sx4: vex_printf("MulHi16Sx4"); return;
 516       case Iop_QDMulHi16Sx4: vex_printf("QDMulHi16Sx4"); return;
 517       case Iop_QDMulHi32Sx2: vex_printf("QDMulHi32Sx2"); return;
 518       case Iop_QRDMulHi16Sx4: vex_printf("QRDMulHi16Sx4"); return;
 519       case Iop_QRDMulHi32Sx2: vex_printf("QRDMulHi32Sx2"); return;
 520       case Iop_QDMull16Sx4: vex_printf("QDMull16Sx4"); return;
 521       case Iop_QDMull32Sx2: vex_printf("QDMull32Sx2"); return;
 522       case Iop_Avg8Ux8: vex_printf("Avg8Ux8"); return;
 523       case Iop_Avg16Ux4: vex_printf("Avg16Ux4"); return;
 524       case Iop_Max8Sx8: vex_printf("Max8Sx8"); return;
 525       case Iop_Max16Sx4: vex_printf("Max16Sx4"); return;
 526       case Iop_Max32Sx2: vex_printf("Max32Sx2"); return;
 527       case Iop_Max8Ux8: vex_printf("Max8Ux8"); return;
 528       case Iop_Max16Ux4: vex_printf("Max16Ux4"); return;
 529       case Iop_Max32Ux2: vex_printf("Max32Ux2"); return;
 530       case Iop_Min8Sx8: vex_printf("Min8Sx8"); return;
 531       case Iop_Min16Sx4: vex_printf("Min16Sx4"); return;
 532       case Iop_Min32Sx2: vex_printf("Min32Sx2"); return;
 533       case Iop_Min8Ux8: vex_printf("Min8Ux8"); return;
 534       case Iop_Min16Ux4: vex_printf("Min16Ux4"); return;
 535       case Iop_Min32Ux2: vex_printf("Min32Ux2"); return;
 536       case Iop_PwMax8Sx8: vex_printf("PwMax8Sx8"); return;
 537       case Iop_PwMax16Sx4: vex_printf("PwMax16Sx4"); return;
 538       case Iop_PwMax32Sx2: vex_printf("PwMax32Sx2"); return;
 539       case Iop_PwMax8Ux8: vex_printf("PwMax8Ux8"); return;
 540       case Iop_PwMax16Ux4: vex_printf("PwMax16Ux4"); return;
 541       case Iop_PwMax32Ux2: vex_printf("PwMax32Ux2"); return;
 542       case Iop_PwMin8Sx8: vex_printf("PwMin8Sx8"); return;
 543       case Iop_PwMin16Sx4: vex_printf("PwMin16Sx4"); return;
 544       case Iop_PwMin32Sx2: vex_printf("PwMin32Sx2"); return;
 545       case Iop_PwMin8Ux8: vex_printf("PwMin8Ux8"); return;
 546       case Iop_PwMin16Ux4: vex_printf("PwMin16Ux4"); return;
 547       case Iop_PwMin32Ux2: vex_printf("PwMin32Ux2"); return;
 548       case Iop_CmpEQ8x8: vex_printf("CmpEQ8x8"); return;
 549       case Iop_CmpEQ16x4: vex_printf("CmpEQ16x4"); return;
 550       case Iop_CmpEQ32x2: vex_printf("CmpEQ32x2"); return;
 551       case Iop_CmpGT8Ux8: vex_printf("CmpGT8Ux8"); return;
 552       case Iop_CmpGT16Ux4: vex_printf("CmpGT16Ux4"); return;
 553       case Iop_CmpGT32Ux2: vex_printf("CmpGT32Ux2"); return;
 554       case Iop_CmpGT8Sx8: vex_printf("CmpGT8Sx8"); return;
 555       case Iop_CmpGT16Sx4: vex_printf("CmpGT16Sx4"); return;
 556       case Iop_CmpGT32Sx2: vex_printf("CmpGT32Sx2"); return;
 557       case Iop_Cnt8x8: vex_printf("Cnt8x8"); return;
 558       case Iop_Clz8x8: vex_printf("Clz8x8"); return;
 559       case Iop_Clz16x4: vex_printf("Clz16x4"); return;
 560       case Iop_Clz32x2: vex_printf("Clz32x2"); return;
 561       case Iop_Cls8x8: vex_printf("Cls8x8"); return;
 562       case Iop_Cls16x4: vex_printf("Cls16x4"); return;
 563       case Iop_Cls32x2: vex_printf("Cls32x2"); return;
 564       case Iop_ShlN8x8: vex_printf("ShlN8x8"); return;
 565       case Iop_ShlN16x4: vex_printf("ShlN16x4"); return;
 566       case Iop_ShlN32x2: vex_printf("ShlN32x2"); return;
 567       case Iop_ShrN8x8: vex_printf("ShrN8x8"); return;
 568       case Iop_ShrN16x4: vex_printf("ShrN16x4"); return;
 569       case Iop_ShrN32x2: vex_printf("ShrN32x2"); return;
 570       case Iop_SarN8x8: vex_printf("SarN8x8"); return;
 571       case Iop_SarN16x4: vex_printf("SarN16x4"); return;
 572       case Iop_SarN32x2: vex_printf("SarN32x2"); return;
 573       case Iop_QNarrowBin16Sto8Ux8: vex_printf("QNarrowBin16Sto8Ux8"); return;
 574       case Iop_QNarrowBin16Sto8Sx8: vex_printf("QNarrowBin16Sto8Sx8"); return;
 575       case Iop_QNarrowBin32Sto16Sx4: vex_printf("QNarrowBin32Sto16Sx4"); return;
 576       case Iop_QNarrowBin64Sto32Sx4: vex_printf("QNarrowBin64Sto32Sx4"); return;
 577       case Iop_QNarrowBin64Uto32Ux4: vex_printf("QNarrowBin64Uto32Ux4"); return;
 578       case Iop_NarrowBin16to8x8: vex_printf("NarrowBin16to8x8"); return;
 579       case Iop_NarrowBin32to16x4: vex_printf("NarrowBin32to16x4"); return;
 580       case Iop_NarrowBin64to32x4: vex_printf("NarrowBin64to32x4"); return;
 581       case Iop_InterleaveHI8x8: vex_printf("InterleaveHI8x8"); return;
 582       case Iop_InterleaveHI16x4: vex_printf("InterleaveHI16x4"); return;
 583       case Iop_InterleaveHI32x2: vex_printf("InterleaveHI32x2"); return;
 584       case Iop_InterleaveLO8x8: vex_printf("InterleaveLO8x8"); return;
 585       case Iop_InterleaveLO16x4: vex_printf("InterleaveLO16x4"); return;
 586       case Iop_InterleaveLO32x2: vex_printf("InterleaveLO32x2"); return;
 587       case Iop_CatOddLanes8x8: vex_printf("CatOddLanes8x8"); return;
 588       case Iop_CatOddLanes16x4: vex_printf("CatOddLanes16x4"); return;
 589       case Iop_CatEvenLanes8x8: vex_printf("CatEvenLanes8x8"); return;
 590       case Iop_CatEvenLanes16x4: vex_printf("CatEvenLanes16x4"); return;
 591       case Iop_InterleaveOddLanes8x8: vex_printf("InterleaveOddLanes8x8"); return;
 592       case Iop_InterleaveOddLanes16x4: vex_printf("InterleaveOddLanes16x4"); return;
 593       case Iop_InterleaveEvenLanes8x8: vex_printf("InterleaveEvenLanes8x8"); return;
 594       case Iop_InterleaveEvenLanes16x4: vex_printf("InterleaveEvenLanes16x4"); return;
 595       case Iop_Shl8x8: vex_printf("Shl8x8"); return;
 596       case Iop_Shl16x4: vex_printf("Shl16x4"); return;
 597       case Iop_Shl32x2: vex_printf("Shl32x2"); return;
 598       case Iop_Shr8x8: vex_printf("Shr8x8"); return;
 599       case Iop_Shr16x4: vex_printf("Shr16x4"); return;
 600       case Iop_Shr32x2: vex_printf("Shr32x2"); return;
 601       case Iop_QShl8x8: vex_printf("QShl8x8"); return;
 602       case Iop_QShl16x4: vex_printf("QShl16x4"); return;
 603       case Iop_QShl32x2: vex_printf("QShl32x2"); return;
 604       case Iop_QShl64x1: vex_printf("QShl64x1"); return;
 605       case Iop_QSal8x8: vex_printf("QSal8x8"); return;
 606       case Iop_QSal16x4: vex_printf("QSal16x4"); return;
 607       case Iop_QSal32x2: vex_printf("QSal32x2"); return;
 608       case Iop_QSal64x1: vex_printf("QSal64x1"); return;
 609       case Iop_QShlNsatUU8x8: vex_printf("QShlNsatUU8x8"); return;
 610       case Iop_QShlNsatUU16x4: vex_printf("QShlNsatUU16x4"); return;
 611       case Iop_QShlNsatUU32x2: vex_printf("QShlNsatUU32x2"); return;
 612       case Iop_QShlNsatUU64x1: vex_printf("QShlNsatUU64x1"); return;
 613       case Iop_QShlNsatSU8x8: vex_printf("QShlNsatSU8x8"); return;
 614       case Iop_QShlNsatSU16x4: vex_printf("QShlNsatSU16x4"); return;
 615       case Iop_QShlNsatSU32x2: vex_printf("QShlNsatSU32x2"); return;
 616       case Iop_QShlNsatSU64x1: vex_printf("QShlNsatSU64x1"); return;
 617       case Iop_QShlNsatSS8x8: vex_printf("QShlNsatSS8x8"); return;
 618       case Iop_QShlNsatSS16x4: vex_printf("QShlNsatSS16x4"); return;
 619       case Iop_QShlNsatSS32x2: vex_printf("QShlNsatSS32x2"); return;
 620       case Iop_QShlNsatSS64x1: vex_printf("QShlNsatSS64x1"); return;
 621       case Iop_Sar8x8: vex_printf("Sar8x8"); return;
 622       case Iop_Sar16x4: vex_printf("Sar16x4"); return;
 623       case Iop_Sar32x2: vex_printf("Sar32x2"); return;
 624       case Iop_Sal8x8: vex_printf("Sal8x8"); return;
 625       case Iop_Sal16x4: vex_printf("Sal16x4"); return;
 626       case Iop_Sal32x2: vex_printf("Sal32x2"); return;
 627       case Iop_Sal64x1: vex_printf("Sal64x1"); return;
 628       case Iop_Perm8x8: vex_printf("Perm8x8"); return;
 629       case Iop_PermOrZero8x8: vex_printf("PermOrZero8x8"); return;
 630       case Iop_Reverse8sIn16_x4: vex_printf("Reverse8sIn16_x4"); return;
 631       case Iop_Reverse8sIn32_x2: vex_printf("Reverse8sIn32_x2"); return;
 632       case Iop_Reverse16sIn32_x2: vex_printf("Reverse16sIn32_x2"); return;
 633       case Iop_Reverse8sIn64_x1: vex_printf("Reverse8sIn64_x1"); return;
 634       case Iop_Reverse16sIn64_x1: vex_printf("Reverse16sIn64_x1"); return;
 635       case Iop_Reverse32sIn64_x1: vex_printf("Reverse32sIn64_x1"); return;
 636       case Iop_Abs32Fx2: vex_printf("Abs32Fx2"); return;
 637       case Iop_GetMSBs8x8: vex_printf("GetMSBs8x8"); return;
 638       case Iop_GetMSBs8x16: vex_printf("GetMSBs8x16"); return;
 639
 640       case Iop_CmpNEZ32x2: vex_printf("CmpNEZ32x2"); return;
 641       case Iop_CmpNEZ16x4: vex_printf("CmpNEZ16x4"); return;
 642       case Iop_CmpNEZ8x8:  vex_printf("CmpNEZ8x8"); return;
 643
 644       case Iop_Add32Fx4:  vex_printf("Add32Fx4"); return;
 645       case Iop_Add32Fx2:  vex_printf("Add32Fx2"); return;
 646       case Iop_Add32F0x4: vex_printf("Add32F0x4"); return;
 647       case Iop_Add64Fx2:  vex_printf("Add64Fx2"); return;
 648       case Iop_Add64F0x2: vex_printf("Add64F0x2"); return;
 649
 650       case Iop_Div32Fx4:  vex_printf("Div32Fx4"); return;
 651       case Iop_Div32F0x4: vex_printf("Div32F0x4"); return;
 652       case Iop_Div64Fx2:  vex_printf("Div64Fx2"); return;
 653       case Iop_Div64F0x2: vex_printf("Div64F0x2"); return;
 654
 655       case Iop_Max32Fx8:  vex_printf("Max32Fx8"); return;
 656       case Iop_Max32Fx4:  vex_printf("Max32Fx4"); return;
 657       case Iop_Max32Fx2:  vex_printf("Max32Fx2"); return;
 658       case Iop_PwMax32Fx4:  vex_printf("PwMax32Fx4"); return;
 659       case Iop_PwMax32Fx2:  vex_printf("PwMax32Fx2"); return;
 660       case Iop_Max32F0x4: vex_printf("Max32F0x4"); return;
 661       case Iop_Max64Fx4:  vex_printf("Max64Fx4"); return;
 662       case Iop_Max64Fx2:  vex_printf("Max64Fx2"); return;
 663       case Iop_Max64F0x2: vex_printf("Max64F0x2"); return;
 664
 665       case Iop_Min32Fx8:  vex_printf("Min32Fx8"); return;
 666       case Iop_Min32Fx4:  vex_printf("Min32Fx4"); return;
 667       case Iop_Min32Fx2:  vex_printf("Min32Fx2"); return;
 668       case Iop_PwMin32Fx4:  vex_printf("PwMin32Fx4"); return;
 669       case Iop_PwMin32Fx2:  vex_printf("PwMin32Fx2"); return;
 670       case Iop_Min32F0x4: vex_printf("Min32F0x4"); return;
 671       case Iop_Min64Fx4:  vex_printf("Min64Fx4"); return;
 672       case Iop_Min64Fx2:  vex_printf("Min64Fx2"); return;
 673       case Iop_Min64F0x2: vex_printf("Min64F0x2"); return;
 674
 675       case Iop_Mul32Fx4:  vex_printf("Mul32Fx4"); return;
 676       case Iop_Mul32F0x4: vex_printf("Mul32F0x4"); return;
 677       case Iop_Mul64Fx2:  vex_printf("Mul64Fx2"); return;
 678       case Iop_Mul64F0x2: vex_printf("Mul64F0x2"); return;
 679
 680       case Iop_RecipEst32Ux2: vex_printf("RecipEst32Ux2"); return;
 681       case Iop_RecipEst32Fx2: vex_printf("RecipEst32Fx2"); return;
 682       case Iop_RecipEst32Fx4: vex_printf("RecipEst32Fx4"); return;
 683       case Iop_RecipEst32Fx8: vex_printf("RecipEst32Fx8"); return;
 684       case Iop_RecipEst32Ux4: vex_printf("RecipEst32Ux4"); return;
 685       case Iop_RecipEst32F0x4: vex_printf("RecipEst32F0x4"); return;
 686       case Iop_RecipStep32Fx2: vex_printf("RecipStep32Fx2"); return;
 687       case Iop_RecipStep32Fx4: vex_printf("RecipStep32Fx4"); return;
 688       case Iop_RecipEst64Fx2: vex_printf("RecipEst64Fx2"); return;
 689       case Iop_RecipStep64Fx2: vex_printf("RecipStep64Fx2"); return;
 690
 691       case Iop_Abs32Fx4:  vex_printf("Abs32Fx4"); return;
 692       case Iop_Abs64Fx2:  vex_printf("Abs64Fx2"); return;
 693       case Iop_RSqrtStep32Fx4:  vex_printf("RSqrtStep32Fx4"); return;
 694       case Iop_RSqrtStep64Fx2:  vex_printf("RSqrtStep64Fx2"); return;
 695       case Iop_RSqrtStep32Fx2:  vex_printf("RSqrtStep32Fx2"); return;
 696       case Iop_RSqrtEst64Fx2: vex_printf("RSqrtEst64Fx2"); return;
 697
 698       case Iop_RSqrtEst32F0x4: vex_printf("RSqrtEst32F0x4"); return;
 699       case Iop_RSqrtEst32Fx8: vex_printf("RSqrtEst32Fx8"); return;
 700
 701       case Iop_Sqrt32Fx4:  vex_printf("Sqrt32Fx4"); return;
 702       case Iop_Sqrt32F0x4: vex_printf("Sqrt32F0x4"); return;
 703       case Iop_Sqrt64Fx2:  vex_printf("Sqrt64Fx2"); return;
 704       case Iop_Sqrt64F0x2: vex_printf("Sqrt64F0x2"); return;
 705       case Iop_Sqrt32Fx8:  vex_printf("Sqrt32Fx8"); return;
 706       case Iop_Sqrt64Fx4:  vex_printf("Sqrt64Fx4"); return;
 707
 708       case Iop_Scale2_32Fx4: vex_printf("Scale2_32Fx4"); return;
 709       case Iop_Scale2_64Fx2: vex_printf("Scale2_64Fx2"); return;
 710       case Iop_Log2_32Fx4: vex_printf("Log2_32Fx4"); return;
 711       case Iop_Log2_64Fx2: vex_printf("Log2_64Fx2"); return;
 712       case Iop_Exp2_32Fx4: vex_printf("Iop_Exp2_32Fx4"); return;
 713
 714       case Iop_Sub32Fx4:  vex_printf("Sub32Fx4"); return;
 715       case Iop_Sub32Fx2:  vex_printf("Sub32Fx2"); return;
 716       case Iop_Sub32F0x4: vex_printf("Sub32F0x4"); return;
 717       case Iop_Sub64Fx2:  vex_printf("Sub64Fx2"); return;
 718       case Iop_Sub64F0x2: vex_printf("Sub64F0x2"); return;
 719
 720       case Iop_CmpEQ32Fx4: vex_printf("CmpEQ32Fx4"); return;
 721       case Iop_CmpLT32Fx4: vex_printf("CmpLT32Fx4"); return;
 722       case Iop_CmpLE32Fx4: vex_printf("CmpLE32Fx4"); return;
 723       case Iop_CmpGT32Fx4: vex_printf("CmpGT32Fx4"); return;
 724       case Iop_CmpGE32Fx4: vex_printf("CmpGE32Fx4"); return;
 725       case Iop_CmpUN32Fx4: vex_printf("CmpUN32Fx4"); return;
 726       case Iop_CmpEQ64Fx2: vex_printf("CmpEQ64Fx2"); return;
 727       case Iop_CmpLT64Fx2: vex_printf("CmpLT64Fx2"); return;
 728       case Iop_CmpLE64Fx2: vex_printf("CmpLE64Fx2"); return;
 729       case Iop_CmpUN64Fx2: vex_printf("CmpUN64Fx2"); return;
 730       case Iop_CmpGT32Fx2: vex_printf("CmpGT32Fx2"); return;
 731       case Iop_CmpEQ32Fx2: vex_printf("CmpEQ32Fx2"); return;
 732       case Iop_CmpGE32Fx2: vex_printf("CmpGE32Fx2"); return;
 733
 734       case Iop_CmpEQ32F0x4: vex_printf("CmpEQ32F0x4"); return;
 735       case Iop_CmpLT32F0x4: vex_printf("CmpLT32F0x4"); return;
 736       case Iop_CmpLE32F0x4: vex_printf("CmpLE32F0x4"); return;
 737       case Iop_CmpUN32F0x4: vex_printf("CmpUN32F0x4"); return;
 738       case Iop_CmpEQ64F0x2: vex_printf("CmpEQ64F0x2"); return;
 739       case Iop_CmpLT64F0x2: vex_printf("CmpLT64F0x2"); return;
 740       case Iop_CmpLE64F0x2: vex_printf("CmpLE64F0x2"); return;
 741       case Iop_CmpUN64F0x2: vex_printf("CmpUN64F0x2"); return;
 742
 743       case Iop_Neg64Fx2: vex_printf("Neg64Fx2"); return;
 744       case Iop_Neg32Fx4: vex_printf("Neg32Fx4"); return;
 745       case Iop_Neg32Fx2: vex_printf("Neg32Fx2"); return;
 746
 747       case Iop_F32x4_2toQ16x8: vex_printf("F32x4_2toQ16x8"); return;
 748       case Iop_F64x2_2toQ32x4: vex_printf("F64x2_2toQ32x4"); return;
 749
 750       case Iop_V128to64:   vex_printf("V128to64");   return;
 751       case Iop_V128HIto64: vex_printf("V128HIto64"); return;
 752       case Iop_64HLtoV128: vex_printf("64HLtoV128"); return;
 753
 754       case Iop_64UtoV128:   vex_printf("64UtoV128"); return;
 755       case Iop_SetV128lo64: vex_printf("SetV128lo64"); return;
 756
 757       case Iop_ZeroHI64ofV128:  vex_printf("ZeroHI64ofV128"); return;
 758       case Iop_ZeroHI96ofV128:  vex_printf("ZeroHI96ofV128"); return;
 759       case Iop_ZeroHI112ofV128: vex_printf("ZeroHI112ofV128"); return;
 760       case Iop_ZeroHI120ofV128: vex_printf("ZeroHI120ofV128"); return;
 761
 762       case Iop_32UtoV128:   vex_printf("32UtoV128"); return;
 763       case Iop_V128to32:    vex_printf("V128to32"); return;
 764       case Iop_SetV128lo32: vex_printf("SetV128lo32"); return;
 765
 766       case Iop_Dup8x16: vex_printf("Dup8x16"); return;
 767       case Iop_Dup16x8: vex_printf("Dup16x8"); return;
 768       case Iop_Dup32x4: vex_printf("Dup32x4"); return;
 769       case Iop_Dup8x8: vex_printf("Dup8x8"); return;
 770       case Iop_Dup16x4: vex_printf("Dup16x4"); return;
 771       case Iop_Dup32x2: vex_printf("Dup32x2"); return;
 772
 773       case Iop_NotV128:    vex_printf("NotV128"); return;
 774       case Iop_AndV128:    vex_printf("AndV128"); return;
 775       case Iop_OrV128:     vex_printf("OrV128");  return;
 776       case Iop_XorV128:    vex_printf("XorV128"); return;
 777
 778       case Iop_CmpNEZ8x16: vex_printf("CmpNEZ8x16"); return;
 779       case Iop_CmpNEZ16x8: vex_printf("CmpNEZ16x8"); return;
 780       case Iop_CmpNEZ32x4: vex_printf("CmpNEZ32x4"); return;
 781       case Iop_CmpNEZ64x2: vex_printf("CmpNEZ64x2"); return;
 782       case Iop_CmpNEZ128x1: vex_printf("CmpNEZ128x1"); return;
 783
 784       case Iop_Abs8x16: vex_printf("Abs8x16"); return;
 785       case Iop_Abs16x8: vex_printf("Abs16x8"); return;
 786       case Iop_Abs32x4: vex_printf("Abs32x4"); return;
 787       case Iop_Abs64x2: vex_printf("Abs64x2"); return;
 788
 789       case Iop_Add8x16:   vex_printf("Add8x16"); return;
 790       case Iop_Add16x8:   vex_printf("Add16x8"); return;
 791       case Iop_Add32x4:   vex_printf("Add32x4"); return;
 792       case Iop_Add64x2:   vex_printf("Add64x2"); return;
 793       case Iop_Add128x1:  vex_printf("Add128x1"); return;
 794       case Iop_QAdd8Ux16: vex_printf("QAdd8Ux16"); return;
 795       case Iop_QAdd16Ux8: vex_printf("QAdd16Ux8"); return;
 796       case Iop_QAdd32Ux4: vex_printf("QAdd32Ux4"); return;
 797       case Iop_QAdd8Sx16: vex_printf("QAdd8Sx16"); return;
 798       case Iop_QAdd16Sx8: vex_printf("QAdd16Sx8"); return;
 799       case Iop_QAdd32Sx4: vex_printf("QAdd32Sx4"); return;
 800       case Iop_QAdd64Ux2: vex_printf("QAdd64Ux2"); return;
 801       case Iop_QAdd64Sx2: vex_printf("QAdd64Sx2"); return;
 802
 803       case Iop_QAddExtUSsatSS8x16: vex_printf("QAddExtUSsatSS8x16"); return;
 804       case Iop_QAddExtUSsatSS16x8: vex_printf("QAddExtUSsatSS16x8"); return;
 805       case Iop_QAddExtUSsatSS32x4: vex_printf("QAddExtUSsatSS32x4"); return;
 806       case Iop_QAddExtUSsatSS64x2: vex_printf("QAddExtUSsatSS64x2"); return;
 807       case Iop_QAddExtSUsatUU8x16: vex_printf("QAddExtSUsatUU8x16"); return;
 808       case Iop_QAddExtSUsatUU16x8: vex_printf("QAddExtSUsatUU16x8"); return;
 809       case Iop_QAddExtSUsatUU32x4: vex_printf("QAddExtSUsatUU32x4"); return;
 810       case Iop_QAddExtSUsatUU64x2: vex_printf("QAddExtSUsatUU64x2"); return;
 811
 812       case Iop_PwAdd8x16: vex_printf("PwAdd8x16"); return;
 813       case Iop_PwAdd16x8: vex_printf("PwAdd16x8"); return;
 814       case Iop_PwAdd32x4: vex_printf("PwAdd32x4"); return;
 815       case Iop_PwAddL8Ux16: vex_printf("PwAddL8Ux16"); return;
 816       case Iop_PwAddL16Ux8: vex_printf("PwAddL16Ux8"); return;
 817       case Iop_PwAddL32Ux4: vex_printf("PwAddL32Ux4"); return;
 818       case Iop_PwAddL64Ux2: vex_printf("PwAddL64Ux2"); return;
 819       case Iop_PwAddL8Sx16: vex_printf("PwAddL8Sx16"); return;
 820       case Iop_PwAddL16Sx8: vex_printf("PwAddL16Sx8"); return;
 821       case Iop_PwAddL32Sx4: vex_printf("PwAddL32Sx4"); return;
 822       case Iop_PwExtUSMulQAdd8x16: vex_printf("PwExtUSMulQAdd8x16"); return;
 823
 824       case Iop_Sub8x16:   vex_printf("Sub8x16"); return;
 825       case Iop_Sub16x8:   vex_printf("Sub16x8"); return;
 826       case Iop_Sub32x4:   vex_printf("Sub32x4"); return;
 827       case Iop_Sub64x2:   vex_printf("Sub64x2"); return;
 828       case Iop_Sub128x1:  vex_printf("Sub128x1"); return;
 829       case Iop_QSub8Ux16: vex_printf("QSub8Ux16"); return;
 830       case Iop_QSub16Ux8: vex_printf("QSub16Ux8"); return;
 831       case Iop_QSub32Ux4: vex_printf("QSub32Ux4"); return;
 832       case Iop_QSub8Sx16: vex_printf("QSub8Sx16"); return;
 833       case Iop_QSub16Sx8: vex_printf("QSub16Sx8"); return;
 834       case Iop_QSub32Sx4: vex_printf("QSub32Sx4"); return;
 835       case Iop_QSub64Ux2: vex_printf("QSub64Ux2"); return;
 836       case Iop_QSub64Sx2: vex_printf("QSub64Sx2"); return;
 837
 838       case Iop_Mul8x16:    vex_printf("Mul8x16"); return;
 839       case Iop_Mul16x8:    vex_printf("Mul16x8"); return;
 840       case Iop_Mul32x4:    vex_printf("Mul32x4"); return;
 841       case Iop_Mull8Ux8:    vex_printf("Mull8Ux8"); return;
 842       case Iop_Mull8Sx8:    vex_printf("Mull8Sx8"); return;
 843       case Iop_Mull16Ux4:    vex_printf("Mull16Ux4"); return;
 844       case Iop_Mull16Sx4:    vex_printf("Mull16Sx4"); return;
 845       case Iop_Mull32Ux2:    vex_printf("Mull32Ux2"); return;
 846       case Iop_Mull32Sx2:    vex_printf("Mull32Sx2"); return;
 847       case Iop_PolynomialMul8x16: vex_printf("PolynomialMul8x16"); return;
 848       case Iop_PolynomialMull8x8: vex_printf("PolynomialMull8x8"); return;
 849       case Iop_MulHi8Ux16: vex_printf("MulHi8Ux16"); return;
 850       case Iop_MulHi16Ux8: vex_printf("MulHi16Ux8"); return;
 851       case Iop_MulHi32Ux4: vex_printf("MulHi32Ux4"); return;
 852       case Iop_MulHi8Sx16: vex_printf("MulHi8Sx16"); return;
 853       case Iop_MulHi16Sx8: vex_printf("MulHi16Sx8"); return;
 854       case Iop_MulHi32Sx4: vex_printf("MulHi32Sx4"); return;
 855       case Iop_QDMulHi16Sx8: vex_printf("QDMulHi16Sx8"); return;
 856       case Iop_QDMulHi32Sx4: vex_printf("QDMulHi32Sx4"); return;
 857       case Iop_QRDMulHi16Sx8: vex_printf("QRDMulHi16Sx8"); return;
 858       case Iop_QRDMulHi32Sx4: vex_printf("QRDMulHi32Sx4"); return;
 859
 860       case Iop_MullEven8Ux16: vex_printf("MullEven8Ux16"); return;
 861       case Iop_MullEven16Ux8: vex_printf("MullEven16Ux8"); return;
 862       case Iop_MullEven32Ux4: vex_printf("MullEven32Ux4"); return;
 863       case Iop_MullEven8Sx16: vex_printf("MullEven8Sx16"); return;
 864       case Iop_MullEven16Sx8: vex_printf("MullEven16Sx8"); return;
 865       case Iop_MullEven32Sx4: vex_printf("MullEven32Sx4"); return;
 866
 867       case Iop_PolynomialMulAdd8x16:
 868          vex_printf("PolynomialMulAdd8x16"); return;
 869       case Iop_PolynomialMulAdd16x8:
 870          vex_printf("PolynomialMulAdd16x8"); return;
 871       case Iop_PolynomialMulAdd32x4:
 872          vex_printf("PolynomialMulAdd32x4"); return;
 873       case Iop_PolynomialMulAdd64x2:
 874          vex_printf("PolynomialMulAdd64x2"); return;
 875
 876       case Iop_Avg8Ux16: vex_printf("Avg8Ux16"); return;
 877       case Iop_Avg16Ux8: vex_printf("Avg16Ux8"); return;
 878       case Iop_Avg32Ux4: vex_printf("Avg32Ux4"); return;
 879       case Iop_Avg64Ux2: vex_printf("Avg64Ux2"); return;
 880       case Iop_Avg8Sx16: vex_printf("Avg8Sx16"); return;
 881       case Iop_Avg16Sx8: vex_printf("Avg16Sx8"); return;
 882       case Iop_Avg32Sx4: vex_printf("Avg32Sx4"); return;
 883       case Iop_Avg64Sx2: vex_printf("Avg64Sx2"); return;
 884
 885       case Iop_Max8Sx16: vex_printf("Max8Sx16"); return;
 886       case Iop_Max16Sx8: vex_printf("Max16Sx8"); return;
 887       case Iop_Max32Sx4: vex_printf("Max32Sx4"); return;
 888       case Iop_Max64Sx2: vex_printf("Max64Sx2"); return;
 889       case Iop_Max8Ux16: vex_printf("Max8Ux16"); return;
 890       case Iop_Max16Ux8: vex_printf("Max16Ux8"); return;
 891       case Iop_Max32Ux4: vex_printf("Max32Ux4"); return;
 892       case Iop_Max64Ux2: vex_printf("Max64Ux2"); return;
 893
 894       case Iop_Min8Sx16: vex_printf("Min8Sx16"); return;
 895       case Iop_Min16Sx8: vex_printf("Min16Sx8"); return;
 896       case Iop_Min32Sx4: vex_printf("Min32Sx4"); return;
 897       case Iop_Min64Sx2: vex_printf("Min64Sx2"); return;
 898       case Iop_Min8Ux16: vex_printf("Min8Ux16"); return;
 899       case Iop_Min16Ux8: vex_printf("Min16Ux8"); return;
 900       case Iop_Min32Ux4: vex_printf("Min32Ux4"); return;
 901       case Iop_Min64Ux2: vex_printf("Min64Ux2"); return;
 902
 903       case Iop_CmpEQ8x16:  vex_printf("CmpEQ8x16"); return;
 904       case Iop_CmpEQ16x8:  vex_printf("CmpEQ16x8"); return;
 905       case Iop_CmpEQ32x4:  vex_printf("CmpEQ32x4"); return;
 906       case Iop_CmpEQ64x2:  vex_printf("CmpEQ64x2"); return;
 907       case Iop_CmpGT8Sx16: vex_printf("CmpGT8Sx16"); return;
 908       case Iop_CmpGT16Sx8: vex_printf("CmpGT16Sx8"); return;
 909       case Iop_CmpGT32Sx4: vex_printf("CmpGT32Sx4"); return;
 910       case Iop_CmpGT64Sx2: vex_printf("CmpGT64Sx2"); return;
 911       case Iop_CmpGT8Ux16: vex_printf("CmpGT8Ux16"); return;
 912       case Iop_CmpGT16Ux8: vex_printf("CmpGT16Ux8"); return;
 913       case Iop_CmpGT32Ux4: vex_printf("CmpGT32Ux4"); return;
 914       case Iop_CmpGT64Ux2: vex_printf("CmpGT64Ux2"); return;
 915
 916       case Iop_Cnt8x16: vex_printf("Cnt8x16"); return;
 917       case Iop_Clz8x16: vex_printf("Clz8x16"); return;
 918       case Iop_Clz16x8: vex_printf("Clz16x8"); return;
 919       case Iop_Clz32x4: vex_printf("Clz32x4"); return;
 920       case Iop_Clz64x2: vex_printf("Clz64x2"); return;
 921       case Iop_Cls8x16: vex_printf("Cls8x16"); return;
 922       case Iop_Cls16x8: vex_printf("Cls16x8"); return;
 923       case Iop_Cls32x4: vex_printf("Cls32x4"); return;
 924       case Iop_Ctz8x16: vex_printf("Iop_Ctz8x16"); return;
 925       case Iop_Ctz16x8: vex_printf("Iop_Ctz16x8"); return;
 926       case Iop_Ctz32x4: vex_printf("Iop_Ctz32x4"); return;
 927       case Iop_Ctz64x2: vex_printf("Iop_Ctz64x2"); return;
 928
 929       case Iop_ShlV128: vex_printf("ShlV128"); return;
 930       case Iop_ShrV128: vex_printf("ShrV128"); return;
 931       case Iop_SarV128: vex_printf("SarV128"); return;
 932
 933       case Iop_ShlN8x16: vex_printf("ShlN8x16"); return;
 934       case Iop_ShlN16x8: vex_printf("ShlN16x8"); return;
 935       case Iop_ShlN32x4: vex_printf("ShlN32x4"); return;
 936       case Iop_ShlN64x2: vex_printf("ShlN64x2"); return;
 937       case Iop_ShrN8x16: vex_printf("ShrN8x16"); return;
 938       case Iop_ShrN16x8: vex_printf("ShrN16x8"); return;
 939       case Iop_ShrN32x4: vex_printf("ShrN32x4"); return;
 940       case Iop_ShrN64x2: vex_printf("ShrN64x2"); return;
 941       case Iop_SarN8x16: vex_printf("SarN8x16"); return;
 942       case Iop_SarN16x8: vex_printf("SarN16x8"); return;
 943       case Iop_SarN32x4: vex_printf("SarN32x4"); return;
 944       case Iop_SarN64x2: vex_printf("SarN64x2"); return;
 945
 946       case Iop_Shl8x16: vex_printf("Shl8x16"); return;
 947       case Iop_Shl16x8: vex_printf("Shl16x8"); return;
 948       case Iop_Shl32x4: vex_printf("Shl32x4"); return;
 949       case Iop_Shl64x2: vex_printf("Shl64x2"); return;
 950       case Iop_QSal8x16: vex_printf("QSal8x16"); return;
 951       case Iop_QSal16x8: vex_printf("QSal16x8"); return;
 952       case Iop_QSal32x4: vex_printf("QSal32x4"); return;
 953       case Iop_QSal64x2: vex_printf("QSal64x2"); return;
 954       case Iop_QShl8x16: vex_printf("QShl8x16"); return;
 955       case Iop_QShl16x8: vex_printf("QShl16x8"); return;
 956       case Iop_QShl32x4: vex_printf("QShl32x4"); return;
 957       case Iop_QShl64x2: vex_printf("QShl64x2"); return;
 958       case Iop_QShlNsatSS8x16: vex_printf("QShlNsatSS8x16"); return;
 959       case Iop_QShlNsatSS16x8: vex_printf("QShlNsatSS16x8"); return;
 960       case Iop_QShlNsatSS32x4: vex_printf("QShlNsatSS32x4"); return;
 961       case Iop_QShlNsatSS64x2: vex_printf("QShlNsatSS64x2"); return;
 962       case Iop_QShlNsatUU8x16: vex_printf("QShlNsatUU8x16"); return;
 963       case Iop_QShlNsatUU16x8: vex_printf("QShlNsatUU16x8"); return;
 964       case Iop_QShlNsatUU32x4: vex_printf("QShlNsatUU32x4"); return;
 965       case Iop_QShlNsatUU64x2: vex_printf("QShlNsatUU64x2"); return;
 966       case Iop_QShlNsatSU8x16: vex_printf("QShlNsatSU8x16"); return;
 967       case Iop_QShlNsatSU16x8: vex_printf("QShlNsatSU16x8"); return;
 968       case Iop_QShlNsatSU32x4: vex_printf("QShlNsatSU32x4"); return;
 969       case Iop_QShlNsatSU64x2: vex_printf("QShlNsatSU64x2"); return;
 970       case Iop_Shr8x16: vex_printf("Shr8x16"); return;
 971       case Iop_Shr16x8: vex_printf("Shr16x8"); return;
 972       case Iop_Shr32x4: vex_printf("Shr32x4"); return;
 973       case Iop_Shr64x2: vex_printf("Shr64x2"); return;
 974       case Iop_Sar8x16: vex_printf("Sar8x16"); return;
 975       case Iop_Sar16x8: vex_printf("Sar16x8"); return;
 976       case Iop_Sar32x4: vex_printf("Sar32x4"); return;
 977       case Iop_Sar64x2: vex_printf("Sar64x2"); return;
 978       case Iop_Sal8x16: vex_printf("Sal8x16"); return;
 979       case Iop_Sal16x8: vex_printf("Sal16x8"); return;
 980       case Iop_Sal32x4: vex_printf("Sal32x4"); return;
 981       case Iop_Sal64x2: vex_printf("Sal64x2"); return;
 982       case Iop_Rol8x16: vex_printf("Rol8x16"); return;
 983       case Iop_Rol16x8: vex_printf("Rol16x8"); return;
 984       case Iop_Rol32x4: vex_printf("Rol32x4"); return;
 985       case Iop_Rol64x2: vex_printf("Rol64x2"); return;
 986
 987       case Iop_QandUQsh8x16: vex_printf("QandUQsh8x16"); return;
 988       case Iop_QandUQsh16x8: vex_printf("QandUQsh16x8"); return;
 989       case Iop_QandUQsh32x4: vex_printf("QandUQsh32x4"); return;
 990       case Iop_QandUQsh64x2: vex_printf("QandUQsh64x2"); return;
 991       case Iop_QandSQsh8x16: vex_printf("QandSQsh8x16"); return;
 992       case Iop_QandSQsh16x8: vex_printf("QandSQsh16x8"); return;
 993       case Iop_QandSQsh32x4: vex_printf("QandSQsh32x4"); return;
 994       case Iop_QandSQsh64x2: vex_printf("QandSQsh64x2"); return;
 995       case Iop_QandUQRsh8x16: vex_printf("QandUQRsh8x16"); return;
 996       case Iop_QandUQRsh16x8: vex_printf("QandUQRsh16x8"); return;
 997       case Iop_QandUQRsh32x4: vex_printf("QandUQRsh32x4"); return;
 998       case Iop_QandUQRsh64x2: vex_printf("QandUQRsh64x2"); return;
 999       case Iop_QandSQRsh8x16: vex_printf("QandSQRsh8x16"); return;
1000       case Iop_QandSQRsh16x8: vex_printf("QandSQRsh16x8"); return;
1001       case Iop_QandSQRsh32x4: vex_printf("QandSQRsh32x4"); return;
1002       case Iop_QandSQRsh64x2: vex_printf("QandSQRsh64x2"); return;
1003
1004       case Iop_Sh8Sx16: vex_printf("Sh8Sx16"); return;
1005       case Iop_Sh16Sx8: vex_printf("Sh16Sx8"); return;
1006       case Iop_Sh32Sx4: vex_printf("Sh32Sx4"); return;
1007       case Iop_Sh64Sx2: vex_printf("Sh64Sx2"); return;
1008       case Iop_Sh8Ux16: vex_printf("Sh8Ux16"); return;
1009       case Iop_Sh16Ux8: vex_printf("Sh16Ux8"); return;
1010       case Iop_Sh32Ux4: vex_printf("Sh32Ux4"); return;
1011       case Iop_Sh64Ux2: vex_printf("Sh64Ux2"); return;
1012       case Iop_Rsh8Sx16: vex_printf("Rsh8Sx16"); return;
1013       case Iop_Rsh16Sx8: vex_printf("Rsh16Sx8"); return;
1014       case Iop_Rsh32Sx4: vex_printf("Rsh32Sx4"); return;
1015       case Iop_Rsh64Sx2: vex_printf("Rsh64Sx2"); return;
1016       case Iop_Rsh8Ux16: vex_printf("Rsh8Ux16"); return;
1017       case Iop_Rsh16Ux8: vex_printf("Rsh16Ux8"); return;
1018       case Iop_Rsh32Ux4: vex_printf("Rsh32Ux4"); return;
1019       case Iop_Rsh64Ux2: vex_printf("Rsh64Ux2"); return;
1020
1021       case Iop_QandQShrNnarrow16Uto8Ux8:
1022          vex_printf("QandQShrNnarrow16Uto8Ux8"); return;
1023       case Iop_QandQShrNnarrow32Uto16Ux4:
1024          vex_printf("QandQShrNnarrow32Uto16Ux4"); return;
1025       case Iop_QandQShrNnarrow64Uto32Ux2:
1026          vex_printf("QandQShrNnarrow64Uto32Ux2"); return;
1027       case Iop_QandQSarNnarrow16Sto8Sx8:
1028          vex_printf("QandQSarNnarrow16Sto8Sx8"); return;
1029       case Iop_QandQSarNnarrow32Sto16Sx4:
1030          vex_printf("QandQSarNnarrow32Sto16Sx4"); return;
1031       case Iop_QandQSarNnarrow64Sto32Sx2:
1032          vex_printf("QandQSarNnarrow64Sto32Sx2"); return;
1033       case Iop_QandQSarNnarrow16Sto8Ux8:
1034          vex_printf("QandQSarNnarrow16Sto8Ux8"); return;
1035       case Iop_QandQSarNnarrow32Sto16Ux4:
1036          vex_printf("QandQSarNnarrow32Sto16Ux4"); return;
1037       case Iop_QandQSarNnarrow64Sto32Ux2:
1038          vex_printf("QandQSarNnarrow64Sto32Ux2"); return;
1039       case Iop_QandQRShrNnarrow16Uto8Ux8:
1040          vex_printf("QandQRShrNnarrow16Uto8Ux8"); return;
1041       case Iop_QandQRShrNnarrow32Uto16Ux4:
1042          vex_printf("QandQRShrNnarrow32Uto16Ux4"); return;
1043       case Iop_QandQRShrNnarrow64Uto32Ux2:
1044          vex_printf("QandQRShrNnarrow64Uto32Ux2"); return;
1045       case Iop_QandQRSarNnarrow16Sto8Sx8:
1046          vex_printf("QandQRSarNnarrow16Sto8Sx8"); return;
1047       case Iop_QandQRSarNnarrow32Sto16Sx4:
1048          vex_printf("QandQRSarNnarrow32Sto16Sx4"); return;
1049       case Iop_QandQRSarNnarrow64Sto32Sx2:
1050          vex_printf("QandQRSarNnarrow64Sto32Sx2"); return;
1051       case Iop_QandQRSarNnarrow16Sto8Ux8:
1052          vex_printf("QandQRSarNnarrow16Sto8Ux8"); return;
1053       case Iop_QandQRSarNnarrow32Sto16Ux4:
1054          vex_printf("QandQRSarNnarrow32Sto16Ux4"); return;
1055       case Iop_QandQRSarNnarrow64Sto32Ux2:
1056          vex_printf("QandQRSarNnarrow64Sto32Ux2"); return;
1057
1058       case Iop_NarrowBin16to8x16:    vex_printf("NarrowBin16to8x16"); return;
1059       case Iop_NarrowBin32to16x8:    vex_printf("NarrowBin32to16x8"); return;
1060       case Iop_QNarrowBin16Uto8Ux16: vex_printf("QNarrowBin16Uto8Ux16"); return;
1061       case Iop_QNarrowBin32Sto16Ux8: vex_printf("QNarrowBin32Sto16Ux8"); return;
1062       case Iop_QNarrowBin16Sto8Ux16: vex_printf("QNarrowBin16Sto8Ux16"); return;
1063       case Iop_QNarrowBin32Uto16Ux8: vex_printf("QNarrowBin32Uto16Ux8"); return;
1064       case Iop_QNarrowBin16Sto8Sx16: vex_printf("QNarrowBin16Sto8Sx16"); return;
1065       case Iop_QNarrowBin32Sto16Sx8: vex_printf("QNarrowBin32Sto16Sx8"); return;
1066       case Iop_NarrowUn16to8x8:     vex_printf("NarrowUn16to8x8");  return;
1067       case Iop_NarrowUn32to16x4:    vex_printf("NarrowUn32to16x4"); return;
1068       case Iop_NarrowUn64to32x2:    vex_printf("NarrowUn64to32x2"); return;
1069       case Iop_QNarrowUn16Uto8Ux8:  vex_printf("QNarrowUn16Uto8Ux8");  return;
1070       case Iop_QNarrowUn32Uto16Ux4: vex_printf("QNarrowUn32Uto16Ux4"); return;
1071       case Iop_QNarrowUn64Uto32Ux2: vex_printf("QNarrowUn64Uto32Ux2"); return;
1072       case Iop_QNarrowUn16Sto8Sx8:  vex_printf("QNarrowUn16Sto8Sx8");  return;
1073       case Iop_QNarrowUn32Sto16Sx4: vex_printf("QNarrowUn32Sto16Sx4"); return;
1074       case Iop_QNarrowUn64Sto32Sx2: vex_printf("QNarrowUn64Sto32Sx2"); return;
1075       case Iop_QNarrowUn16Sto8Ux8:  vex_printf("QNarrowUn16Sto8Ux8");  return;
1076       case Iop_QNarrowUn32Sto16Ux4: vex_printf("QNarrowUn32Sto16Ux4"); return;
1077       case Iop_QNarrowUn64Sto32Ux2: vex_printf("QNarrowUn64Sto32Ux2"); return;
1078       case Iop_Widen8Uto16x8:  vex_printf("Widen8Uto16x8");  return;
1079       case Iop_Widen16Uto32x4: vex_printf("Widen16Uto32x4"); return;
1080       case Iop_Widen32Uto64x2: vex_printf("Widen32Uto64x2"); return;
1081       case Iop_Widen8Sto16x8:  vex_printf("Widen8Sto16x8");  return;
1082       case Iop_Widen16Sto32x4: vex_printf("Widen16Sto32x4"); return;
1083       case Iop_Widen32Sto64x2: vex_printf("Widen32Sto64x2"); return;
1084
1085       case Iop_InterleaveHI8x16: vex_printf("InterleaveHI8x16"); return;
1086       case Iop_InterleaveHI16x8: vex_printf("InterleaveHI16x8"); return;
1087       case Iop_InterleaveHI32x4: vex_printf("InterleaveHI32x4"); return;
1088       case Iop_InterleaveHI64x2: vex_printf("InterleaveHI64x2"); return;
1089       case Iop_InterleaveLO8x16: vex_printf("InterleaveLO8x16"); return;
1090       case Iop_InterleaveLO16x8: vex_printf("InterleaveLO16x8"); return;
1091       case Iop_InterleaveLO32x4: vex_printf("InterleaveLO32x4"); return;
1092       case Iop_InterleaveLO64x2: vex_printf("InterleaveLO64x2"); return;
1093
1094       case Iop_CatOddLanes8x16: vex_printf("CatOddLanes8x16"); return;
1095       case Iop_CatOddLanes16x8: vex_printf("CatOddLanes16x8"); return;
1096       case Iop_CatOddLanes32x4: vex_printf("CatOddLanes32x4"); return;
1097       case Iop_CatEvenLanes8x16: vex_printf("CatEvenLanes8x16"); return;
1098       case Iop_CatEvenLanes16x8: vex_printf("CatEvenLanes16x8"); return;
1099       case Iop_CatEvenLanes32x4: vex_printf("CatEvenLanes32x4"); return;
1100
1101       case Iop_InterleaveOddLanes8x16: vex_printf("InterleaveOddLanes8x16"); return;
1102       case Iop_InterleaveOddLanes16x8: vex_printf("InterleaveOddLanes16x8"); return;
1103       case Iop_InterleaveOddLanes32x4: vex_printf("InterleaveOddLanes32x4"); return;
1104       case Iop_InterleaveEvenLanes8x16: vex_printf("InterleaveEvenLanes8x16"); return;
1105       case Iop_InterleaveEvenLanes16x8: vex_printf("InterleaveEvenLanes16x8"); return;
1106       case Iop_InterleaveEvenLanes32x4: vex_printf("InterleaveEvenLanes32x4"); return;
1107       case Iop_PackOddLanes8x16: vex_printf("InterleavePackOddLanes8x16"); return;
1108       case Iop_PackOddLanes16x8: vex_printf("InterleavePackOddLanes16x8"); return;
1109       case Iop_PackOddLanes32x4: vex_printf("InterleavePackOddLanes32x4"); return;
1110       case Iop_PackEvenLanes8x16: vex_printf("InterleavePackEvenLanes8x16"); return;
1111       case Iop_PackEvenLanes16x8: vex_printf("InterleavePackEvenLanes16x8"); return;
1112       case Iop_PackEvenLanes32x4: vex_printf("InterleavePackEvenLanes32x4"); return;
1113
1114       case Iop_GetElem8x16: vex_printf("GetElem8x16"); return;
1115       case Iop_GetElem16x8: vex_printf("GetElem16x8"); return;
1116       case Iop_GetElem32x4: vex_printf("GetElem32x4"); return;
1117       case Iop_GetElem64x2: vex_printf("GetElem64x2"); return;
1118
1119       case Iop_SetElem8x16: vex_printf("SetElem8x16"); return;
1120       case Iop_SetElem16x8: vex_printf("SetElem16x8"); return;
1121       case Iop_SetElem32x4: vex_printf("SetElem32x4"); return;
1122       case Iop_SetElem64x2: vex_printf("SetElem64x2"); return;
1123
1124       case Iop_GetElem8x8: vex_printf("GetElem8x8"); return;
1125       case Iop_GetElem16x4: vex_printf("GetElem16x4"); return;
1126       case Iop_GetElem32x2: vex_printf("GetElem32x2"); return;
1127       case Iop_SetElem8x8: vex_printf("SetElem8x8"); return;
1128       case Iop_SetElem16x4: vex_printf("SetElem16x4"); return;
1129       case Iop_SetElem32x2: vex_printf("SetElem32x2"); return;
1130
1131       case Iop_Slice64: vex_printf("Slice64"); return;
1132       case Iop_SliceV128: vex_printf("SliceV128"); return;
1133
1134       case Iop_Perm8x16: vex_printf("Perm8x16"); return;
1135       case Iop_PermOrZero8x16: vex_printf("PermOrZero8x16"); return;
1136       case Iop_Perm32x4: vex_printf("Perm32x4"); return;
1137       case Iop_Perm8x16x2: vex_printf("Perm8x16x2"); return;
1138       case Iop_Reverse8sIn16_x8: vex_printf("Reverse8sIn16_x8"); return;
1139       case Iop_Reverse8sIn32_x4: vex_printf("Reverse8sIn32_x4"); return;
1140       case Iop_Reverse16sIn32_x4: vex_printf("Reverse16sIn32_x4"); return;
1141       case Iop_Reverse8sIn64_x2: vex_printf("Reverse8sIn64_x2"); return;
1142       case Iop_Reverse16sIn64_x2: vex_printf("Reverse16sIn64_x2"); return;
1143       case Iop_Reverse32sIn64_x2: vex_printf("Reverse32sIn64_x2"); return;
1144       case Iop_Reverse1sIn8_x16: vex_printf("Reverse1sIn8_x16"); return;
1145
1146       case Iop_F32ToFixed32Ux4_RZ: vex_printf("F32ToFixed32Ux4_RZ"); return;
1147       case Iop_F32ToFixed32Sx4_RZ: vex_printf("F32ToFixed32Sx4_RZ"); return;
1148       case Iop_Fixed32UToF32x4_RN: vex_printf("Fixed32UToF32x4_RN"); return;
1149       case Iop_Fixed32SToF32x4_RN: vex_printf("Fixed32SToF32x4_RN"); return;
1150       case Iop_F32ToFixed32Ux2_RZ: vex_printf("F32ToFixed32Ux2_RZ"); return;
1151       case Iop_F32ToFixed32Sx2_RZ: vex_printf("F32ToFixed32Sx2_RZ"); return;
1152       case Iop_Fixed32UToF32x2_RN: vex_printf("Fixed32UToF32x2_RN"); return;
1153       case Iop_Fixed32SToF32x2_RN: vex_printf("Fixed32SToF32x2_RN"); return;
1154
1155       case Iop_D32toD64:  vex_printf("D32toD64");   return;
1156       case Iop_D64toD32:  vex_printf("D64toD32");   return;
1157       case Iop_AddD64:  vex_printf("AddD64");   return;
1158       case Iop_SubD64:  vex_printf("SubD64");   return;
1159       case Iop_MulD64:  vex_printf("MulD64");   return;
1160       case Iop_DivD64:  vex_printf("DivD64");   return;
1161       case Iop_ShlD64:  vex_printf("ShlD64"); return;
1162       case Iop_ShrD64:  vex_printf("ShrD64"); return;
1163       case Iop_D64toI32S:  vex_printf("D64toI32S");  return;
1164       case Iop_D64toI32U:  vex_printf("D64toI32U");  return;
1165       case Iop_D64toI64S:  vex_printf("D64toI64S");  return;
1166       case Iop_D64toI64U:  vex_printf("D64toI64U");  return;
1167       case Iop_I32StoD64:  vex_printf("I32StoD64");  return;
1168       case Iop_I32UtoD64:  vex_printf("I32UtoD64");  return;
1169       case Iop_I64StoD64:  vex_printf("I64StoD64");  return;
1170       case Iop_I64UtoD64:  vex_printf("I64UtoD64");  return;
1171       case Iop_I32StoD128: vex_printf("I32StoD128"); return;
1172       case Iop_I32UtoD128: vex_printf("I32UtoD128"); return;
1173       case Iop_I64StoD128: vex_printf("I64StoD128"); return;
1174       case Iop_I64UtoD128: vex_printf("I64UtoD128"); return;
1175       case Iop_D64toD128:  vex_printf("D64toD128");  return;
1176       case Iop_D128toD64:  vex_printf("D128toD64");  return;
1177       case Iop_D128toI32S: vex_printf("D128toI32S"); return;
1178       case Iop_D128toI32U: vex_printf("D128toI32U"); return;
1179       case Iop_D128toI64S: vex_printf("D128toI64S"); return;
1180       case Iop_D128toI64U: vex_printf("D128toI64U"); return;
1181       case Iop_F32toD32:   vex_printf("F32toD32");   return;
1182       case Iop_F32toD64:   vex_printf("F32toD64");   return;
1183       case Iop_F32toD128:  vex_printf("F32toD128");  return;
1184       case Iop_F64toD32:   vex_printf("F64toD32");   return;
1185       case Iop_F64toD64:   vex_printf("F64toD64");   return;
1186       case Iop_F64toD128:  vex_printf("F64toD128");  return;
1187       case Iop_F128toD32:  vex_printf("F128toD32");  return;
1188       case Iop_F128toD64:  vex_printf("F128toD64");  return;
1189       case Iop_F128toD128: vex_printf("F128toD128"); return;
1190       case Iop_D32toF32:   vex_printf("D32toF32");   return;
1191       case Iop_D32toF64:   vex_printf("D32toF64");   return;
1192       case Iop_D32toF128:  vex_printf("D32toF128");  return;
1193       case Iop_D64toF32:   vex_printf("D64toF32");   return;
1194       case Iop_D64toF64:   vex_printf("D64toF64");   return;
1195       case Iop_D64toF128:  vex_printf("D64toF128");  return;
1196       case Iop_D128toF32:  vex_printf("D128toF32");  return;
1197       case Iop_D128toF64:  vex_printf("D128toF64");  return;
1198       case Iop_D128toF128: vex_printf("D128toF128"); return;
1199       case Iop_AddD128: vex_printf("AddD128");  return;
1200       case Iop_SubD128: vex_printf("SubD128");  return;
1201       case Iop_MulD128: vex_printf("MulD128");  return;
1202       case Iop_DivD128: vex_printf("DivD128");  return;
1203       case Iop_ShlD128: vex_printf("ShlD128");  return;
1204       case Iop_ShrD128: vex_printf("ShrD128");  return;
1205       case Iop_RoundD64toInt:  vex_printf("RoundD64toInt");  return;
1206       case Iop_RoundD128toInt: vex_printf("RoundD128toInt"); return;
1207       case Iop_QuantizeD64:    vex_printf("QuantizeD64");    return;
1208       case Iop_QuantizeD128:   vex_printf("QuantizeD128");   return;
1209       case Iop_ExtractExpD64:  vex_printf("ExtractExpD64");  return;
1210       case Iop_ExtractExpD128: vex_printf("ExtractExpD128"); return;
1211       case Iop_ExtractSigD64:  vex_printf("ExtractSigD64");  return;
1212       case Iop_ExtractSigD128: vex_printf("ExtractSigD128"); return;
1213       case Iop_InsertExpD64:   vex_printf("InsertExpD64");   return;
1214       case Iop_InsertExpD128:  vex_printf("InsertExpD128");  return;
1215       case Iop_CmpD64:         vex_printf("CmpD64");     return;
1216       case Iop_CmpD128:        vex_printf("CmpD128");    return;
1217       case Iop_CmpExpD64:      vex_printf("CmpExpD64");  return;
1218       case Iop_CmpExpD128:     vex_printf("CmpExpD128"); return;
1219       case Iop_D64HLtoD128: vex_printf("D64HLtoD128");   return;
1220       case Iop_D128HItoD64: vex_printf("D128HItoD64");   return;
1221       case Iop_D128LOtoD64: vex_printf("D128LOtoD64");   return;
1222       case Iop_SignificanceRoundD64: vex_printf("SignificanceRoundD64");
1223          return;
1224       case Iop_SignificanceRoundD128: vex_printf("SignificanceRoundD128");
1225          return;
1226       case Iop_ReinterpI64asD64: vex_printf("ReinterpI64asD64"); return;
1227       case Iop_ReinterpD64asI64: vex_printf("ReinterpD64asI64"); return;
1228       case Iop_V256to64_0: vex_printf("V256to64_0"); return;
1229       case Iop_V256to64_1: vex_printf("V256to64_1"); return;
1230       case Iop_V256to64_2: vex_printf("V256to64_2"); return;
1231       case Iop_V256to64_3: vex_printf("V256to64_3"); return;
1232       case Iop_64x4toV256: vex_printf("64x4toV256"); return;
1233       case Iop_V256toV128_0: vex_printf("V256toV128_0"); return;
1234       case Iop_V256toV128_1: vex_printf("V256toV128_1"); return;
1235       case Iop_V128HLtoV256: vex_printf("V128HLtoV256"); return;
1236       case Iop_DPBtoBCD: vex_printf("DPBtoBCD"); return;
1237       case Iop_BCDtoDPB: vex_printf("BCDtoDPB"); return;
1238       case Iop_Add64Fx4: vex_printf("Add64Fx4"); return;
1239       case Iop_Sub64Fx4: vex_printf("Sub64Fx4"); return;
1240       case Iop_Mul64Fx4: vex_printf("Mul64Fx4"); return;
1241       case Iop_Div64Fx4: vex_printf("Div64Fx4"); return;
1242       case Iop_Add32Fx8: vex_printf("Add32Fx8"); return;
1243       case Iop_Sub32Fx8: vex_printf("Sub32Fx8"); return;
1244       case Iop_Mul32Fx8: vex_printf("Mul32Fx8"); return;
1245       case Iop_Div32Fx8: vex_printf("Div32Fx8"); return;
1246       case Iop_I32StoF32x8: vex_printf("I32StoF32x8"); return;
1247       case Iop_F32toI32Sx8: vex_printf("F32toI32Sx8"); return;
1248       case Iop_F32toF16x8: vex_printf("F32toF16x8"); return;
1249       case Iop_F16toF32x8: vex_printf("F16toF32x8"); return;
1250       case Iop_AndV256: vex_printf("AndV256"); return;
1251       case Iop_OrV256:  vex_printf("OrV256"); return;
1252       case Iop_XorV256: vex_printf("XorV256"); return;
1253       case Iop_NotV256: vex_printf("NotV256"); return;
1254       case Iop_CmpNEZ64x4: vex_printf("CmpNEZ64x4"); return;
1255       case Iop_CmpNEZ32x8: vex_printf("CmpNEZ32x8"); return;
1256       case Iop_CmpNEZ16x16: vex_printf("CmpNEZ16x16"); return;
1257       case Iop_CmpNEZ8x32: vex_printf("CmpNEZ8x32"); return;
1258
1259       case Iop_Add8x32:   vex_printf("Add8x32"); return;
1260       case Iop_Add16x16:  vex_printf("Add16x16"); return;
1261       case Iop_Add32x8:   vex_printf("Add32x8"); return;
1262       case Iop_Add64x4:   vex_printf("Add64x4"); return;
1263       case Iop_Sub8x32:   vex_printf("Sub8x32"); return;
1264       case Iop_Sub16x16:  vex_printf("Sub16x16"); return;
1265       case Iop_Sub32x8:   vex_printf("Sub32x8"); return;
1266       case Iop_Sub64x4:   vex_printf("Sub64x4"); return;
1267       case Iop_QAdd8Ux32: vex_printf("QAdd8Ux32"); return;
1268       case Iop_QAdd16Ux16: vex_printf("QAdd16Ux16"); return;
1269       case Iop_QAdd8Sx32: vex_printf("QAdd8Sx32"); return;
1270       case Iop_QAdd16Sx16: vex_printf("QAdd16Sx16"); return;
1271       case Iop_QSub8Ux32: vex_printf("QSub8Ux32"); return;
1272       case Iop_QSub16Ux16: vex_printf("QSub16Ux16"); return;
1273       case Iop_QSub8Sx32: vex_printf("QSub8Sx32"); return;
1274       case Iop_QSub16Sx16: vex_printf("QSub16Sx16"); return;
1275
1276       case Iop_Mul16x16:    vex_printf("Mul16x16"); return;
1277       case Iop_Mul32x8:     vex_printf("Mul32x8"); return;
1278       case Iop_MulHi16Ux16: vex_printf("MulHi16Ux16"); return;
1279       case Iop_MulHi16Sx16: vex_printf("MulHi16Sx16"); return;
1280
1281       case Iop_Avg8Ux32:  vex_printf("Avg8Ux32"); return;
1282       case Iop_Avg16Ux16: vex_printf("Avg16Ux16"); return;
1283
1284       case Iop_Max8Sx32:  vex_printf("Max8Sx32"); return;
1285       case Iop_Max16Sx16: vex_printf("Max16Sx16"); return;
1286       case Iop_Max32Sx8:  vex_printf("Max32Sx8"); return;
1287       case Iop_Max8Ux32:  vex_printf("Max8Ux32"); return;
1288       case Iop_Max16Ux16: vex_printf("Max16Ux16"); return;
1289       case Iop_Max32Ux8:  vex_printf("Max32Ux8"); return;
1290
1291       case Iop_Min8Sx32:  vex_printf("Min8Sx32"); return;
1292       case Iop_Min16Sx16: vex_printf("Min16Sx16"); return;
1293       case Iop_Min32Sx8:  vex_printf("Min32Sx8"); return;
1294       case Iop_Min8Ux32:  vex_printf("Min8Ux32"); return;
1295       case Iop_Min16Ux16: vex_printf("Min16Ux16"); return;
1296       case Iop_Min32Ux8:  vex_printf("Min32Ux8"); return;
1297
1298       case Iop_CmpEQ8x32:   vex_printf("CmpEQ8x32"); return;
1299       case Iop_CmpEQ16x16:  vex_printf("CmpEQ16x16"); return;
1300       case Iop_CmpEQ32x8:   vex_printf("CmpEQ32x8"); return;
1301       case Iop_CmpEQ64x4:   vex_printf("CmpEQ64x4"); return;
1302       case Iop_CmpGT8Sx32:  vex_printf("CmpGT8Sx32"); return;
1303       case Iop_CmpGT16Sx16: vex_printf("CmpGT16Sx16"); return;
1304       case Iop_CmpGT32Sx8:  vex_printf("CmpGT32Sx8"); return;
1305       case Iop_CmpGT64Sx4:  vex_printf("CmpGT64Sx4"); return;
1306
1307       case Iop_ShlN16x16:  vex_printf("ShlN16x16"); return;
1308       case Iop_ShlN32x8:   vex_printf("ShlN32x8"); return;
1309       case Iop_ShlN64x4:   vex_printf("ShlN64x4"); return;
1310       case Iop_ShrN16x16:  vex_printf("ShrN16x16"); return;
1311       case Iop_ShrN32x8:   vex_printf("ShrN32x8"); return;
1312       case Iop_ShrN64x4:   vex_printf("ShrN64x4"); return;
1313       case Iop_SarN16x16:  vex_printf("SarN16x16"); return;
1314       case Iop_SarN32x8:   vex_printf("SarN32x8"); return;
1315
1316       case Iop_Perm32x8:   vex_printf("Perm32x8"); return;
1317
1318       case Iop_CipherV128:   vex_printf("CipherV128"); return;
1319       case Iop_CipherLV128:  vex_printf("CipherLV128"); return;
1320       case Iop_NCipherV128:  vex_printf("NCipherV128"); return;
1321       case Iop_NCipherLV128: vex_printf("NCipherLV128"); return;
1322       case Iop_CipherSV128:  vex_printf("CipherSV128"); return;
1323
1324       case Iop_SHA256:  vex_printf("SHA256"); return;
1325       case Iop_SHA512:  vex_printf("SHA512"); return;
1326       case Iop_BCDAdd:  vex_printf("BCDAdd"); return;
1327       case Iop_BCDSub:  vex_printf("BCDSub"); return;
1328       case Iop_I128StoBCD128:  vex_printf("bcdcfsq."); return;
1329       case Iop_BCD128toI128S:  vex_printf("bcdctsq."); return;
1330       case Iop_Rotx32:  vex_printf("bitswap"); return;
1331       case Iop_Rotx64:  vex_printf("dbitswap"); return;
1332
1333       case Iop_PwBitMtxXpose64x2: vex_printf("BitMatrixTranspose64x2"); return;
1334
1335       default: vpanic("ppIROp(1)");
1336    }
1337
1338    vassert(str);
1339    switch (op - base) {
1340       case 0: vex_printf("%s",str); vex_printf("8"); break;
1341       case 1: vex_printf("%s",str); vex_printf("16"); break;
1342       case 2: vex_printf("%s",str); vex_printf("32"); break;
1343       case 3: vex_printf("%s",str); vex_printf("64"); break;
1344       default: vpanic("ppIROp(2)");
1345    }
1346 }
1347
1348 // A very few primops might trap (eg, divide by zero).  We need to be able to
1349 // identify them.
1350 Bool primopMightTrap ( IROp op )
1351 {
1352    switch (op) {
1353
1354    // The few potentially trapping ones
1355    case Iop_DivU32: case Iop_DivS32: case Iop_DivU64: case Iop_DivS64:
1356    case Iop_DivU64E: case Iop_DivS64E: case Iop_DivU32E: case Iop_DivS32E:
1357    case Iop_DivModU64to32: case Iop_DivModS64to32: case Iop_DivModU128to64:
1358    case Iop_DivModS128to64: case Iop_DivModS64to64: case Iop_DivModU64to64:
1359    case Iop_DivModS32to32: case Iop_DivModU32to32:
1360       return True;
1361
1362    // All the rest are non-trapping
1363    case Iop_Add8: case Iop_Add16: case Iop_Add32: case Iop_Add64:
1364    case Iop_Sub8: case Iop_Sub16: case Iop_Sub32: case Iop_Sub64:
1365    case Iop_Mul8: case Iop_Mul16: case Iop_Mul32: case Iop_Mul64:
1366    case Iop_Or8: case Iop_Or16: case Iop_Or32: case Iop_Or64:
1367    case Iop_And8: case Iop_And16: case Iop_And32: case Iop_And64:
1368    case Iop_Xor8: case Iop_Xor16: case Iop_Xor32: case Iop_Xor64:
1369    case Iop_Shl8: case Iop_Shl16: case Iop_Shl32: case Iop_Shl64:
1370    case Iop_Shr8: case Iop_Shr16: case Iop_Shr32: case Iop_Shr64:
1371    case Iop_Sar8: case Iop_Sar16: case Iop_Sar32: case Iop_Sar64:
1372    case Iop_CmpEQ8: case Iop_CmpEQ16: case Iop_CmpEQ32: case Iop_CmpEQ64:
1373    case Iop_CmpNE8: case Iop_CmpNE16: case Iop_CmpNE32: case Iop_CmpNE64:
1374    case Iop_Not8: case Iop_Not16: case Iop_Not32: case Iop_Not64:
1375    case Iop_CasCmpEQ8: case Iop_CasCmpEQ16: case Iop_CasCmpEQ32:
1376    case Iop_CasCmpEQ64: case Iop_CasCmpNE8: case Iop_CasCmpNE16:
1377    case Iop_CasCmpNE32: case Iop_CasCmpNE64: case Iop_ExpCmpNE8:
1378    case Iop_ExpCmpNE16: case Iop_ExpCmpNE32: case Iop_ExpCmpNE64:
1379    case Iop_MullS8: case Iop_MullS16: case Iop_MullS32: case Iop_MullS64:
1380    case Iop_MullU8: case Iop_MullU16: case Iop_MullU32: case Iop_MullU64:
1381    case Iop_Clz64: case Iop_Clz32: case Iop_Ctz64: case Iop_Ctz32:
1382    case Iop_ClzNat64: case Iop_ClzNat32: case Iop_CtzNat64: case Iop_CtzNat32:
1383    case Iop_PopCount64: case Iop_PopCount32:
1384    case Iop_CmpLT32S: case Iop_CmpLT64S: case Iop_CmpLE32S: case Iop_CmpLE64S:
1385    case Iop_CmpLT32U: case Iop_CmpLT64U: case Iop_CmpLE32U: case Iop_CmpLE64U:
1386    case Iop_CmpNEZ8: case Iop_CmpNEZ16: case Iop_CmpNEZ32: case Iop_CmpNEZ64:
1387    case Iop_CmpwNEZ32: case Iop_CmpwNEZ64:
1388    case Iop_Left8: case Iop_Left16: case Iop_Left32: case Iop_Left64:
1389    case Iop_Max32U: case Iop_CmpORD32U: case Iop_CmpORD64U:
1390    case Iop_CmpORD32S: case Iop_CmpORD64S:
1391    case Iop_8Uto16: case Iop_8Uto32: case Iop_8Uto64:
1392    case Iop_16Uto32: case Iop_16Uto64: case Iop_32Uto64:
1393    case Iop_8Sto16: case Iop_8Sto32: case Iop_8Sto64:
1394    case Iop_16Sto32: case Iop_16Sto64: case Iop_32Sto64:
1395    case Iop_64to8: case Iop_32to8: case Iop_64to16:
1396    case Iop_16to8: case Iop_16HIto8: case Iop_8HLto16: case Iop_32to16:
1397    case Iop_32HIto16: case Iop_16HLto32: case Iop_64to32: case Iop_64HIto32:
1398    case Iop_32HLto64: case Iop_128to64: case Iop_128HIto64: case Iop_64HLto128:
1399    case Iop_Not1: case Iop_And1: case Iop_Or1: case Iop_32to1: case Iop_64to1:
1400    case Iop_1Uto8: case Iop_1Uto32: case Iop_1Uto64: case Iop_1Sto8:
1401    case Iop_1Sto16: case Iop_1Sto32: case Iop_1Sto64:
1402    case Iop_AddF64: case Iop_SubF64: case Iop_MulF64: case Iop_DivF64:
1403    case Iop_AddF32: case Iop_SubF32: case Iop_MulF32: case Iop_DivF32:
1404    case Iop_AddF64r32: case Iop_SubF64r32: case Iop_MulF64r32:
1405    case Iop_DivF64r32: case Iop_NegF64: case Iop_AbsF64:
1406    case Iop_NegF32: case Iop_AbsF32: case Iop_SqrtF64: case Iop_SqrtF32:
1407    case Iop_CmpF64: case Iop_CmpF32: case Iop_CmpF128: case Iop_F64toI16S:
1408    case Iop_F64toI32S: case Iop_F64toI64S: case Iop_F64toI64U:
1409    case Iop_F64toI32U: case Iop_I32StoF64: case Iop_I64StoF64:
1410    case Iop_I64UtoF64: case Iop_I64UtoF32: case Iop_I32UtoF32:
1411    case Iop_I32UtoF64: case Iop_F32toI32S: case Iop_F32toI64S:
1412    case Iop_F32toI32U: case Iop_F32toI64U: case Iop_I32StoF32:
1413    case Iop_I64StoF32: case Iop_F32toF64: case Iop_F64toF32:
1414    case Iop_ReinterpF64asI64: case Iop_ReinterpI64asF64:
1415    case Iop_ReinterpF32asI32: case Iop_ReinterpI32asF32:
1416    case Iop_F64HLtoF128: case Iop_F128HItoF64: case Iop_F128LOtoF64:
1417    case Iop_AddF128: case Iop_SubF128: case Iop_MulF128: case Iop_DivF128:
1418    case Iop_MAddF128: case Iop_MSubF128: case Iop_NegMAddF128:
1419    case Iop_NegMSubF128: case Iop_NegF128: case Iop_AbsF128:
1420    case Iop_SqrtF128: case Iop_I32StoF128: case Iop_I64StoF128:
1421    case Iop_I32UtoF128: case Iop_I64UtoF128: case Iop_F32toF128:
1422    case Iop_F64toF128: case Iop_F128toI32S: case Iop_F128toI64S:
1423    case Iop_F128toI32U: case Iop_F128toI64U: case Iop_F128toI128S:
1424    case Iop_F128toF64: case Iop_F128toF32: case Iop_RndF128:
1425    case Iop_TruncF128toI32S: case Iop_TruncF128toI32U: case Iop_TruncF128toI64U:
1426    case Iop_TruncF128toI64S: case Iop_AtanF64: case Iop_Yl2xF64:
1427    case Iop_Yl2xp1F64: case Iop_PRemF64: case Iop_PRemC3210F64:
1428    case Iop_PRem1F64: case Iop_PRem1C3210F64: case Iop_ScaleF64:
1429    case Iop_SinF64: case Iop_CosF64: case Iop_TanF64:
1430    case Iop_2xm1F64: case Iop_RoundF128toInt: case Iop_RoundF64toInt:
1431    case Iop_RoundF32toInt: case Iop_MAddF32: case Iop_MSubF32:
1432    case Iop_MAddF64: case Iop_MSubF64:
1433    case Iop_MAddF64r32: case Iop_MSubF64r32:
1434    case Iop_RSqrtEst5GoodF64: case Iop_RoundF64toF64_NEAREST:
1435    case Iop_RoundF64toF64_NegINF: case Iop_RoundF64toF64_PosINF:
1436    case Iop_RoundF64toF64_ZERO: case Iop_TruncF64asF32: case Iop_RoundF64toF32:
1437    case Iop_RecpExpF64: case Iop_RecpExpF32: case Iop_MaxNumF64:
1438    case Iop_MinNumF64: case Iop_MaxNumF32: case Iop_MinNumF32:
1439    case Iop_F16toF64: case Iop_F64toF16: case Iop_F16toF32:
1440    case Iop_F32toF16: case Iop_QAdd32S: case Iop_QSub32S:
1441    case Iop_Add16x2: case Iop_Sub16x2:
1442    case Iop_QAdd16Sx2: case Iop_QAdd16Ux2:
1443    case Iop_QSub16Sx2: case Iop_QSub16Ux2:
1444    case Iop_HAdd16Ux2: case Iop_HAdd16Sx2:
1445    case Iop_HSub16Ux2: case Iop_HSub16Sx2:
1446    case Iop_Add8x4: case Iop_Sub8x4:
1447    case Iop_QAdd8Sx4: case Iop_QAdd8Ux4:
1448    case Iop_QSub8Sx4: case Iop_QSub8Ux4:
1449    case Iop_HAdd8Ux4: case Iop_HAdd8Sx4:
1450    case Iop_HSub8Ux4: case Iop_HSub8Sx4: case Iop_Sad8Ux4:
1451    case Iop_CmpNEZ16x2: case Iop_CmpNEZ8x4: case Iop_Reverse8sIn32_x1:
1452    case Iop_I32UtoF32x2_DEP: case Iop_I32StoF32x2_DEP:
1453    case Iop_F32toI32Ux2_RZ: case Iop_F32toI32Sx2_RZ:
1454    case Iop_F32ToFixed32Ux2_RZ: case Iop_F32ToFixed32Sx2_RZ:
1455    case Iop_Fixed32UToF32x2_RN: case Iop_Fixed32SToF32x2_RN:
1456    case Iop_Max32Fx2:  case Iop_Min32Fx2:
1457    case Iop_PwMax32Fx2: case Iop_PwMin32Fx2:
1458    case Iop_CmpEQ32Fx2: case Iop_CmpGT32Fx2: case Iop_CmpGE32Fx2:
1459    case Iop_RecipEst32Fx2: case Iop_RecipStep32Fx2: case Iop_RSqrtEst32Fx2:
1460    case Iop_RSqrtStep32Fx2: case Iop_Neg32Fx2: case Iop_Abs32Fx2:
1461    case Iop_CmpNEZ8x8: case Iop_CmpNEZ16x4: case Iop_CmpNEZ32x2:
1462    case Iop_Add8x8: case Iop_Add16x4: case Iop_Add32x2:
1463    case Iop_QAdd8Ux8: case Iop_QAdd16Ux4: case Iop_QAdd32Ux2: case Iop_QAdd64Ux1:
1464    case Iop_QAdd8Sx8: case Iop_QAdd16Sx4: case Iop_QAdd32Sx2: case Iop_QAdd64Sx1:
1465    case Iop_PwAdd8x8: case Iop_PwAdd16x4: case Iop_PwAdd32x2:
1466    case Iop_PwMax8Sx8: case Iop_PwMax16Sx4: case Iop_PwMax32Sx2:
1467    case Iop_PwMax8Ux8: case Iop_PwMax16Ux4: case Iop_PwMax32Ux2:
1468    case Iop_PwMin8Sx8: case Iop_PwMin16Sx4: case Iop_PwMin32Sx2:
1469    case Iop_PwMin8Ux8: case Iop_PwMin16Ux4: case Iop_PwMin32Ux2:
1470    case Iop_PwAddL8Ux8: case Iop_PwAddL16Ux4: case Iop_PwAddL32Ux2:
1471    case Iop_PwAddL8Sx8: case Iop_PwAddL16Sx4: case Iop_PwAddL32Sx2:
1472    case Iop_Sub8x8: case Iop_Sub16x4: case Iop_Sub32x2:
1473    case Iop_QSub8Ux8: case Iop_QSub16Ux4: case Iop_QSub32Ux2: case Iop_QSub64Ux1:
1474    case Iop_QSub8Sx8: case Iop_QSub16Sx4: case Iop_QSub32Sx2: case Iop_QSub64Sx1:
1475    case Iop_Abs8x8: case Iop_Abs16x4: case Iop_Abs32x2:
1476    case Iop_Mul8x8: case Iop_Mul16x4: case Iop_Mul32x2:
1477    case Iop_Mul32Fx2: case Iop_MulHi16Ux4: case Iop_MulHi16Sx4:
1478    case Iop_PolynomialMul8x8: case Iop_QDMulHi16Sx4: case Iop_QDMulHi32Sx2:
1479    case Iop_QRDMulHi16Sx4: case Iop_QRDMulHi32Sx2: case Iop_Avg8Ux8:
1480    case Iop_Avg16Ux4: case Iop_Max8Sx8: case Iop_Max16Sx4: case Iop_Max32Sx2:
1481    case Iop_Max8Ux8: case Iop_Max16Ux4: case Iop_Max32Ux2:
1482    case Iop_Min8Sx8: case Iop_Min16Sx4: case Iop_Min32Sx2:
1483    case Iop_Min8Ux8: case Iop_Min16Ux4: case Iop_Min32Ux2:
1484    case Iop_CmpEQ8x8: case Iop_CmpEQ16x4: case Iop_CmpEQ32x2:
1485    case Iop_CmpGT8Ux8: case Iop_CmpGT16Ux4: case Iop_CmpGT32Ux2:
1486    case Iop_CmpGT8Sx8: case Iop_CmpGT16Sx4: case Iop_CmpGT32Sx2:
1487    case Iop_Cnt8x8: case Iop_Clz8x8: case Iop_Clz16x4: case Iop_Clz32x2:
1488    case Iop_Cls8x8: case Iop_Cls16x4: case Iop_Cls32x2: case Iop_Clz64x2:
1489    case Iop_Ctz8x16: case Iop_Ctz16x8: case Iop_Ctz32x4: case Iop_Ctz64x2:
1490    case Iop_Shl8x8: case Iop_Shl16x4: case Iop_Shl32x2:
1491    case Iop_Shr8x8: case Iop_Shr16x4: case Iop_Shr32x2:
1492    case Iop_Sar8x8: case Iop_Sar16x4: case Iop_Sar32x2:
1493    case Iop_Sal8x8: case Iop_Sal16x4: case Iop_Sal32x2: case Iop_Sal64x1:
1494    case Iop_ShlN8x8: case Iop_ShlN16x4: case Iop_ShlN32x2:
1495    case Iop_ShrN8x8: case Iop_ShrN16x4: case Iop_ShrN32x2:
1496    case Iop_SarN8x8: case Iop_SarN16x4: case Iop_SarN32x2:
1497    case Iop_QShl8x8: case Iop_QShl16x4: case Iop_QShl32x2: case Iop_QShl64x1:
1498    case Iop_QSal8x8: case Iop_QSal16x4: case Iop_QSal32x2: case Iop_QSal64x1:
1499    case Iop_QShlNsatSU8x8: case Iop_QShlNsatSU16x4:
1500    case Iop_QShlNsatSU32x2: case Iop_QShlNsatSU64x1:
1501    case Iop_QShlNsatUU8x8: case Iop_QShlNsatUU16x4:
1502    case Iop_QShlNsatUU32x2: case Iop_QShlNsatUU64x1:
1503    case Iop_QShlNsatSS8x8: case Iop_QShlNsatSS16x4:
1504    case Iop_QShlNsatSS32x2: case Iop_QShlNsatSS64x1:
1505    case Iop_QNarrowBin16Sto8Ux8:
1506    case Iop_QNarrowBin16Sto8Sx8: case Iop_QNarrowBin32Sto16Sx4:
1507    case Iop_NarrowBin16to8x8: case Iop_NarrowBin32to16x4:
1508    case Iop_InterleaveHI8x8: case Iop_InterleaveHI16x4:
1509    case Iop_InterleaveHI32x2:
1510    case Iop_InterleaveLO8x8: case Iop_InterleaveLO16x4:
1511    case Iop_InterleaveLO32x2:
1512    case Iop_InterleaveOddLanes8x8: case Iop_InterleaveEvenLanes8x8:
1513    case Iop_InterleaveOddLanes16x4: case Iop_InterleaveEvenLanes16x4:
1514    case Iop_CatOddLanes8x8: case Iop_CatOddLanes16x4:
1515    case Iop_CatEvenLanes8x8: case Iop_CatEvenLanes16x4:
1516    case Iop_GetElem8x8: case Iop_GetElem16x4: case Iop_GetElem32x2:
1517    case Iop_SetElem8x8: case Iop_SetElem16x4: case Iop_SetElem32x2:
1518    case Iop_Dup8x8: case Iop_Dup16x4: case Iop_Dup32x2:
1519    case Iop_Slice64: case Iop_Reverse8sIn16_x4:
1520    case Iop_Reverse8sIn32_x2: case Iop_Reverse16sIn32_x2:
1521    case Iop_Reverse8sIn64_x1: case Iop_Reverse16sIn64_x1:
1522    case Iop_Reverse32sIn64_x1: case Iop_Perm8x8: case Iop_PermOrZero8x8:
1523    case Iop_GetMSBs8x8: case Iop_RecipEst32Ux2: case Iop_RSqrtEst32Ux2:
1524    case Iop_AddD64: case Iop_SubD64: case Iop_MulD64: case Iop_DivD64:
1525    case Iop_AddD128: case Iop_SubD128: case Iop_MulD128: case Iop_DivD128:
1526    case Iop_ShlD64: case Iop_ShrD64:
1527    case Iop_ShlD128: case Iop_ShrD128:
1528    case Iop_D32toD64: case Iop_D64toD128: case Iop_I32StoD128:
1529    case Iop_I32UtoD128: case Iop_I64StoD128: case Iop_I64UtoD128:
1530    case Iop_D64toD32: case Iop_D128toD64: case Iop_I32StoD64:
1531    case Iop_I32UtoD64: case Iop_I64StoD64: case Iop_I64UtoD64:
1532    case Iop_D64toI32S: case Iop_D64toI32U: case Iop_D64toI64S:
1533    case Iop_D64toI64U: case Iop_D128toI32S: case Iop_D128toI32U:
1534    case Iop_D128toI64S: case Iop_D128toI64U: case Iop_F32toD32:
1535    case Iop_F32toD64: case Iop_F32toD128: case Iop_F64toD32:
1536    case Iop_F64toD64: case Iop_F64toD128: case Iop_F128toD32:
1537    case Iop_F128toD64: case Iop_F128toD128: case Iop_D32toF32:
1538    case Iop_D32toF64: case Iop_D32toF128: case Iop_D64toF32: case Iop_D64toF64:
1539    case Iop_D64toF128: case Iop_D128toF32: case Iop_D128toF64:
1540    case Iop_D128toF128: case Iop_RoundD64toInt: case Iop_RoundD128toInt:
1541    case Iop_CmpD64: case Iop_CmpD128: case Iop_CmpExpD64:
1542    case Iop_CmpExpD128: case Iop_QuantizeD64: case Iop_QuantizeD128:
1543    case Iop_SignificanceRoundD64: case Iop_SignificanceRoundD128:
1544    case Iop_ExtractExpD64: case Iop_ExtractExpD128: case Iop_ExtractSigD64:
1545    case Iop_ExtractSigD128: case Iop_InsertExpD64: case Iop_InsertExpD128:
1546    case Iop_D64HLtoD128: case Iop_D128HItoD64: case Iop_D128LOtoD64:
1547    case Iop_DPBtoBCD: case Iop_BCDtoDPB: case Iop_BCDAdd: case Iop_BCDSub:
1548    case Iop_I128StoBCD128: case Iop_BCD128toI128S: case Iop_ReinterpI64asD64:
1549    case Iop_ReinterpD64asI64:
1550    case Iop_Add32Fx4: case Iop_Sub32Fx4: case Iop_Mul32Fx4: case Iop_Div32Fx4:
1551    case Iop_Max32Fx4: case Iop_Min32Fx4:
1552    case Iop_Add32Fx2: case Iop_Sub32Fx2:
1553    case Iop_CmpEQ32Fx4: case Iop_CmpLT32Fx4:
1554    case Iop_CmpLE32Fx4: case Iop_CmpUN32Fx4:
1555    case Iop_CmpGT32Fx4: case Iop_CmpGE32Fx4:
1556    case Iop_PwMax32Fx4: case Iop_PwMin32Fx4:
1557    case Iop_Abs32Fx4: case Iop_Neg32Fx4: case Iop_Sqrt32Fx4:
1558    case Iop_RecipEst32Fx4: case Iop_RecipStep32Fx4: case Iop_RSqrtEst32Fx4:
1559    case Iop_Scale2_32Fx4: case Iop_Log2_32Fx4: case Iop_Exp2_32Fx4:
1560    case Iop_RSqrtStep32Fx4:
1561    case Iop_I32UtoF32x4_DEP: case Iop_I32StoF32x4_DEP: case Iop_I32StoF32x4:
1562    case Iop_F32toI32Sx4: case Iop_F32toI32Ux4_RZ: case Iop_F32toI32Sx4_RZ:
1563    case Iop_QF32toI32Ux4_RZ: case Iop_QF32toI32Sx4_RZ:
1564    case Iop_RoundF32x4_RM: case Iop_RoundF32x4_RP:
1565    case Iop_RoundF32x4_RN: case Iop_RoundF32x4_RZ:
1566    case Iop_F32ToFixed32Ux4_RZ: case Iop_F32ToFixed32Sx4_RZ:
1567    case Iop_Fixed32UToF32x4_RN: case Iop_Fixed32SToF32x4_RN:
1568    case Iop_F32toF16x4_DEP: case Iop_F32toF16x4: case Iop_F16toF32x4:
1569    case Iop_F64toF16x2_DEP: case Iop_F16toF64x2: case Iop_F32x4_2toQ16x8:
1570    case Iop_Add32F0x4: case Iop_Sub32F0x4: case Iop_Mul32F0x4:
1571    case Iop_Div32F0x4: case Iop_Max32F0x4: case Iop_Min32F0x4:
1572    case Iop_CmpEQ32F0x4: case Iop_CmpLT32F0x4: case Iop_CmpLE32F0x4:
1573    case Iop_CmpUN32F0x4:
1574    case Iop_RecipEst32F0x4: case Iop_Sqrt32F0x4: case Iop_RSqrtEst32F0x4:
1575    case Iop_Add64Fx2: case Iop_Sub64Fx2: case Iop_Mul64Fx2: case Iop_Div64Fx2:
1576    case Iop_Max64Fx2: case Iop_Min64Fx2:
1577    case Iop_CmpEQ64Fx2: case Iop_CmpLT64Fx2: case Iop_CmpLE64Fx2:
1578    case Iop_CmpUN64Fx2: case Iop_Abs64Fx2: case Iop_Neg64Fx2:
1579    case Iop_Sqrt64Fx2: case Iop_Scale2_64Fx2: case Iop_Log2_64Fx2:
1580    case Iop_RecipEst64Fx2: case Iop_RecipStep64Fx2: case Iop_RSqrtEst64Fx2:
1581    case Iop_RSqrtStep64Fx2: case Iop_F64x2_2toQ32x4:
1582    case Iop_Add64F0x2: case Iop_Sub64F0x2: case Iop_Mul64F0x2:
1583    case Iop_Div64F0x2: case Iop_Max64F0x2: case Iop_Min64F0x2:
1584    case Iop_CmpEQ64F0x2: case Iop_CmpLT64F0x2: case Iop_CmpLE64F0x2:
1585    case Iop_CmpUN64F0x2: case Iop_Sqrt64F0x2: case Iop_V128to64:
1586    case Iop_V128HIto64: case Iop_64HLtoV128: case Iop_64UtoV128:
1587    case Iop_SetV128lo64: case Iop_ZeroHI64ofV128: case Iop_ZeroHI96ofV128:
1588    case Iop_ZeroHI112ofV128: case Iop_ZeroHI120ofV128: case Iop_32UtoV128:
1589    case Iop_V128to32: case Iop_SetV128lo32: case Iop_NotV128:
1590    case Iop_AndV128: case Iop_OrV128: case Iop_XorV128:
1591    case Iop_ShlV128: case Iop_ShrV128: case Iop_SarV128:
1592    case Iop_CmpNEZ8x16: case Iop_CmpNEZ16x8: case Iop_CmpNEZ32x4:
1593    case Iop_CmpNEZ64x2: case Iop_CmpNEZ128x1:
1594    case Iop_Add8x16: case Iop_Add16x8: case Iop_Add32x4:
1595    case Iop_Add64x2: case Iop_Add128x1:
1596    case Iop_QAdd8Ux16: case Iop_QAdd16Ux8: case Iop_QAdd32Ux4:
1597    case Iop_QAdd64Ux2:
1598    case Iop_QAdd8Sx16: case Iop_QAdd16Sx8: case Iop_QAdd32Sx4:
1599    case Iop_QAdd64Sx2:
1600    case Iop_QAddExtUSsatSS8x16: case Iop_QAddExtUSsatSS16x8:
1601    case Iop_QAddExtUSsatSS32x4: case Iop_QAddExtUSsatSS64x2:
1602    case Iop_QAddExtSUsatUU8x16: case Iop_QAddExtSUsatUU16x8:
1603    case Iop_QAddExtSUsatUU32x4: case Iop_QAddExtSUsatUU64x2:
1604    case Iop_Sub8x16: case Iop_Sub16x8: case Iop_Sub32x4:
1605    case Iop_Sub64x2: case Iop_Sub128x1:
1606    case Iop_QSub8Ux16: case Iop_QSub16Ux8: case Iop_QSub32Ux4:
1607    case Iop_QSub64Ux2:
1608    case Iop_QSub8Sx16: case Iop_QSub16Sx8: case Iop_QSub32Sx4:
1609    case Iop_QSub64Sx2:
1610    case Iop_Mul8x16: case Iop_Mul16x8: case Iop_Mul32x4:
1611    case Iop_MulHi8Ux16: case Iop_MulHi16Ux8: case Iop_MulHi32Ux4:
1612    case Iop_MulHi8Sx16: case Iop_MulHi16Sx8: case Iop_MulHi32Sx4:
1613    case Iop_MullEven8Ux16: case Iop_MullEven16Ux8: case Iop_MullEven32Ux4:
1614    case Iop_MullEven8Sx16: case Iop_MullEven16Sx8: case Iop_MullEven32Sx4:
1615    case Iop_Mull8Ux8: case Iop_Mull8Sx8:
1616    case Iop_Mull16Ux4: case Iop_Mull16Sx4:
1617    case Iop_Mull32Ux2: case Iop_Mull32Sx2:
1618    case Iop_QDMull16Sx4: case Iop_QDMull32Sx2:
1619    case Iop_QDMulHi16Sx8: case Iop_QDMulHi32Sx4:
1620    case Iop_QRDMulHi16Sx8: case Iop_QRDMulHi32Sx4:
1621    case Iop_PolynomialMul8x16: case Iop_PolynomialMull8x8:
1622    case Iop_PolynomialMulAdd8x16: case Iop_PolynomialMulAdd16x8:
1623    case Iop_PolynomialMulAdd32x4: case Iop_PolynomialMulAdd64x2:
1624    case Iop_PwAdd8x16: case Iop_PwAdd16x8: case Iop_PwAdd32x4:
1625    case Iop_PwAdd32Fx2: case Iop_PwAddL8Ux16: case Iop_PwAddL16Ux8:
1626    case Iop_PwAddL32Ux4: case Iop_PwAddL64Ux2:
1627    case Iop_PwAddL8Sx16: case Iop_PwAddL16Sx8: case Iop_PwAddL32Sx4:
1628    case Iop_PwExtUSMulQAdd8x16:
1629    case Iop_PwBitMtxXpose64x2:
1630    case Iop_Abs8x16: case Iop_Abs16x8: case Iop_Abs32x4: case Iop_Abs64x2:
1631    case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4: case Iop_Avg64Ux2:
1632    case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4: case Iop_Avg64Sx2:
1633    case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4: case Iop_Max64Sx2:
1634    case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4: case Iop_Max64Ux2:
1635    case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4: case Iop_Min64Sx2:
1636    case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4: case Iop_Min64Ux2:
1637    case Iop_CmpEQ8x16: case Iop_CmpEQ16x8: case Iop_CmpEQ32x4:
1638    case Iop_CmpEQ64x2:
1639    case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4:
1640    case Iop_CmpGT64Sx2:
1641    case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4:
1642    case Iop_CmpGT64Ux2:
1643    case Iop_Cnt8x16:
1644    case Iop_Clz8x16: case Iop_Clz16x8: case Iop_Clz32x4:
1645    case Iop_Cls8x16: case Iop_Cls16x8: case Iop_Cls32x4:
1646    case Iop_ShlN8x16: case Iop_ShlN16x8: case Iop_ShlN32x4: case Iop_ShlN64x2:
1647    case Iop_ShrN8x16: case Iop_ShrN16x8: case Iop_ShrN32x4: case Iop_ShrN64x2:
1648    case Iop_SarN8x16: case Iop_SarN16x8: case Iop_SarN32x4: case Iop_SarN64x2:
1649    case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4: case Iop_Shl64x2:
1650    case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4: case Iop_Shr64x2:
1651    case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4: case Iop_Sar64x2:
1652    case Iop_Sal8x16: case Iop_Sal16x8: case Iop_Sal32x4: case Iop_Sal64x2:
1653    case Iop_Rol8x16: case Iop_Rol16x8: case Iop_Rol32x4: case Iop_Rol64x2:
1654    case Iop_QShl8x16: case Iop_QShl16x8: case Iop_QShl32x4: case Iop_QShl64x2:
1655    case Iop_QSal8x16: case Iop_QSal16x8: case Iop_QSal32x4: case Iop_QSal64x2:
1656    case Iop_QShlNsatSU8x16: case Iop_QShlNsatSU16x8:
1657    case Iop_QShlNsatSU32x4: case Iop_QShlNsatSU64x2:
1658    case Iop_QShlNsatUU8x16: case Iop_QShlNsatUU16x8:
1659    case Iop_QShlNsatUU32x4: case Iop_QShlNsatUU64x2:
1660    case Iop_QShlNsatSS8x16: case Iop_QShlNsatSS16x8:
1661    case Iop_QShlNsatSS32x4: case Iop_QShlNsatSS64x2:
1662    case Iop_QandUQsh8x16: case Iop_QandUQsh16x8:
1663    case Iop_QandUQsh32x4: case Iop_QandUQsh64x2:
1664    case Iop_QandSQsh8x16: case Iop_QandSQsh16x8:
1665    case Iop_QandSQsh32x4: case Iop_QandSQsh64x2:
1666    case Iop_QandUQRsh8x16: case Iop_QandUQRsh16x8:
1667    case Iop_QandUQRsh32x4: case Iop_QandUQRsh64x2:
1668    case Iop_QandSQRsh8x16: case Iop_QandSQRsh16x8:
1669    case Iop_QandSQRsh32x4: case Iop_QandSQRsh64x2:
1670    case Iop_Sh8Sx16: case Iop_Sh16Sx8: case Iop_Sh32Sx4: case Iop_Sh64Sx2:
1671    case Iop_Sh8Ux16: case Iop_Sh16Ux8: case Iop_Sh32Ux4: case Iop_Sh64Ux2:
1672    case Iop_Rsh8Sx16: case Iop_Rsh16Sx8: case Iop_Rsh32Sx4: case Iop_Rsh64Sx2:
1673    case Iop_Rsh8Ux16: case Iop_Rsh16Ux8: case Iop_Rsh32Ux4: case Iop_Rsh64Ux2:
1674    case Iop_QandQShrNnarrow16Uto8Ux8:
1675    case Iop_QandQShrNnarrow32Uto16Ux4: case Iop_QandQShrNnarrow64Uto32Ux2:
1676    case Iop_QandQSarNnarrow16Sto8Sx8:
1677    case Iop_QandQSarNnarrow32Sto16Sx4: case Iop_QandQSarNnarrow64Sto32Sx2:
1678    case Iop_QandQSarNnarrow16Sto8Ux8:
1679    case Iop_QandQSarNnarrow32Sto16Ux4: case Iop_QandQSarNnarrow64Sto32Ux2:
1680    case Iop_QandQRShrNnarrow16Uto8Ux8:
1681    case Iop_QandQRShrNnarrow32Uto16Ux4: case Iop_QandQRShrNnarrow64Uto32Ux2:
1682    case Iop_QandQRSarNnarrow16Sto8Sx8:
1683    case Iop_QandQRSarNnarrow32Sto16Sx4: case Iop_QandQRSarNnarrow64Sto32Sx2:
1684    case Iop_QandQRSarNnarrow16Sto8Ux8:
1685    case Iop_QandQRSarNnarrow32Sto16Ux4: case Iop_QandQRSarNnarrow64Sto32Ux2:
1686    case Iop_QNarrowBin16Sto8Ux16: case Iop_QNarrowBin32Sto16Ux8:
1687    case Iop_QNarrowBin16Sto8Sx16: case Iop_QNarrowBin32Sto16Sx8:
1688    case Iop_QNarrowBin16Uto8Ux16: case Iop_QNarrowBin32Uto16Ux8:
1689    case Iop_NarrowBin16to8x16: case Iop_NarrowBin32to16x8:
1690    case Iop_QNarrowBin64Sto32Sx4: case Iop_QNarrowBin64Uto32Ux4:
1691    case Iop_NarrowBin64to32x4:
1692    case Iop_NarrowUn16to8x8: case Iop_NarrowUn32to16x4:
1693    case Iop_NarrowUn64to32x2:
1694    case Iop_QNarrowUn16Sto8Sx8: case Iop_QNarrowUn32Sto16Sx4:
1695    case Iop_QNarrowUn64Sto32Sx2:
1696    case Iop_QNarrowUn16Sto8Ux8: case Iop_QNarrowUn32Sto16Ux4:
1697    case Iop_QNarrowUn64Sto32Ux2:
1698    case Iop_QNarrowUn16Uto8Ux8: case Iop_QNarrowUn32Uto16Ux4:
1699    case Iop_QNarrowUn64Uto32Ux2:
1700    case Iop_Widen8Uto16x8: case Iop_Widen16Uto32x4: case Iop_Widen32Uto64x2:
1701    case Iop_Widen8Sto16x8: case Iop_Widen16Sto32x4: case Iop_Widen32Sto64x2:
1702    case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8:
1703    case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2:
1704    case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8:
1705    case Iop_InterleaveLO32x4: case Iop_InterleaveLO64x2:
1706    case Iop_InterleaveOddLanes8x16: case Iop_InterleaveEvenLanes8x16:
1707    case Iop_InterleaveOddLanes16x8: case Iop_InterleaveEvenLanes16x8:
1708    case Iop_InterleaveOddLanes32x4: case Iop_InterleaveEvenLanes32x4:
1709    case Iop_PackOddLanes8x16: case Iop_PackEvenLanes8x16:
1710    case Iop_PackOddLanes16x8: case Iop_PackEvenLanes16x8:
1711    case Iop_PackOddLanes32x4: case Iop_PackEvenLanes32x4:
1712    case Iop_CatOddLanes8x16: case Iop_CatOddLanes16x8: case Iop_CatOddLanes32x4:
1713    case Iop_CatEvenLanes8x16: case Iop_CatEvenLanes16x8:
1714    case Iop_CatEvenLanes32x4:
1715    case Iop_GetElem8x16: case Iop_GetElem16x8: case Iop_GetElem32x4:
1716    case Iop_GetElem64x2:
1717    case Iop_SetElem8x16: case Iop_SetElem16x8: case Iop_SetElem32x4:
1718    case Iop_SetElem64x2:
1719    case Iop_Dup8x16: case Iop_Dup16x8: case Iop_Dup32x4:
1720    case Iop_SliceV128: case Iop_Reverse8sIn16_x8:
1721    case Iop_Reverse8sIn32_x4: case Iop_Reverse16sIn32_x4:
1722    case Iop_Reverse8sIn64_x2: case Iop_Reverse16sIn64_x2:
1723    case Iop_Reverse32sIn64_x2: case Iop_Reverse1sIn8_x16: case Iop_Perm8x16:
1724    case Iop_Perm32x4: case Iop_PermOrZero8x16: case Iop_Perm8x16x2:
1725    case Iop_GetMSBs8x16: case Iop_RecipEst32Ux4: case Iop_RSqrtEst32Ux4:
1726    case Iop_MulI128by10: case Iop_MulI128by10Carry: case Iop_MulI128by10E:
1727    case Iop_MulI128by10ECarry: case Iop_V256to64_0: case Iop_V256to64_1:
1728    case Iop_V256to64_2: case Iop_V256to64_3: case Iop_64x4toV256:
1729    case Iop_V256toV128_0: case Iop_V256toV128_1: case Iop_V128HLtoV256:
1730    case Iop_AndV256: case Iop_OrV256: case Iop_XorV256:
1731    case Iop_NotV256:
1732    case Iop_CmpNEZ8x32: case Iop_CmpNEZ16x16: case Iop_CmpNEZ32x8:
1733    case Iop_CmpNEZ64x4:
1734    case Iop_Add8x32: case Iop_Add16x16: case Iop_Add32x8: case Iop_Add64x4:
1735    case Iop_Sub8x32: case Iop_Sub16x16: case Iop_Sub32x8: case Iop_Sub64x4:
1736    case Iop_CmpEQ8x32: case Iop_CmpEQ16x16: case Iop_CmpEQ32x8:
1737    case Iop_CmpEQ64x4:
1738    case Iop_CmpGT8Sx32: case Iop_CmpGT16Sx16: case Iop_CmpGT32Sx8:
1739    case Iop_CmpGT64Sx4:
1740    case Iop_ShlN16x16: case Iop_ShlN32x8: case Iop_ShlN64x4:
1741    case Iop_ShrN16x16: case Iop_ShrN32x8: case Iop_ShrN64x4:
1742    case Iop_SarN16x16: case Iop_SarN32x8:
1743    case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8:
1744    case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8:
1745    case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8:
1746    case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8:
1747    case Iop_Mul16x16: case Iop_Mul32x8:
1748    case Iop_MulHi16Ux16: case Iop_MulHi16Sx16:
1749    case Iop_QAdd8Ux32: case Iop_QAdd16Ux16:
1750    case Iop_QAdd8Sx32: case Iop_QAdd16Sx16:
1751    case Iop_QSub8Ux32: case Iop_QSub16Ux16:
1752    case Iop_QSub8Sx32: case Iop_QSub16Sx16:
1753    case Iop_Avg8Ux32: case Iop_Avg16Ux16:
1754    case Iop_Perm32x8:
1755    case Iop_CipherV128: case Iop_CipherLV128: case Iop_CipherSV128:
1756    case Iop_NCipherV128: case Iop_NCipherLV128:
1757    case Iop_SHA512: case Iop_SHA256:
1758    case Iop_Add64Fx4: case Iop_Sub64Fx4: case Iop_Mul64Fx4: case Iop_Div64Fx4:
1759    case Iop_Add32Fx8: case Iop_Sub32Fx8: case Iop_Mul32Fx8: case Iop_Div32Fx8:
1760    case Iop_I32StoF32x8: case Iop_F32toI32Sx8: case Iop_F32toF16x8:
1761    case Iop_F16toF32x8: case Iop_Sqrt32Fx8: case Iop_Sqrt64Fx4:
1762    case Iop_RSqrtEst32Fx8: case Iop_RecipEst32Fx8:
1763    case Iop_Max32Fx8: case Iop_Min32Fx8:
1764    case Iop_Max64Fx4: case Iop_Min64Fx4:
1765    case Iop_Rotx32: case Iop_Rotx64:
1766       return False;
1767
1768    default:
1769       vpanic("primopMightTrap");
1770
1771    }
1772 }
1773
1774 void ppIRExpr ( const IRExpr* e )
1775 {
1776   Int i;
1777   switch (e->tag) {
1778     case Iex_Binder:
1779       vex_printf("BIND-%d", e->Iex.Binder.binder);
1780       break;
1781     case Iex_Get:
1782       vex_printf( "GET:" );
1783       ppIRType(e->Iex.Get.ty);
1784       vex_printf("(%d)", e->Iex.Get.offset);
1785       break;
1786     case Iex_GetI:
1787       vex_printf( "GETI" );
1788       ppIRRegArray(e->Iex.GetI.descr);
1789       vex_printf("[");
1790       ppIRExpr(e->Iex.GetI.ix);
1791       vex_printf(",%d]", e->Iex.GetI.bias);
1792       break;
1793     case Iex_RdTmp:
1794       ppIRTemp(e->Iex.RdTmp.tmp);
1795       break;
1796     case Iex_Qop: {
1797       const IRQop *qop = e->Iex.Qop.details;
1798       ppIROp(qop->op);
1799       vex_printf( "(" );
1800       ppIRExpr(qop->arg1);
1801       vex_printf( "," );
1802       ppIRExpr(qop->arg2);
1803       vex_printf( "," );
1804       ppIRExpr(qop->arg3);
1805       vex_printf( "," );
1806       ppIRExpr(qop->arg4);
1807       vex_printf( ")" );
1808       break;
1809     }
1810     case Iex_Triop: {
1811       const IRTriop *triop = e->Iex.Triop.details;
1812       ppIROp(triop->op);
1813       vex_printf( "(" );
1814       ppIRExpr(triop->arg1);
1815       vex_printf( "," );
1816       ppIRExpr(triop->arg2);
1817       vex_printf( "," );
1818       ppIRExpr(triop->arg3);
1819       vex_printf( ")" );
1820       break;
1821     }
1822     case Iex_Binop:
1823       ppIROp(e->Iex.Binop.op);
1824       vex_printf( "(" );
1825       ppIRExpr(e->Iex.Binop.arg1);
1826       vex_printf( "," );
1827       ppIRExpr(e->Iex.Binop.arg2);
1828       vex_printf( ")" );
1829       break;
1830     case Iex_Unop:
1831       ppIROp(e->Iex.Unop.op);
1832       vex_printf( "(" );
1833       ppIRExpr(e->Iex.Unop.arg);
1834       vex_printf( ")" );
1835       break;
1836     case Iex_Load:
1837       vex_printf( "LD%s:", e->Iex.Load.end==Iend_LE ? "le" : "be" );
1838       ppIRType(e->Iex.Load.ty);
1839       vex_printf( "(" );
1840       ppIRExpr(e->Iex.Load.addr);
1841       vex_printf( ")" );
1842       break;
1843     case Iex_Const:
1844       ppIRConst(e->Iex.Const.con);
1845       break;
1846     case Iex_CCall:
1847       ppIRCallee(e->Iex.CCall.cee);
1848       vex_printf("(");
1849       for (i = 0; e->Iex.CCall.args[i] != NULL; i++) {
1850         IRExpr* arg = e->Iex.CCall.args[i];
1851         ppIRExpr(arg);
1852
1853         if (e->Iex.CCall.args[i+1] != NULL) {
1854           vex_printf(",");
1855         }
1856       }
1857       vex_printf("):");
1858       ppIRType(e->Iex.CCall.retty);
1859       break;
1860     case Iex_ITE:
1861       vex_printf("ITE(");
1862       ppIRExpr(e->Iex.ITE.cond);
1863       vex_printf(",");
1864       ppIRExpr(e->Iex.ITE.iftrue);
1865       vex_printf(",");
1866       ppIRExpr(e->Iex.ITE.iffalse);
1867       vex_printf(")");
1868       break;
1869     case Iex_VECRET:
1870       vex_printf("VECRET");
1871       break;
1872     case Iex_GSPTR:
1873       vex_printf("GSPTR");
1874       break;
1875     default:
1876       vpanic("ppIRExpr");
1877   }
1878 }
1879
1880 void ppIREffect ( IREffect fx )
1881 {
1882    switch (fx) {
1883       case Ifx_None:   vex_printf("noFX"); return;
1884       case Ifx_Read:   vex_printf("RdFX"); return;
1885       case Ifx_Write:  vex_printf("WrFX"); return;
1886       case Ifx_Modify: vex_printf("MoFX"); return;
1887       default: vpanic("ppIREffect");
1888    }
1889 }
1890
1891 void ppIRDirty ( const IRDirty* d )
1892 {
1893    Int i;
1894    if (d->tmp != IRTemp_INVALID) {
1895       ppIRTemp(d->tmp);
1896       vex_printf(" = ");
1897    }
1898    vex_printf("DIRTY ");
1899    ppIRExpr(d->guard);
1900    if (d->mFx != Ifx_None) {
1901       vex_printf(" ");
1902       ppIREffect(d->mFx);
1903       vex_printf("-mem(");
1904       ppIRExpr(d->mAddr);
1905       vex_printf(",%d)", d->mSize);
1906    }
1907    for (i = 0; i < d->nFxState; i++) {
1908       vex_printf(" ");
1909       ppIREffect(d->fxState[i].fx);
1910       vex_printf("-gst(%u,%u", (UInt)d->fxState[i].offset,
1911                                (UInt)d->fxState[i].size);
1912       if (d->fxState[i].nRepeats > 0) {
1913          vex_printf(",reps%u,step%u", (UInt)d->fxState[i].nRepeats,
1914                                       (UInt)d->fxState[i].repeatLen);
1915       }
1916       vex_printf(")");
1917    }
1918    vex_printf(" ::: ");
1919    ppIRCallee(d->cee);
1920    vex_printf("(");
1921    for (i = 0; d->args[i] != NULL; i++) {
1922       IRExpr* arg = d->args[i];
1923       ppIRExpr(arg);
1924
1925       if (d->args[i+1] != NULL) {
1926          vex_printf(",");
1927       }
1928    }
1929    vex_printf(")");
1930 }
1931
1932 void ppIRCAS ( const IRCAS* cas )
1933 {
1934    /* Print even structurally invalid constructions, as an aid to
1935       debugging. */
1936    if (cas->oldHi != IRTemp_INVALID) {
1937       ppIRTemp(cas->oldHi);
1938       vex_printf(",");
1939    }
1940    ppIRTemp(cas->oldLo);
1941    vex_printf(" = CAS%s(", cas->end==Iend_LE ? "le" : "be" );
1942    ppIRExpr(cas->addr);
1943    vex_printf("::");
1944    if (cas->expdHi) {
1945       ppIRExpr(cas->expdHi);
1946       vex_printf(",");
1947    }
1948    ppIRExpr(cas->expdLo);
1949    vex_printf("->");
1950    if (cas->dataHi) {
1951       ppIRExpr(cas->dataHi);
1952       vex_printf(",");
1953    }
1954    ppIRExpr(cas->dataLo);
1955    vex_printf(")");
1956 }
1957
1958 void ppIRPutI ( const IRPutI* puti )
1959 {
1960    vex_printf( "PUTI" );
1961    ppIRRegArray(puti->descr);
1962    vex_printf("[");
1963    ppIRExpr(puti->ix);
1964    vex_printf(",%d] = ", puti->bias);
1965    ppIRExpr(puti->data);
1966 }
1967
1968 void ppIRStoreG ( const IRStoreG* sg )
1969 {
1970    vex_printf("if (");
1971    ppIRExpr(sg->guard);
1972    vex_printf(") { ST%s(", sg->end==Iend_LE ? "le" : "be");
1973    ppIRExpr(sg->addr);
1974    vex_printf(") = ");
1975    ppIRExpr(sg->data);
1976    vex_printf(" }");
1977 }
1978
1979 void ppIRLoadGOp ( IRLoadGOp cvt )
1980 {
1981    switch (cvt) {
1982       case ILGop_INVALID:   vex_printf("ILGop_INVALID"); break;
1983       case ILGop_IdentV128: vex_printf("IdentV128"); break;
1984       case ILGop_Ident64:   vex_printf("Ident64"); break;
1985       case ILGop_Ident32:   vex_printf("Ident32"); break;
1986       case ILGop_16Uto32:   vex_printf("16Uto32"); break;
1987       case ILGop_16Sto32:   vex_printf("16Sto32"); break;
1988       case ILGop_8Uto32:    vex_printf("8Uto32"); break;
1989       case ILGop_8Sto32:    vex_printf("8Sto32"); break;
1990       default: vpanic("ppIRLoadGOp");
1991    }
1992 }
1993
1994 void ppIRLoadG ( const IRLoadG* lg )
1995 {
1996    ppIRTemp(lg->dst);
1997    vex_printf(" = if-strict (");
1998    ppIRExpr(lg->guard);
1999    vex_printf(") ");
2000    ppIRLoadGOp(lg->cvt);
2001    vex_printf("(LD%s(", lg->end==Iend_LE ? "le" : "be");
2002    ppIRExpr(lg->addr);
2003    vex_printf(")) else ");
2004    ppIRExpr(lg->alt);
2005 }
2006
2007 void ppIRJumpKind ( IRJumpKind kind )
2008 {
2009    switch (kind) {
2010       case Ijk_Boring:        vex_printf("Boring"); break;
2011       case Ijk_Call:          vex_printf("Call"); break;
2012       case Ijk_Ret:           vex_printf("Return"); break;
2013       case Ijk_ClientReq:     vex_printf("ClientReq"); break;
2014       case Ijk_Yield:         vex_printf("Yield"); break;
2015       case Ijk_EmWarn:        vex_printf("EmWarn"); break;
2016       case Ijk_EmFail:        vex_printf("EmFail"); break;
2017       case Ijk_NoDecode:      vex_printf("NoDecode"); break;
2018       case Ijk_MapFail:       vex_printf("MapFail"); break;
2019       case Ijk_InvalICache:   vex_printf("InvalICache"); break;
2020       case Ijk_FlushDCache:   vex_printf("FlushDCache"); break;
2021       case Ijk_NoRedir:       vex_printf("NoRedir"); break;
2022       case Ijk_SigILL:        vex_printf("SigILL"); break;
2023       case Ijk_SigTRAP:       vex_printf("SigTRAP"); break;
2024       case Ijk_SigSEGV:       vex_printf("SigSEGV"); break;
2025       case Ijk_SigBUS:        vex_printf("SigBUS"); break;
2026       case Ijk_SigFPE:        vex_printf("SigFPE"); break;
2027       case Ijk_SigFPE_IntDiv: vex_printf("SigFPE_IntDiv"); break;
2028       case Ijk_SigFPE_IntOvf: vex_printf("SigFPE_IntOvf"); break;
2029       case Ijk_Sys_syscall:   vex_printf("Sys_syscall"); break;
2030       case Ijk_Sys_int32:     vex_printf("Sys_int32"); break;
2031       case Ijk_Sys_int128:    vex_printf("Sys_int128"); break;
2032       case Ijk_Sys_int129:    vex_printf("Sys_int129"); break;
2033       case Ijk_Sys_int130:    vex_printf("Sys_int130"); break;
2034       case Ijk_Sys_int145:    vex_printf("Sys_int145"); break;
2035       case Ijk_Sys_int210:    vex_printf("Sys_int210"); break;
2036       case Ijk_Sys_sysenter:  vex_printf("Sys_sysenter"); break;
2037       default:                vpanic("ppIRJumpKind");
2038    }
2039 }
2040
2041 void ppIRMBusEvent ( IRMBusEvent event )
2042 {
2043    switch (event) {
2044       case Imbe_Fence:
2045          vex_printf("Fence"); break;
2046       case Imbe_CancelReservation:
2047          vex_printf("CancelReservation"); break;
2048       default:
2049          vpanic("ppIRMBusEvent");
2050    }
2051 }
2052
2053 void ppIRStmt ( const IRStmt* s )
2054 {
2055    if (!s) {
2056       vex_printf("!!! IRStmt* which is NULL !!!");
2057       return;
2058    }
2059    switch (s->tag) {
2060       case Ist_NoOp:
2061          vex_printf("IR-NoOp");
2062          break;
2063       case Ist_IMark:
2064          vex_printf( "------ IMark(0x%lx, %u, %u) ------",
2065                      s->Ist.IMark.addr, s->Ist.IMark.len,
2066                      (UInt)s->Ist.IMark.delta);
2067          break;
2068       case Ist_AbiHint:
2069          vex_printf("====== AbiHint(");
2070          ppIRExpr(s->Ist.AbiHint.base);
2071          vex_printf(", %d, ", s->Ist.AbiHint.len);
2072          ppIRExpr(s->Ist.AbiHint.nia);
2073          vex_printf(") ======");
2074          break;
2075       case Ist_Put:
2076          vex_printf( "PUT(%d) = ", s->Ist.Put.offset);
2077          ppIRExpr(s->Ist.Put.data);
2078          break;
2079       case Ist_PutI:
2080          ppIRPutI(s->Ist.PutI.details);
2081          break;
2082       case Ist_WrTmp:
2083          ppIRTemp(s->Ist.WrTmp.tmp);
2084          vex_printf( " = " );
2085          ppIRExpr(s->Ist.WrTmp.data);
2086          break;
2087       case Ist_Store:
2088          vex_printf( "ST%s(", s->Ist.Store.end==Iend_LE ? "le" : "be" );
2089          ppIRExpr(s->Ist.Store.addr);
2090          vex_printf( ") = ");
2091          ppIRExpr(s->Ist.Store.data);
2092          break;
2093       case Ist_StoreG:
2094          ppIRStoreG(s->Ist.StoreG.details);
2095          break;
2096       case Ist_LoadG:
2097          ppIRLoadG(s->Ist.LoadG.details);
2098          break;
2099       case Ist_CAS:
2100          ppIRCAS(s->Ist.CAS.details);
2101          break;
2102       case Ist_LLSC:
2103          if (s->Ist.LLSC.storedata == NULL) {
2104             ppIRTemp(s->Ist.LLSC.result);
2105             vex_printf(" = LD%s-Linked(",
2106                        s->Ist.LLSC.end==Iend_LE ? "le" : "be");
2107             ppIRExpr(s->Ist.LLSC.addr);
2108             vex_printf(")");
2109          } else {
2110             ppIRTemp(s->Ist.LLSC.result);
2111             vex_printf(" = ( ST%s-Cond(",
2112                        s->Ist.LLSC.end==Iend_LE ? "le" : "be");
2113             ppIRExpr(s->Ist.LLSC.addr);
2114             vex_printf(") = ");
2115             ppIRExpr(s->Ist.LLSC.storedata);
2116             vex_printf(" )");
2117          }
2118          break;
2119       case Ist_Dirty:
2120          ppIRDirty(s->Ist.Dirty.details);
2121          break;
2122       case Ist_MBE:
2123          vex_printf("IR-");
2124          ppIRMBusEvent(s->Ist.MBE.event);
2125          break;
2126       case Ist_Exit:
2127          vex_printf( "if (" );
2128          ppIRExpr(s->Ist.Exit.guard);
2129          vex_printf( ") { PUT(%d) = ", s->Ist.Exit.offsIP);
2130          ppIRConst(s->Ist.Exit.dst);
2131          vex_printf("; exit-");
2132          ppIRJumpKind(s->Ist.Exit.jk);
2133          vex_printf(" } ");
2134          break;
2135       default:
2136          vpanic("ppIRStmt");
2137    }
2138 }
2139
2140 void ppIRTypeEnv ( const IRTypeEnv* env )
2141 {
2142    UInt i;
2143    for (i = 0; i < env->types_used; i++) {
2144       if (i % 8 == 0)
2145          vex_printf( "   ");
2146       ppIRTemp(i);
2147       vex_printf( ":");
2148       ppIRType(env->types[i]);
2149       if (i % 8 == 7)
2150          vex_printf( "\n");
2151       else
2152          vex_printf( "   ");
2153    }
2154    if (env->types_used > 0 && env->types_used % 8 != 7)
2155       vex_printf( "\n");
2156 }
2157
2158 void ppIRSB ( const IRSB* bb )
2159 {
2160    Int i;
2161    vex_printf("IRSB {\n");
2162    ppIRTypeEnv(bb->tyenv);
2163    vex_printf("\n");
2164    for (i = 0; i < bb->stmts_used; i++) {
2165       vex_printf( "   ");
2166       ppIRStmt(bb->stmts[i]);
2167       vex_printf( "\n");
2168    }
2169    vex_printf( "   PUT(%d) = ", bb->offsIP );
2170    ppIRExpr( bb->next );
2171    vex_printf( "; exit-");
2172    ppIRJumpKind(bb->jumpkind);
2173    vex_printf( "\n}\n");
2174 }
2175
2176
2177 /*---------------------------------------------------------------*/
2178 /*--- Constructors                                            ---*/
2179 /*---------------------------------------------------------------*/
2180
2181
2182 /* Constructors -- IRConst */
2183
2184 IRConst* IRConst_U1 ( Bool bit )
2185 {
2186    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
2187    c->tag     = Ico_U1;
2188    c->Ico.U1  = bit;
2189    /* call me paranoid; I don't care :-) */
2190    vassert(bit == False || bit == True);
2191    return c;
2192 }
2193 IRConst* IRConst_U8 ( UChar u8 )
2194 {
2195    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
2196    c->tag     = Ico_U8;
2197    c->Ico.U8  = u8;
2198    return c;
2199 }
2200 IRConst* IRConst_U16 ( UShort u16 )
2201 {
2202    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
2203    c->tag     = Ico_U16;
2204    c->Ico.U16 = u16;
2205    return c;
2206 }
2207 IRConst* IRConst_U32 ( UInt u32 )
2208 {
2209    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
2210    c->tag     = Ico_U32;
2211    c->Ico.U32 = u32;
2212    return c;
2213 }
2214 IRConst* IRConst_U64 ( ULong u64 )
2215 {
2216    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
2217    c->tag     = Ico_U64;
2218    c->Ico.U64 = u64;
2219    return c;
2220 }
2221 IRConst* IRConst_F32 ( Float f32 )
2222 {
2223    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
2224    c->tag     = Ico_F32;
2225    c->Ico.F32 = f32;
2226    return c;
2227 }
2228 IRConst* IRConst_F32i ( UInt f32i )
2229 {
2230    IRConst* c  = LibVEX_Alloc_inline(sizeof(IRConst));
2231    c->tag      = Ico_F32i;
2232    c->Ico.F32i = f32i;
2233    return c;
2234 }
2235 IRConst* IRConst_F64 ( Double f64 )
2236 {
2237    IRConst* c = LibVEX_Alloc_inline(sizeof(IRConst));
2238    c->tag     = Ico_F64;
2239    c->Ico.F64 = f64;
2240    return c;
2241 }
2242 IRConst* IRConst_F64i ( ULong f64i )
2243 {
2244    IRConst* c  = LibVEX_Alloc_inline(sizeof(IRConst));
2245    c->tag      = Ico_F64i;
2246    c->Ico.F64i = f64i;
2247    return c;
2248 }
2249 IRConst* IRConst_V128 ( UShort con )
2250 {
2251    IRConst* c  = LibVEX_Alloc_inline(sizeof(IRConst));
2252    c->tag      = Ico_V128;
2253    c->Ico.V128 = con;
2254    return c;
2255 }
2256 IRConst* IRConst_V256 ( UInt con )
2257 {
2258    IRConst* c  = LibVEX_Alloc_inline(sizeof(IRConst));
2259    c->tag      = Ico_V256;
2260    c->Ico.V256 = con;
2261    return c;
2262 }
2263
2264 /* Constructors -- IRCallee */
2265
2266 IRCallee* mkIRCallee ( Int regparms, const HChar* name, void* addr )
2267 {
2268    IRCallee* ce = LibVEX_Alloc_inline(sizeof(IRCallee));
2269    ce->regparms = regparms;
2270    ce->name     = name;
2271    ce->addr     = addr;
2272    ce->mcx_mask = 0;
2273    vassert(regparms >= 0 && regparms <= 3);
2274    vassert(name != NULL);
2275    vassert(addr != 0);
2276    return ce;
2277 }
2278
2279
2280 /* Constructors -- IRRegArray */
2281
2282 IRRegArray* mkIRRegArray ( Int base, IRType elemTy, Int nElems )
2283 {
2284    IRRegArray* arr = LibVEX_Alloc_inline(sizeof(IRRegArray));
2285    arr->base       = base;
2286    arr->elemTy     = elemTy;
2287    arr->nElems     = nElems;
2288    vassert(!(arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */));
2289    vassert(!(arr->elemTy == Ity_I1));
2290    vassert(!(arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */));
2291    return arr;
2292 }
2293
2294
2295 /* Constructors -- IRExpr */
2296
2297 IRExpr* IRExpr_Binder ( Int binder ) {
2298    IRExpr* e            = LibVEX_Alloc_inline(sizeof(IRExpr));
2299    e->tag               = Iex_Binder;
2300    e->Iex.Binder.binder = binder;
2301    return e;
2302 }
2303 IRExpr* IRExpr_Get ( Int off, IRType ty ) {
2304    IRExpr* e         = LibVEX_Alloc_inline(sizeof(IRExpr));
2305    e->tag            = Iex_Get;
2306    e->Iex.Get.offset = off;
2307    e->Iex.Get.ty     = ty;
2308    return e;
2309 }
2310 IRExpr* IRExpr_GetI ( IRRegArray* descr, IRExpr* ix, Int bias ) {
2311    IRExpr* e         = LibVEX_Alloc_inline(sizeof(IRExpr));
2312    e->tag            = Iex_GetI;
2313    e->Iex.GetI.descr = descr;
2314    e->Iex.GetI.ix    = ix;
2315    e->Iex.GetI.bias  = bias;
2316    return e;
2317 }
2318 IRExpr* IRExpr_RdTmp ( IRTemp tmp ) {
2319    IRExpr* e        = LibVEX_Alloc_inline(sizeof(IRExpr));
2320    e->tag           = Iex_RdTmp;
2321    e->Iex.RdTmp.tmp = tmp;
2322    return e;
2323 }
2324 IRExpr* IRExpr_Qop ( IROp op, IRExpr* arg1, IRExpr* arg2,
2325                               IRExpr* arg3, IRExpr* arg4 ) {
2326    IRExpr* e       = LibVEX_Alloc_inline(sizeof(IRExpr));
2327    IRQop*  qop     = LibVEX_Alloc_inline(sizeof(IRQop));
2328    qop->op         = op;
2329    qop->arg1       = arg1;
2330    qop->arg2       = arg2;
2331    qop->arg3       = arg3;
2332    qop->arg4       = arg4;
2333    e->tag          = Iex_Qop;
2334    e->Iex.Qop.details = qop;
2335    return e;
2336 }
2337 IRExpr* IRExpr_Triop  ( IROp op, IRExpr* arg1,
2338                                  IRExpr* arg2, IRExpr* arg3 ) {
2339    IRExpr*  e         = LibVEX_Alloc_inline(sizeof(IRExpr));
2340    IRTriop* triop     = LibVEX_Alloc_inline(sizeof(IRTriop));
2341    triop->op         = op;
2342    triop->arg1       = arg1;
2343    triop->arg2       = arg2;
2344    triop->arg3       = arg3;
2345    e->tag            = Iex_Triop;
2346    e->Iex.Triop.details = triop;
2347    return e;
2348 }
2349 IRExpr* IRExpr_Binop ( IROp op, IRExpr* arg1, IRExpr* arg2 ) {
2350    IRExpr* e         = LibVEX_Alloc_inline(sizeof(IRExpr));
2351    e->tag            = Iex_Binop;
2352    e->Iex.Binop.op   = op;
2353    e->Iex.Binop.arg1 = arg1;
2354    e->Iex.Binop.arg2 = arg2;
2355    return e;
2356 }
2357 IRExpr* IRExpr_Unop ( IROp op, IRExpr* arg ) {
2358    IRExpr* e       = LibVEX_Alloc_inline(sizeof(IRExpr));
2359    e->tag          = Iex_Unop;
2360    e->Iex.Unop.op  = op;
2361    e->Iex.Unop.arg = arg;
2362    return e;
2363 }
2364 IRExpr* IRExpr_Load ( IREndness end, IRType ty, IRExpr* addr ) {
2365    IRExpr* e        = LibVEX_Alloc_inline(sizeof(IRExpr));
2366    e->tag           = Iex_Load;
2367    e->Iex.Load.end  = end;
2368    e->Iex.Load.ty   = ty;
2369    e->Iex.Load.addr = addr;
2370    vassert(end == Iend_LE || end == Iend_BE);
2371    return e;
2372 }
2373 IRExpr* IRExpr_Const ( IRConst* con ) {
2374    IRExpr* e        = LibVEX_Alloc_inline(sizeof(IRExpr));
2375    e->tag           = Iex_Const;
2376    e->Iex.Const.con = con;
2377    return e;
2378 }
2379 IRExpr* IRExpr_CCall ( IRCallee* cee, IRType retty, IRExpr** args ) {
2380    IRExpr* e          = LibVEX_Alloc_inline(sizeof(IRExpr));
2381    e->tag             = Iex_CCall;
2382    e->Iex.CCall.cee   = cee;
2383    e->Iex.CCall.retty = retty;
2384    e->Iex.CCall.args  = args;
2385    return e;
2386 }
2387 IRExpr* IRExpr_ITE ( IRExpr* cond, IRExpr* iftrue, IRExpr* iffalse ) {
2388    IRExpr* e          = LibVEX_Alloc_inline(sizeof(IRExpr));
2389    e->tag             = Iex_ITE;
2390    e->Iex.ITE.cond    = cond;
2391    e->Iex.ITE.iftrue  = iftrue;
2392    e->Iex.ITE.iffalse = iffalse;
2393    return e;
2394 }
2395 IRExpr* IRExpr_VECRET ( void ) {
2396    IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
2397    e->tag    = Iex_VECRET;
2398    return e;
2399 }
2400 IRExpr* IRExpr_GSPTR ( void ) {
2401    IRExpr* e = LibVEX_Alloc_inline(sizeof(IRExpr));
2402    e->tag    = Iex_GSPTR;
2403    return e;
2404 }
2405
2406
2407 /* Constructors for NULL-terminated IRExpr expression vectors,
2408    suitable for use as arg lists in clean/dirty helper calls. */
2409
2410 IRExpr** mkIRExprVec_0 ( void ) {
2411    IRExpr** vec = LibVEX_Alloc_inline(1 * sizeof(IRExpr*));
2412    vec[0] = NULL;
2413    return vec;
2414 }
2415 IRExpr** mkIRExprVec_1 ( IRExpr* arg1 ) {
2416    IRExpr** vec = LibVEX_Alloc_inline(2 * sizeof(IRExpr*));
2417    vec[0] = arg1;
2418    vec[1] = NULL;
2419    return vec;
2420 }
2421 IRExpr** mkIRExprVec_2 ( IRExpr* arg1, IRExpr* arg2 ) {
2422    IRExpr** vec = LibVEX_Alloc_inline(3 * sizeof(IRExpr*));
2423    vec[0] = arg1;
2424    vec[1] = arg2;
2425    vec[2] = NULL;
2426    return vec;
2427 }
2428 IRExpr** mkIRExprVec_3 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3 ) {
2429    IRExpr** vec = LibVEX_Alloc_inline(4 * sizeof(IRExpr*));
2430    vec[0] = arg1;
2431    vec[1] = arg2;
2432    vec[2] = arg3;
2433    vec[3] = NULL;
2434    return vec;
2435 }
2436 IRExpr** mkIRExprVec_4 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2437                          IRExpr* arg4 ) {
2438    IRExpr** vec = LibVEX_Alloc_inline(5 * sizeof(IRExpr*));
2439    vec[0] = arg1;
2440    vec[1] = arg2;
2441    vec[2] = arg3;
2442    vec[3] = arg4;
2443    vec[4] = NULL;
2444    return vec;
2445 }
2446 IRExpr** mkIRExprVec_5 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2447                          IRExpr* arg4, IRExpr* arg5 ) {
2448    IRExpr** vec = LibVEX_Alloc_inline(6 * sizeof(IRExpr*));
2449    vec[0] = arg1;
2450    vec[1] = arg2;
2451    vec[2] = arg3;
2452    vec[3] = arg4;
2453    vec[4] = arg5;
2454    vec[5] = NULL;
2455    return vec;
2456 }
2457 IRExpr** mkIRExprVec_6 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2458                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6 ) {
2459    IRExpr** vec = LibVEX_Alloc_inline(7 * sizeof(IRExpr*));
2460    vec[0] = arg1;
2461    vec[1] = arg2;
2462    vec[2] = arg3;
2463    vec[3] = arg4;
2464    vec[4] = arg5;
2465    vec[5] = arg6;
2466    vec[6] = NULL;
2467    return vec;
2468 }
2469 IRExpr** mkIRExprVec_7 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2470                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
2471                          IRExpr* arg7 ) {
2472    IRExpr** vec = LibVEX_Alloc_inline(8 * sizeof(IRExpr*));
2473    vec[0] = arg1;
2474    vec[1] = arg2;
2475    vec[2] = arg3;
2476    vec[3] = arg4;
2477    vec[4] = arg5;
2478    vec[5] = arg6;
2479    vec[6] = arg7;
2480    vec[7] = NULL;
2481    return vec;
2482 }
2483 IRExpr** mkIRExprVec_8 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2484                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
2485                          IRExpr* arg7, IRExpr* arg8 ) {
2486    IRExpr** vec = LibVEX_Alloc_inline(9 * sizeof(IRExpr*));
2487    vec[0] = arg1;
2488    vec[1] = arg2;
2489    vec[2] = arg3;
2490    vec[3] = arg4;
2491    vec[4] = arg5;
2492    vec[5] = arg6;
2493    vec[6] = arg7;
2494    vec[7] = arg8;
2495    vec[8] = NULL;
2496    return vec;
2497 }
2498 IRExpr** mkIRExprVec_9 ( IRExpr* arg1, IRExpr* arg2, IRExpr* arg3,
2499                          IRExpr* arg4, IRExpr* arg5, IRExpr* arg6,
2500                          IRExpr* arg7, IRExpr* arg8, IRExpr* arg9 ) {
2501    IRExpr** vec = LibVEX_Alloc_inline(10 * sizeof(IRExpr*));
2502    vec[0] = arg1;
2503    vec[1] = arg2;
2504    vec[2] = arg3;
2505    vec[3] = arg4;
2506    vec[4] = arg5;
2507    vec[5] = arg6;
2508    vec[6] = arg7;
2509    vec[7] = arg8;
2510    vec[8] = arg9;
2511    vec[9] = NULL;
2512    return vec;
2513 }
2514 IRExpr** mkIRExprVec_13 ( IRExpr* arg1,  IRExpr* arg2,  IRExpr* arg3,
2515                           IRExpr* arg4,  IRExpr* arg5,  IRExpr* arg6,
2516                           IRExpr* arg7,  IRExpr* arg8,  IRExpr* arg9,
2517                           IRExpr* arg10, IRExpr* arg11, IRExpr* arg12,
2518                           IRExpr* arg13
2519  ) {
2520    IRExpr** vec = LibVEX_Alloc_inline(14 * sizeof(IRExpr*));
2521    vec[0]  = arg1;
2522    vec[1]  = arg2;
2523    vec[2]  = arg3;
2524    vec[3]  = arg4;
2525    vec[4]  = arg5;
2526    vec[5]  = arg6;
2527    vec[6]  = arg7;
2528    vec[7]  = arg8;
2529    vec[8]  = arg9;
2530    vec[9]  = arg10;
2531    vec[10] = arg11;
2532    vec[11] = arg12;
2533    vec[12] = arg13;
2534    vec[13] = NULL;
2535    return vec;
2536 }
2537
2538
2539 /* Constructors -- IRDirty */
2540
2541 IRDirty* emptyIRDirty ( void ) {
2542    IRDirty* d = LibVEX_Alloc_inline(sizeof(IRDirty));
2543    d->cee      = NULL;
2544    d->guard    = NULL;
2545    d->args     = NULL;
2546    d->tmp      = IRTemp_INVALID;
2547    d->mFx      = Ifx_None;
2548    d->mAddr    = NULL;
2549    d->mSize    = 0;
2550    d->nFxState = 0;
2551    return d;
2552 }
2553
2554
2555 /* Constructors -- IRCAS */
2556
2557 IRCAS* mkIRCAS ( IRTemp oldHi, IRTemp oldLo,
2558                  IREndness end, IRExpr* addr,
2559                  IRExpr* expdHi, IRExpr* expdLo,
2560                  IRExpr* dataHi, IRExpr* dataLo ) {
2561    IRCAS* cas = LibVEX_Alloc_inline(sizeof(IRCAS));
2562    cas->oldHi  = oldHi;
2563    cas->oldLo  = oldLo;
2564    cas->end    = end;
2565    cas->addr   = addr;
2566    cas->expdHi = expdHi;
2567    cas->expdLo = expdLo;
2568    cas->dataHi = dataHi;
2569    cas->dataLo = dataLo;
2570    return cas;
2571 }
2572
2573
2574 /* Constructors -- IRPutI */
2575
2576 IRPutI* mkIRPutI ( IRRegArray* descr, IRExpr* ix,
2577                    Int bias, IRExpr* data )
2578 {
2579    IRPutI* puti = LibVEX_Alloc_inline(sizeof(IRPutI));
2580    puti->descr  = descr;
2581    puti->ix     = ix;
2582    puti->bias   = bias;
2583    puti->data   = data;
2584    return puti;
2585 }
2586
2587
2588 /* Constructors -- IRStoreG and IRLoadG */
2589
2590 IRStoreG* mkIRStoreG ( IREndness end,
2591                        IRExpr* addr, IRExpr* data, IRExpr* guard )
2592 {
2593    IRStoreG* sg = LibVEX_Alloc_inline(sizeof(IRStoreG));
2594    sg->end      = end;
2595    sg->addr     = addr;
2596    sg->data     = data;
2597    sg->guard    = guard;
2598    return sg;
2599 }
2600
2601 IRLoadG* mkIRLoadG ( IREndness end, IRLoadGOp cvt,
2602                      IRTemp dst, IRExpr* addr, IRExpr* alt, IRExpr* guard )
2603 {
2604    IRLoadG* lg = LibVEX_Alloc_inline(sizeof(IRLoadG));
2605    lg->end     = end;
2606    lg->cvt     = cvt;
2607    lg->dst     = dst;
2608    lg->addr    = addr;
2609    lg->alt     = alt;
2610    lg->guard   = guard;
2611    return lg;
2612 }
2613
2614
2615 /* Constructors -- IRStmt */
2616
2617 IRStmt* IRStmt_NoOp ( void )
2618 {
2619    /* Just use a single static closure. */
2620    static IRStmt static_closure;
2621    static_closure.tag = Ist_NoOp;
2622    return &static_closure;
2623 }
2624 IRStmt* IRStmt_IMark ( Addr addr, UInt len, UChar delta ) {
2625    IRStmt* s          = LibVEX_Alloc_inline(sizeof(IRStmt));
2626    s->tag             = Ist_IMark;
2627    s->Ist.IMark.addr  = addr;
2628    s->Ist.IMark.len   = len;
2629    s->Ist.IMark.delta = delta;
2630    return s;
2631 }
2632 IRStmt* IRStmt_AbiHint ( IRExpr* base, Int len, IRExpr* nia ) {
2633    IRStmt* s           = LibVEX_Alloc_inline(sizeof(IRStmt));
2634    s->tag              = Ist_AbiHint;
2635    s->Ist.AbiHint.base = base;
2636    s->Ist.AbiHint.len  = len;
2637    s->Ist.AbiHint.nia  = nia;
2638    return s;
2639 }
2640 IRStmt* IRStmt_Put ( Int off, IRExpr* data ) {
2641    IRStmt* s         = LibVEX_Alloc_inline(sizeof(IRStmt));
2642    s->tag            = Ist_Put;
2643    s->Ist.Put.offset = off;
2644    s->Ist.Put.data   = data;
2645    return s;
2646 }
2647 IRStmt* IRStmt_PutI ( IRPutI* details ) {
2648    IRStmt* s          = LibVEX_Alloc_inline(sizeof(IRStmt));
2649    s->tag             = Ist_PutI;
2650    s->Ist.PutI.details = details;
2651    return s;
2652 }
2653 IRStmt* IRStmt_WrTmp ( IRTemp tmp, IRExpr* data ) {
2654    IRStmt* s         = LibVEX_Alloc_inline(sizeof(IRStmt));
2655    s->tag            = Ist_WrTmp;
2656    s->Ist.WrTmp.tmp  = tmp;
2657    s->Ist.WrTmp.data = data;
2658    return s;
2659 }
2660 IRStmt* IRStmt_Store ( IREndness end, IRExpr* addr, IRExpr* data ) {
2661    IRStmt* s         = LibVEX_Alloc_inline(sizeof(IRStmt));
2662    s->tag            = Ist_Store;
2663    s->Ist.Store.end  = end;
2664    s->Ist.Store.addr = addr;
2665    s->Ist.Store.data = data;
2666    vassert(end == Iend_LE || end == Iend_BE);
2667    return s;
2668 }
2669 IRStmt* IRStmt_StoreG ( IREndness end, IRExpr* addr, IRExpr* data,
2670                         IRExpr* guard ) {
2671    IRStmt* s             = LibVEX_Alloc_inline(sizeof(IRStmt));
2672    s->tag                = Ist_StoreG;
2673    s->Ist.StoreG.details = mkIRStoreG(end, addr, data, guard);
2674    vassert(end == Iend_LE || end == Iend_BE);
2675    return s;
2676 }
2677 IRStmt* IRStmt_LoadG ( IREndness end, IRLoadGOp cvt, IRTemp dst,
2678                        IRExpr* addr, IRExpr* alt, IRExpr* guard ) {
2679    IRStmt* s            = LibVEX_Alloc_inline(sizeof(IRStmt));
2680    s->tag               = Ist_LoadG;
2681    s->Ist.LoadG.details = mkIRLoadG(end, cvt, dst, addr, alt, guard);
2682    return s;
2683 }
2684 IRStmt* IRStmt_CAS ( IRCAS* cas ) {
2685    IRStmt* s          = LibVEX_Alloc_inline(sizeof(IRStmt));
2686    s->tag             = Ist_CAS;
2687    s->Ist.CAS.details = cas;
2688    return s;
2689 }
2690 IRStmt* IRStmt_LLSC ( IREndness end,
2691                       IRTemp result, IRExpr* addr, IRExpr* storedata ) {
2692    IRStmt* s = LibVEX_Alloc_inline(sizeof(IRStmt));
2693    s->tag                = Ist_LLSC;
2694    s->Ist.LLSC.end       = end;
2695    s->Ist.LLSC.result    = result;
2696    s->Ist.LLSC.addr      = addr;
2697    s->Ist.LLSC.storedata = storedata;
2698    return s;
2699 }
2700 IRStmt* IRStmt_Dirty ( IRDirty* d )
2701 {
2702    IRStmt* s            = LibVEX_Alloc_inline(sizeof(IRStmt));
2703    s->tag               = Ist_Dirty;
2704    s->Ist.Dirty.details = d;
2705    return s;
2706 }
2707 IRStmt* IRStmt_MBE ( IRMBusEvent event )
2708 {
2709    IRStmt* s        = LibVEX_Alloc_inline(sizeof(IRStmt));
2710    s->tag           = Ist_MBE;
2711    s->Ist.MBE.event = event;
2712    return s;
2713 }
2714 IRStmt* IRStmt_Exit ( IRExpr* guard, IRJumpKind jk, IRConst* dst,
2715                       Int offsIP ) {
2716    IRStmt* s          = LibVEX_Alloc_inline(sizeof(IRStmt));
2717    s->tag             = Ist_Exit;
2718    s->Ist.Exit.guard  = guard;
2719    s->Ist.Exit.jk     = jk;
2720    s->Ist.Exit.dst    = dst;
2721    s->Ist.Exit.offsIP = offsIP;
2722    return s;
2723 }
2724
2725
2726 /* Constructors -- IRTypeEnv */
2727
2728 IRTypeEnv* emptyIRTypeEnv ( void )
2729 {
2730    IRTypeEnv* env   = LibVEX_Alloc_inline(sizeof(IRTypeEnv));
2731    env->types       = LibVEX_Alloc_inline(8 * sizeof(IRType));
2732    env->types_size  = 8;
2733    env->types_used  = 0;
2734    return env;
2735 }
2736
2737
2738 /* Constructors -- IRSB */
2739
2740 IRSB* emptyIRSB ( void )
2741 {
2742    IRSB* bb       = LibVEX_Alloc_inline(sizeof(IRSB));
2743    bb->tyenv      = emptyIRTypeEnv();
2744    bb->stmts_used = 0;
2745    bb->stmts_size = 8;
2746    bb->stmts      = LibVEX_Alloc_inline(bb->stmts_size * sizeof(IRStmt*));
2747    bb->next       = NULL;
2748    bb->jumpkind   = Ijk_Boring;
2749    bb->offsIP     = 0;
2750    return bb;
2751 }
2752
2753
2754 /*---------------------------------------------------------------*/
2755 /*--- (Deep) copy constructors.  These make complete copies   ---*/
2756 /*--- the original, which can be modified without affecting   ---*/
2757 /*--- the original.                                           ---*/
2758 /*---------------------------------------------------------------*/
2759
2760 /* Copying IR Expr vectors (for call args). */
2761
2762 /* Shallow copy of an IRExpr vector */
2763
2764 IRExpr** shallowCopyIRExprVec ( IRExpr** vec )
2765 {
2766    Int      i;
2767    IRExpr** newvec;
2768    for (i = 0; vec[i]; i++)
2769       ;
2770    newvec = LibVEX_Alloc_inline((i+1)*sizeof(IRExpr*));
2771    for (i = 0; vec[i]; i++)
2772       newvec[i] = vec[i];
2773    newvec[i] = NULL;
2774    return newvec;
2775 }
2776
2777 /* Deep copy of an IRExpr vector */
2778
2779 IRExpr** deepCopyIRExprVec ( IRExpr *const * vec )
2780 {
2781    Int      i;
2782    IRExpr** newvec;
2783    for (i = 0; vec[i]; i++)
2784       ;
2785    newvec = LibVEX_Alloc_inline((i+1)*sizeof(IRExpr*));
2786    for (i = 0; vec[i]; i++)
2787       newvec[i] = deepCopyIRExpr(vec[i]);
2788    newvec[i] = NULL;
2789    return newvec;
2790 }
2791
2792 /* Deep copy constructors for all heap-allocated IR types follow. */
2793
2794 IRConst* deepCopyIRConst ( const IRConst* c )
2795 {
2796    switch (c->tag) {
2797       case Ico_U1:   return IRConst_U1(c->Ico.U1);
2798       case Ico_U8:   return IRConst_U8(c->Ico.U8);
2799       case Ico_U16:  return IRConst_U16(c->Ico.U16);
2800       case Ico_U32:  return IRConst_U32(c->Ico.U32);
2801       case Ico_U64:  return IRConst_U64(c->Ico.U64);
2802       case Ico_F32:  return IRConst_F32(c->Ico.F32);
2803       case Ico_F32i: return IRConst_F32i(c->Ico.F32i);
2804       case Ico_F64:  return IRConst_F64(c->Ico.F64);
2805       case Ico_F64i: return IRConst_F64i(c->Ico.F64i);
2806       case Ico_V128: return IRConst_V128(c->Ico.V128);
2807       case Ico_V256: return IRConst_V256(c->Ico.V256);
2808       default: vpanic("deepCopyIRConst");
2809    }
2810 }
2811
2812 IRCallee* deepCopyIRCallee ( const IRCallee* ce )
2813 {
2814    IRCallee* ce2 = mkIRCallee(ce->regparms, ce->name, ce->addr);
2815    ce2->mcx_mask = ce->mcx_mask;
2816    return ce2;
2817 }
2818
2819 IRRegArray* deepCopyIRRegArray ( const IRRegArray* d )
2820 {
2821    return mkIRRegArray(d->base, d->elemTy, d->nElems);
2822 }
2823
2824 IRExpr* deepCopyIRExpr ( const IRExpr* e )
2825 {
2826    switch (e->tag) {
2827       case Iex_Get:
2828          return IRExpr_Get(e->Iex.Get.offset, e->Iex.Get.ty);
2829       case Iex_GetI:
2830          return IRExpr_GetI(deepCopyIRRegArray(e->Iex.GetI.descr),
2831                             deepCopyIRExpr(e->Iex.GetI.ix),
2832                             e->Iex.GetI.bias);
2833       case Iex_RdTmp:
2834          return IRExpr_RdTmp(e->Iex.RdTmp.tmp);
2835       case Iex_Qop: {
2836          const IRQop* qop = e->Iex.Qop.details;
2837
2838          return IRExpr_Qop(qop->op,
2839                            deepCopyIRExpr(qop->arg1),
2840                            deepCopyIRExpr(qop->arg2),
2841                            deepCopyIRExpr(qop->arg3),
2842                            deepCopyIRExpr(qop->arg4));
2843       }
2844       case Iex_Triop:  {
2845          const IRTriop *triop = e->Iex.Triop.details;
2846
2847          return IRExpr_Triop(triop->op,
2848                              deepCopyIRExpr(triop->arg1),
2849                              deepCopyIRExpr(triop->arg2),
2850                              deepCopyIRExpr(triop->arg3));
2851       }
2852       case Iex_Binop:
2853          return IRExpr_Binop(e->Iex.Binop.op,
2854                              deepCopyIRExpr(e->Iex.Binop.arg1),
2855                              deepCopyIRExpr(e->Iex.Binop.arg2));
2856       case Iex_Unop:
2857          return IRExpr_Unop(e->Iex.Unop.op,
2858                             deepCopyIRExpr(e->Iex.Unop.arg));
2859       case Iex_Load:
2860          return IRExpr_Load(e->Iex.Load.end,
2861                             e->Iex.Load.ty,
2862                             deepCopyIRExpr(e->Iex.Load.addr));
2863       case Iex_Const:
2864          return IRExpr_Const(deepCopyIRConst(e->Iex.Const.con));
2865       case Iex_CCall:
2866          return IRExpr_CCall(deepCopyIRCallee(e->Iex.CCall.cee),
2867                              e->Iex.CCall.retty,
2868                              deepCopyIRExprVec(e->Iex.CCall.args));
2869
2870       case Iex_ITE:
2871          return IRExpr_ITE(deepCopyIRExpr(e->Iex.ITE.cond),
2872                            deepCopyIRExpr(e->Iex.ITE.iftrue),
2873                            deepCopyIRExpr(e->Iex.ITE.iffalse));
2874       case Iex_VECRET:
2875          return IRExpr_VECRET();
2876
2877       case Iex_GSPTR:
2878          return IRExpr_GSPTR();
2879
2880       case Iex_Binder:
2881          return IRExpr_Binder(e->Iex.Binder.binder);
2882
2883       default:
2884          vpanic("deepCopyIRExpr");
2885    }
2886 }
2887
2888 IRDirty* deepCopyIRDirty ( const IRDirty* d )
2889 {
2890    Int      i;
2891    IRDirty* d2 = emptyIRDirty();
2892    d2->cee   = deepCopyIRCallee(d->cee);
2893    d2->guard = deepCopyIRExpr(d->guard);
2894    d2->args  = deepCopyIRExprVec(d->args);
2895    d2->tmp   = d->tmp;
2896    d2->mFx   = d->mFx;
2897    d2->mAddr = d->mAddr==NULL ? NULL : deepCopyIRExpr(d->mAddr);
2898    d2->mSize = d->mSize;
2899    d2->nFxState = d->nFxState;
2900    for (i = 0; i < d2->nFxState; i++)
2901       d2->fxState[i] = d->fxState[i];
2902    return d2;
2903 }
2904
2905 IRCAS* deepCopyIRCAS ( const IRCAS* cas )
2906 {
2907    return mkIRCAS( cas->oldHi, cas->oldLo, cas->end,
2908                    deepCopyIRExpr(cas->addr),
2909                    cas->expdHi==NULL ? NULL : deepCopyIRExpr(cas->expdHi),
2910                    deepCopyIRExpr(cas->expdLo),
2911                    cas->dataHi==NULL ? NULL : deepCopyIRExpr(cas->dataHi),
2912                    deepCopyIRExpr(cas->dataLo) );
2913 }
2914
2915 IRPutI* deepCopyIRPutI ( const IRPutI * puti )
2916 {
2917   return mkIRPutI( deepCopyIRRegArray(puti->descr),
2918                    deepCopyIRExpr(puti->ix),
2919                    puti->bias,
2920                    deepCopyIRExpr(puti->data));
2921 }
2922
2923 IRStmt* deepCopyIRStmt ( const IRStmt* s )
2924 {
2925    switch (s->tag) {
2926       case Ist_NoOp:
2927          return IRStmt_NoOp();
2928       case Ist_AbiHint:
2929          return IRStmt_AbiHint(deepCopyIRExpr(s->Ist.AbiHint.base),
2930                                s->Ist.AbiHint.len,
2931                                deepCopyIRExpr(s->Ist.AbiHint.nia));
2932       case Ist_IMark:
2933          return IRStmt_IMark(s->Ist.IMark.addr,
2934                              s->Ist.IMark.len,
2935                              s->Ist.IMark.delta);
2936       case Ist_Put:
2937          return IRStmt_Put(s->Ist.Put.offset,
2938                            deepCopyIRExpr(s->Ist.Put.data));
2939       case Ist_PutI:
2940          return IRStmt_PutI(deepCopyIRPutI(s->Ist.PutI.details));
2941       case Ist_WrTmp:
2942          return IRStmt_WrTmp(s->Ist.WrTmp.tmp,
2943                              deepCopyIRExpr(s->Ist.WrTmp.data));
2944       case Ist_Store:
2945          return IRStmt_Store(s->Ist.Store.end,
2946                              deepCopyIRExpr(s->Ist.Store.addr),
2947                              deepCopyIRExpr(s->Ist.Store.data));
2948       case Ist_StoreG: {
2949          const IRStoreG* sg = s->Ist.StoreG.details;
2950          return IRStmt_StoreG(sg->end,
2951                               deepCopyIRExpr(sg->addr),
2952                               deepCopyIRExpr(sg->data),
2953                               deepCopyIRExpr(sg->guard));
2954       }
2955       case Ist_LoadG: {
2956          const IRLoadG* lg = s->Ist.LoadG.details;
2957          return IRStmt_LoadG(lg->end, lg->cvt, lg->dst,
2958                              deepCopyIRExpr(lg->addr),
2959                              deepCopyIRExpr(lg->alt),
2960                              deepCopyIRExpr(lg->guard));
2961       }
2962       case Ist_CAS:
2963          return IRStmt_CAS(deepCopyIRCAS(s->Ist.CAS.details));
2964       case Ist_LLSC:
2965          return IRStmt_LLSC(s->Ist.LLSC.end,
2966                             s->Ist.LLSC.result,
2967                             deepCopyIRExpr(s->Ist.LLSC.addr),
2968                             s->Ist.LLSC.storedata
2969                                ? deepCopyIRExpr(s->Ist.LLSC.storedata)
2970                                : NULL);
2971       case Ist_Dirty:
2972          return IRStmt_Dirty(deepCopyIRDirty(s->Ist.Dirty.details));
2973       case Ist_MBE:
2974          return IRStmt_MBE(s->Ist.MBE.event);
2975       case Ist_Exit:
2976          return IRStmt_Exit(deepCopyIRExpr(s->Ist.Exit.guard),
2977                             s->Ist.Exit.jk,
2978                             deepCopyIRConst(s->Ist.Exit.dst),
2979                             s->Ist.Exit.offsIP);
2980       default:
2981          vpanic("deepCopyIRStmt");
2982    }
2983 }
2984
2985 IRTypeEnv* deepCopyIRTypeEnv ( const IRTypeEnv* src )
2986 {
2987    Int        i;
2988    IRTypeEnv* dst = LibVEX_Alloc_inline(sizeof(IRTypeEnv));
2989    dst->types_size = src->types_size;
2990    dst->types_used = src->types_used;
2991    dst->types = LibVEX_Alloc_inline(dst->types_size * sizeof(IRType));
2992    for (i = 0; i < src->types_used; i++)
2993       dst->types[i] = src->types[i];
2994    return dst;
2995 }
2996
2997 IRSB* deepCopyIRSB ( const IRSB* bb )
2998 {
2999    Int      i;
3000    IRStmt** sts2;
3001    IRSB* bb2 = deepCopyIRSBExceptStmts(bb);
3002    bb2->stmts_used = bb2->stmts_size = bb->stmts_used;
3003    sts2 = LibVEX_Alloc_inline(bb2->stmts_used * sizeof(IRStmt*));
3004    for (i = 0; i < bb2->stmts_used; i++)
3005       sts2[i] = deepCopyIRStmt(bb->stmts[i]);
3006    bb2->stmts = sts2;
3007    return bb2;
3008 }
3009
3010 IRSB* deepCopyIRSBExceptStmts ( const IRSB* bb )
3011 {
3012    IRSB* bb2     = emptyIRSB();
3013    bb2->tyenv    = deepCopyIRTypeEnv(bb->tyenv);
3014    bb2->next     = deepCopyIRExpr(bb->next);
3015    bb2->jumpkind = bb->jumpkind;
3016    bb2->offsIP   = bb->offsIP;
3017    return bb2;
3018 }
3019
3020
3021 /*---------------------------------------------------------------*/
3022 /*--- Primop types                                            ---*/
3023 /*---------------------------------------------------------------*/
3024
3025 void typeOfPrimop ( IROp op,
3026                     /*OUTs*/
3027                     IRType* t_dst,
3028                     IRType* t_arg1, IRType* t_arg2,
3029                     IRType* t_arg3, IRType* t_arg4 )
3030 {
3031 #  define UNARY(_ta1,_td)                                      \
3032       *t_dst = (_td); *t_arg1 = (_ta1); break
3033 #  define BINARY(_ta1,_ta2,_td)                                \
3034      *t_dst = (_td); *t_arg1 = (_ta1); *t_arg2 = (_ta2); break
3035 #  define TERNARY(_ta1,_ta2,_ta3,_td)                          \
3036      *t_dst = (_td); *t_arg1 = (_ta1);                         \
3037      *t_arg2 = (_ta2); *t_arg3 = (_ta3); break
3038 #  define QUATERNARY(_ta1,_ta2,_ta3,_ta4,_td)                  \
3039      *t_dst = (_td); *t_arg1 = (_ta1);                         \
3040      *t_arg2 = (_ta2); *t_arg3 = (_ta3);                       \
3041      *t_arg4 = (_ta4); break
3042 #  define COMPARISON(_ta)                                      \
3043      *t_dst = Ity_I1; *t_arg1 = *t_arg2 = (_ta); break;
3044 #  define UNARY_COMPARISON(_ta)                                \
3045      *t_dst = Ity_I1; *t_arg1 = (_ta); break;
3046
3047    /* Rounding mode values are always Ity_I32, encoded as per
3048       IRRoundingMode */
3049    const IRType ity_RMode = Ity_I32;
3050
3051    *t_dst  = Ity_INVALID;
3052    *t_arg1 = Ity_INVALID;
3053    *t_arg2 = Ity_INVALID;
3054    *t_arg3 = Ity_INVALID;
3055    *t_arg4 = Ity_INVALID;
3056    switch (op) {
3057       case Iop_Add8: case Iop_Sub8: case Iop_Mul8:
3058       case Iop_Or8:  case Iop_And8: case Iop_Xor8:
3059          BINARY(Ity_I8,Ity_I8, Ity_I8);
3060
3061       case Iop_Add16: case Iop_Sub16: case Iop_Mul16:
3062       case Iop_Or16:  case Iop_And16: case Iop_Xor16:
3063          BINARY(Ity_I16,Ity_I16, Ity_I16);
3064
3065       case Iop_CmpORD32U:
3066       case Iop_CmpORD32S:
3067       case Iop_Add32: case Iop_Sub32: case Iop_Mul32:
3068       case Iop_Or32:  case Iop_And32: case Iop_Xor32:
3069       case Iop_Max32U:
3070       case Iop_QAdd32S: case Iop_QSub32S:
3071       case Iop_Add16x2: case Iop_Sub16x2:
3072       case Iop_QAdd16Sx2: case Iop_QAdd16Ux2:
3073       case Iop_QSub16Sx2: case Iop_QSub16Ux2:
3074       case Iop_HAdd16Ux2: case Iop_HAdd16Sx2:
3075       case Iop_HSub16Ux2: case Iop_HSub16Sx2:
3076       case Iop_Add8x4: case Iop_Sub8x4:
3077       case Iop_QAdd8Sx4: case Iop_QAdd8Ux4:
3078       case Iop_QSub8Sx4: case Iop_QSub8Ux4:
3079       case Iop_HAdd8Ux4: case Iop_HAdd8Sx4:
3080       case Iop_HSub8Ux4: case Iop_HSub8Sx4:
3081       case Iop_Sad8Ux4:
3082          BINARY(Ity_I32,Ity_I32, Ity_I32);
3083
3084       case Iop_Add64: case Iop_Sub64: case Iop_Mul64:
3085       case Iop_Or64:  case Iop_And64: case Iop_Xor64:
3086       case Iop_CmpORD64U:
3087       case Iop_CmpORD64S:
3088       case Iop_Avg8Ux8: case Iop_Avg16Ux4:
3089       case Iop_Add8x8: case Iop_Add16x4: case Iop_Add32x2:
3090       case Iop_Add32Fx2: case Iop_Sub32Fx2:
3091       case Iop_CmpEQ8x8: case Iop_CmpEQ16x4: case Iop_CmpEQ32x2:
3092       case Iop_CmpGT8Sx8: case Iop_CmpGT16Sx4: case Iop_CmpGT32Sx2:
3093       case Iop_CmpGT8Ux8: case Iop_CmpGT16Ux4: case Iop_CmpGT32Ux2:
3094       case Iop_CmpGT32Fx2: case Iop_CmpEQ32Fx2: case Iop_CmpGE32Fx2:
3095       case Iop_InterleaveHI8x8: case Iop_InterleaveLO8x8:
3096       case Iop_InterleaveHI16x4: case Iop_InterleaveLO16x4:
3097       case Iop_InterleaveHI32x2: case Iop_InterleaveLO32x2:
3098       case Iop_CatOddLanes8x8: case Iop_CatEvenLanes8x8:
3099       case Iop_CatOddLanes16x4: case Iop_CatEvenLanes16x4:
3100       case Iop_InterleaveOddLanes8x8: case Iop_InterleaveEvenLanes8x8:
3101       case Iop_InterleaveOddLanes16x4: case Iop_InterleaveEvenLanes16x4:
3102       case Iop_Perm8x8: case Iop_PermOrZero8x8:
3103       case Iop_Max8Ux8: case Iop_Max16Ux4: case Iop_Max32Ux2:
3104       case Iop_Max8Sx8: case Iop_Max16Sx4: case Iop_Max32Sx2:
3105       case Iop_Max32Fx2: case Iop_Min32Fx2:
3106       case Iop_PwMax32Fx2: case Iop_PwMin32Fx2:
3107       case Iop_Min8Ux8: case Iop_Min16Ux4: case Iop_Min32Ux2:
3108       case Iop_Min8Sx8: case Iop_Min16Sx4: case Iop_Min32Sx2:
3109       case Iop_PwMax8Ux8: case Iop_PwMax16Ux4: case Iop_PwMax32Ux2:
3110       case Iop_PwMax8Sx8: case Iop_PwMax16Sx4: case Iop_PwMax32Sx2:
3111       case Iop_PwMin8Ux8: case Iop_PwMin16Ux4: case Iop_PwMin32Ux2:
3112       case Iop_PwMin8Sx8: case Iop_PwMin16Sx4: case Iop_PwMin32Sx2:
3113       case Iop_Mul8x8: case Iop_Mul16x4: case Iop_Mul32x2:
3114       case Iop_Mul32Fx2:
3115       case Iop_PolynomialMul8x8:
3116       case Iop_MulHi16Sx4: case Iop_MulHi16Ux4:
3117       case Iop_QDMulHi16Sx4: case Iop_QDMulHi32Sx2:
3118       case Iop_QRDMulHi16Sx4: case Iop_QRDMulHi32Sx2:
3119       case Iop_QAdd8Sx8: case Iop_QAdd16Sx4:
3120       case Iop_QAdd32Sx2: case Iop_QAdd64Sx1:
3121       case Iop_QAdd8Ux8: case Iop_QAdd16Ux4:
3122       case Iop_QAdd32Ux2: case Iop_QAdd64Ux1:
3123       case Iop_PwAdd8x8: case Iop_PwAdd16x4: case Iop_PwAdd32x2:
3124       case Iop_PwAdd32Fx2:
3125       case Iop_QNarrowBin32Sto16Sx4:
3126       case Iop_QNarrowBin16Sto8Sx8: case Iop_QNarrowBin16Sto8Ux8:
3127       case Iop_NarrowBin16to8x8: case Iop_NarrowBin32to16x4:
3128       case Iop_Sub8x8: case Iop_Sub16x4: case Iop_Sub32x2:
3129       case Iop_QSub8Sx8: case Iop_QSub16Sx4:
3130       case Iop_QSub32Sx2: case Iop_QSub64Sx1:
3131       case Iop_QSub8Ux8: case Iop_QSub16Ux4:
3132       case Iop_QSub32Ux2: case Iop_QSub64Ux1:
3133       case Iop_Shl8x8: case Iop_Shl16x4: case Iop_Shl32x2:
3134       case Iop_Shr8x8: case Iop_Shr16x4: case Iop_Shr32x2:
3135       case Iop_Sar8x8: case Iop_Sar16x4: case Iop_Sar32x2:
3136       case Iop_Sal8x8: case Iop_Sal16x4: case Iop_Sal32x2: case Iop_Sal64x1:
3137       case Iop_QShl8x8: case Iop_QShl16x4: case Iop_QShl32x2: case Iop_QShl64x1:
3138       case Iop_QSal8x8: case Iop_QSal16x4: case Iop_QSal32x2: case Iop_QSal64x1:
3139       case Iop_RecipStep32Fx2:
3140       case Iop_RSqrtStep32Fx2:
3141          BINARY(Ity_I64,Ity_I64, Ity_I64);
3142
3143       case Iop_ShlN32x2: case Iop_ShlN16x4: case Iop_ShlN8x8:
3144       case Iop_ShrN32x2: case Iop_ShrN16x4: case Iop_ShrN8x8:
3145       case Iop_SarN32x2: case Iop_SarN16x4: case Iop_SarN8x8:
3146       case Iop_QShlNsatUU8x8:  case Iop_QShlNsatUU16x4:
3147       case Iop_QShlNsatUU32x2: case Iop_QShlNsatUU64x1:
3148       case Iop_QShlNsatSU8x8:  case Iop_QShlNsatSU16x4:
3149       case Iop_QShlNsatSU32x2: case Iop_QShlNsatSU64x1:
3150       case Iop_QShlNsatSS8x8:  case Iop_QShlNsatSS16x4:
3151       case Iop_QShlNsatSS32x2: case Iop_QShlNsatSS64x1:
3152          BINARY(Ity_I64,Ity_I8, Ity_I64);
3153
3154       case Iop_Shl8: case Iop_Shr8: case Iop_Sar8:
3155          BINARY(Ity_I8,Ity_I8, Ity_I8);
3156       case Iop_Shl16: case Iop_Shr16: case Iop_Sar16:
3157          BINARY(Ity_I16,Ity_I8, Ity_I16);
3158       case Iop_Shl32: case Iop_Shr32: case Iop_Sar32:
3159          BINARY(Ity_I32,Ity_I8, Ity_I32);
3160       case Iop_Shl64: case Iop_Shr64: case Iop_Sar64:
3161          BINARY(Ity_I64,Ity_I8, Ity_I64);
3162
3163       case Iop_Not8:
3164          UNARY(Ity_I8, Ity_I8);
3165       case Iop_Not16:
3166          UNARY(Ity_I16, Ity_I16);
3167       case Iop_Not32:
3168       case Iop_CmpNEZ16x2: case Iop_CmpNEZ8x4:
3169       case Iop_Reverse8sIn32_x1:
3170          UNARY(Ity_I32, Ity_I32);
3171
3172       case Iop_Not64:
3173       case Iop_CmpNEZ32x2: case Iop_CmpNEZ16x4: case Iop_CmpNEZ8x8:
3174       case Iop_Cnt8x8:
3175       case Iop_Clz8x8: case Iop_Clz16x4: case Iop_Clz32x2:
3176       case Iop_Cls8x8: case Iop_Cls16x4: case Iop_Cls32x2:
3177       case Iop_PwAddL8Ux8: case Iop_PwAddL16Ux4: case Iop_PwAddL32Ux2:
3178       case Iop_PwAddL8Sx8: case Iop_PwAddL16Sx4: case Iop_PwAddL32Sx2:
3179       case Iop_Reverse8sIn64_x1: case Iop_Reverse16sIn64_x1:
3180       case Iop_Reverse32sIn64_x1:
3181       case Iop_Reverse8sIn32_x2: case Iop_Reverse16sIn32_x2:
3182       case Iop_Reverse8sIn16_x4:
3183       case Iop_F32toI32Sx2_RZ: case Iop_F32toI32Ux2_RZ:
3184       case Iop_I32StoF32x2_DEP: case Iop_I32UtoF32x2_DEP:
3185       case Iop_RecipEst32Ux2: case Iop_RecipEst32Fx2:
3186       case Iop_Abs32Fx2:
3187       case Iop_RSqrtEst32Fx2:
3188       case Iop_RSqrtEst32Ux2:
3189       case Iop_Neg32Fx2:
3190       case Iop_Abs8x8: case Iop_Abs16x4: case Iop_Abs32x2:
3191          UNARY(Ity_I64, Ity_I64);
3192
3193       case Iop_CmpEQ8: case Iop_CmpNE8:
3194       case Iop_CasCmpEQ8: case Iop_CasCmpNE8: case Iop_ExpCmpNE8:
3195          COMPARISON(Ity_I8);
3196       case Iop_CmpEQ16: case Iop_CmpNE16:
3197       case Iop_CasCmpEQ16: case Iop_CasCmpNE16: case Iop_ExpCmpNE16:
3198          COMPARISON(Ity_I16);
3199       case Iop_CmpEQ32: case Iop_CmpNE32:
3200       case Iop_CasCmpEQ32: case Iop_CasCmpNE32: case Iop_ExpCmpNE32:
3201       case Iop_CmpLT32S: case Iop_CmpLE32S:
3202       case Iop_CmpLT32U: case Iop_CmpLE32U:
3203          COMPARISON(Ity_I32);
3204       case Iop_CmpEQ64: case Iop_CmpNE64:
3205       case Iop_CasCmpEQ64: case Iop_CasCmpNE64: case Iop_ExpCmpNE64:
3206       case Iop_CmpLT64S: case Iop_CmpLE64S:
3207       case Iop_CmpLT64U: case Iop_CmpLE64U:
3208          COMPARISON(Ity_I64);
3209
3210       case Iop_CmpNEZ8:  UNARY_COMPARISON(Ity_I8);
3211       case Iop_CmpNEZ16: UNARY_COMPARISON(Ity_I16);
3212       case Iop_CmpNEZ32: UNARY_COMPARISON(Ity_I32);
3213       case Iop_CmpNEZ64: UNARY_COMPARISON(Ity_I64);
3214
3215       case Iop_Left8:  UNARY(Ity_I8, Ity_I8);
3216       case Iop_Left16: UNARY(Ity_I16,Ity_I16);
3217       case Iop_CmpwNEZ32: case Iop_Left32: UNARY(Ity_I32,Ity_I32);
3218       case Iop_CmpwNEZ64: case Iop_Left64: UNARY(Ity_I64,Ity_I64);
3219
3220       case Iop_GetMSBs8x8:  UNARY(Ity_I64, Ity_I8);
3221       case Iop_GetMSBs8x16: UNARY(Ity_V128, Ity_I16);
3222
3223       case Iop_MullU8: case Iop_MullS8:
3224          BINARY(Ity_I8,Ity_I8, Ity_I16);
3225       case Iop_MullU16: case Iop_MullS16:
3226          BINARY(Ity_I16,Ity_I16, Ity_I32);
3227       case Iop_MullU32: case Iop_MullS32:
3228          BINARY(Ity_I32,Ity_I32, Ity_I64);
3229       case Iop_MullU64: case Iop_MullS64:
3230          BINARY(Ity_I64,Ity_I64, Ity_I128);
3231
3232       case Iop_Clz32: case Iop_Ctz32:
3233       case Iop_ClzNat32: case Iop_CtzNat32:
3234       case Iop_PopCount32:
3235          UNARY(Ity_I32, Ity_I32);
3236
3237       case Iop_Clz64: case Iop_Ctz64:
3238       case Iop_ClzNat64: case Iop_CtzNat64:
3239       case Iop_PopCount64:
3240          UNARY(Ity_I64, Ity_I64);
3241
3242       case Iop_DivU32: case Iop_DivS32: case Iop_DivU32E: case Iop_DivS32E:
3243          BINARY(Ity_I32,Ity_I32, Ity_I32);
3244
3245       case Iop_DivU64: case Iop_DivS64: case Iop_DivS64E: case Iop_DivU64E:
3246          BINARY(Ity_I64,Ity_I64, Ity_I64);
3247
3248       case Iop_DivModU64to32: case Iop_DivModS64to32:
3249          BINARY(Ity_I64, Ity_I32, Ity_I64);
3250
3251       case Iop_DivModU32to32: case Iop_DivModS32to32:
3252          BINARY(Ity_I32, Ity_I32, Ity_I64);
3253
3254       case Iop_DivModU128to64: case Iop_DivModS128to64:
3255          BINARY(Ity_I128,Ity_I64, Ity_I128);
3256
3257       case Iop_DivModU64to64: case Iop_DivModS64to64:
3258          BINARY(Ity_I64,Ity_I64, Ity_I128);
3259
3260       case Iop_16HIto8: case Iop_16to8:
3261          UNARY(Ity_I16, Ity_I8);
3262       case Iop_8HLto16:
3263          BINARY(Ity_I8,Ity_I8, Ity_I16);
3264
3265       case Iop_32HIto16: case Iop_32to16:
3266          UNARY(Ity_I32, Ity_I16);
3267       case Iop_16HLto32:
3268          BINARY(Ity_I16,Ity_I16, Ity_I32);
3269
3270       case Iop_64HIto32: case Iop_64to32:
3271          UNARY(Ity_I64, Ity_I32);
3272       case Iop_32HLto64:
3273          BINARY(Ity_I32,Ity_I32, Ity_I64);
3274
3275       case Iop_128HIto64: case Iop_128to64:
3276          UNARY(Ity_I128, Ity_I64);
3277       case Iop_64HLto128:
3278          BINARY(Ity_I64,Ity_I64, Ity_I128);
3279
3280       case Iop_Not1:
3281          UNARY(Ity_I1, Ity_I1);
3282       case Iop_And1:
3283       case Iop_Or1:
3284          BINARY(Ity_I1,Ity_I1, Ity_I1);
3285
3286       case Iop_1Uto8:  UNARY(Ity_I1, Ity_I8);
3287       case Iop_1Sto8:  UNARY(Ity_I1, Ity_I8);
3288       case Iop_1Sto16: UNARY(Ity_I1, Ity_I16);
3289       case Iop_1Uto32: case Iop_1Sto32: UNARY(Ity_I1, Ity_I32);
3290       case Iop_1Sto64: case Iop_1Uto64: UNARY(Ity_I1, Ity_I64);
3291       case Iop_32to1:  UNARY(Ity_I32, Ity_I1);
3292       case Iop_64to1:  UNARY(Ity_I64, Ity_I1);
3293
3294       case Iop_8Uto32: case Iop_8Sto32:
3295          UNARY(Ity_I8, Ity_I32);
3296
3297       case Iop_8Uto16: case Iop_8Sto16:
3298          UNARY(Ity_I8, Ity_I16);
3299
3300       case Iop_16Uto32: case Iop_16Sto32:
3301          UNARY(Ity_I16, Ity_I32);
3302
3303       case Iop_32Sto64: case Iop_32Uto64:
3304          UNARY(Ity_I32, Ity_I64);
3305
3306       case Iop_8Uto64: case Iop_8Sto64:
3307          UNARY(Ity_I8, Ity_I64);
3308
3309       case Iop_16Uto64: case Iop_16Sto64:
3310          UNARY(Ity_I16, Ity_I64);
3311       case Iop_64to16:
3312          UNARY(Ity_I64, Ity_I16);
3313
3314       case Iop_32to8: UNARY(Ity_I32, Ity_I8);
3315       case Iop_64to8: UNARY(Ity_I64, Ity_I8);
3316
3317       case Iop_AddF64:    case Iop_SubF64:
3318       case Iop_MulF64:    case Iop_DivF64:
3319       case Iop_AddF64r32: case Iop_SubF64r32:
3320       case Iop_MulF64r32: case Iop_DivF64r32:
3321          TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64);
3322
3323       case Iop_AddF32: case Iop_SubF32:
3324       case Iop_MulF32: case Iop_DivF32:
3325          TERNARY(ity_RMode,Ity_F32,Ity_F32, Ity_F32);
3326
3327       case Iop_NegF64: case Iop_AbsF64:
3328          UNARY(Ity_F64, Ity_F64);
3329
3330       case Iop_NegF32: case Iop_AbsF32:
3331          UNARY(Ity_F32, Ity_F32);
3332
3333       case Iop_SqrtF64:
3334       case Iop_RecpExpF64:
3335          BINARY(ity_RMode,Ity_F64, Ity_F64);
3336
3337       case Iop_SqrtF32:
3338       case Iop_RoundF32toInt:
3339       case Iop_RecpExpF32:
3340          BINARY(ity_RMode,Ity_F32, Ity_F32);
3341
3342       case Iop_MaxNumF64: case Iop_MinNumF64:
3343          BINARY(Ity_F64,Ity_F64, Ity_F64);
3344
3345       case Iop_MaxNumF32: case Iop_MinNumF32:
3346          BINARY(Ity_F32,Ity_F32, Ity_F32);
3347
3348      case Iop_CmpF32:
3349          BINARY(Ity_F32,Ity_F32, Ity_I32);
3350
3351       case Iop_CmpF64:
3352          BINARY(Ity_F64,Ity_F64, Ity_I32);
3353
3354       case Iop_CmpF128:
3355          BINARY(Ity_F128,Ity_F128, Ity_I32);
3356
3357       case Iop_F64toI16S: BINARY(ity_RMode,Ity_F64, Ity_I16);
3358       case Iop_F64toI32S: BINARY(ity_RMode,Ity_F64, Ity_I32);
3359       case Iop_F64toI64S: case Iop_F64toI64U:
3360          BINARY(ity_RMode,Ity_F64, Ity_I64);
3361
3362       case Iop_F64toI32U: BINARY(ity_RMode,Ity_F64, Ity_I32);
3363
3364       case Iop_I32StoF64: UNARY(Ity_I32, Ity_F64);
3365       case Iop_I64StoF64: BINARY(ity_RMode,Ity_I64, Ity_F64);
3366       case Iop_I64UtoF64: BINARY(ity_RMode,Ity_I64, Ity_F64);
3367       case Iop_I64UtoF32: BINARY(ity_RMode,Ity_I64, Ity_F32);
3368
3369       case Iop_I32UtoF64: UNARY(Ity_I32, Ity_F64);
3370
3371       case Iop_F32toI32S: BINARY(ity_RMode,Ity_F32, Ity_I32);
3372       case Iop_F32toI64S: BINARY(ity_RMode,Ity_F32, Ity_I64);
3373       case Iop_F32toI32U: BINARY(ity_RMode,Ity_F32, Ity_I32);
3374       case Iop_F32toI64U: BINARY(ity_RMode,Ity_F32, Ity_I64);
3375
3376       case Iop_I32UtoF32: BINARY(ity_RMode,Ity_I32, Ity_F32);
3377       case Iop_I32StoF32: BINARY(ity_RMode,Ity_I32, Ity_F32);
3378       case Iop_I64StoF32: BINARY(ity_RMode,Ity_I64, Ity_F32);
3379
3380       case Iop_F32toF64: UNARY(Ity_F32, Ity_F64);
3381       case Iop_F16toF64: UNARY(Ity_F16, Ity_F64);
3382       case Iop_F16toF32: UNARY(Ity_F16, Ity_F32);
3383
3384       case Iop_F64toF32: BINARY(ity_RMode,Ity_F64, Ity_F32);
3385       case Iop_F64toF16: BINARY(ity_RMode,Ity_F64, Ity_F16);
3386       case Iop_F32toF16: BINARY(ity_RMode,Ity_F32, Ity_F16);
3387
3388       case Iop_ReinterpI64asF64: UNARY(Ity_I64, Ity_F64);
3389       case Iop_ReinterpF64asI64: UNARY(Ity_F64, Ity_I64);
3390       case Iop_ReinterpI32asF32: UNARY(Ity_I32, Ity_F32);
3391       case Iop_ReinterpF32asI32: UNARY(Ity_F32, Ity_I32);
3392
3393       case Iop_AtanF64: case Iop_Yl2xF64:  case Iop_Yl2xp1F64:
3394       case Iop_ScaleF64: case Iop_PRemF64: case Iop_PRem1F64:
3395          TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_F64);
3396
3397       case Iop_PRemC3210F64: case Iop_PRem1C3210F64:
3398          TERNARY(ity_RMode,Ity_F64,Ity_F64, Ity_I32);
3399
3400       case Iop_SinF64: case Iop_CosF64: case Iop_TanF64:
3401       case Iop_2xm1F64:
3402       case Iop_RoundF64toInt: BINARY(ity_RMode,Ity_F64, Ity_F64);
3403
3404       case Iop_MAddF64: case Iop_MSubF64:
3405       case Iop_MAddF64r32: case Iop_MSubF64r32:
3406          QUATERNARY(ity_RMode,Ity_F64,Ity_F64,Ity_F64, Ity_F64);
3407
3408       case Iop_RSqrtEst5GoodF64:
3409       case Iop_RoundF64toF64_NEAREST: case Iop_RoundF64toF64_NegINF:
3410       case Iop_RoundF64toF64_PosINF: case Iop_RoundF64toF64_ZERO:
3411          UNARY(Ity_F64, Ity_F64);
3412       case Iop_RoundF64toF32:
3413          BINARY(ity_RMode,Ity_F64, Ity_F64);
3414       case Iop_TruncF64asF32:
3415          UNARY(Ity_F64, Ity_F32);
3416
3417       case Iop_I32UtoF32x4_DEP:
3418       case Iop_I32StoF32x4_DEP:
3419       case Iop_QF32toI32Ux4_RZ:
3420       case Iop_QF32toI32Sx4_RZ:
3421       case Iop_F32toI32Ux4_RZ:
3422       case Iop_F32toI32Sx4_RZ:
3423       case Iop_RoundF32x4_RM:
3424       case Iop_RoundF32x4_RP:
3425       case Iop_RoundF32x4_RN:
3426       case Iop_RoundF32x4_RZ:
3427       case Iop_Abs64Fx2: case Iop_Abs32Fx4:
3428       case Iop_RSqrtEst32Fx4:
3429       case Iop_RSqrtEst32Ux4:
3430          UNARY(Ity_V128, Ity_V128);
3431
3432       case Iop_Sqrt64Fx2:
3433       case Iop_Sqrt32Fx4:
3434       case Iop_I32StoF32x4:
3435       case Iop_F32toI32Sx4:
3436          BINARY(ity_RMode,Ity_V128, Ity_V128);
3437
3438       case Iop_F32toF16x4:
3439          BINARY(ity_RMode,Ity_V128, Ity_I64);
3440
3441       case Iop_64HLtoV128:
3442          BINARY(Ity_I64,Ity_I64, Ity_V128);
3443
3444       case Iop_Scale2_32Fx4:
3445       case Iop_Scale2_64Fx2:
3446          TERNARY(ity_RMode,Ity_V128,Ity_V128, Ity_V128);
3447       case Iop_Log2_32Fx4:
3448       case Iop_Log2_64Fx2:
3449       case Iop_Exp2_32Fx4:
3450          UNARY(Ity_V128, Ity_V128);
3451
3452       case Iop_V128to64: case Iop_V128HIto64:
3453       case Iop_NarrowUn16to8x8:
3454       case Iop_NarrowUn32to16x4:
3455       case Iop_NarrowUn64to32x2:
3456       case Iop_QNarrowUn16Uto8Ux8:
3457       case Iop_QNarrowUn32Uto16Ux4:
3458       case Iop_QNarrowUn64Uto32Ux2:
3459       case Iop_QNarrowUn16Sto8Sx8:
3460       case Iop_QNarrowUn32Sto16Sx4:
3461       case Iop_QNarrowUn64Sto32Sx2:
3462       case Iop_QNarrowUn16Sto8Ux8:
3463       case Iop_QNarrowUn32Sto16Ux4:
3464       case Iop_QNarrowUn64Sto32Ux2:
3465       case Iop_F32toF16x4_DEP:
3466          UNARY(Ity_V128, Ity_I64);
3467
3468       case Iop_Widen8Uto16x8:
3469       case Iop_Widen16Uto32x4:
3470       case Iop_Widen32Uto64x2:
3471       case Iop_Widen8Sto16x8:
3472       case Iop_Widen16Sto32x4:
3473       case Iop_Widen32Sto64x2:
3474       case Iop_F16toF32x4:
3475          UNARY(Ity_I64, Ity_V128);
3476
3477       case Iop_V128to32:    UNARY(Ity_V128, Ity_I32);
3478       case Iop_32UtoV128:   UNARY(Ity_I32, Ity_V128);
3479       case Iop_64UtoV128:   UNARY(Ity_I64, Ity_V128);
3480       case Iop_SetV128lo32: BINARY(Ity_V128,Ity_I32, Ity_V128);
3481       case Iop_SetV128lo64: BINARY(Ity_V128,Ity_I64, Ity_V128);
3482
3483       case Iop_Dup8x16: UNARY(Ity_I8, Ity_V128);
3484       case Iop_Dup16x8: UNARY(Ity_I16, Ity_V128);
3485       case Iop_Dup32x4: UNARY(Ity_I32, Ity_V128);
3486       case Iop_Dup8x8:  UNARY(Ity_I8, Ity_I64);
3487       case Iop_Dup16x4: UNARY(Ity_I16, Ity_I64);
3488       case Iop_Dup32x2: UNARY(Ity_I32, Ity_I64);
3489
3490       case Iop_CmpEQ32Fx4: case Iop_CmpLT32Fx4:
3491       case Iop_CmpEQ64Fx2: case Iop_CmpLT64Fx2:
3492       case Iop_CmpLE32Fx4: case Iop_CmpUN32Fx4:
3493       case Iop_CmpLE64Fx2: case Iop_CmpUN64Fx2:
3494       case Iop_CmpGT32Fx4: case Iop_CmpGE32Fx4:
3495       case Iop_CmpEQ32F0x4: case Iop_CmpLT32F0x4:
3496       case Iop_CmpEQ64F0x2: case Iop_CmpLT64F0x2:
3497       case Iop_CmpLE32F0x4: case Iop_CmpUN32F0x4:
3498       case Iop_CmpLE64F0x2: case Iop_CmpUN64F0x2:
3499       case Iop_Add32F0x4:
3500       case Iop_Add64F0x2:
3501       case Iop_Div32F0x4:
3502       case Iop_Div64F0x2:
3503       case Iop_Max32Fx4: case Iop_Max32F0x4:
3504       case Iop_PwMax32Fx4: case Iop_PwMin32Fx4:
3505       case Iop_Max64Fx2: case Iop_Max64F0x2:
3506       case Iop_Min32Fx4: case Iop_Min32F0x4:
3507       case Iop_Min64Fx2: case Iop_Min64F0x2:
3508       case Iop_Mul32F0x4:
3509       case Iop_Mul64F0x2:
3510       case Iop_Sub32F0x4:
3511       case Iop_Sub64F0x2:
3512       case Iop_AndV128: case Iop_OrV128: case Iop_XorV128:
3513       case Iop_Add8x16:   case Iop_Add16x8:
3514       case Iop_Add32x4:   case Iop_Add64x2: case Iop_Add128x1:
3515       case Iop_QAdd8Ux16: case Iop_QAdd16Ux8:
3516       case Iop_QAdd32Ux4: case Iop_QAdd64Ux2:
3517       case Iop_QAdd8Sx16: case Iop_QAdd16Sx8:
3518       case Iop_QAdd32Sx4: case Iop_QAdd64Sx2:
3519       case Iop_QAddExtUSsatSS8x16: case Iop_QAddExtUSsatSS16x8:
3520       case Iop_QAddExtUSsatSS32x4: case Iop_QAddExtUSsatSS64x2:
3521       case Iop_QAddExtSUsatUU8x16: case Iop_QAddExtSUsatUU16x8:
3522       case Iop_QAddExtSUsatUU32x4: case Iop_QAddExtSUsatUU64x2:
3523       case Iop_PwAdd8x16: case Iop_PwAdd16x8: case Iop_PwAdd32x4:
3524       case Iop_Sub8x16:   case Iop_Sub16x8:
3525       case Iop_Sub32x4:   case Iop_Sub64x2: case Iop_Sub128x1:
3526       case Iop_QSub8Ux16: case Iop_QSub16Ux8:
3527       case Iop_QSub32Ux4: case Iop_QSub64Ux2:
3528       case Iop_QSub8Sx16: case Iop_QSub16Sx8:
3529       case Iop_QSub32Sx4: case Iop_QSub64Sx2:
3530       case Iop_Mul8x16: case Iop_Mul16x8: case Iop_Mul32x4:
3531       case Iop_PolynomialMul8x16:
3532       case Iop_PolynomialMulAdd8x16: case Iop_PolynomialMulAdd16x8:
3533       case Iop_PolynomialMulAdd32x4: case Iop_PolynomialMulAdd64x2:
3534       case Iop_MulHi8Ux16: case Iop_MulHi16Ux8: case Iop_MulHi32Ux4:
3535       case Iop_MulHi8Sx16: case Iop_MulHi16Sx8: case Iop_MulHi32Sx4:
3536       case Iop_QDMulHi16Sx8: case Iop_QDMulHi32Sx4:
3537       case Iop_QRDMulHi16Sx8: case Iop_QRDMulHi32Sx4:
3538       case Iop_MullEven8Ux16: case Iop_MullEven16Ux8: case Iop_MullEven32Ux4:
3539       case Iop_MullEven8Sx16: case Iop_MullEven16Sx8: case Iop_MullEven32Sx4:
3540       case Iop_Avg8Ux16: case Iop_Avg16Ux8: case Iop_Avg32Ux4: case Iop_Avg64Ux2:
3541       case Iop_Avg8Sx16: case Iop_Avg16Sx8: case Iop_Avg32Sx4: case Iop_Avg64Sx2:
3542       case Iop_Max8Sx16: case Iop_Max16Sx8: case Iop_Max32Sx4:
3543       case Iop_Max64Sx2:
3544       case Iop_Max8Ux16: case Iop_Max16Ux8: case Iop_Max32Ux4:
3545       case Iop_Max64Ux2:
3546       case Iop_Min8Sx16: case Iop_Min16Sx8: case Iop_Min32Sx4:
3547       case Iop_Min64Sx2:
3548       case Iop_Min8Ux16: case Iop_Min16Ux8: case Iop_Min32Ux4:
3549       case Iop_Min64Ux2:
3550       case Iop_CmpEQ8x16:  case Iop_CmpEQ16x8:  case Iop_CmpEQ32x4:
3551       case Iop_CmpEQ64x2:
3552       case Iop_CmpGT8Sx16: case Iop_CmpGT16Sx8: case Iop_CmpGT32Sx4:
3553       case Iop_CmpGT64Sx2:
3554       case Iop_CmpGT8Ux16: case Iop_CmpGT16Ux8: case Iop_CmpGT32Ux4:
3555       case Iop_CmpGT64Ux2:
3556       case Iop_Shl8x16: case Iop_Shl16x8: case Iop_Shl32x4: case Iop_Shl64x2:
3557       case Iop_QShl8x16: case Iop_QShl16x8:
3558       case Iop_QShl32x4: case Iop_QShl64x2:
3559       case Iop_QSal8x16: case Iop_QSal16x8:
3560       case Iop_QSal32x4: case Iop_QSal64x2:
3561       case Iop_Shr8x16: case Iop_Shr16x8: case Iop_Shr32x4: case Iop_Shr64x2:
3562       case Iop_Sar8x16: case Iop_Sar16x8: case Iop_Sar32x4: case Iop_Sar64x2:
3563       case Iop_Sal8x16: case Iop_Sal16x8: case Iop_Sal32x4: case Iop_Sal64x2:
3564       case Iop_Rol8x16: case Iop_Rol16x8: case Iop_Rol32x4:case Iop_Rol64x2:
3565       case Iop_QNarrowBin16Sto8Ux16: case Iop_QNarrowBin32Sto16Ux8:
3566       case Iop_QNarrowBin16Sto8Sx16: case Iop_QNarrowBin32Sto16Sx8:
3567       case Iop_QNarrowBin16Uto8Ux16: case Iop_QNarrowBin32Uto16Ux8:
3568       case Iop_QNarrowBin64Sto32Sx4: case Iop_QNarrowBin64Uto32Ux4:
3569       case Iop_NarrowBin16to8x16:   case Iop_NarrowBin32to16x8:
3570       case Iop_NarrowBin64to32x4:
3571       case Iop_InterleaveHI8x16: case Iop_InterleaveHI16x8:
3572       case Iop_InterleaveHI32x4: case Iop_InterleaveHI64x2:
3573       case Iop_InterleaveLO8x16: case Iop_InterleaveLO16x8:
3574       case Iop_InterleaveLO32x4: case Iop_InterleaveLO64x2:
3575       case Iop_CatOddLanes8x16: case Iop_CatEvenLanes8x16:
3576       case Iop_CatOddLanes16x8: case Iop_CatEvenLanes16x8:
3577       case Iop_CatOddLanes32x4: case Iop_CatEvenLanes32x4:
3578       case Iop_InterleaveOddLanes8x16: case Iop_InterleaveEvenLanes8x16:
3579       case Iop_InterleaveOddLanes16x8: case Iop_InterleaveEvenLanes16x8:
3580       case Iop_InterleaveOddLanes32x4: case Iop_InterleaveEvenLanes32x4:
3581       case Iop_PackOddLanes8x16: case Iop_PackEvenLanes8x16:
3582       case Iop_PackOddLanes16x8: case Iop_PackEvenLanes16x8:
3583       case Iop_PackOddLanes32x4: case Iop_PackEvenLanes32x4:
3584       case Iop_Perm8x16: case Iop_PermOrZero8x16:
3585       case Iop_Perm32x4:
3586       case Iop_RecipStep32Fx4: case Iop_RecipStep64Fx2:
3587       case Iop_RSqrtStep32Fx4: case Iop_RSqrtStep64Fx2:
3588       case Iop_CipherV128:
3589       case Iop_CipherLV128:
3590       case Iop_NCipherV128:
3591       case Iop_NCipherLV128:
3592       case Iop_Sh8Sx16: case Iop_Sh16Sx8:
3593       case Iop_Sh32Sx4: case Iop_Sh64Sx2:
3594       case Iop_Sh8Ux16: case Iop_Sh16Ux8:
3595       case Iop_Sh32Ux4: case Iop_Sh64Ux2:
3596       case Iop_Rsh8Sx16: case Iop_Rsh16Sx8:
3597       case Iop_Rsh32Sx4: case Iop_Rsh64Sx2:
3598       case Iop_Rsh8Ux16: case Iop_Rsh16Ux8:
3599       case Iop_Rsh32Ux4: case Iop_Rsh64Ux2:
3600       case Iop_MulI128by10E:
3601       case Iop_MulI128by10ECarry:
3602       case Iop_PwExtUSMulQAdd8x16:
3603          BINARY(Ity_V128,Ity_V128, Ity_V128);
3604
3605       case Iop_Perm8x16x2:
3606          TERNARY(Ity_V128, Ity_V128, Ity_V128, Ity_V128);
3607
3608       case Iop_PolynomialMull8x8:
3609       case Iop_Mull8Ux8: case Iop_Mull8Sx8:
3610       case Iop_Mull16Ux4: case Iop_Mull16Sx4:
3611       case Iop_Mull32Ux2: case Iop_Mull32Sx2:
3612          BINARY(Ity_I64, Ity_I64, Ity_V128);
3613
3614       case Iop_NotV128:
3615       case Iop_RecipEst32Fx4: case Iop_RecipEst32F0x4:
3616       case Iop_RecipEst64Fx2: case Iop_RSqrtEst64Fx2:
3617       case Iop_RecipEst32Ux4:
3618       case Iop_RSqrtEst32F0x4:
3619       case Iop_Sqrt32F0x4:
3620       case Iop_Sqrt64F0x2:
3621       case Iop_CmpNEZ8x16: case Iop_CmpNEZ16x8:
3622       case Iop_CmpNEZ32x4: case Iop_CmpNEZ64x2: case Iop_CmpNEZ128x1:
3623       case Iop_Cnt8x16:
3624       case Iop_Clz8x16: case Iop_Clz16x8: case Iop_Clz32x4: case Iop_Clz64x2:
3625       case Iop_Cls8x16: case Iop_Cls16x8: case Iop_Cls32x4:
3626       case Iop_PwAddL8Ux16: case Iop_PwAddL16Ux8: case Iop_PwAddL32Ux4:
3627       case Iop_PwAddL64Ux2:
3628       case Iop_PwAddL8Sx16: case Iop_PwAddL16Sx8: case Iop_PwAddL32Sx4:
3629       case Iop_Reverse8sIn64_x2: case Iop_Reverse16sIn64_x2:
3630       case Iop_Reverse32sIn64_x2:
3631       case Iop_Reverse8sIn32_x4: case Iop_Reverse16sIn32_x4:
3632       case Iop_Reverse8sIn16_x8:
3633       case Iop_Reverse1sIn8_x16:
3634       case Iop_Neg64Fx2: case Iop_Neg32Fx4:
3635       case Iop_Abs8x16: case Iop_Abs16x8: case Iop_Abs32x4: case Iop_Abs64x2:
3636       case Iop_CipherSV128:
3637       case Iop_PwBitMtxXpose64x2:
3638       case Iop_ZeroHI64ofV128:  case Iop_ZeroHI96ofV128:
3639       case Iop_ZeroHI112ofV128: case Iop_ZeroHI120ofV128:
3640       case Iop_F16toF64x2:
3641       case Iop_F64toF16x2_DEP:
3642       case Iop_MulI128by10:
3643       case Iop_MulI128by10Carry:
3644       case Iop_Ctz8x16: case Iop_Ctz16x8:
3645       case Iop_Ctz32x4: case Iop_Ctz64x2:
3646       case Iop_BCD128toI128S:
3647          UNARY(Ity_V128, Ity_V128);
3648
3649       case Iop_ShlV128: case Iop_ShrV128: case Iop_SarV128:
3650       case Iop_ShlN8x16: case Iop_ShlN16x8:
3651       case Iop_ShlN32x4: case Iop_ShlN64x2:
3652       case Iop_ShrN8x16: case Iop_ShrN16x8:
3653       case Iop_ShrN32x4: case Iop_ShrN64x2:
3654       case Iop_SarN8x16: case Iop_SarN16x8:
3655       case Iop_SarN32x4: case Iop_SarN64x2:
3656       case Iop_QShlNsatUU8x16: case Iop_QShlNsatUU16x8:
3657       case Iop_QShlNsatUU32x4: case Iop_QShlNsatUU64x2:
3658       case Iop_QShlNsatSU8x16: case Iop_QShlNsatSU16x8:
3659       case Iop_QShlNsatSU32x4: case Iop_QShlNsatSU64x2:
3660       case Iop_QShlNsatSS8x16: case Iop_QShlNsatSS16x8:
3661       case Iop_QShlNsatSS32x4: case Iop_QShlNsatSS64x2:
3662       case Iop_SHA256:    case Iop_SHA512:
3663       case Iop_QandQShrNnarrow16Uto8Ux8:
3664       case Iop_QandQShrNnarrow32Uto16Ux4:
3665       case Iop_QandQShrNnarrow64Uto32Ux2:
3666       case Iop_QandQSarNnarrow16Sto8Sx8:
3667       case Iop_QandQSarNnarrow32Sto16Sx4:
3668       case Iop_QandQSarNnarrow64Sto32Sx2:
3669       case Iop_QandQSarNnarrow16Sto8Ux8:
3670       case Iop_QandQSarNnarrow32Sto16Ux4:
3671       case Iop_QandQSarNnarrow64Sto32Ux2:
3672       case Iop_QandQRShrNnarrow16Uto8Ux8:
3673       case Iop_QandQRShrNnarrow32Uto16Ux4:
3674       case Iop_QandQRShrNnarrow64Uto32Ux2:
3675       case Iop_QandQRSarNnarrow16Sto8Sx8:
3676       case Iop_QandQRSarNnarrow32Sto16Sx4:
3677       case Iop_QandQRSarNnarrow64Sto32Sx2:
3678       case Iop_QandQRSarNnarrow16Sto8Ux8:
3679       case Iop_QandQRSarNnarrow32Sto16Ux4:
3680       case Iop_QandQRSarNnarrow64Sto32Ux2:
3681       case Iop_I128StoBCD128:
3682          BINARY(Ity_V128, Ity_I8, Ity_V128);
3683
3684       case Iop_F32ToFixed32Ux4_RZ:
3685       case Iop_F32ToFixed32Sx4_RZ:
3686       case Iop_Fixed32UToF32x4_RN:
3687       case Iop_Fixed32SToF32x4_RN:
3688          BINARY(Ity_V128, Ity_I8, Ity_V128);
3689
3690       case Iop_F32ToFixed32Ux2_RZ:
3691       case Iop_F32ToFixed32Sx2_RZ:
3692       case Iop_Fixed32UToF32x2_RN:
3693       case Iop_Fixed32SToF32x2_RN:
3694          BINARY(Ity_I64, Ity_I8, Ity_I64);
3695
3696       case Iop_GetElem8x16:
3697          BINARY(Ity_V128, Ity_I8, Ity_I8);
3698       case Iop_GetElem16x8:
3699          BINARY(Ity_V128, Ity_I8, Ity_I16);
3700       case Iop_GetElem32x4:
3701          BINARY(Ity_V128, Ity_I8, Ity_I32);
3702       case Iop_GetElem64x2:
3703          BINARY(Ity_V128, Ity_I8, Ity_I64);
3704       case Iop_SetElem8x16:
3705          TERNARY(Ity_V128, Ity_I8, Ity_I8, Ity_V128);
3706       case Iop_SetElem16x8:
3707          TERNARY(Ity_V128, Ity_I8, Ity_I16, Ity_V128);
3708       case Iop_SetElem32x4:
3709          TERNARY(Ity_V128, Ity_I8, Ity_I32, Ity_V128);
3710       case Iop_SetElem64x2:
3711          TERNARY(Ity_V128, Ity_I8, Ity_I64, Ity_V128);
3712       case Iop_GetElem8x8:
3713          BINARY(Ity_I64, Ity_I8, Ity_I8);
3714       case Iop_GetElem16x4:
3715          BINARY(Ity_I64, Ity_I8, Ity_I16);
3716       case Iop_GetElem32x2:
3717          BINARY(Ity_I64, Ity_I8, Ity_I32);
3718       case Iop_SetElem8x8:
3719          TERNARY(Ity_I64, Ity_I8, Ity_I8, Ity_I64);
3720       case Iop_SetElem16x4:
3721          TERNARY(Ity_I64, Ity_I8, Ity_I16, Ity_I64);
3722       case Iop_SetElem32x2:
3723          TERNARY(Ity_I64, Ity_I8, Ity_I32, Ity_I64);
3724
3725       case Iop_Slice64:
3726          TERNARY(Ity_I64, Ity_I64, Ity_I8, Ity_I64);
3727       case Iop_SliceV128:
3728          TERNARY(Ity_V128, Ity_V128, Ity_I8, Ity_V128);
3729
3730       case Iop_BCDAdd:
3731       case Iop_BCDSub:
3732          BINARY(Ity_V128, Ity_V128, Ity_V128);
3733
3734       case Iop_QDMull16Sx4: case Iop_QDMull32Sx2:
3735          BINARY(Ity_I64, Ity_I64, Ity_V128);
3736
3737       /* s390 specific */
3738       case Iop_MAddF32:
3739       case Iop_MSubF32:
3740          QUATERNARY(ity_RMode,Ity_F32,Ity_F32,Ity_F32, Ity_F32);
3741
3742       case Iop_F64HLtoF128:
3743         BINARY(Ity_F64,Ity_F64, Ity_F128);
3744
3745       case Iop_F128HItoF64:
3746       case Iop_F128LOtoF64:
3747         UNARY(Ity_F128, Ity_F64);
3748
3749       case Iop_AddF128:
3750       case Iop_SubF128:
3751       case Iop_MulF128:
3752       case Iop_DivF128:
3753          TERNARY(ity_RMode,Ity_F128,Ity_F128, Ity_F128);
3754
3755       case Iop_MAddF128:
3756       case Iop_MSubF128:
3757       case Iop_NegMAddF128:
3758       case Iop_NegMSubF128:
3759          QUATERNARY(ity_RMode,Ity_F128,Ity_F128,Ity_F128, Ity_F128);
3760
3761       case Iop_Add64Fx2: case Iop_Sub64Fx2:
3762       case Iop_Mul64Fx2: case Iop_Div64Fx2:
3763       case Iop_Add32Fx4: case Iop_Sub32Fx4:
3764       case Iop_Mul32Fx4: case Iop_Div32Fx4:
3765       case Iop_F64x2_2toQ32x4: case Iop_F32x4_2toQ16x8:
3766          TERNARY(ity_RMode,Ity_V128,Ity_V128, Ity_V128);
3767
3768       case Iop_Add64Fx4: case Iop_Sub64Fx4:
3769       case Iop_Mul64Fx4: case Iop_Div64Fx4:
3770       case Iop_Add32Fx8: case Iop_Sub32Fx8:
3771       case Iop_Mul32Fx8: case Iop_Div32Fx8:
3772          TERNARY(ity_RMode,Ity_V256,Ity_V256, Ity_V256);
3773
3774       case Iop_NegF128:
3775       case Iop_AbsF128:
3776          UNARY(Ity_F128, Ity_F128);
3777
3778       case Iop_SqrtF128:
3779       case Iop_RoundF128toInt:
3780          BINARY(ity_RMode,Ity_F128, Ity_F128);
3781
3782       case Iop_I32StoF128: UNARY(Ity_I32, Ity_F128);
3783       case Iop_I64StoF128: UNARY(Ity_I64, Ity_F128);
3784
3785       case Iop_I32UtoF128: UNARY(Ity_I32, Ity_F128);
3786       case Iop_I64UtoF128: UNARY(Ity_I64, Ity_F128);
3787
3788       case Iop_F128toI32S: BINARY(ity_RMode,Ity_F128, Ity_I32);
3789       case Iop_F128toI64S: BINARY(ity_RMode,Ity_F128, Ity_I64);
3790
3791       case Iop_F128toI32U: BINARY(ity_RMode,Ity_F128, Ity_I32);
3792       case Iop_F128toI64U: BINARY(ity_RMode,Ity_F128, Ity_I64);
3793
3794       case Iop_F32toF128: UNARY(Ity_F32, Ity_F128);
3795       case Iop_F64toF128: UNARY(Ity_F64, Ity_F128);
3796
3797       case Iop_F128toF32: BINARY(ity_RMode,Ity_F128, Ity_F32);
3798       case Iop_F128toF64: BINARY(ity_RMode,Ity_F128, Ity_F64);
3799
3800       case Iop_TruncF128toI32S:
3801       case Iop_TruncF128toI64S:
3802       case Iop_TruncF128toI32U:
3803       case Iop_TruncF128toI64U:
3804          UNARY(Ity_F128, Ity_F128);
3805
3806       case Iop_F128toI128S:
3807       case Iop_RndF128:
3808          BINARY(ity_RMode,Ity_F128, Ity_F128);
3809
3810       case Iop_D32toD64:
3811          UNARY(Ity_D32, Ity_D64);
3812
3813       case Iop_ExtractExpD64:
3814          UNARY(Ity_D64, Ity_I64);
3815
3816       case Iop_ExtractSigD64:
3817          UNARY(Ity_D64, Ity_I64);
3818
3819       case Iop_InsertExpD64:
3820          BINARY(Ity_I64,Ity_D64, Ity_D64);
3821
3822       case Iop_ExtractExpD128:
3823          UNARY(Ity_D128, Ity_I64);
3824
3825       case Iop_ExtractSigD128:
3826         UNARY(Ity_D128, Ity_I64);
3827
3828       case Iop_InsertExpD128:
3829          BINARY(Ity_I64,Ity_D128, Ity_D128);
3830
3831       case Iop_D64toD128:
3832          UNARY(Ity_D64, Ity_D128);
3833
3834       case Iop_ReinterpD64asI64:
3835         UNARY(Ity_D64, Ity_I64);
3836
3837       case Iop_ReinterpI64asD64:
3838          UNARY(Ity_I64, Ity_D64);
3839
3840       case Iop_RoundD64toInt:
3841          BINARY(ity_RMode,Ity_D64, Ity_D64);
3842
3843       case Iop_RoundD128toInt:
3844          BINARY(ity_RMode,Ity_D128, Ity_D128);
3845
3846       case Iop_I32StoD128:
3847       case Iop_I32UtoD128:
3848          UNARY(Ity_I32, Ity_D128);
3849
3850       case Iop_I64StoD128:
3851          UNARY(Ity_I64, Ity_D128);
3852
3853       case Iop_I64UtoD128:
3854          UNARY(Ity_I64, Ity_D128);
3855
3856       case Iop_DPBtoBCD:
3857       case Iop_BCDtoDPB:
3858          UNARY(Ity_I64, Ity_I64);
3859
3860       case Iop_D128HItoD64:
3861       case Iop_D128LOtoD64:
3862          UNARY(Ity_D128, Ity_D64);
3863
3864       case Iop_D128toI64S:
3865          BINARY(ity_RMode, Ity_D128, Ity_I64);
3866
3867       case Iop_D128toI64U:
3868          BINARY(ity_RMode, Ity_D128, Ity_I64);
3869
3870       case Iop_D128toI32S:
3871       case Iop_D128toI32U:
3872          BINARY(ity_RMode, Ity_D128, Ity_I32);
3873
3874       case Iop_D64HLtoD128:
3875          BINARY(Ity_D64, Ity_D64, Ity_D128);
3876
3877       case Iop_ShlD64:
3878       case Iop_ShrD64:
3879          BINARY(Ity_D64, Ity_I8, Ity_D64 );
3880
3881       case Iop_D64toD32:
3882          BINARY(ity_RMode, Ity_D64, Ity_D32);
3883
3884       case Iop_D64toI32S:
3885       case Iop_D64toI32U:
3886          BINARY(ity_RMode, Ity_D64, Ity_I32);
3887
3888       case Iop_D64toI64S:
3889          BINARY(ity_RMode, Ity_D64, Ity_I64);
3890
3891       case Iop_D64toI64U:
3892          BINARY(ity_RMode, Ity_D64, Ity_I64);
3893
3894       case Iop_I32StoD64:
3895       case Iop_I32UtoD64:
3896          UNARY(Ity_I32, Ity_D64);
3897
3898       case Iop_I64StoD64:
3899          BINARY(ity_RMode, Ity_I64, Ity_D64);
3900
3901       case Iop_I64UtoD64:
3902          BINARY(ity_RMode, Ity_I64, Ity_D64);
3903
3904       case Iop_F32toD32:
3905          BINARY(ity_RMode, Ity_F32, Ity_D32);
3906
3907       case Iop_F32toD64:
3908          BINARY(ity_RMode, Ity_F32, Ity_D64);
3909
3910       case Iop_F32toD128:
3911          BINARY(ity_RMode, Ity_F32, Ity_D128);
3912
3913       case Iop_F64toD32:
3914          BINARY(ity_RMode, Ity_F64, Ity_D32);
3915
3916       case Iop_F64toD64:
3917          BINARY(ity_RMode, Ity_F64, Ity_D64);
3918
3919       case Iop_F64toD128:
3920          BINARY(ity_RMode, Ity_F64, Ity_D128);
3921
3922       case Iop_F128toD32:
3923          BINARY(ity_RMode, Ity_F128, Ity_D32);
3924
3925       case Iop_F128toD64:
3926          BINARY(ity_RMode, Ity_F128, Ity_D64);
3927
3928       case Iop_F128toD128:
3929          BINARY(ity_RMode, Ity_F128, Ity_D128);
3930
3931       case Iop_D32toF32:
3932          BINARY(ity_RMode, Ity_D32, Ity_F32);
3933
3934       case Iop_D32toF64:
3935          BINARY(ity_RMode, Ity_D32, Ity_F64);
3936
3937       case Iop_D32toF128:
3938          BINARY(ity_RMode, Ity_D32, Ity_F128);
3939
3940       case Iop_D64toF32:
3941          BINARY(ity_RMode, Ity_D64, Ity_F32);
3942
3943       case Iop_D64toF64:
3944          BINARY(ity_RMode, Ity_D64, Ity_F64);
3945
3946       case Iop_D64toF128:
3947          BINARY(ity_RMode, Ity_D64, Ity_F128);
3948
3949       case Iop_D128toF32:
3950          BINARY(ity_RMode, Ity_D128, Ity_F32);
3951
3952       case Iop_D128toF64:
3953          BINARY(ity_RMode, Ity_D128, Ity_F64);
3954
3955       case Iop_D128toF128:
3956          BINARY(ity_RMode, Ity_D128, Ity_F128);
3957
3958       case Iop_CmpD64:
3959       case Iop_CmpExpD64:
3960          BINARY(Ity_D64,Ity_D64, Ity_I32);
3961
3962       case Iop_CmpD128:
3963       case Iop_CmpExpD128:
3964          BINARY(Ity_D128,Ity_D128, Ity_I32);
3965
3966       case Iop_QuantizeD64:
3967          TERNARY(ity_RMode,Ity_D64,Ity_D64, Ity_D64);
3968
3969       case Iop_SignificanceRoundD64:
3970          TERNARY(ity_RMode, Ity_I8,Ity_D64, Ity_D64);
3971
3972       case Iop_QuantizeD128:
3973          TERNARY(ity_RMode,Ity_D128,Ity_D128, Ity_D128);
3974
3975       case Iop_SignificanceRoundD128:
3976          TERNARY(ity_RMode, Ity_I8,Ity_D128, Ity_D128);
3977
3978       case Iop_ShlD128:
3979       case Iop_ShrD128:
3980          BINARY(Ity_D128, Ity_I8, Ity_D128 );
3981
3982       case Iop_AddD64:
3983       case Iop_SubD64:
3984       case Iop_MulD64:
3985       case Iop_DivD64:
3986          TERNARY( ity_RMode, Ity_D64, Ity_D64, Ity_D64 );
3987
3988       case Iop_D128toD64:
3989          BINARY( ity_RMode, Ity_D128, Ity_D64 );
3990
3991       case Iop_AddD128:
3992       case Iop_SubD128:
3993       case Iop_MulD128:
3994       case Iop_DivD128:
3995          TERNARY(ity_RMode,Ity_D128,Ity_D128, Ity_D128);
3996
3997       case Iop_V256to64_0: case Iop_V256to64_1:
3998       case Iop_V256to64_2: case Iop_V256to64_3:
3999          UNARY(Ity_V256, Ity_I64);
4000
4001       case Iop_64x4toV256:
4002          QUATERNARY(Ity_I64, Ity_I64, Ity_I64, Ity_I64, Ity_V256);
4003
4004       case Iop_AndV256:  case Iop_OrV256:
4005       case Iop_XorV256:
4006       case Iop_Max32Fx8: case Iop_Min32Fx8:
4007       case Iop_Max64Fx4: case Iop_Min64Fx4:
4008       case Iop_Add8x32:  case Iop_Add16x16:
4009       case Iop_Add32x8:  case Iop_Add64x4:
4010       case Iop_Sub8x32:  case Iop_Sub16x16:
4011       case Iop_Sub32x8:  case Iop_Sub64x4:
4012       case Iop_Mul16x16: case Iop_Mul32x8:
4013       case Iop_MulHi16Ux16: case Iop_MulHi16Sx16:
4014       case Iop_Avg8Ux32: case Iop_Avg16Ux16:
4015       case Iop_Max8Sx32: case Iop_Max16Sx16: case Iop_Max32Sx8:
4016       case Iop_Max8Ux32: case Iop_Max16Ux16: case Iop_Max32Ux8:
4017       case Iop_Min8Sx32: case Iop_Min16Sx16: case Iop_Min32Sx8:
4018       case Iop_Min8Ux32: case Iop_Min16Ux16: case Iop_Min32Ux8:
4019       case Iop_CmpEQ8x32:  case Iop_CmpEQ16x16:
4020       case Iop_CmpEQ32x8:  case Iop_CmpEQ64x4:
4021       case Iop_CmpGT8Sx32: case Iop_CmpGT16Sx16:
4022       case Iop_CmpGT32Sx8: case Iop_CmpGT64Sx4:
4023       case Iop_QAdd8Ux32: case Iop_QAdd16Ux16:
4024       case Iop_QAdd8Sx32: case Iop_QAdd16Sx16:
4025       case Iop_QSub8Ux32: case Iop_QSub16Ux16:
4026       case Iop_QSub8Sx32: case Iop_QSub16Sx16:
4027       case Iop_Perm32x8:
4028          BINARY(Ity_V256,Ity_V256, Ity_V256);
4029
4030       case Iop_I32StoF32x8:
4031       case Iop_F32toI32Sx8:
4032          BINARY(ity_RMode,Ity_V256, Ity_V256);
4033
4034       case Iop_F32toF16x8:
4035          BINARY(ity_RMode,Ity_V256, Ity_V128);
4036
4037       case Iop_V256toV128_1: case Iop_V256toV128_0:
4038          UNARY(Ity_V256, Ity_V128);
4039
4040       case Iop_F16toF32x8:
4041          UNARY(Ity_V128, Ity_V256);
4042
4043       case Iop_QandUQsh8x16:  case Iop_QandUQsh16x8:
4044       case Iop_QandUQsh32x4:  case Iop_QandUQsh64x2:
4045       case Iop_QandSQsh8x16:  case Iop_QandSQsh16x8:
4046       case Iop_QandSQsh32x4:  case Iop_QandSQsh64x2:
4047       case Iop_QandUQRsh8x16: case Iop_QandUQRsh16x8:
4048       case Iop_QandUQRsh32x4: case Iop_QandUQRsh64x2:
4049       case Iop_QandSQRsh8x16: case Iop_QandSQRsh16x8:
4050       case Iop_QandSQRsh32x4: case Iop_QandSQRsh64x2:
4051       case Iop_V128HLtoV256:
4052          BINARY(Ity_V128,Ity_V128, Ity_V256);
4053
4054       case Iop_NotV256:
4055       case Iop_RSqrtEst32Fx8:
4056       case Iop_Sqrt32Fx8:
4057       case Iop_Sqrt64Fx4:
4058       case Iop_RecipEst32Fx8:
4059       case Iop_CmpNEZ8x32: case Iop_CmpNEZ16x16:
4060       case Iop_CmpNEZ64x4: case Iop_CmpNEZ32x8:
4061          UNARY(Ity_V256, Ity_V256);
4062
4063       case Iop_ShlN16x16: case Iop_ShlN32x8:
4064       case Iop_ShlN64x4:
4065       case Iop_ShrN16x16: case Iop_ShrN32x8:
4066       case Iop_ShrN64x4:
4067       case Iop_SarN16x16: case Iop_SarN32x8:
4068          BINARY(Ity_V256,Ity_I8, Ity_V256);
4069       case Iop_Rotx32:
4070          QUATERNARY(Ity_I32, Ity_I8, Ity_I8, Ity_I8, Ity_I32);
4071       case Iop_Rotx64:
4072          QUATERNARY(Ity_I64, Ity_I8, Ity_I8, Ity_I8, Ity_I64);
4073
4074       default:
4075          ppIROp(op);
4076          vpanic("typeOfPrimop");
4077    }
4078 #  undef UNARY
4079 #  undef BINARY
4080 #  undef TERNARY
4081 #  undef COMPARISON
4082 #  undef UNARY_COMPARISON
4083 }
4084
4085
4086 /*---------------------------------------------------------------*/
4087 /*--- Helper functions for the IR -- IR Basic Blocks          ---*/
4088 /*---------------------------------------------------------------*/
4089
4090 void addStmtToIRSB ( IRSB* bb, IRStmt* st )
4091 {
4092    Int i;
4093    if (bb->stmts_used == bb->stmts_size) {
4094       IRStmt** stmts2 = LibVEX_Alloc_inline(2 * bb->stmts_size * sizeof(IRStmt*));
4095       for (i = 0; i < bb->stmts_size; i++)
4096          stmts2[i] = bb->stmts[i];
4097       bb->stmts = stmts2;
4098       bb->stmts_size *= 2;
4099    }
4100    vassert(bb->stmts_used < bb->stmts_size);
4101    bb->stmts[bb->stmts_used] = st;
4102    bb->stmts_used++;
4103 }
4104
4105
4106 /*---------------------------------------------------------------*/
4107 /*--- Helper functions for the IR -- IR Type Environments     ---*/
4108 /*---------------------------------------------------------------*/
4109
4110 /* Allocate a new IRTemp, given its type. */
4111
4112 IRTemp newIRTemp ( IRTypeEnv* env, IRType ty )
4113 {
4114    vassert(env);
4115    vassert(env->types_used >= 0);
4116    vassert(env->types_size >= 0);
4117    vassert(env->types_used <= env->types_size);
4118    if (env->types_used < env->types_size) {
4119       env->types[env->types_used] = ty;
4120       return env->types_used++;
4121    } else {
4122       Int i;
4123       Int new_size = env->types_size==0 ? 8 : 2*env->types_size;
4124       IRType* new_types
4125          = LibVEX_Alloc_inline(new_size * sizeof(IRType));
4126       for (i = 0; i < env->types_used; i++)
4127          new_types[i] = env->types[i];
4128       env->types      = new_types;
4129       env->types_size = new_size;
4130       return newIRTemp(env, ty);
4131    }
4132 }
4133
4134
4135 /*---------------------------------------------------------------*/
4136 /*--- Helper functions for the IR -- finding types of exprs   ---*/
4137 /*---------------------------------------------------------------*/
4138
4139 inline
4140 IRType typeOfIRTemp ( const IRTypeEnv* env, IRTemp tmp )
4141 {
4142    vassert(tmp >= 0);
4143    vassert(tmp < env->types_used);
4144    return env->types[tmp];
4145 }
4146
4147 IRType typeOfIRConst ( const IRConst* con )
4148 {
4149    switch (con->tag) {
4150       case Ico_U1:    return Ity_I1;
4151       case Ico_U8:    return Ity_I8;
4152       case Ico_U16:   return Ity_I16;
4153       case Ico_U32:   return Ity_I32;
4154       case Ico_U64:   return Ity_I64;
4155       case Ico_F32:   return Ity_F32;
4156       case Ico_F32i:  return Ity_F32;
4157       case Ico_F64:   return Ity_F64;
4158       case Ico_F64i:  return Ity_F64;
4159       case Ico_V128:  return Ity_V128;
4160       case Ico_V256:  return Ity_V256;
4161       default: vpanic("typeOfIRConst");
4162    }
4163 }
4164
4165 void typeOfIRLoadGOp ( IRLoadGOp cvt,
4166                        /*OUT*/IRType* t_res, /*OUT*/IRType* t_arg )
4167 {
4168    switch (cvt) {
4169       case ILGop_IdentV128:
4170          *t_res = Ity_V128; *t_arg = Ity_V128; break;
4171       case ILGop_Ident64:
4172          *t_res = Ity_I64; *t_arg = Ity_I64; break;
4173       case ILGop_Ident32:
4174          *t_res = Ity_I32; *t_arg = Ity_I32; break;
4175       case ILGop_16Uto32: case ILGop_16Sto32:
4176          *t_res = Ity_I32; *t_arg = Ity_I16; break;
4177       case ILGop_8Uto32: case ILGop_8Sto32:
4178          *t_res = Ity_I32; *t_arg = Ity_I8; break;
4179       default:
4180          vpanic("typeOfIRLoadGOp");
4181    }
4182 }
4183
4184 IRType typeOfIRExpr ( const IRTypeEnv* tyenv, const IRExpr* e )
4185 {
4186    IRType t_dst, t_arg1, t_arg2, t_arg3, t_arg4;
4187  start:
4188    switch (e->tag) {
4189       case Iex_Load:
4190          return e->Iex.Load.ty;
4191       case Iex_Get:
4192          return e->Iex.Get.ty;
4193       case Iex_GetI:
4194          return e->Iex.GetI.descr->elemTy;
4195       case Iex_RdTmp:
4196          return typeOfIRTemp(tyenv, e->Iex.RdTmp.tmp);
4197       case Iex_Const:
4198          return typeOfIRConst(e->Iex.Const.con);
4199       case Iex_Qop:
4200          typeOfPrimop(e->Iex.Qop.details->op,
4201                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4202          return t_dst;
4203       case Iex_Triop:
4204          typeOfPrimop(e->Iex.Triop.details->op,
4205                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4206          return t_dst;
4207       case Iex_Binop:
4208          typeOfPrimop(e->Iex.Binop.op,
4209                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4210          return t_dst;
4211       case Iex_Unop:
4212          typeOfPrimop(e->Iex.Unop.op,
4213                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4214          return t_dst;
4215       case Iex_CCall:
4216          return e->Iex.CCall.retty;
4217       case Iex_ITE:
4218          e = e->Iex.ITE.iffalse;
4219          goto start;
4220          /* return typeOfIRExpr(tyenv, e->Iex.ITE.iffalse); */
4221       case Iex_Binder:
4222          vpanic("typeOfIRExpr: Binder is not a valid expression");
4223       case Iex_VECRET:
4224          vpanic("typeOfIRExpr: VECRET is not a valid expression");
4225       case Iex_GSPTR:
4226          vpanic("typeOfIRExpr: GSPTR is not a valid expression");
4227       default:
4228          ppIRExpr(e);
4229          vpanic("typeOfIRExpr");
4230    }
4231 }
4232
4233 /* Is this any value actually in the enumeration 'IRType' ? */
4234 Bool isPlausibleIRType ( IRType ty )
4235 {
4236    switch (ty) {
4237       case Ity_INVALID: case Ity_I1:
4238       case Ity_I8: case Ity_I16: case Ity_I32:
4239       case Ity_I64: case Ity_I128:
4240       case Ity_F16: case Ity_F32: case Ity_F64: case Ity_F128:
4241       case Ity_D32: case Ity_D64: case Ity_D128:
4242       case Ity_V128: case Ity_V256:
4243          return True;
4244       default:
4245          return False;
4246    }
4247 }
4248
4249
4250 /*---------------------------------------------------------------*/
4251 /*--- Sanity checking -- FLATNESS                             ---*/
4252 /*---------------------------------------------------------------*/
4253
4254 /* Check that the canonical flatness constraints hold on an
4255    IRStmt. The only place where any expression is allowed to be
4256    non-atomic is the RHS of IRStmt_Tmp. */
4257
4258 /* Relies on:
4259    inline static Bool isAtom ( IRExpr* e ) {
4260       return e->tag == Iex_RdTmp || e->tag == Iex_Const;
4261    }
4262 */
4263
4264 static inline Bool isIRAtom_or_VECRET_or_GSPTR ( const IRExpr* e )
4265 {
4266   if (isIRAtom(e)) {
4267     return True;
4268   }
4269
4270   return UNLIKELY(is_IRExpr_VECRET_or_GSPTR(e));
4271 }
4272
4273 Bool isFlatIRStmt ( const IRStmt* st )
4274 {
4275    Int      i;
4276    const IRExpr*  e;
4277    const IRQop*   qop;
4278    const IRTriop* triop;
4279
4280    switch (st->tag) {
4281       case Ist_AbiHint:
4282          return isIRAtom(st->Ist.AbiHint.base)
4283                 && isIRAtom(st->Ist.AbiHint.nia);
4284       case Ist_Put:
4285          return isIRAtom(st->Ist.Put.data);
4286       case Ist_PutI: {
4287          const IRPutI *puti = st->Ist.PutI.details;
4288          return toBool( isIRAtom(puti->ix)
4289                         && isIRAtom(puti->data) );
4290       }
4291       case Ist_WrTmp:
4292          /* This is the only interesting case.  The RHS can be any
4293             expression, *but* all its subexpressions *must* be
4294             atoms. */
4295          e = st->Ist.WrTmp.data;
4296          switch (e->tag) {
4297             case Iex_Binder: return True;
4298             case Iex_Get:    return True;
4299             case Iex_GetI:   return isIRAtom(e->Iex.GetI.ix);
4300             case Iex_RdTmp:  return True;
4301             case Iex_Qop:    qop = e->Iex.Qop.details;
4302                              return toBool(
4303                                     isIRAtom(qop->arg1)
4304                                     && isIRAtom(qop->arg2)
4305                                     && isIRAtom(qop->arg3)
4306                                     && isIRAtom(qop->arg4));
4307             case Iex_Triop:  triop = e->Iex.Triop.details;
4308                              return toBool(
4309                                     isIRAtom(triop->arg1)
4310                                     && isIRAtom(triop->arg2)
4311                                     && isIRAtom(triop->arg3));
4312             case Iex_Binop:  return toBool(
4313                                     isIRAtom(e->Iex.Binop.arg1)
4314                                     && isIRAtom(e->Iex.Binop.arg2));
4315             case Iex_Unop:   return isIRAtom(e->Iex.Unop.arg);
4316             case Iex_Load:   return isIRAtom(e->Iex.Load.addr);
4317             case Iex_Const:  return True;
4318             case Iex_CCall:  for (i = 0; e->Iex.CCall.args[i]; i++)
4319                                 if (!isIRAtom(e->Iex.CCall.args[i]))
4320                                    return False;
4321                              return True;
4322             case Iex_ITE:    return toBool (
4323                                     isIRAtom(e->Iex.ITE.cond)
4324                                     && isIRAtom(e->Iex.ITE.iftrue)
4325                                     && isIRAtom(e->Iex.ITE.iffalse));
4326             default:         vpanic("isFlatIRStmt(e)");
4327          }
4328          /*notreached*/
4329          vassert(0);
4330       case Ist_Store:
4331          return toBool( isIRAtom(st->Ist.Store.addr)
4332                         && isIRAtom(st->Ist.Store.data) );
4333       case Ist_StoreG: {
4334          const IRStoreG* sg = st->Ist.StoreG.details;
4335          return toBool( isIRAtom(sg->addr)
4336                         && isIRAtom(sg->data) && isIRAtom(sg->guard) );
4337       }
4338       case Ist_LoadG: {
4339          const IRLoadG* lg = st->Ist.LoadG.details;
4340          return toBool( isIRAtom(lg->addr)
4341                         && isIRAtom(lg->alt) && isIRAtom(lg->guard) );
4342       }
4343       case Ist_CAS: {
4344         const IRCAS* cas = st->Ist.CAS.details;
4345          return toBool( isIRAtom(cas->addr)
4346                         && (cas->expdHi ? isIRAtom(cas->expdHi) : True)
4347                         && isIRAtom(cas->expdLo)
4348                         && (cas->dataHi ? isIRAtom(cas->dataHi) : True)
4349                         && isIRAtom(cas->dataLo) );
4350       }
4351       case Ist_LLSC:
4352          return toBool( isIRAtom(st->Ist.LLSC.addr)
4353                         && (st->Ist.LLSC.storedata
4354                                ? isIRAtom(st->Ist.LLSC.storedata) : True) );
4355       case Ist_Dirty: {
4356          const IRDirty* di = st->Ist.Dirty.details;
4357          if (!isIRAtom(di->guard))
4358             return False;
4359          for (i = 0; di->args[i]; i++)
4360             if (!isIRAtom_or_VECRET_or_GSPTR(di->args[i]))
4361                return False;
4362          if (di->mAddr && !isIRAtom(di->mAddr))
4363             return False;
4364          return True;
4365       }
4366       case Ist_NoOp:
4367       case Ist_IMark:
4368       case Ist_MBE:
4369          return True;
4370       case Ist_Exit:
4371          return isIRAtom(st->Ist.Exit.guard);
4372       default:
4373          vpanic("isFlatIRStmt(st)");
4374    }
4375 }
4376
4377
4378 /*---------------------------------------------------------------*/
4379 /*--- Sanity checking                                         ---*/
4380 /*---------------------------------------------------------------*/
4381
4382 /* Checks:
4383
4384    Everything is type-consistent.  No ill-typed anything.
4385    The target address at the end of the BB is a 32- or 64-
4386    bit expression, depending on the guest's word size.
4387
4388    Each temp is assigned only once, before its uses.
4389 */
4390
4391 static inline Int countArgs ( IRExpr** args )
4392 {
4393    Int i;
4394    for (i = 0; args[i]; i++)
4395       ;
4396    return i;
4397 }
4398
4399 static
4400 __attribute((noreturn))
4401 void sanityCheckFail ( const IRSB* bb, const IRStmt* stmt, const HChar* what )
4402 {
4403    vex_printf("\nIR SANITY CHECK FAILURE\n\n");
4404    ppIRSB(bb);
4405    if (stmt) {
4406       vex_printf("\nIN STATEMENT:\n\n");
4407       ppIRStmt(stmt);
4408    }
4409    vex_printf("\n\nERROR = %s\n\n", what );
4410    vpanic("sanityCheckFail: exiting due to bad IR");
4411 }
4412
4413 static Bool saneIRRegArray ( const IRRegArray* arr )
4414 {
4415    if (arr->base < 0 || arr->base > 10000 /* somewhat arbitrary */)
4416       return False;
4417    if (arr->elemTy == Ity_I1)
4418       return False;
4419    if (arr->nElems <= 0 || arr->nElems > 500 /* somewhat arbitrary */)
4420       return False;
4421    return True;
4422 }
4423
4424 static Bool saneIRCallee ( const IRCallee* cee )
4425 {
4426    if (cee->name == NULL)
4427       return False;
4428    if (cee->addr == 0)
4429       return False;
4430    if (cee->regparms < 0 || cee->regparms > 3)
4431       return False;
4432    return True;
4433 }
4434
4435 static Bool saneIRConst ( const IRConst* con )
4436 {
4437    switch (con->tag) {
4438       case Ico_U1:
4439          return toBool( con->Ico.U1 == True || con->Ico.U1 == False );
4440       default:
4441          /* Is there anything we can meaningfully check?  I don't
4442             think so. */
4443          return True;
4444    }
4445 }
4446
4447 /* Traverse a Stmt/Expr, inspecting IRTemp uses.  Report any out of
4448    range ones.  Report any which are read and for which the current
4449    def_count is zero. */
4450
4451 static
4452 void useBeforeDef_Temp ( const IRSB* bb, const IRStmt* stmt, IRTemp tmp,
4453                          Int* def_counts )
4454 {
4455    if (tmp < 0 || tmp >= bb->tyenv->types_used)
4456       sanityCheckFail(bb,stmt, "out of range Temp in IRExpr");
4457    if (def_counts[tmp] < 1)
4458       sanityCheckFail(bb,stmt, "IRTemp use before def in IRExpr");
4459 }
4460
4461 static
4462 void assignedOnce_Temp(const IRSB *bb, const IRStmt *stmt, IRTemp tmp,
4463                        Int *def_counts, UInt n_def_counts,
4464                        const HChar *err_msg_out_of_range,
4465                        const HChar *err_msg_assigned_more_than_once)
4466 {
4467    if (tmp < 0 || tmp >= n_def_counts) {
4468       sanityCheckFail(bb, stmt, err_msg_out_of_range);
4469    }
4470
4471    def_counts[tmp]++;
4472    if (def_counts[tmp] > 1) {
4473       sanityCheckFail(bb, stmt, err_msg_assigned_more_than_once);
4474    }
4475 }
4476
4477 static
4478 void useBeforeDef_Expr ( const IRSB* bb, const IRStmt* stmt,
4479                          const IRExpr* expr, Int* def_counts )
4480 {
4481    Int i;
4482    switch (expr->tag) {
4483       case Iex_Get:
4484          break;
4485       case Iex_GetI:
4486          useBeforeDef_Expr(bb,stmt,expr->Iex.GetI.ix,def_counts);
4487          break;
4488       case Iex_RdTmp:
4489          useBeforeDef_Temp(bb,stmt,expr->Iex.RdTmp.tmp,def_counts);
4490          break;
4491       case Iex_Qop: {
4492          const IRQop* qop = expr->Iex.Qop.details;
4493          useBeforeDef_Expr(bb,stmt,qop->arg1,def_counts);
4494          useBeforeDef_Expr(bb,stmt,qop->arg2,def_counts);
4495          useBeforeDef_Expr(bb,stmt,qop->arg3,def_counts);
4496          useBeforeDef_Expr(bb,stmt,qop->arg4,def_counts);
4497          break;
4498       }
4499       case Iex_Triop: {
4500          const IRTriop* triop = expr->Iex.Triop.details;
4501          useBeforeDef_Expr(bb,stmt,triop->arg1,def_counts);
4502          useBeforeDef_Expr(bb,stmt,triop->arg2,def_counts);
4503          useBeforeDef_Expr(bb,stmt,triop->arg3,def_counts);
4504          break;
4505       }
4506       case Iex_Binop:
4507          useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg1,def_counts);
4508          useBeforeDef_Expr(bb,stmt,expr->Iex.Binop.arg2,def_counts);
4509          break;
4510       case Iex_Unop:
4511          useBeforeDef_Expr(bb,stmt,expr->Iex.Unop.arg,def_counts);
4512          break;
4513       case Iex_Load:
4514          useBeforeDef_Expr(bb,stmt,expr->Iex.Load.addr,def_counts);
4515          break;
4516       case Iex_Const:
4517          break;
4518       case Iex_CCall:
4519          for (i = 0; expr->Iex.CCall.args[i]; i++) {
4520             const IRExpr* arg = expr->Iex.CCall.args[i];
4521             if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg))) {
4522                /* These aren't allowed in CCall lists.  Let's detect
4523                   and throw them out here, though, rather than
4524                   segfaulting a bit later on. */
4525                sanityCheckFail(bb,stmt, "IRExprP__* value in CCall arg list");
4526             } else {
4527                useBeforeDef_Expr(bb,stmt,arg,def_counts);
4528             }
4529          }
4530          break;
4531       case Iex_ITE:
4532          useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.cond,def_counts);
4533          useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.iftrue,def_counts);
4534          useBeforeDef_Expr(bb,stmt,expr->Iex.ITE.iffalse,def_counts);
4535          break;
4536       default:
4537          vpanic("useBeforeDef_Expr");
4538    }
4539 }
4540
4541 static
4542 void useBeforeDef_Stmt ( const IRSB* bb, const IRStmt* stmt, Int* def_counts )
4543 {
4544    Int       i;
4545    const IRDirty*  d;
4546    const IRCAS*    cas;
4547    const IRPutI*   puti;
4548    const IRLoadG*  lg;
4549    const IRStoreG* sg;
4550    switch (stmt->tag) {
4551       case Ist_IMark:
4552          break;
4553       case Ist_AbiHint:
4554          useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.base,def_counts);
4555          useBeforeDef_Expr(bb,stmt,stmt->Ist.AbiHint.nia,def_counts);
4556          break;
4557       case Ist_Put:
4558          useBeforeDef_Expr(bb,stmt,stmt->Ist.Put.data,def_counts);
4559          break;
4560       case Ist_PutI:
4561          puti = stmt->Ist.PutI.details;
4562          useBeforeDef_Expr(bb,stmt,puti->ix,def_counts);
4563          useBeforeDef_Expr(bb,stmt,puti->data,def_counts);
4564          break;
4565       case Ist_WrTmp:
4566          useBeforeDef_Expr(bb,stmt,stmt->Ist.WrTmp.data,def_counts);
4567          break;
4568       case Ist_Store:
4569          useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.addr,def_counts);
4570          useBeforeDef_Expr(bb,stmt,stmt->Ist.Store.data,def_counts);
4571          break;
4572       case Ist_StoreG:
4573          sg = stmt->Ist.StoreG.details;
4574          useBeforeDef_Expr(bb,stmt,sg->addr,def_counts);
4575          useBeforeDef_Expr(bb,stmt,sg->data,def_counts);
4576          useBeforeDef_Expr(bb,stmt,sg->guard,def_counts);
4577          break;
4578       case Ist_LoadG:
4579          lg = stmt->Ist.LoadG.details;
4580          useBeforeDef_Expr(bb,stmt,lg->addr,def_counts);
4581          useBeforeDef_Expr(bb,stmt,lg->alt,def_counts);
4582          useBeforeDef_Expr(bb,stmt,lg->guard,def_counts);
4583          break;
4584       case Ist_CAS:
4585          cas = stmt->Ist.CAS.details;
4586          useBeforeDef_Expr(bb,stmt,cas->addr,def_counts);
4587          if (cas->expdHi)
4588             useBeforeDef_Expr(bb,stmt,cas->expdHi,def_counts);
4589          useBeforeDef_Expr(bb,stmt,cas->expdLo,def_counts);
4590          if (cas->dataHi)
4591             useBeforeDef_Expr(bb,stmt,cas->dataHi,def_counts);
4592          useBeforeDef_Expr(bb,stmt,cas->dataLo,def_counts);
4593          break;
4594       case Ist_LLSC:
4595          useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.addr,def_counts);
4596          if (stmt->Ist.LLSC.storedata != NULL)
4597             useBeforeDef_Expr(bb,stmt,stmt->Ist.LLSC.storedata,def_counts);
4598          break;
4599       case Ist_Dirty:
4600          d = stmt->Ist.Dirty.details;
4601          for (i = 0; d->args[i] != NULL; i++) {
4602             IRExpr* arg = d->args[i];
4603             if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg))) {
4604                /* This is ensured by isFlatIRStmt */
4605               ;
4606             } else {
4607                useBeforeDef_Expr(bb,stmt,arg,def_counts);
4608             }
4609          }
4610          if (d->mFx != Ifx_None)
4611             useBeforeDef_Expr(bb,stmt,d->mAddr,def_counts);
4612          break;
4613       case Ist_NoOp:
4614       case Ist_MBE:
4615          break;
4616       case Ist_Exit:
4617          useBeforeDef_Expr(bb,stmt,stmt->Ist.Exit.guard,def_counts);
4618          break;
4619       default:
4620          vpanic("useBeforeDef_Stmt");
4621    }
4622 }
4623
4624 static
4625 void assignedOnce_Stmt(const IRSB *bb, const IRStmt *stmt,
4626                        Int *def_counts, UInt n_def_counts)
4627 {
4628    switch (stmt->tag) {
4629    case Ist_WrTmp:
4630       assignedOnce_Temp(
4631          bb, stmt, stmt->Ist.WrTmp.tmp, def_counts, n_def_counts,
4632          "IRStmt.Tmp: destination tmp is out of range",
4633          "IRStmt.Tmp: destination tmp is assigned more than once");
4634       break;
4635    case Ist_LoadG:
4636       assignedOnce_Temp(
4637          bb, stmt, stmt->Ist.LoadG.details->dst, def_counts, n_def_counts,
4638          "IRStmt.LoadG: destination tmp is out of range",
4639          "IRStmt.LoadG: destination tmp is assigned more than once");
4640       break;
4641    case Ist_Dirty:
4642       if (stmt->Ist.Dirty.details->tmp != IRTemp_INVALID) {
4643          assignedOnce_Temp(
4644             bb, stmt, stmt->Ist.Dirty.details->tmp, def_counts, n_def_counts,
4645             "IRStmt.Dirty: destination tmp is out of range",
4646             "IRStmt.Dirty: destination tmp is assigned more than once");
4647       }
4648       break;
4649    case Ist_CAS:
4650       if (stmt->Ist.CAS.details->oldHi != IRTemp_INVALID) {
4651          assignedOnce_Temp(
4652             bb, stmt, stmt->Ist.CAS.details->oldHi, def_counts, n_def_counts,
4653             "IRStmt.CAS: destination tmpHi is out of range",
4654             "IRStmt.CAS: destination tmpHi is assigned more than once");
4655       }
4656       assignedOnce_Temp(
4657          bb, stmt, stmt->Ist.CAS.details->oldLo, def_counts, n_def_counts,
4658          "IRStmt.CAS: destination tmpLo is out of range",
4659          "IRStmt.CAS: destination tmpLo is assigned more than once");
4660       break;
4661    case Ist_LLSC:
4662       assignedOnce_Temp(
4663          bb, stmt, stmt->Ist.LLSC.result, def_counts, n_def_counts,
4664          "IRStmt.LLSC: destination tmp is out of range",
4665          "IRStmt.LLSC: destination tmp is assigned more than once");
4666       break;
4667    // Ignore all other cases
4668    case Ist_NoOp: case Ist_IMark: case Ist_AbiHint: case Ist_Put: case Ist_PutI:
4669    case Ist_Store: case Ist_StoreG: case Ist_MBE: case Ist_Exit:
4670       break;
4671    default:
4672       vassert(0);
4673    }
4674 }
4675
4676 static
4677 void tcExpr ( const IRSB* bb, const IRStmt* stmt, const IRExpr* expr,
4678               IRType gWordTy )
4679 {
4680    Int        i;
4681    IRType     t_dst, t_arg1, t_arg2, t_arg3, t_arg4;
4682    const IRTypeEnv* tyenv = bb->tyenv;
4683    switch (expr->tag) {
4684       case Iex_Get:
4685       case Iex_RdTmp:
4686          break;
4687       case Iex_GetI:
4688          tcExpr(bb,stmt, expr->Iex.GetI.ix, gWordTy );
4689          if (typeOfIRExpr(tyenv,expr->Iex.GetI.ix) != Ity_I32)
4690             sanityCheckFail(bb,stmt,"IRExpr.GetI.ix: not :: Ity_I32");
4691          if (!saneIRRegArray(expr->Iex.GetI.descr))
4692             sanityCheckFail(bb,stmt,"IRExpr.GetI.descr: invalid descr");
4693          break;
4694       case Iex_Qop: {
4695          IRType ttarg1, ttarg2, ttarg3, ttarg4;
4696          const IRQop* qop = expr->Iex.Qop.details;
4697          tcExpr(bb,stmt, qop->arg1, gWordTy );
4698          tcExpr(bb,stmt, qop->arg2, gWordTy );
4699          tcExpr(bb,stmt, qop->arg3, gWordTy );
4700          tcExpr(bb,stmt, qop->arg4, gWordTy );
4701          typeOfPrimop(qop->op,
4702                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4703          if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
4704              || t_arg3 == Ity_INVALID || t_arg4 == Ity_INVALID) {
4705             vex_printf(" op name: " );
4706             ppIROp(qop->op);
4707             vex_printf("\n");
4708             sanityCheckFail(bb,stmt,
4709                "Iex.Qop: wrong arity op\n"
4710                "... name of op precedes BB printout\n");
4711          }
4712          ttarg1 = typeOfIRExpr(tyenv, qop->arg1);
4713          ttarg2 = typeOfIRExpr(tyenv, qop->arg2);
4714          ttarg3 = typeOfIRExpr(tyenv, qop->arg3);
4715          ttarg4 = typeOfIRExpr(tyenv, qop->arg4);
4716          if (t_arg1 != ttarg1 || t_arg2 != ttarg2
4717              || t_arg3 != ttarg3 || t_arg4 != ttarg4) {
4718             vex_printf(" op name: ");
4719             ppIROp(qop->op);
4720             vex_printf("\n");
4721             vex_printf(" op type is (");
4722             ppIRType(t_arg1);
4723             vex_printf(",");
4724             ppIRType(t_arg2);
4725             vex_printf(",");
4726             ppIRType(t_arg3);
4727             vex_printf(",");
4728             ppIRType(t_arg4);
4729             vex_printf(") -> ");
4730             ppIRType (t_dst);
4731             vex_printf("\narg tys are (");
4732             ppIRType(ttarg1);
4733             vex_printf(",");
4734             ppIRType(ttarg2);
4735             vex_printf(",");
4736             ppIRType(ttarg3);
4737             vex_printf(",");
4738             ppIRType(ttarg4);
4739             vex_printf(")\n");
4740             sanityCheckFail(bb,stmt,
4741                "Iex.Qop: arg tys don't match op tys\n"
4742                "... additional details precede BB printout\n");
4743          }
4744          break;
4745       }
4746       case Iex_Triop: {
4747          IRType ttarg1, ttarg2, ttarg3;
4748          const IRTriop *triop = expr->Iex.Triop.details;
4749          tcExpr(bb,stmt, triop->arg1, gWordTy );
4750          tcExpr(bb,stmt, triop->arg2, gWordTy );
4751          tcExpr(bb,stmt, triop->arg3, gWordTy );
4752          typeOfPrimop(triop->op,
4753                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4754          if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
4755              || t_arg3 == Ity_INVALID || t_arg4 != Ity_INVALID) {
4756             vex_printf(" op name: " );
4757             ppIROp(triop->op);
4758             vex_printf("\n");
4759             sanityCheckFail(bb,stmt,
4760                "Iex.Triop: wrong arity op\n"
4761                "... name of op precedes BB printout\n");
4762          }
4763          ttarg1 = typeOfIRExpr(tyenv, triop->arg1);
4764          ttarg2 = typeOfIRExpr(tyenv, triop->arg2);
4765          ttarg3 = typeOfIRExpr(tyenv, triop->arg3);
4766          if (t_arg1 != ttarg1 || t_arg2 != ttarg2 || t_arg3 != ttarg3) {
4767             vex_printf(" op name: ");
4768             ppIROp(triop->op);
4769             vex_printf("\n");
4770             vex_printf(" op type is (");
4771             ppIRType(t_arg1);
4772             vex_printf(",");
4773             ppIRType(t_arg2);
4774             vex_printf(",");
4775             ppIRType(t_arg3);
4776             vex_printf(") -> ");
4777             ppIRType (t_dst);
4778             vex_printf("\narg tys are (");
4779             ppIRType(ttarg1);
4780             vex_printf(",");
4781             ppIRType(ttarg2);
4782             vex_printf(",");
4783             ppIRType(ttarg3);
4784             vex_printf(")\n");
4785             sanityCheckFail(bb,stmt,
4786                "Iex.Triop: arg tys don't match op tys\n"
4787                "... additional details precede BB printout\n");
4788          }
4789          break;
4790       }
4791       case Iex_Binop: {
4792          IRType ttarg1, ttarg2;
4793          tcExpr(bb,stmt, expr->Iex.Binop.arg1, gWordTy );
4794          tcExpr(bb,stmt, expr->Iex.Binop.arg2, gWordTy );
4795          typeOfPrimop(expr->Iex.Binop.op,
4796                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4797          if (t_arg1 == Ity_INVALID || t_arg2 == Ity_INVALID
4798              || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID) {
4799             vex_printf(" op name: " );
4800             ppIROp(expr->Iex.Binop.op);
4801             vex_printf("\n");
4802             sanityCheckFail(bb,stmt,
4803                "Iex.Binop: wrong arity op\n"
4804                "... name of op precedes BB printout\n");
4805          }
4806          ttarg1 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg1);
4807          ttarg2 = typeOfIRExpr(tyenv, expr->Iex.Binop.arg2);
4808          if (t_arg1 != ttarg1 || t_arg2 != ttarg2) {
4809             vex_printf(" op name: ");
4810             ppIROp(expr->Iex.Binop.op);
4811             vex_printf("\n");
4812             vex_printf(" op type is (");
4813             ppIRType(t_arg1);
4814             vex_printf(",");
4815             ppIRType(t_arg2);
4816             vex_printf(") -> ");
4817             ppIRType (t_dst);
4818             vex_printf("\narg tys are (");
4819             ppIRType(ttarg1);
4820             vex_printf(",");
4821             ppIRType(ttarg2);
4822             vex_printf(")\n");
4823             sanityCheckFail(bb,stmt,
4824                "Iex.Binop: arg tys don't match op tys\n"
4825                "... additional details precede BB printout\n");
4826          }
4827          break;
4828       }
4829       case Iex_Unop:
4830          tcExpr(bb,stmt, expr->Iex.Unop.arg, gWordTy );
4831          typeOfPrimop(expr->Iex.Unop.op,
4832                       &t_dst, &t_arg1, &t_arg2, &t_arg3, &t_arg4);
4833          if (t_arg1 == Ity_INVALID || t_arg2 != Ity_INVALID
4834              || t_arg3 != Ity_INVALID || t_arg4 != Ity_INVALID)
4835             sanityCheckFail(bb,stmt,"Iex.Unop: wrong arity op");
4836          if (t_arg1 != typeOfIRExpr(tyenv, expr->Iex.Unop.arg))
4837             sanityCheckFail(bb,stmt,"Iex.Unop: arg ty doesn't match op ty");
4838          break;
4839       case Iex_Load:
4840          tcExpr(bb,stmt, expr->Iex.Load.addr, gWordTy);
4841          if (typeOfIRExpr(tyenv, expr->Iex.Load.addr) != gWordTy)
4842             sanityCheckFail(bb,stmt,"Iex.Load.addr: not :: guest word type");
4843          if (expr->Iex.Load.end != Iend_LE && expr->Iex.Load.end != Iend_BE)
4844             sanityCheckFail(bb,stmt,"Iex.Load.end: bogus endianness");
4845          break;
4846       case Iex_CCall:
4847          if (!saneIRCallee(expr->Iex.CCall.cee))
4848             sanityCheckFail(bb,stmt,"Iex.CCall.cee: bad IRCallee");
4849          if (expr->Iex.CCall.cee->regparms > countArgs(expr->Iex.CCall.args))
4850             sanityCheckFail(bb,stmt,"Iex.CCall.cee: #regparms > #args");
4851          for (i = 0; expr->Iex.CCall.args[i]; i++) {
4852             if (i >= 32)
4853                sanityCheckFail(bb,stmt,"Iex.CCall: > 32 args");
4854             IRExpr* arg = expr->Iex.CCall.args[i];
4855             if (UNLIKELY(is_IRExpr_VECRET_or_GSPTR(arg)))
4856                sanityCheckFail(bb,stmt,"Iex.CCall.args: is VECRET/GSPTR");
4857             tcExpr(bb,stmt, arg, gWordTy);
4858          }
4859          if (expr->Iex.CCall.retty == Ity_I1)
4860             sanityCheckFail(bb,stmt,"Iex.CCall.retty: cannot return :: Ity_I1");
4861          for (i = 0; expr->Iex.CCall.args[i]; i++)
4862             if (typeOfIRExpr(tyenv, expr->Iex.CCall.args[i]) == Ity_I1)
4863                sanityCheckFail(bb,stmt,"Iex.CCall.arg: arg :: Ity_I1");
4864          break;
4865       case Iex_Const:
4866          if (!saneIRConst(expr->Iex.Const.con))
4867             sanityCheckFail(bb,stmt,"Iex.Const.con: invalid const");
4868          break;
4869       case Iex_ITE:
4870          tcExpr(bb,stmt, expr->Iex.ITE.cond, gWordTy);
4871          tcExpr(bb,stmt, expr->Iex.ITE.iftrue, gWordTy);
4872          tcExpr(bb,stmt, expr->Iex.ITE.iffalse, gWordTy);
4873          if (typeOfIRExpr(tyenv, expr->Iex.ITE.cond) != Ity_I1)
4874             sanityCheckFail(bb,stmt,"Iex.ITE.cond: cond :: Ity_I1");
4875          if (typeOfIRExpr(tyenv, expr->Iex.ITE.iftrue)
4876              != typeOfIRExpr(tyenv, expr->Iex.ITE.iffalse))
4877             sanityCheckFail(bb,stmt,"Iex.ITE: iftrue/iffalse mismatch");
4878          break;
4879       default:
4880          vpanic("tcExpr");
4881    }
4882 }
4883
4884
4885 static
4886 void tcStmt ( const IRSB* bb, const IRStmt* stmt, IRType gWordTy )
4887 {
4888    Int        i;
4889    IRType     tyExpd, tyData;
4890    const IRTypeEnv* tyenv = bb->tyenv;
4891    switch (stmt->tag) {
4892       case Ist_IMark:
4893          /* Somewhat heuristic, but rule out totally implausible
4894             instruction sizes and deltas. */
4895          if (stmt->Ist.IMark.len > 24)
4896             sanityCheckFail(bb,stmt,"IRStmt.IMark.len: implausible");
4897          if (stmt->Ist.IMark.delta > 1)
4898             sanityCheckFail(bb,stmt,"IRStmt.IMark.delta: implausible");
4899          break;
4900       case Ist_AbiHint:
4901          if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.base) != gWordTy)
4902             sanityCheckFail(bb,stmt,"IRStmt.AbiHint.base: "
4903                                     "not :: guest word type");
4904          if (typeOfIRExpr(tyenv, stmt->Ist.AbiHint.nia) != gWordTy)
4905             sanityCheckFail(bb,stmt,"IRStmt.AbiHint.nia: "
4906                                     "not :: guest word type");
4907          break;
4908       case Ist_Put:
4909          tcExpr( bb, stmt, stmt->Ist.Put.data, gWordTy );
4910          if (typeOfIRExpr(tyenv,stmt->Ist.Put.data) == Ity_I1)
4911             sanityCheckFail(bb,stmt,"IRStmt.Put.data: cannot Put :: Ity_I1");
4912          break;
4913       case Ist_PutI:{
4914          const IRPutI* puti = stmt->Ist.PutI.details;
4915          tcExpr( bb, stmt, puti->data, gWordTy );
4916          tcExpr( bb, stmt, puti->ix, gWordTy );
4917          if (typeOfIRExpr(tyenv,puti->data) == Ity_I1)
4918             sanityCheckFail(bb,stmt,"IRStmt.PutI.data: cannot PutI :: Ity_I1");
4919          if (typeOfIRExpr(tyenv,puti->data)
4920              != puti->descr->elemTy)
4921             sanityCheckFail(bb,stmt,"IRStmt.PutI.data: data ty != elem ty");
4922          if (typeOfIRExpr(tyenv,puti->ix) != Ity_I32)
4923             sanityCheckFail(bb,stmt,"IRStmt.PutI.ix: not :: Ity_I32");
4924          if (!saneIRRegArray(puti->descr))
4925             sanityCheckFail(bb,stmt,"IRStmt.PutI.descr: invalid descr");
4926          break;
4927       }
4928       case Ist_WrTmp:
4929          tcExpr( bb, stmt, stmt->Ist.WrTmp.data, gWordTy );
4930          if (typeOfIRTemp(tyenv, stmt->Ist.WrTmp.tmp)
4931              != typeOfIRExpr(tyenv, stmt->Ist.WrTmp.data))
4932             sanityCheckFail(bb,stmt,
4933                             "IRStmt.Put.Tmp: tmp and expr do not match");
4934          break;
4935       case Ist_Store:
4936          tcExpr( bb, stmt, stmt->Ist.Store.addr, gWordTy );
4937          tcExpr( bb, stmt, stmt->Ist.Store.data, gWordTy );
4938          if (typeOfIRExpr(tyenv, stmt->Ist.Store.addr) != gWordTy)
4939             sanityCheckFail(bb,stmt,
4940                             "IRStmt.Store.addr: not :: guest word type");
4941          if (typeOfIRExpr(tyenv, stmt->Ist.Store.data) == Ity_I1)
4942             sanityCheckFail(bb,stmt,
4943                             "IRStmt.Store.data: cannot Store :: Ity_I1");
4944          if (stmt->Ist.Store.end != Iend_LE && stmt->Ist.Store.end != Iend_BE)
4945             sanityCheckFail(bb,stmt,"Ist.Store.end: bogus endianness");
4946          break;
4947       case Ist_StoreG: {
4948          const IRStoreG* sg = stmt->Ist.StoreG.details;
4949          tcExpr( bb, stmt, sg->addr, gWordTy );
4950          tcExpr( bb, stmt, sg->data, gWordTy );
4951          tcExpr( bb, stmt, sg->guard, gWordTy );
4952          if (typeOfIRExpr(tyenv, sg->addr) != gWordTy)
4953             sanityCheckFail(bb,stmt,"IRStmtG...addr: not :: guest word type");
4954          if (typeOfIRExpr(tyenv, sg->data) == Ity_I1)
4955             sanityCheckFail(bb,stmt,"IRStmtG...data: cannot Store :: Ity_I1");
4956          if (typeOfIRExpr(tyenv, sg->guard) != Ity_I1)
4957             sanityCheckFail(bb,stmt,"IRStmtG...guard: not :: Ity_I1");
4958          if (sg->end != Iend_LE && sg->end != Iend_BE)
4959             sanityCheckFail(bb,stmt,"IRStmtG...end: bogus endianness");
4960          break;
4961       }
4962       case Ist_LoadG: {
4963          const IRLoadG* lg = stmt->Ist.LoadG.details;
4964          tcExpr( bb, stmt, lg->addr, gWordTy );
4965          tcExpr( bb, stmt, lg->alt, gWordTy );
4966          tcExpr( bb, stmt, lg->guard, gWordTy );
4967          if (typeOfIRExpr(tyenv, lg->guard) != Ity_I1)
4968             sanityCheckFail(bb,stmt,"IRStmt.LoadG.guard: not :: Ity_I1");
4969          if (typeOfIRExpr(tyenv, lg->addr) != gWordTy)
4970               sanityCheckFail(bb,stmt,"IRStmt.LoadG.addr: not "
4971                                       ":: guest word type");
4972          if (typeOfIRExpr(tyenv, lg->alt) != typeOfIRTemp(tyenv, lg->dst))
4973              sanityCheckFail(bb,stmt,"IRStmt.LoadG: dst/alt type mismatch");
4974          IRType cvtRes = Ity_INVALID, cvtArg = Ity_INVALID;
4975          typeOfIRLoadGOp(lg->cvt, &cvtRes, &cvtArg);
4976          if (cvtRes != typeOfIRTemp(tyenv, lg->dst))
4977             sanityCheckFail(bb,stmt,"IRStmt.LoadG: dst/loaded type mismatch");
4978          break;
4979       }
4980       case Ist_CAS: {
4981          const IRCAS* cas = stmt->Ist.CAS.details;
4982          /* make sure it's definitely either a CAS or a DCAS */
4983          if (cas->oldHi == IRTemp_INVALID
4984              && cas->expdHi == NULL && cas->dataHi == NULL) {
4985             /* fine; it's a single cas */
4986          }
4987          else
4988          if (cas->oldHi != IRTemp_INVALID
4989              && cas->expdHi != NULL && cas->dataHi != NULL) {
4990             /* fine; it's a double cas */
4991          }
4992          else {
4993             /* it's some el-mutanto hybrid */
4994             goto bad_cas;
4995          }
4996          /* check the address type */
4997          tcExpr( bb, stmt, cas->addr, gWordTy );
4998          if (typeOfIRExpr(tyenv, cas->addr) != gWordTy) goto bad_cas;
4999          /* check types on the {old,expd,data}Lo components agree */
5000          tyExpd = typeOfIRExpr(tyenv, cas->expdLo);
5001          tyData = typeOfIRExpr(tyenv, cas->dataLo);
5002          if (tyExpd != tyData) goto bad_cas;
5003          if (tyExpd != typeOfIRTemp(tyenv, cas->oldLo))
5004             goto bad_cas;
5005          /* check the base element type is sane */
5006          if (tyExpd == Ity_I8 || tyExpd == Ity_I16 || tyExpd == Ity_I32
5007              || (gWordTy == Ity_I64 && tyExpd == Ity_I64)) {
5008             /* fine */
5009          } else {
5010             goto bad_cas;
5011          }
5012          /* If it's a DCAS, check types on the {old,expd,data}Hi
5013             components too */
5014          if (cas->oldHi != IRTemp_INVALID) {
5015             tyExpd = typeOfIRExpr(tyenv, cas->expdHi);
5016             tyData = typeOfIRExpr(tyenv, cas->dataHi);
5017             if (tyExpd != tyData) goto bad_cas;
5018             if (tyExpd != typeOfIRTemp(tyenv, cas->oldHi))
5019                goto bad_cas;
5020             /* and finally check that oldLo and oldHi have the same
5021                type.  This forces equivalence amongst all 6 types. */
5022             if (typeOfIRTemp(tyenv, cas->oldHi)
5023                 != typeOfIRTemp(tyenv, cas->oldLo))
5024                goto bad_cas;
5025          }
5026          break;
5027          bad_cas:
5028          sanityCheckFail(bb,stmt,"IRStmt.CAS: ill-formed");
5029          break;
5030       }
5031       case Ist_LLSC: {
5032          IRType tyRes;
5033          if (typeOfIRExpr(tyenv, stmt->Ist.LLSC.addr) != gWordTy)
5034             sanityCheckFail(bb,stmt,"IRStmt.LLSC.addr: not :: guest word type");
5035          if (stmt->Ist.LLSC.end != Iend_LE && stmt->Ist.LLSC.end != Iend_BE)
5036             sanityCheckFail(bb,stmt,"Ist.LLSC.end: bogus endianness");
5037          tyRes = typeOfIRTemp(tyenv, stmt->Ist.LLSC.result);
5038          if (stmt->Ist.LLSC.storedata == NULL) {
5039             /* it's a LL */
5040             if (tyRes != Ity_I64 && tyRes != Ity_I32
5041                 && tyRes != Ity_I16 && tyRes != Ity_I8)
5042                sanityCheckFail(bb,stmt,"Ist.LLSC(LL).result :: bogus");
5043          } else {
5044             /* it's a SC */
5045             if (tyRes != Ity_I1)
5046                sanityCheckFail(bb,stmt,"Ist.LLSC(SC).result: not :: Ity_I1");
5047             tyData = typeOfIRExpr(tyenv, stmt->Ist.LLSC.storedata);
5048             if (tyData != Ity_I64 && tyData != Ity_I32
5049                 && tyData != Ity_I16 && tyData != Ity_I8)
5050                sanityCheckFail(bb,stmt,
5051                                "Ist.LLSC(SC).result :: storedata bogus");
5052          }
5053          break;
5054       }
5055       case Ist_Dirty: {
5056          /* Mostly check for various kinds of ill-formed dirty calls. */
5057          const IRDirty* d = stmt->Ist.Dirty.details;
5058          if (d->cee == NULL) goto bad_dirty;
5059          if (!saneIRCallee(d->cee)) goto bad_dirty;
5060          if (d->cee->regparms > countArgs(d->args)) goto bad_dirty;
5061          if (d->mFx == Ifx_None) {
5062             if (d->mAddr != NULL || d->mSize != 0)
5063                goto bad_dirty;
5064          } else {
5065             if (d->mAddr == NULL || d->mSize == 0)
5066                goto bad_dirty;
5067          }
5068          if (d->nFxState < 0 || d->nFxState > VEX_N_FXSTATE)
5069             goto bad_dirty;
5070          for (i = 0; i < d->nFxState; i++) {
5071             if (d->fxState[i].fx == Ifx_None) goto bad_dirty;
5072             if (d->fxState[i].size <= 0) goto bad_dirty;
5073             if (d->fxState[i].nRepeats == 0) {
5074                if (d->fxState[i].repeatLen != 0) goto bad_dirty;
5075             } else {
5076                if (d->fxState[i].repeatLen <= d->fxState[i].size)
5077                   goto bad_dirty;
5078                /* the % is safe because of the .size check above */
5079                if ((d->fxState[i].repeatLen % d->fxState[i].size) != 0)
5080                   goto bad_dirty;
5081             }
5082          }
5083          /* check guard */
5084          if (d->guard == NULL) goto bad_dirty;
5085          tcExpr( bb, stmt, d->guard, gWordTy );
5086          if (typeOfIRExpr(tyenv, d->guard) != Ity_I1)
5087             sanityCheckFail(bb,stmt,"IRStmt.Dirty.guard not :: Ity_I1");
5088          /* check types, minimally */
5089          IRType retTy = Ity_INVALID;
5090          if (d->tmp != IRTemp_INVALID) {
5091             retTy = typeOfIRTemp(tyenv, d->tmp);
5092             if (retTy == Ity_I1)
5093                sanityCheckFail(bb,stmt,"IRStmt.Dirty.dst :: Ity_I1");
5094          }
5095          UInt nVECRETs = 0, nGSPTRs = 0;
5096          for (i = 0; d->args[i] != NULL; i++) {
5097             if (i >= 32)
5098                sanityCheckFail(bb,stmt,"IRStmt.Dirty: > 32 args");
5099             const IRExpr* arg = d->args[i];
5100             if (UNLIKELY(arg->tag == Iex_VECRET)) {
5101                nVECRETs++;
5102             } else if (UNLIKELY(arg->tag == Iex_GSPTR)) {
5103                nGSPTRs++;
5104             } else {
5105                if (typeOfIRExpr(tyenv, arg) == Ity_I1)
5106                   sanityCheckFail(bb,stmt,"IRStmt.Dirty.arg[i] :: Ity_I1");
5107             }
5108             if (nGSPTRs > 1) {
5109                sanityCheckFail(bb,stmt,"IRStmt.Dirty.args: > 1 GSPTR arg");
5110             }
5111             if (nVECRETs == 1) {
5112                /* Fn must return V128 or V256. */
5113                if (retTy != Ity_V128 && retTy != Ity_V256)
5114                   sanityCheckFail(bb,stmt,
5115                                   "IRStmt.Dirty.args: VECRET present, "
5116                                   "but fn does not return V128 or V256");
5117             } else if (nVECRETs == 0) {
5118                /* Fn must not return V128 or V256 */
5119                if (retTy == Ity_V128 || retTy == Ity_V256)
5120                   sanityCheckFail(bb,stmt,
5121                                   "IRStmt.Dirty.args: VECRET not present, "
5122                                   "but fn returns V128 or V256");
5123             } else {
5124                sanityCheckFail(bb,stmt,
5125                                "IRStmt.Dirty.args: > 1 VECRET present");
5126             }
5127          }
5128          if (nGSPTRs > 1) {
5129             sanityCheckFail(bb,stmt,
5130                             "IRStmt.Dirty.args: > 1 GSPTR present");
5131          }
5132          /* If you ask for the baseblock pointer, you have to make
5133             some declaration about access to the guest state too. */
5134          if (d->nFxState == 0 && nGSPTRs != 0) {
5135             sanityCheckFail(bb,stmt,
5136                             "IRStmt.Dirty.args: GSPTR requested, "
5137                             "but no fxState declared");
5138          }
5139         break;
5140          bad_dirty:
5141          sanityCheckFail(bb,stmt,"IRStmt.Dirty: ill-formed");
5142          break;
5143       }
5144       case Ist_NoOp:
5145          break;
5146       case Ist_MBE:
5147          switch (stmt->Ist.MBE.event) {
5148             case Imbe_Fence: case Imbe_CancelReservation:
5149                break;
5150             default: sanityCheckFail(bb,stmt,"IRStmt.MBE.event: unknown");
5151                break;
5152          }
5153          break;
5154       case Ist_Exit:
5155          tcExpr( bb, stmt, stmt->Ist.Exit.guard, gWordTy );
5156          if (typeOfIRExpr(tyenv,stmt->Ist.Exit.guard) != Ity_I1)
5157             sanityCheckFail(bb,stmt,"IRStmt.Exit.guard: not :: Ity_I1");
5158          if (!saneIRConst(stmt->Ist.Exit.dst))
5159             sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: bad dst");
5160          if (typeOfIRConst(stmt->Ist.Exit.dst) != gWordTy)
5161             sanityCheckFail(bb,stmt,"IRStmt.Exit.dst: not :: guest word type");
5162          /* because it would intersect with host_EvC_* */
5163          if (stmt->Ist.Exit.offsIP < 16)
5164             sanityCheckFail(bb,stmt,"IRStmt.Exit.offsIP: too low");
5165          break;
5166       default:
5167          vpanic("tcStmt");
5168    }
5169 }
5170
5171 void sanityCheckIRSB ( const IRSB* bb, const HChar* caller,
5172                        Bool require_flat, IRType guest_word_size )
5173 {
5174    Int     i;
5175    Int     n_temps    = bb->tyenv->types_used;
5176    Int*    def_counts = LibVEX_Alloc_inline(n_temps * sizeof(Int));
5177
5178    if (0)
5179       vex_printf("sanityCheck: %s\n", caller);
5180
5181    vassert(guest_word_size == Ity_I32
5182            || guest_word_size == Ity_I64);
5183
5184    if (bb->stmts_used < 0 || bb->stmts_size < 8
5185        || bb->stmts_used > bb->stmts_size)
5186       /* this BB is so strange we can't even print it */
5187       vpanic("sanityCheckIRSB: stmts array limits wierd");
5188
5189    /* Ensure each temp has a plausible type. */
5190    for (i = 0; i < n_temps; i++) {
5191       IRType ty = typeOfIRTemp(bb->tyenv,(IRTemp)i);
5192       if (!isPlausibleIRType(ty)) {
5193          vex_printf("Temp t%d declared with implausible type 0x%x\n",
5194                     i, (UInt)ty);
5195          sanityCheckFail(bb,NULL,"Temp declared with implausible type");
5196       }
5197    }
5198
5199    const IRStmt* stmt;
5200
5201    /* Check for flatness, if required. */
5202    if (require_flat) {
5203       for (i = 0; i < bb->stmts_used; i++) {
5204          stmt = bb->stmts[i];
5205          if (!stmt)
5206             sanityCheckFail(bb, stmt, "IRStmt: is NULL");
5207          if (!isFlatIRStmt(stmt))
5208             sanityCheckFail(bb, stmt, "IRStmt: is not flat");
5209       }
5210       if (!isIRAtom(bb->next))
5211          sanityCheckFail(bb, NULL, "bb->next is not an atom");
5212    }
5213
5214    /* Count the defs of each temp.  Only one def is allowed.
5215       Also, check that each used temp has already been defd. */
5216
5217    for (i = 0; i < n_temps; i++)
5218       def_counts[i] = 0;
5219
5220    for (i = 0; i < bb->stmts_used; i++) {
5221       stmt = bb->stmts[i];
5222       /* Check any temps used by this statement. */
5223       useBeforeDef_Stmt(bb,stmt,def_counts);
5224
5225       /* Now make note of any temps defd by this statement. */
5226       assignedOnce_Stmt(bb, stmt, def_counts, n_temps);
5227    }
5228
5229    /* Typecheck everything. */
5230    for (i = 0; i < bb->stmts_used; i++)
5231       tcStmt(bb, bb->stmts[i], guest_word_size);
5232    if (typeOfIRExpr(bb->tyenv,bb->next) != guest_word_size)
5233       sanityCheckFail(bb, NULL, "bb->next field has wrong type");
5234    /* because it would intersect with host_EvC_* */
5235    if (bb->offsIP < 16)
5236       sanityCheckFail(bb, NULL, "bb->offsIP: too low");
5237 }
5238
5239 /*---------------------------------------------------------------*/
5240 /*--- Misc helper functions                                   ---*/
5241 /*---------------------------------------------------------------*/
5242
5243 Bool eqIRConst ( const IRConst* c1, const IRConst* c2 )
5244 {
5245    if (c1->tag != c2->tag)
5246       return False;
5247
5248    switch (c1->tag) {
5249       case Ico_U1:  return toBool( (1 & c1->Ico.U1) == (1 & c2->Ico.U1) );
5250       case Ico_U8:  return toBool( c1->Ico.U8  == c2->Ico.U8 );
5251       case Ico_U16: return toBool( c1->Ico.U16 == c2->Ico.U16 );
5252       case Ico_U32: return toBool( c1->Ico.U32 == c2->Ico.U32 );
5253       case Ico_U64: return toBool( c1->Ico.U64 == c2->Ico.U64 );
5254       case Ico_F32: return toBool( c1->Ico.F32 == c2->Ico.F32 );
5255       case Ico_F32i: return toBool( c1->Ico.F32i == c2->Ico.F32i );
5256       case Ico_F64: return toBool( c1->Ico.F64 == c2->Ico.F64 );
5257       case Ico_F64i: return toBool( c1->Ico.F64i == c2->Ico.F64i );
5258       case Ico_V128: return toBool( c1->Ico.V128 == c2->Ico.V128 );
5259       case Ico_V256: return toBool( c1->Ico.V256 == c2->Ico.V256 );
5260       default: vpanic("eqIRConst");
5261    }
5262 }
5263
5264 Bool eqIRRegArray ( const IRRegArray* descr1, const IRRegArray* descr2 )
5265 {
5266    return toBool( descr1->base == descr2->base
5267                   && descr1->elemTy == descr2->elemTy
5268                   && descr1->nElems == descr2->nElems );
5269 }
5270
5271 Int sizeofIRType ( IRType ty )
5272 {
5273    switch (ty) {
5274       case Ity_I8:   return 1;
5275       case Ity_I16:  return 2;
5276       case Ity_I32:  return 4;
5277       case Ity_I64:  return 8;
5278       case Ity_I128: return 16;
5279       case Ity_F16:  return 2;
5280       case Ity_F32:  return 4;
5281       case Ity_F64:  return 8;
5282       case Ity_F128: return 16;
5283       case Ity_D32:  return 4;
5284       case Ity_D64:  return 8;
5285       case Ity_D128: return 16;
5286       case Ity_V128: return 16;
5287       case Ity_V256: return 32;
5288       default: vex_printf("\n"); ppIRType(ty); vex_printf("\n");
5289                vpanic("sizeofIRType");
5290    }
5291 }
5292
5293 IRType integerIRTypeOfSize ( Int szB )
5294 {
5295    switch (szB) {
5296       case 8: return Ity_I64;
5297       case 4: return Ity_I32;
5298       case 2: return Ity_I16;
5299       case 1: return Ity_I8;
5300       default: vpanic("integerIRTypeOfSize");
5301    }
5302 }
5303
5304 IRExpr* mkIRExpr_HWord ( HWord hw )
5305 {
5306    vassert(sizeof(void*) == sizeof(HWord));
5307    if (sizeof(RegWord) == 4)
5308       return IRExpr_Const(IRConst_U32((UInt)hw));
5309    if (sizeof(RegWord) == 8)
5310       return IRExpr_Const(IRConst_U64((ULong)hw));
5311    vpanic("mkIRExpr_HWord");
5312 }
5313
5314 IRDirty* unsafeIRDirty_0_N ( Int regparms, const HChar* name, void* addr,
5315                              IRExpr** args )
5316 {
5317    IRDirty* d = emptyIRDirty();
5318    d->cee   = mkIRCallee ( regparms, name, addr );
5319    d->guard = IRExpr_Const(IRConst_U1(True));
5320    d->args  = args;
5321    return d;
5322 }
5323
5324 IRDirty* unsafeIRDirty_1_N ( IRTemp dst,
5325                              Int regparms, const HChar* name, void* addr,
5326                              IRExpr** args )
5327 {
5328    IRDirty* d = emptyIRDirty();
5329    d->cee   = mkIRCallee ( regparms, name, addr );
5330    d->guard = IRExpr_Const(IRConst_U1(True));
5331    d->args  = args;
5332    d->tmp   = dst;
5333    return d;
5334 }
5335
5336 IRExpr* mkIRExprCCall ( IRType retty,
5337                         Int regparms, const HChar* name, void* addr,
5338                         IRExpr** args )
5339 {
5340    return IRExpr_CCall ( mkIRCallee ( regparms, name, addr ),
5341                          retty, args );
5342 }
5343
5344 Bool eqIRAtom ( const IRExpr* a1, const IRExpr* a2 )
5345 {
5346    vassert(isIRAtom(a1));
5347    vassert(isIRAtom(a2));
5348    if (a1->tag == Iex_RdTmp && a2->tag == Iex_RdTmp)
5349       return toBool(a1->Iex.RdTmp.tmp == a2->Iex.RdTmp.tmp);
5350    if (a1->tag == Iex_Const && a2->tag == Iex_Const)
5351       return eqIRConst(a1->Iex.Const.con, a2->Iex.Const.con);
5352    return False;
5353 }
5354
5355 /*---------------------------------------------------------------*/
5356 /*--- end                                           ir_defs.c ---*/
5357 /*---------------------------------------------------------------*/