Bug 439685 compiler warning in callgrind/main.c
[valgrind.git] / coregrind / m_debuginfo / readdwarf.c
blob79d6764eafeeab65c2a3702196485ff12ce0d536
1 /* -*- mode: C; c-basic-offset: 3; -*- */
3 /*--------------------------------------------------------------------*/
4 /*--- Read DWARF1/2/3/4 debug info. readdwarf.c ---*/
5 /*--------------------------------------------------------------------*/
7 /*
8 This file is part of Valgrind, a dynamic binary instrumentation
9 framework.
11 Copyright (C) 2000-2017 Julian Seward
12 jseward@acm.org
14 This program is free software; you can redistribute it and/or
15 modify it under the terms of the GNU General Public License as
16 published by the Free Software Foundation; either version 2 of the
17 License, or (at your option) any later version.
19 This program is distributed in the hope that it will be useful, but
20 WITHOUT ANY WARRANTY; without even the implied warranty of
21 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 General Public License for more details.
24 You should have received a copy of the GNU General Public License
25 along with this program; if not, see <http://www.gnu.org/licenses/>.
27 The GNU General Public License is contained in the file COPYING.
30 #if defined(VGO_linux) || defined(VGO_darwin) || defined(VGO_solaris) || defined(VGO_freebsd)
32 #include "pub_core_basics.h"
33 #include "pub_core_debuginfo.h"
34 #include "pub_core_libcbase.h"
35 #include "pub_core_libcassert.h"
36 #include "pub_core_libcprint.h"
37 #include "pub_core_options.h"
38 #include "pub_core_xarray.h"
39 #include "pub_core_tooliface.h" /* VG_(needs) */
40 #include "priv_misc.h" /* dinfo_zalloc/free/strdup */
41 #include "priv_image.h"
42 #include "priv_d3basics.h"
43 #include "priv_tytypes.h"
44 #include "priv_storage.h"
45 #include "priv_readdwarf.h" /* self */
48 /*------------------------------------------------------------*/
49 /*--- ---*/
50 /*--- Read line number and CFI info from DWARF1, DWARF2 ---*/
51 /*--- and to some extent DWARF3 sections. ---*/
52 /*--- ---*/
53 /*------------------------------------------------------------*/
55 /* The below "safe_*ix" functions allow to resist to malformed dwarf info:
56 if dwarf info contains wrong file or dirname indexes, these are (silently!)
57 ignored. */
59 /* if xa_ix is a valid index in fndn_ix_xa,
60 return the element (i.e. the UInt indexing in fndnpool).
61 If xa_ix is invalid, return 0 (i.e. the "null" element in fndnpool). */
62 static UInt safe_fndn_ix (XArray* fndn_ix_xa, Int xa_ix)
64 if (xa_ix < 0) return 0;
65 if (xa_ix >= VG_(sizeXA) (fndn_ix_xa)) return 0;
66 return *(UInt*)VG_(indexXA) ( fndn_ix_xa, xa_ix );
69 /* if xa_ix is a valid index in dirname_xa,
70 return the element (i.e. the HChar*).
71 If xa_ix is invalid, return NULL. */
72 static const HChar* safe_dirname_ix (XArray* dirname_xa, Int xa_ix)
74 if (xa_ix < 0) return NULL;
75 if (xa_ix >= VG_(sizeXA) (dirname_xa)) return NULL;
76 return *(HChar**)VG_(indexXA) ( dirname_xa, xa_ix );
79 /*------------------------------------------------------------*/
80 /*--- Read DWARF2 format line number info. ---*/
81 /*------------------------------------------------------------*/
83 /* Structure holding info extracted from the a .debug_line
84 section. */
85 typedef struct
87 ULong li_length;
88 UShort li_version;
89 ULong li_header_length;
90 UChar li_min_insn_length;
91 UChar li_max_ops_per_insn;
92 Int li_line_base;
93 UChar li_line_range;
94 UChar li_opcode_base;
96 DebugLineInfo;
98 /* Structure holding additional infos found from a .debug_info
99 * compilation unit block */
100 typedef struct
102 /* Feel free to add more members here if you need ! */
103 DiCursor compdir; /* Compilation directory - points to .debug_info */
104 DiCursor name; /* Main file name - points to .debug_info */
105 ULong stmt_list; /* Offset in .debug_line */
106 Bool dw64; /* 64-bit Dwarf? */
108 UnitInfo;
110 /* Line number opcodes. */
111 enum dwarf_line_number_ops
113 DW_LNS_extended_op = 0,
114 DW_LNS_copy = 1,
115 DW_LNS_advance_pc = 2,
116 DW_LNS_advance_line = 3,
117 DW_LNS_set_file = 4,
118 DW_LNS_set_column = 5,
119 DW_LNS_negate_stmt = 6,
120 DW_LNS_set_basic_block = 7,
121 DW_LNS_const_add_pc = 8,
122 DW_LNS_fixed_advance_pc = 9,
123 /* DWARF 3. */
124 DW_LNS_set_prologue_end = 10,
125 DW_LNS_set_epilogue_begin = 11,
126 DW_LNS_set_isa = 12
129 /* Line number extended opcodes. */
130 enum dwarf_line_number_x_ops
132 DW_LNE_end_sequence = 1,
133 DW_LNE_set_address = 2,
134 DW_LNE_define_file = 3,
135 DW_LNE_set_discriminator = 4
138 typedef struct
140 /* Information for the last statement boundary.
141 * Needed to calculate statement lengths. */
142 Addr last_address;
143 UInt last_file;
144 UInt last_line;
146 Addr address;
147 UInt file;
148 UInt line;
149 UInt column;
150 Int basic_block;
151 UChar end_sequence;
152 } LineSMR;
155 /* FIXME: duplicated in readdwarf3.c */
156 /* Read a 'leb128' and advance *data accordingly. */
157 static ULong step_leb128 ( DiCursor* data, Int sign )
159 ULong result = 0;
160 Int shift = 0;
161 UChar byte;
163 vg_assert(sign == 0 || sign == 1);
165 do {
166 byte = ML_(cur_step_UChar)(data);
167 result |= ((ULong)(byte & 0x7f)) << shift;
168 shift += 7;
170 while (byte & 0x80);
172 if (sign && (shift < 64) && (byte & 0x40))
173 result |= -(1ULL << shift);
175 return result;
178 /* FIXME: duplicated in readdwarf3.c */
179 static ULong step_leb128U( DiCursor* data ) {
180 return step_leb128( data, 0 );
183 /* FIXME: duplicated in readdwarf3.c */
184 static Long step_leb128S( DiCursor* data ) {
185 return step_leb128( data, 1 );
188 /* Read what the DWARF3 spec calls an "initial length field". This
189 uses up either 4 or 12 bytes of the input and produces a 32-bit or
190 64-bit number respectively.
192 Read 32-bit value from p. If it is 0xFFFFFFFF, instead read a
193 64-bit bit value from p+4. This is used in 64-bit dwarf to encode
194 some table lengths. Advance the cursor (p) accordingly.
196 XXX this is a hack: the endianness of the initial length field is
197 specified by the DWARF we're reading. This happens to work only
198 because we don't do cross-arch jitting, hence this code runs on a
199 platform of the same endianness as the DWARF it is reading. Same
200 applies for initial lengths for CIE/FDEs and probably in zillions
201 of other places -- to be precise, exactly the places where
202 binutils/dwarf.c calls byte_get().
204 static
205 ULong step_initial_length_field ( DiCursor* p_img, /*OUT*/Bool* is64 )
207 UInt w32 = ML_(cur_step_UInt)(p_img);
208 if (w32 == 0xFFFFFFFF) {
209 *is64 = True;
210 return ML_(cur_step_ULong)(p_img);
211 } else {
212 *is64 = False;
213 return (ULong)w32;
217 static
218 ULong read_initial_length_field ( DiCursor p_img, /*OUT*/Bool* is64 )
220 /* Something of a roundabout approach .. the modification to p_img
221 is abandoned. */
222 return step_initial_length_field( &p_img, is64 );
226 static LineSMR state_machine_regs;
228 static
229 void reset_state_machine ( void )
231 if (0) VG_(printf)("smr.a := %p (reset)\n", NULL );
232 state_machine_regs.last_address = 0;
233 state_machine_regs.last_file = 1;
234 state_machine_regs.last_line = 1;
235 state_machine_regs.address = 0;
236 state_machine_regs.file = 1;
237 state_machine_regs.line = 1;
238 state_machine_regs.column = 0;
239 state_machine_regs.basic_block = 0;
240 state_machine_regs.end_sequence = 0;
243 ////////////////////////////////////////////////////////////////////
244 ////////////////////////////////////////////////////////////////////
246 /* Handled an extended line op starting at *data, and advance *data
247 accordingly. */
248 static
249 void process_extended_line_op( struct _DebugInfo* di,
250 XArray* fndn_ix_xa,
251 DiCursor* data )
253 UInt len = step_leb128U(data);
254 if (len == 0) {
255 VG_(message)(Vg_UserMsg,
256 "Warning: DWARF2 reader: "
257 "Badly formed extended line op encountered\n");
258 return;
261 UChar op_code = ML_(cur_step_UChar)(data);
262 if (0) VG_(printf)("dwarf2: ext OPC: %d\n", op_code);
264 switch (op_code) {
265 case DW_LNE_end_sequence:
266 if (0) VG_(printf)("1001: si->o %#lx, smr.a %#lx\n",
267 (UWord)di->text_debug_bias,
268 state_machine_regs.address );
269 /* JRS: added for compliance with spec; is pointless due to
270 reset_state_machine below */
271 state_machine_regs.end_sequence = 1;
273 if (state_machine_regs.last_address) {
274 ML_(addLineInfo)(
276 safe_fndn_ix(fndn_ix_xa,
277 state_machine_regs.last_file),
278 di->text_debug_bias + state_machine_regs.last_address,
279 di->text_debug_bias + state_machine_regs.address,
280 state_machine_regs.last_line, 0
283 reset_state_machine();
284 if (di->ddump_line)
285 VG_(printf)(" Extended opcode %d: End of Sequence\n\n",
286 (Int)op_code);
287 break;
289 case DW_LNE_set_address: {
290 Addr adr = ML_(cur_step_Addr)(data);
291 state_machine_regs.address = adr;
292 if (di->ddump_line)
293 VG_(printf)(" Extended opcode %d: set Address to 0x%lx\n",
294 (Int)op_code, (Addr)adr);
295 break;
298 case DW_LNE_define_file: {
299 HChar* name = ML_(cur_step_strdup)(data, "di.pelo.1");
300 UInt fndn_ix = ML_(addFnDn) (di, name, NULL);
301 VG_(addToXA) (fndn_ix_xa, &fndn_ix);
302 ML_(dinfo_free)(name);
303 (void)step_leb128U(data); // ignored: dir index
304 (void)step_leb128U(data); // ignored: mod time
305 (void)step_leb128U(data); // ignored: file size
306 if (di->ddump_line)
307 VG_(printf)(" DWARF2-line: set_address\n");
308 break;
311 case DW_LNE_set_discriminator:
312 (void)step_leb128U(data); // ignored: new 'discriminator' value
313 break;
315 default:
316 if (di->ddump_line)
317 VG_(printf)("process_extended_line_op:default\n");
318 break;
322 ////////////////////////////////////////////////////////////////////
323 ////////////////////////////////////////////////////////////////////
325 static
326 HChar * get_line_str (struct _DebugInfo* di, const UnitInfo* ui,
327 DiCursor *data, const UInt form,
328 DiCursor debugstr_img, DiCursor debuglinestr_img)
330 HChar *str = NULL;
331 switch (form) {
332 case DW_FORM_string:
333 str = ML_(cur_step_strdup)(data, "di.gls.string");
334 break;
335 case DW_FORM_strp:
336 if (!ui->dw64)
337 str = ML_(cur_read_strdup)(ML_(cur_plus)(debugstr_img,
338 ML_(cur_step_UInt)(data)),
339 "di.gls.strp.dw32");
340 else
341 str = ML_(cur_read_strdup)(ML_(cur_plus)(debugstr_img,
342 ML_(cur_step_ULong)(data)),
343 "di.gls.strp.dw64");
344 break;
345 case DW_FORM_line_strp:
346 if (!ui->dw64)
347 str = ML_(cur_read_strdup)(ML_(cur_plus)(debuglinestr_img,
348 ML_(cur_step_UInt)(data)),
349 "di.gls.line_strp.dw32");
350 else
351 str = ML_(cur_read_strdup)(ML_(cur_plus)(debuglinestr_img,
352 ML_(cur_step_ULong)(data)),
353 "di.gls.line_strp.dw64");
354 break;
355 default:
356 ML_(symerr)(di, True,
357 "Unknown path string FORM in .debug_line");
358 break;
360 return str;
363 static
364 Int get_line_ndx (struct _DebugInfo* di,
365 DiCursor *data, const UInt form)
367 Int res = 0;
368 switch (form) {
369 case DW_FORM_data1:
370 res = ML_(cur_step_UChar)(data);
371 break;
372 case DW_FORM_data2:
373 res = ML_(cur_step_UShort)(data);
374 break;
375 case DW_FORM_udata:
376 res = step_leb128U(data);
377 break;
378 default:
379 ML_(symerr)(di, True,
380 "Unknown directory_index value FORM in .debug_line");
381 break;
383 return res;
386 static
387 DiCursor skip_line_form (struct _DebugInfo* di, const UnitInfo* ui,
388 DiCursor d, const UInt form)
390 switch (form) {
391 case DW_FORM_block: {
392 ULong len = step_leb128U(&d);
393 d = ML_(cur_plus)(d, len);
394 break;
396 case DW_FORM_block1:
397 d = ML_(cur_plus)(d, ML_(cur_read_UChar)(d) + 1);
398 break;
399 case DW_FORM_block2:
400 d = ML_(cur_plus)(d, ML_(cur_read_UShort)(d) + 2);
401 break;
402 case DW_FORM_block4:
403 d = ML_(cur_plus)(d, ML_(cur_read_UInt)(d) + 4);
404 break;
405 case DW_FORM_flag:
406 case DW_FORM_data1:
407 d = ML_(cur_plus)(d, 1);
408 break;
409 case DW_FORM_data2:
410 d = ML_(cur_plus)(d, 2);
411 break;
412 case DW_FORM_data4:
413 d = ML_(cur_plus)(d, 4);
414 break;
415 case DW_FORM_data8:
416 d = ML_(cur_plus)(d, 8);
417 break;
418 case DW_FORM_data16:
419 d = ML_(cur_plus)(d, 16);
420 break;
421 case DW_FORM_string:
422 d = ML_(cur_plus)(d, ML_(cur_strlen)(d) + 1);
423 break;
424 case DW_FORM_strp:
425 case DW_FORM_line_strp:
426 case DW_FORM_sec_offset:
427 d = ML_(cur_plus)(d, ui->dw64 ? 8 : 4);
428 break;
429 case DW_FORM_udata:
430 (void)step_leb128U(&d);
431 break;
432 case DW_FORM_sdata:
433 (void)step_leb128S(&d);
434 break;
435 default:
436 ML_(symerr)(di, True, "Unknown FORM in .debug_line");
437 break;
439 return d;
442 /* read a .debug_line section block for a compilation unit
444 * Input: - theBlock must point to the start of the block
445 * for the given compilation unit
446 * - ui contains additional info like the compilation dir
447 * for this unit
449 * Output: - si debug info structures get updated
451 static
452 void read_dwarf2_lineblock ( struct _DebugInfo* di,
453 const UnitInfo* ui,
454 DiCursor theBlock, /* IMAGE */
455 Int noLargerThan,
456 DiCursor debugstr_img,
457 DiCursor debuglinestr_img)
459 Int i;
460 DebugLineInfo info;
461 Bool is64;
462 XArray* fndn_ix_xa; /* xarray of UInt fndn_ix */
463 UInt fndn_ix;
464 XArray* dirname_xa; /* xarray of const HChar* dirname */
465 const HChar* dirname;
467 DiCursor external = theBlock;
468 DiCursor data = theBlock;
470 UChar p_ndx = 0, d_ndx = 0; /* DWARF5 path and dir index. */
471 UInt forms[256]; /* DWARF5 forms. */
473 /* fndn_ix_xa is an xarray of fndn_ix (indexes in di->fndnpool) which
474 are build from file names harvested from the DWARF2
475 info. Entry [0] is the "null" pool index and is never referred to
476 by the state machine.
478 Similarly, dirname_xa is an xarray of directory names. Entry [0]
479 is also NULL and denotes "we don't know what the path is", since
480 that is different from "the path is the empty string". Unlike
481 the fndn_ix_xa table, the state machine does refer to entry [0],
482 which basically means "." ("the current directory of the
483 compilation", whatever that means, according to the DWARF3
484 spec.)
487 /* Fails due to gcc padding ...
488 vg_assert(sizeof(DWARF2_External_LineInfo)
489 == sizeof(DWARF2_Internal_LineInfo));
492 dirname_xa = VG_(newXA) (ML_(dinfo_zalloc), "di.rd2l.1", ML_(dinfo_free),
493 sizeof(HChar*) );
494 fndn_ix_xa = VG_(newXA) (ML_(dinfo_zalloc), "di.rd2l.2", ML_(dinfo_free),
495 sizeof(UInt) );
497 info.li_length = step_initial_length_field( &external, &is64 );
498 if (di->ddump_line)
499 VG_(printf)(" Length: %llu\n",
500 info.li_length);
502 /* Check the length of the block. */
503 if (info.li_length > noLargerThan) {
504 ML_(symerr)(di, True,
505 "DWARF line info appears to be corrupt "
506 "- the section is too small");
507 goto out;
510 /* Check its version number. */
511 info.li_version = ML_(cur_step_UShort)(&external);
512 if (di->ddump_line)
513 VG_(printf)(" DWARF Version: %d\n",
514 (Int)info.li_version);
516 if (info.li_version != 2 && info.li_version != 3 && info.li_version != 4
517 && info.li_version != 5) {
518 ML_(symerr)(di, True,
519 "Only DWARF version 2, 3, 4 and 5 line info "
520 "is currently supported.");
521 goto out;
524 if (info.li_version >= 5) {
525 /* UChar addr_size = */ ML_(cur_step_UChar)(&external);
526 /* UChar seg_size = */ ML_(cur_step_UChar)(&external);
529 info.li_header_length = is64 ? ML_(cur_step_ULong)(&external)
530 : (ULong)(ML_(cur_step_UInt)(&external));
531 if (di->ddump_line)
532 VG_(printf)(" Prologue Length: %llu\n",
533 info.li_header_length);
535 info.li_min_insn_length = ML_(cur_step_UChar)(&external);
536 if (di->ddump_line)
537 VG_(printf)(" Minimum Instruction Length: %d\n",
538 (Int)info.li_min_insn_length);
540 /* We only support machines with one opcode per instruction
541 for now. If we ever want to support VLIW machines there is
542 code to handle multiple opcodes per instruction in the
543 patch attached to BZ#233595.
545 if (info.li_version >= 4) {
546 info.li_max_ops_per_insn = ML_(cur_step_UChar)(&external);
547 if (info.li_max_ops_per_insn != 1) {
548 ML_(symerr)(di, True,
549 "Invalid Maximum Ops Per Insn in line info.");
550 goto out;
552 if (di->ddump_line)
553 VG_(printf)(" Maximum Ops Per Insn: %d\n",
554 (Int)info.li_max_ops_per_insn);
555 } else {
556 info.li_max_ops_per_insn = 1;
559 /* Register is_stmt is not tracked as we are interested only
560 in pc -> line info mapping and not other debugger features. */
561 /* default_is_stmt = */ ML_(cur_step_UChar)(&external);
563 /* JRS: changed (UInt*) to (UChar*) */
564 info.li_line_base = ML_(cur_step_UChar)(&external);
565 info.li_line_base = (Int)(Char)info.li_line_base;
566 if (di->ddump_line)
567 VG_(printf)(" Line Base: %d\n",
568 info.li_line_base);
570 info.li_line_range = ML_(cur_step_UChar)(&external);
571 if (di->ddump_line)
572 VG_(printf)(" Line Range: %d\n",
573 (Int)info.li_line_range);
575 info.li_opcode_base = ML_(cur_step_UChar)(&external);
576 if (di->ddump_line)
577 VG_(printf)(" Opcode Base: %d\n\n",
578 info.li_opcode_base);
580 if (0) VG_(printf)("dwarf2: line base: %d, range %d, opc base: %d\n",
581 (Int)info.li_line_base,
582 (Int)info.li_line_range,
583 (Int)info.li_opcode_base);
585 DiCursor end_of_sequence
586 = ML_(cur_plus)(data, info.li_length + (is64 ? 12 : 4));
588 reset_state_machine();
590 /* Read the contents of the Opcodes table. */
591 DiCursor standard_opcodes = external;
592 if (di->ddump_line) {
593 VG_(printf)(" Opcodes:\n");
594 for (i = 1; i < (Int)info.li_opcode_base; i++) {
595 VG_(printf)(" Opcode %d has %d args\n",
596 i, (Int)ML_(cur_read_UChar)(
597 ML_(cur_plus)(standard_opcodes,
598 (i-1) * sizeof(UChar)) ));
600 VG_(printf)("\n");
602 /* skip over "standard_opcode_lengths" */
603 data = ML_(cur_plus)(standard_opcodes, info.li_opcode_base - 1);
605 if (ML_(cur_is_valid)(ui->compdir))
606 dirname = ML_(addStrFromCursor)(di, ui->compdir);
607 else
608 dirname = ML_(addStr)(di, ".", -1);
610 if (info.li_version < 5) {
611 /* Read the contents of the Directory table. */
612 if (di->ddump_line)
613 VG_(printf)("The Directory Table%s\n",
614 ML_(cur_read_UChar)(data) == 0 ? " is empty." : ":" );
616 /* DWARF2 starts numbering filename entries at 1, so we need to
617 add a dummy zeroth entry to the table. */
618 fndn_ix = 0; // 0 is the "null" index in a fixed pool.
619 VG_(addToXA) (fndn_ix_xa, &fndn_ix);
620 VG_(addToXA) (dirname_xa, &dirname);
622 while (ML_(cur_read_UChar)(data) != 0) {
624 HChar* data_str = ML_(cur_read_strdup)(data, "di.rd2l.1");
625 if (di->ddump_line)
626 VG_(printf)(" %s\n", data_str);
628 /* If data[0] is '/', then 'data' is an absolute path and we
629 don't mess with it. Otherwise, construct the
630 path 'ui->compdir' ++ "/" ++ 'data'. */
632 if (data_str[0] != '/'
633 /* not an absolute path */
634 && ML_(cur_is_valid)(ui->compdir)
635 /* actually got something sensible for compdir */
636 && ML_(cur_strlen)(ui->compdir))
638 HChar* compdir_str = ML_(cur_read_strdup)(ui->compdir,
639 "di.rd2l.1b");
640 SizeT len = VG_(strlen)(compdir_str) + 1 + VG_(strlen)(data_str);
641 HChar *buf = ML_(dinfo_zalloc)("di.rd2l.1c", len + 1);
643 VG_(strcpy)(buf, compdir_str);
644 VG_(strcat)(buf, "/");
645 VG_(strcat)(buf, data_str);
647 dirname = ML_(addStr)(di, buf, len);
648 VG_(addToXA) (dirname_xa, &dirname);
649 if (0) VG_(printf)("rel path %s\n", buf);
650 ML_(dinfo_free)(compdir_str);
651 ML_(dinfo_free)(buf);
652 } else {
653 /* just use 'data'. */
654 dirname = ML_(addStr)(di,data_str,-1);
655 VG_(addToXA) (dirname_xa, &dirname);
656 if (0) VG_(printf)("abs path %s\n", data_str);
659 data = ML_(cur_plus)(data, VG_(strlen)(data_str) + 1);
660 ML_(dinfo_free)(data_str);
663 if (di->ddump_line)
664 VG_(printf)("\n");
666 if (ML_(cur_read_UChar)(data) != 0) {
667 ML_(symerr)(di, True,
668 "can't find NUL at end of DWARF2 directory table");
669 goto out;
671 data = ML_(cur_plus)(data, 1);
672 } else {
673 UInt directories_count;
674 UChar directory_entry_format_count = ML_(cur_step_UChar)(&data);
675 UInt n;
676 for (n = 0; n < directory_entry_format_count; n++) {
677 UInt lnct = step_leb128U(&data);
678 UInt form = step_leb128U(&data);
679 if (lnct == DW_LNCT_path)
680 p_ndx = n;
681 forms[n] = form;
683 directories_count = step_leb128U(&data);
684 /* Read the contents of the Directory table. */
685 if (di->ddump_line)
686 VG_(printf)(" The Directory Table%s\n",
687 directories_count == 0 ? " is empty." : ":" );
689 for (n = 0; n < directories_count; n++) {
690 UInt f;
691 for (f = 0; f < directory_entry_format_count; f++) {
692 UInt form = forms[f];
693 if (f == p_ndx) {
694 HChar *data_str = get_line_str (di, ui, &data, form,
695 debugstr_img,
696 debuglinestr_img);
697 if (di->ddump_line)
698 VG_(printf)(" %s\n", data_str);
700 /* If data[0] is '/', then 'data' is an absolute path and we
701 don't mess with it. Otherwise, construct the
702 path 'ui->compdir' ++ "/" ++ 'data'. */
704 if (data_str[0] != '/'
705 /* not an absolute path */
706 && ML_(cur_is_valid)(ui->compdir)
707 /* actually got something sensible for compdir */
708 && ML_(cur_strlen)(ui->compdir))
710 HChar* compdir_str = ML_(cur_read_strdup)(ui->compdir,
711 "di.rd2l.1b");
712 SizeT len = VG_(strlen)(compdir_str) + 1
713 + VG_(strlen)(data_str);
714 HChar *buf = ML_(dinfo_zalloc)("di.rd2l.1c", len + 1);
716 VG_(strcpy)(buf, compdir_str);
717 VG_(strcat)(buf, "/");
718 VG_(strcat)(buf, data_str);
720 dirname = ML_(addStr)(di, buf, len);
721 VG_(addToXA) (dirname_xa, &dirname);
722 if (0) VG_(printf)("rel path %s\n", buf);
723 ML_(dinfo_free)(compdir_str);
724 ML_(dinfo_free)(buf);
725 } else {
726 /* just use 'data'. */
727 dirname = ML_(addStr)(di,data_str,-1);
728 VG_(addToXA) (dirname_xa, &dirname);
729 if (0) VG_(printf)("abs path %s\n", data_str);
732 ML_(dinfo_free)(data_str);
734 } else {
735 data = skip_line_form (di, ui, data, form);
741 /* Read the contents of the File Name table. This produces a bunch
742 of fndn_ix in fndn_ix_xa. */
743 if (di->ddump_line) {
744 VG_(printf)(" The File Name Table:\n");
745 VG_(printf)(" Entry Dir Time Size Name\n");
748 if (info.li_version < 5) {
749 i = 1;
750 while (ML_(cur_read_UChar)(data) != 0) {
751 HChar* name = ML_(cur_step_strdup)(&data, "di.rd2l.2");
752 Int diridx = step_leb128U(&data);
753 Int uu_time = step_leb128U(&data); /* unused */
754 Int uu_size = step_leb128U(&data); /* unused */
756 dirname = safe_dirname_ix( dirname_xa, diridx );
757 fndn_ix = ML_(addFnDn) (di, name, dirname);
758 VG_(addToXA) (fndn_ix_xa, &fndn_ix);
759 if (0) VG_(printf)("file %s diridx %d\n", name, diridx );
760 if (di->ddump_line)
761 VG_(printf)(" %d\t%d\t%d\t%d\t%s\n",
762 i, diridx, uu_time, uu_size, name);
763 i++;
764 ML_(dinfo_free)(name);
767 if (di->ddump_line)
768 VG_(printf)("\n");
770 if (ML_(cur_read_UChar)(data) != 0) {
771 ML_(symerr)(di, True,
772 "can't find NUL at end of DWARF2 file name table");
773 goto out;
775 data = ML_(cur_plus)(data, 1);
776 } else {
777 UInt file_names_count;
778 UChar file_names_entry_format_count = ML_(cur_step_UChar)(&data);
779 UInt n;
780 for (n = 0; n < file_names_entry_format_count; n++) {
781 UInt lnct = step_leb128U(&data);
782 UInt form = step_leb128U(&data);
783 if (lnct == DW_LNCT_path)
784 p_ndx = n;
785 if (lnct == DW_LNCT_directory_index)
786 d_ndx = n;
787 forms[n] = form;
789 file_names_count = step_leb128U(&data);
790 for (n = 0; n < file_names_count; n++) {
791 UInt f;
792 HChar* name = NULL;
793 Int diridx = 0;
794 for (f = 0; f < file_names_entry_format_count; f++) {
795 UInt form = forms[f];
796 if (f == p_ndx)
797 name = get_line_str (di, ui, &data, form,
798 debugstr_img, debuglinestr_img);
799 else if (f == d_ndx)
800 diridx = get_line_ndx (di, &data, form);
801 else
802 data = skip_line_form (di, ui, data, form);
805 dirname = safe_dirname_ix( dirname_xa, diridx );
806 fndn_ix = ML_(addFnDn) (di, name, dirname);
807 VG_(addToXA) (fndn_ix_xa, &fndn_ix);
808 if (0) VG_(printf)("file %s diridx %d\n", name, diridx );
809 if (di->ddump_line)
810 VG_(printf)(" %u\t%d\t%d\t%d\t%s\n",
811 n, diridx, 0, 0, name);
812 ML_(dinfo_free)(name);
815 if (di->ddump_line)
816 VG_(printf)("\n");
819 if (di->ddump_line)
820 VG_(printf)(" Line Number Statements:\n");
822 /* Now display the statements. */
824 while (ML_(cur_cmpLT)(data, end_of_sequence)) {
825 UChar op_code = ML_(cur_step_UChar)(&data);
827 if (0) VG_(printf)("dwarf2: OPC: %d\n", op_code);
829 if (op_code >= info.li_opcode_base) {
830 op_code -= info.li_opcode_base;
831 Word adv = (op_code / info.li_line_range)
832 * info.li_min_insn_length;
833 Int advAddr = adv;
834 state_machine_regs.address += adv;
836 if (0) VG_(printf)("smr.a += %#lx\n", (UWord)adv );
837 adv = (op_code % info.li_line_range) + info.li_line_base;
838 if (0) VG_(printf)("1002: di->o %#lx, smr.a %#lx\n",
839 (UWord)di->text_debug_bias,
840 state_machine_regs.address );
841 state_machine_regs.line += adv;
843 if (di->ddump_line)
844 VG_(printf)(" Special opcode %d: advance Address by %d "
845 "to 0x%lx and Line by %d to %d\n",
846 (Int)op_code, advAddr, state_machine_regs.address,
847 (Int)adv, (Int)state_machine_regs.line );
849 /* only add a statement if there was a previous boundary */
850 if (state_machine_regs.last_address) {
851 ML_(addLineInfo)(
853 safe_fndn_ix(fndn_ix_xa,
854 state_machine_regs.last_file),
855 di->text_debug_bias + state_machine_regs.last_address,
856 di->text_debug_bias + state_machine_regs.address,
857 state_machine_regs.last_line,
861 state_machine_regs.last_address = state_machine_regs.address;
862 state_machine_regs.last_file = state_machine_regs.file;
863 state_machine_regs.last_line = state_machine_regs.line;
866 else { /* ! (op_code >= info.li_opcode_base) */
868 switch (op_code) {
869 case DW_LNS_extended_op:
870 process_extended_line_op(di, fndn_ix_xa, &data);
871 break;
873 case DW_LNS_copy:
874 if (0) VG_(printf)("1002: di->o %#lx, smr.a %#lx\n",
875 (UWord)di->text_debug_bias,
876 state_machine_regs.address );
877 /* only add a statement if there was a previous boundary */
878 if (state_machine_regs.last_address) {
879 ML_(addLineInfo)(
881 safe_fndn_ix(fndn_ix_xa,
882 state_machine_regs.last_file),
883 di->text_debug_bias + state_machine_regs.last_address,
884 di->text_debug_bias + state_machine_regs.address,
885 state_machine_regs.last_line,
889 state_machine_regs.last_address = state_machine_regs.address;
890 state_machine_regs.last_file = state_machine_regs.file;
891 state_machine_regs.last_line = state_machine_regs.line;
892 state_machine_regs.basic_block = 0; /* JRS added */
893 if (di->ddump_line)
894 VG_(printf)(" Copy\n");
895 break;
897 case DW_LNS_advance_pc: {
898 UWord adv = info.li_min_insn_length * step_leb128U(&data);
899 state_machine_regs.address += adv;
900 if (0) VG_(printf)("smr.a += %#lx\n", adv );
901 if (di->ddump_line)
902 VG_(printf)(" Advance PC by %lu to 0x%lx\n",
903 adv, state_machine_regs.address);
904 break;
906 case DW_LNS_advance_line: {
907 Word adv = step_leb128S(&data);
908 state_machine_regs.line += adv;
909 if (di->ddump_line)
910 VG_(printf)(" Advance Line by %ld to %d\n",
911 adv, (Int)state_machine_regs.line);
912 break;
914 case DW_LNS_set_file: {
915 Word adv = step_leb128U(&data);
916 state_machine_regs.file = adv;
917 if (di->ddump_line)
918 VG_(printf)(" Set File Name to entry %ld in the "
919 "File Name Table\n", adv);
920 break;
922 case DW_LNS_set_column: {
923 Word adv = step_leb128U(&data);
924 state_machine_regs.column = adv;
925 if (di->ddump_line)
926 VG_(printf)(" Set column to %ld\n", adv);
927 break;
929 case DW_LNS_negate_stmt: {
930 if (di->ddump_line)
931 VG_(printf)(" DWARF2-line: negate_stmt\n");
932 break;
934 case DW_LNS_set_basic_block: {
935 state_machine_regs.basic_block = 1;
936 if (di->ddump_line)
937 VG_(printf)(" DWARF2-line: set_basic_block\n");
938 break;
940 case DW_LNS_const_add_pc: {
941 Word adv = (((255 - info.li_opcode_base) / info.li_line_range)
942 * info.li_min_insn_length);
943 state_machine_regs.address += adv;
944 if (0) VG_(printf)("smr.a += %#lx\n", (UWord)adv );
945 if (di->ddump_line)
946 VG_(printf)(" Advance PC by constant %ld to 0x%lx\n",
947 adv, (Addr)state_machine_regs.address);
948 break;
950 case DW_LNS_fixed_advance_pc: {
951 /* XXX: Need something to get 2 bytes */
952 UWord adv = ML_(cur_step_UShort)(&data);
953 state_machine_regs.address += adv;
954 if (0) VG_(printf)("smr.a += %#lx\n", adv );
955 if (di->ddump_line)
956 VG_(printf)(" DWARF2-line: fixed_advance_pc\n");
957 break;
959 case DW_LNS_set_prologue_end:
960 if (di->ddump_line)
961 VG_(printf)(" DWARF2-line: set_prologue_end\n");
962 break;
964 case DW_LNS_set_epilogue_begin:
965 if (di->ddump_line)
966 VG_(printf)(" DWARF2-line: set_epilogue_begin\n");
967 break;
969 case DW_LNS_set_isa:
970 (void)step_leb128U(&data);
971 if (di->ddump_line)
972 VG_(printf)(" DWARF2-line: set_isa\n");
973 break;
975 default: {
976 Int j;
977 for (j = (Int)ML_(cur_read_UChar)(
978 ML_(cur_plus)(standard_opcodes,
979 (op_code-1) * sizeof(UChar)));
980 j > 0 ; --j) {
981 step_leb128U(&data);
983 if (di->ddump_line)
984 VG_(printf)(" Unknown opcode %d\n", (Int)op_code);
985 break;
987 } /* switch (op_code) */
989 } /* if (op_code >= info.li_opcode_base) */
991 } /* while (data < end_of_sequence) */
993 if (di->ddump_line)
994 VG_(printf)("\n");
996 out:
997 VG_(deleteXA)(dirname_xa);
998 VG_(deleteXA)(fndn_ix_xa);
1001 ////////////////////////////////////////////////////////////////////
1002 ////////////////////////////////////////////////////////////////////
1004 /* Return abbrev for given code
1005 * Returned cursor points to the tag
1006 * */
1007 static DiCursor lookup_abbrev( DiCursor p, ULong acode )
1009 while (1) {
1010 ULong code = step_leb128U(&p);
1011 if (code == acode)
1012 return p;
1013 (void)step_leb128U(&p); /* skip tag */
1014 p = ML_(cur_plus)(p,1); /* skip has_children flag */
1015 ULong name;
1016 ULong form;
1017 do {
1018 name = step_leb128U(&p); /* name */
1019 form = step_leb128U(&p); /* form */
1020 if (form == 0x21) /* DW_FORM_implicit_const */
1021 step_leb128S(&p);
1023 while (name != 0); /* until name == form == 0 */
1027 /* Read general information for a particular compile unit block in
1028 * the .debug_info section. In particular read the name, compdir and
1029 * stmt_list needed to parse the line number information.
1031 * Input: - unitblock is the start of a compilation
1032 * unit block in .debuginfo section
1033 * - debugabbrev is start of .debug_abbrev section
1034 * - debugstr is start of .debug_str section
1035 * - debugstr_alt_img is start of .debug_str section in alt debug file
1037 * Output: Fill members of ui pertaining to the compilation unit:
1038 * - ui->name is the name of the compilation unit
1039 * - ui->compdir is the compilation unit directory
1040 * - ui->stmt_list is the offset in .debug_line section
1041 * for the dbginfos of this compilation unit
1043 * Note : the output strings are not allocated and point
1044 * directly to the memory-mapped section.
1046 static
1047 void read_unitinfo_dwarf2( /*OUT*/UnitInfo* ui,
1048 DiCursor unitblock_img,
1049 DiCursor debugabbrev_img,
1050 DiCursor debugstr_img,
1051 DiCursor debugstr_alt_img,
1052 DiCursor debuglinestr_img)
1054 UInt acode, abcode;
1055 ULong atoffs, blklen;
1056 UShort ver;
1058 UChar addr_size = 0;
1059 UChar unit_type = 0;
1060 DiCursor p = unitblock_img;
1061 DiCursor end_img;
1062 DiCursor abbrev_img;
1064 VG_(memset)( ui, 0, sizeof( UnitInfo ) );
1065 ui->stmt_list = -1LL;
1067 /* Read the compilation unit header in .debug_info section - See p 70 */
1069 /* This block length */
1070 blklen = step_initial_length_field( &p, &ui->dw64 );
1072 /* version should be 2, 3, 4 or 5 */
1073 ver = ML_(cur_step_UShort)(&p);
1075 if (ver >= 5)
1076 /* unit_type for DWARF5 */
1077 unit_type = ML_(cur_step_UChar)(&p);
1078 else
1079 /* get offset in abbrev */
1080 atoffs = ui->dw64 ? ML_(cur_step_ULong)(&p)
1081 : (ULong)(ML_(cur_step_UInt)(&p));
1083 /* Address size */
1084 addr_size = ML_(cur_step_UChar)(&p);
1086 if (ver >= 5) {
1087 /* get offset in abbrev */
1088 atoffs = ui->dw64 ? ML_(cur_step_ULong)(&p)
1089 : (ULong)(ML_(cur_step_UInt)(&p));
1091 /* read any extra fields */
1092 switch(unit_type) {
1093 case DW_UT_compile:
1094 case DW_UT_partial:
1095 break;
1096 case DW_UT_skeleton:
1097 case DW_UT_split_compile:
1098 /* dwo_id = */ ML_(cur_step_ULong)(&p);
1099 break;
1100 case DW_UT_type:
1101 case DW_UT_split_type:
1102 /* type_signature = */ ML_(cur_step_ULong)(&p);
1103 /* type_offset = */ ui->dw64 ? ML_(cur_step_ULong)(&p)
1104 : (ULong)(ML_(cur_step_UInt)(&p));
1105 break;
1106 default:
1107 VG_(printf)( "### unhandled dwarf2 unit_type code 0x%x\n",
1108 unit_type );
1109 break;
1113 /* End of this block */
1114 end_img = ML_(cur_plus)(unitblock_img, blklen + (ui->dw64 ? 12 : 4));
1116 /* Abbreviation data for this block */
1117 abbrev_img = ML_(cur_plus)(debugabbrev_img, atoffs);
1119 /* Read the compilation unit entry - this is always the first DIE.
1120 * See DWARF4 para 7.5. */
1121 if (ML_(cur_cmpLT)(p, end_img)) {
1122 UInt tag;
1124 acode = step_leb128U( &p ); /* abbreviation code */
1126 /* Read abbreviation header */
1127 abcode = step_leb128U( &abbrev_img ); /* abbreviation code */
1128 if ( acode != abcode ) {
1129 /* This isn't illegal, but somewhat unlikely. Normally the
1130 * first abbrev describes the first DIE, the compile_unit.
1131 * But maybe this abbreviation data is shared with another
1132 * or it is a NULL entry used for padding. See para 7.5.3. */
1133 abbrev_img = lookup_abbrev( ML_(cur_plus)(debugabbrev_img, atoffs),
1134 acode );
1137 tag = step_leb128U( &abbrev_img );
1139 if ( tag != 0x0011 /*TAG_compile_unit*/
1140 && tag != 0x004a /*TAG_skeleton_unit*/ )
1141 return; /* Not a compile unit (might be partial) or broken DWARF. */
1143 /* DW_CHILDREN_yes or DW_CHILDREN_no */
1144 abbrev_img = ML_(cur_plus)(abbrev_img, 1);
1146 /* And loop on entries */
1147 for ( ; ; ) {
1148 /* Read entry definition */
1149 ULong cval = -1LL; /* Constant value read */
1150 DiCursor sval = DiCursor_INVALID; /* String value read */
1151 UInt name = step_leb128U( &abbrev_img );
1152 UInt form = step_leb128U( &abbrev_img );
1153 if (name == 0)
1154 break;
1156 /* Read data */
1157 /* Attributes encoding explained p 71 */
1158 if ( form == 0x16 /* FORM_indirect */ )
1159 form = step_leb128U( &p );
1160 /* Decode form. For most kinds, Just skip the amount of data since
1161 we don't use it for now */
1162 /* JRS 9 Feb 06: This now handles 64-bit DWARF too. In
1163 64-bit DWARF, lineptr (and loclistptr,macptr,rangelistptr
1164 classes) use FORM_data8, not FORM_data4. Also,
1165 FORM_ref_addr and FORM_strp are 64-bit values, not 32-bit
1166 values. */
1167 /* TJH 27 Apr 10: in DWARF 4 lineptr (and loclistptr,macptr,
1168 rangelistptr classes) use FORM_sec_offset which is 64 bits
1169 in 64 bit DWARF and 32 bits in 32 bit DWARF. */
1170 /* JRS 20 Apr 11: LLVM-2.9 encodes DW_AT_stmt_list using
1171 FORM_addr rather than the FORM_data4 that GCC uses. Hence
1172 handle FORM_addr too. */
1173 switch( form ) {
1174 /* Those cases extract the data properly */
1175 case 0x05: /* FORM_data2 */
1176 cval = ML_(cur_step_UShort)(&p);
1177 break;
1178 case 0x06: /* FORM_data4 */
1179 cval = ML_(cur_step_UInt)(&p);
1180 break;
1181 case 0x0e: /* FORM_strp */ /* pointer in .debug_str */
1182 /* 2006-01-01: only generate a value if a debug_str
1183 section was found) */
1184 if (ML_(cur_is_valid)(debugstr_img) && !ui->dw64)
1185 sval = ML_(cur_plus)(debugstr_img, ML_(cur_read_UInt)(p));
1186 if (ML_(cur_is_valid)(debugstr_img) && ui->dw64)
1187 sval = ML_(cur_plus)(debugstr_img, ML_(cur_read_ULong)(p));
1188 p = ML_(cur_plus)(p, ui->dw64 ? 8 : 4);
1189 break;
1190 case 0x1f: /* FORM_line_strp */ /* pointer in .debug_line_str */
1191 /* 2006-01-01: only generate a value if a debug_str
1192 section was found) */
1193 if (ML_(cur_is_valid)(debuglinestr_img) && !ui->dw64)
1194 sval = ML_(cur_plus)(debuglinestr_img,
1195 ML_(cur_read_UInt)(p));
1196 if (ML_(cur_is_valid)(debuglinestr_img) && ui->dw64)
1197 sval = ML_(cur_plus)(debuglinestr_img,
1198 ML_(cur_read_ULong)(p));
1199 p = ML_(cur_plus)(p, ui->dw64 ? 8 : 4);
1200 break;
1201 case 0x08: /* FORM_string */
1202 sval = p;
1203 p = ML_(cur_plus)(p, ML_(cur_strlen)(p) + 1);
1204 break;
1205 case 0x0b: /* FORM_data1 */
1206 cval = ML_(cur_step_UChar)(&p);
1207 break;
1208 case 0x17: /* FORM_sec_offset */
1209 if (ui->dw64) {
1210 cval = ML_(cur_step_ULong)(&p);
1211 } else {
1212 cval = ML_(cur_step_UInt)(&p);
1214 break;
1215 case 0x07: /* FORM_data8 */
1216 if (ui->dw64) cval = ML_(cur_read_ULong)(p);
1217 p = ML_(cur_plus)(p, 8);
1218 /* perhaps should assign unconditionally to cval? */
1219 break;
1220 case 0x21: /* FORM_implicit_const */
1221 cval = step_leb128S (&abbrev_img);
1222 break;
1223 /* TODO : Following ones just skip data - implement if you need */
1224 case 0x1e: /* FORM_data16 */
1225 p = ML_(cur_plus)(p, 16);
1226 break;
1227 case 0x01: /* FORM_addr */
1228 p = ML_(cur_plus)(p, addr_size);
1229 break;
1230 case 0x03: /* FORM_block2 */
1231 p = ML_(cur_plus)(p, ML_(cur_read_UShort)(p) + 2);
1232 break;
1233 case 0x04: /* FORM_block4 */
1234 p = ML_(cur_plus)(p, ML_(cur_read_UInt)(p) + 4);
1235 break;
1236 case 0x09: /* FORM_block */ /* fallthrough */
1237 case 0x18: { /* FORM_exprloc */
1238 ULong block_len = step_leb128U(&p);
1239 p = ML_(cur_plus)(p, block_len);
1240 break;
1242 case 0x0a: /* FORM_block1 */
1243 p = ML_(cur_plus)(p, ML_(cur_read_UChar)(p) + 1);
1244 break;
1245 case 0x0c: /* FORM_flag */
1246 p = ML_(cur_plus)(p, 1);
1247 break;
1248 case 0x0d: /* FORM_sdata */
1249 (void)step_leb128S(&p);
1250 break;
1251 case 0x0f: /* FORM_udata */
1252 (void)step_leb128U(&p);
1253 break;
1254 case 0x10: /* FORM_ref_addr */
1255 p = ML_(cur_plus)(p, (ver == 2) ? addr_size
1256 : (ui->dw64 ? 8 : 4));
1257 break;
1258 case 0x11: /* FORM_ref1 */
1259 p = ML_(cur_plus)(p, 1);
1260 break;
1261 case 0x12: /* FORM_ref2 */
1262 p = ML_(cur_plus)(p, 2);
1263 break;
1264 case 0x13: /* FORM_ref4 */
1265 p = ML_(cur_plus)(p, 4);
1266 break;
1267 case 0x14: /* FORM_ref8 */
1268 p = ML_(cur_plus)(p, 8);
1269 break;
1270 case 0x15: /* FORM_ref_udata */
1271 (void)step_leb128U(&p);
1272 break;
1273 case 0x19: /* FORM_flag_present */
1274 break;
1275 case 0x1a: /* FORM_strx */
1276 (void)step_leb128U(&p);
1277 break;
1278 case 0x1b: /* FORM_addrx */
1279 (void)step_leb128U(&p);
1280 break;
1281 case 0x20: /* FORM_ref_sig8 */
1282 p = ML_(cur_plus)(p, 8);
1283 break;
1284 case 0x22: /* FORM_loclistx */
1285 (void)step_leb128U(&p);
1286 break;
1287 case 0x23: /* FORM_rnglistx */
1288 (void)step_leb128U(&p);
1289 break;
1290 case 0x25: /* FORM_strx1 */
1291 p = ML_(cur_plus)(p, 1);
1292 break;
1293 case 0x26: /* FORM_strx2 */
1294 p = ML_(cur_plus)(p, 2);
1295 break;
1296 case 0x27: /* FORM_strx3 */
1297 p = ML_(cur_plus)(p, 3);
1298 break;
1299 case 0x28: /* FORM_strx4 */
1300 p = ML_(cur_plus)(p, 4);
1301 break;
1302 case 0x29: /* FORM_addrx1 */
1303 p = ML_(cur_plus)(p, 1);
1304 break;
1305 case 0x2a: /* FORM_addrx2 */
1306 p = ML_(cur_plus)(p, 2);
1307 break;
1308 case 0x2b: /* FORM_addrx3 */
1309 p = ML_(cur_plus)(p, 3);
1310 break;
1311 case 0x2c: /* FORM_addrx4 */
1312 p = ML_(cur_plus)(p, 4);
1313 break;
1314 case 0x1f20: /* FORM_GNU_ref_alt */
1315 p = ML_(cur_plus)(p, ui->dw64 ? 8 : 4);
1316 break;
1317 case 0x1f21: /* FORM_GNU_strp_alt */
1318 if (ML_(cur_is_valid)(debugstr_alt_img) && !ui->dw64)
1319 sval = ML_(cur_plus)(debugstr_alt_img,
1320 ML_(cur_read_UInt)(p));
1321 if (ML_(cur_is_valid)(debugstr_alt_img) && ui->dw64)
1322 sval = ML_(cur_plus)(debugstr_alt_img,
1323 ML_(cur_read_ULong)(p));
1324 p = ML_(cur_plus)(p, ui->dw64 ? 8 : 4);
1325 break;
1327 default:
1328 VG_(printf)( "### unhandled dwarf2 abbrev form code 0x%x\n",
1329 form );
1330 break;
1333 /* Now store the members we need in the UnitInfo structure */
1334 if ( tag == 0x0011 /*TAG_compile_unit*/
1335 || tag == 0x004a /*TAG_skeleton_unit*/ ) {
1336 if ( name == 0x03 ) ui->name = sval; /* DW_AT_name */
1337 else if ( name == 0x1b ) ui->compdir = sval; /* DW_AT_compdir */
1338 else if ( name == 0x10 ) ui->stmt_list = cval; /* DW_AT_stmt_list */
1341 } /* Just read the first DIE, if that wasn't the compile_unit then
1342 * this might have been a partial unit or broken DWARF info.
1343 * That's enough info for us, and we are not gdb ! */
1347 ////////////////////////////////////////////////////////////////////
1348 ////////////////////////////////////////////////////////////////////
1350 /* Collect the debug info from DWARF3 debugging sections
1351 * of a given module.
1353 * Inputs: given .debug_xxx sections
1354 * Output: update di to contain all the DWARF3 debug infos
1356 void ML_(read_debuginfo_dwarf3)
1357 ( struct _DebugInfo* di,
1358 DiSlice escn_debug_info, /* .debug_info */
1359 DiSlice escn_debug_types, /* .debug_types */
1360 DiSlice escn_debug_abbv, /* .debug_abbrev */
1361 DiSlice escn_debug_line, /* .debug_line */
1362 DiSlice escn_debug_str, /* .debug_str */
1363 DiSlice escn_debug_str_alt, /* .debug_str */
1364 DiSlice escn_debug_line_str) /* .debug_line_str */
1366 UnitInfo ui;
1367 UShort ver;
1368 ULong blklen;
1369 Bool blklen_is_64;
1371 /* Make sure we at least have a header for the first block */
1372 if (escn_debug_info.szB < 4) {
1373 ML_(symerr)( di, True,
1374 "Last block truncated in .debug_info; ignoring" );
1375 return;
1378 DiCursor block_img = DiCursor_INVALID;
1379 DiCursor end1_img = ML_(cur_plus)( ML_(cur_from_sli)(escn_debug_info),
1380 escn_debug_info.szB );
1381 Int blklen_len = 0;
1383 /* Iterate on all the blocks we find in .debug_info */
1384 for ( block_img = ML_(cur_from_sli)(escn_debug_info);
1385 ML_(cur_cmpLT)(block_img, ML_(cur_plus)(end1_img, -(DiOffT)4));
1386 block_img = ML_(cur_plus)(block_img, blklen + blklen_len) ) {
1388 /* Read the compilation unit header in .debug_info section - See
1389 p 70 */
1390 /* This block length */
1391 blklen = read_initial_length_field( block_img, &blklen_is_64 );
1392 blklen_len = blklen_is_64 ? 12 : 4;
1394 if (ML_(cur_cmpGT)( ML_(cur_plus)(block_img, blklen + blklen_len),
1395 end1_img )) {
1396 ML_(symerr)( di, True,
1397 "Last block truncated in .debug_info; ignoring" );
1398 return;
1401 /* version should be 2 */
1402 ver = ML_(cur_read_UShort)( ML_(cur_plus)(block_img, blklen_len) );
1403 if ( ver != 2 && ver != 3 && ver != 4 && ver != 5) {
1404 ML_(symerr)( di, True,
1405 "Ignoring non-Dwarf2/3/4/5 block in .debug_info" );
1406 continue;
1409 /* Fill ui with offset in .debug_line and compdir */
1410 if (0)
1411 VG_(printf)(
1412 "Reading UnitInfo at 0x%llx.....\n",
1413 (ULong)ML_(cur_minus)( block_img,
1414 ML_(cur_from_sli)(escn_debug_info)) );
1415 read_unitinfo_dwarf2( &ui, block_img,
1416 ML_(cur_from_sli)(escn_debug_abbv),
1417 ML_(cur_from_sli)(escn_debug_str),
1418 ML_(cur_from_sli)(escn_debug_str_alt),
1419 ML_(cur_from_sli)(escn_debug_line_str));
1420 if (0) {
1421 HChar* str_name = ML_(cur_read_strdup)(ui.name, "di.rdd3.1");
1422 HChar* str_compdir = ML_(cur_read_strdup)(ui.compdir, "di.rdd3.2");
1423 VG_(printf)( " => LINES=0x%llx NAME=%s DIR=%s\n",
1424 ui.stmt_list, str_name, str_compdir );
1425 ML_(dinfo_free)(str_name);
1426 ML_(dinfo_free)(str_compdir);
1429 /* Ignore blocks with no .debug_line associated block */
1430 if ( ui.stmt_list == -1LL )
1431 continue;
1433 if (0) {
1434 HChar* str_name = ML_(cur_read_strdup)(ui.name, "di.rdd3.3");
1435 VG_(printf)("debug_line_sz %llu, ui.stmt_list %llu %s\n",
1436 escn_debug_line.szB, ui.stmt_list, str_name );
1437 ML_(dinfo_free)(str_name);
1440 /* Read the .debug_line block for this compile unit */
1441 read_dwarf2_lineblock(
1442 di, &ui,
1443 ML_(cur_plus)(ML_(cur_from_sli)(escn_debug_line), ui.stmt_list),
1444 escn_debug_line.szB - ui.stmt_list,
1445 ML_(cur_from_sli)(escn_debug_str),
1446 ML_(cur_from_sli)(escn_debug_line_str)
1452 ////////////////////////////////////////////////////////////////////
1453 ////////////////////////////////////////////////////////////////////
1455 /*------------------------------------------------------------*/
1456 /*--- Read DWARF1 format line number info. ---*/
1457 /*------------------------------------------------------------*/
1459 /* DWARF1 appears to be redundant, but nevertheless the Lahey Fortran
1460 compiler generates it.
1463 /* The following three enums (dwarf_tag, dwarf_form, dwarf_attribute)
1464 are taken from the file include/elf/dwarf.h in the GNU gdb-6.0
1465 sources, which are Copyright 1992, 1993, 1995, 1999 Free Software
1466 Foundation, Inc and naturally licensed under the GNU General Public
1467 License version 2 or later.
1470 /* Tag names and codes. */
1472 enum dwarf_tag {
1473 TAG_padding = 0x0000,
1474 TAG_array_type = 0x0001,
1475 TAG_class_type = 0x0002,
1476 TAG_entry_point = 0x0003,
1477 TAG_enumeration_type = 0x0004,
1478 TAG_formal_parameter = 0x0005,
1479 TAG_global_subroutine = 0x0006,
1480 TAG_global_variable = 0x0007,
1481 /* 0x0008 -- reserved */
1482 /* 0x0009 -- reserved */
1483 TAG_label = 0x000a,
1484 TAG_lexical_block = 0x000b,
1485 TAG_local_variable = 0x000c,
1486 TAG_member = 0x000d,
1487 /* 0x000e -- reserved */
1488 TAG_pointer_type = 0x000f,
1489 TAG_reference_type = 0x0010,
1490 TAG_compile_unit = 0x0011,
1491 TAG_string_type = 0x0012,
1492 TAG_structure_type = 0x0013,
1493 TAG_subroutine = 0x0014,
1494 TAG_subroutine_type = 0x0015,
1495 TAG_typedef = 0x0016,
1496 TAG_union_type = 0x0017,
1497 TAG_unspecified_parameters = 0x0018,
1498 TAG_variant = 0x0019,
1499 TAG_common_block = 0x001a,
1500 TAG_common_inclusion = 0x001b,
1501 TAG_inheritance = 0x001c,
1502 TAG_inlined_subroutine = 0x001d,
1503 TAG_module = 0x001e,
1504 TAG_ptr_to_member_type = 0x001f,
1505 TAG_set_type = 0x0020,
1506 TAG_subrange_type = 0x0021,
1507 TAG_with_stmt = 0x0022,
1509 /* GNU extensions */
1511 TAG_format_label = 0x8000, /* for FORTRAN 77 and Fortran 90 */
1512 TAG_namelist = 0x8001, /* For Fortran 90 */
1513 TAG_function_template = 0x8002, /* for C++ */
1514 TAG_class_template = 0x8003 /* for C++ */
1517 /* Form names and codes. */
1519 enum dwarf_form {
1520 FORM_ADDR = 0x1,
1521 FORM_REF = 0x2,
1522 FORM_BLOCK2 = 0x3,
1523 FORM_BLOCK4 = 0x4,
1524 FORM_DATA2 = 0x5,
1525 FORM_DATA4 = 0x6,
1526 FORM_DATA8 = 0x7,
1527 FORM_STRING = 0x8
1530 /* Attribute names and codes. */
1532 enum dwarf_attribute {
1533 AT_sibling = (0x0010|FORM_REF),
1534 AT_location = (0x0020|FORM_BLOCK2),
1535 AT_name = (0x0030|FORM_STRING),
1536 AT_fund_type = (0x0050|FORM_DATA2),
1537 AT_mod_fund_type = (0x0060|FORM_BLOCK2),
1538 AT_user_def_type = (0x0070|FORM_REF),
1539 AT_mod_u_d_type = (0x0080|FORM_BLOCK2),
1540 AT_ordering = (0x0090|FORM_DATA2),
1541 AT_subscr_data = (0x00a0|FORM_BLOCK2),
1542 AT_byte_size = (0x00b0|FORM_DATA4),
1543 AT_bit_offset = (0x00c0|FORM_DATA2),
1544 AT_bit_size = (0x00d0|FORM_DATA4),
1545 /* (0x00e0|FORM_xxxx) -- reserved */
1546 AT_element_list = (0x00f0|FORM_BLOCK4),
1547 AT_stmt_list = (0x0100|FORM_DATA4),
1548 AT_low_pc = (0x0110|FORM_ADDR),
1549 AT_high_pc = (0x0120|FORM_ADDR),
1550 AT_language = (0x0130|FORM_DATA4),
1551 AT_member = (0x0140|FORM_REF),
1552 AT_discr = (0x0150|FORM_REF),
1553 AT_discr_value = (0x0160|FORM_BLOCK2),
1554 /* (0x0170|FORM_xxxx) -- reserved */
1555 /* (0x0180|FORM_xxxx) -- reserved */
1556 AT_string_length = (0x0190|FORM_BLOCK2),
1557 AT_common_reference = (0x01a0|FORM_REF),
1558 AT_comp_dir = (0x01b0|FORM_STRING),
1559 AT_const_value_string = (0x01c0|FORM_STRING),
1560 AT_const_value_data2 = (0x01c0|FORM_DATA2),
1561 AT_const_value_data4 = (0x01c0|FORM_DATA4),
1562 AT_const_value_data8 = (0x01c0|FORM_DATA8),
1563 AT_const_value_block2 = (0x01c0|FORM_BLOCK2),
1564 AT_const_value_block4 = (0x01c0|FORM_BLOCK4),
1565 AT_containing_type = (0x01d0|FORM_REF),
1566 AT_default_value_addr = (0x01e0|FORM_ADDR),
1567 AT_default_value_data2 = (0x01e0|FORM_DATA2),
1568 AT_default_value_data4 = (0x01e0|FORM_DATA4),
1569 AT_default_value_data8 = (0x01e0|FORM_DATA8),
1570 AT_default_value_string = (0x01e0|FORM_STRING),
1571 AT_friends = (0x01f0|FORM_BLOCK2),
1572 AT_inline = (0x0200|FORM_STRING),
1573 AT_is_optional = (0x0210|FORM_STRING),
1574 AT_lower_bound_ref = (0x0220|FORM_REF),
1575 AT_lower_bound_data2 = (0x0220|FORM_DATA2),
1576 AT_lower_bound_data4 = (0x0220|FORM_DATA4),
1577 AT_lower_bound_data8 = (0x0220|FORM_DATA8),
1578 AT_private = (0x0240|FORM_STRING),
1579 AT_producer = (0x0250|FORM_STRING),
1580 AT_program = (0x0230|FORM_STRING),
1581 AT_protected = (0x0260|FORM_STRING),
1582 AT_prototyped = (0x0270|FORM_STRING),
1583 AT_public = (0x0280|FORM_STRING),
1584 AT_pure_virtual = (0x0290|FORM_STRING),
1585 AT_return_addr = (0x02a0|FORM_BLOCK2),
1586 AT_abstract_origin = (0x02b0|FORM_REF),
1587 AT_start_scope = (0x02c0|FORM_DATA4),
1588 AT_stride_size = (0x02e0|FORM_DATA4),
1589 AT_upper_bound_ref = (0x02f0|FORM_REF),
1590 AT_upper_bound_data2 = (0x02f0|FORM_DATA2),
1591 AT_upper_bound_data4 = (0x02f0|FORM_DATA4),
1592 AT_upper_bound_data8 = (0x02f0|FORM_DATA8),
1593 AT_virtual = (0x0300|FORM_STRING),
1595 /* GNU extensions. */
1597 AT_sf_names = (0x8000|FORM_DATA4),
1598 AT_src_info = (0x8010|FORM_DATA4),
1599 AT_mac_info = (0x8020|FORM_DATA4),
1600 AT_src_coords = (0x8030|FORM_DATA4),
1601 AT_body_begin = (0x8040|FORM_ADDR),
1602 AT_body_end = (0x8050|FORM_ADDR)
1605 /* end of enums taken from gdb-6.0 sources */
1606 #if 0
1607 void ML_(read_debuginfo_dwarf1) (
1608 struct _DebugInfo* di,
1609 UChar* dwarf1d, Int dwarf1d_sz,
1610 UChar* dwarf1l, Int dwarf1l_sz )
1612 UInt stmt_list;
1613 Bool stmt_list_found;
1614 Int die_offset, die_szb, at_offset;
1615 UShort die_kind, at_kind;
1616 UChar* at_base;
1617 HChar* src_filename;
1619 if (0)
1620 VG_(printf)("read_debuginfo_dwarf1 ( %p, %d, %p, %d )\n",
1621 dwarf1d, dwarf1d_sz, dwarf1l, dwarf1l_sz );
1623 /* This loop scans the DIEs. */
1624 die_offset = 0;
1625 while (True) {
1626 if (die_offset >= dwarf1d_sz) break;
1628 die_szb = ML_(read_Int)(dwarf1d + die_offset);
1629 die_kind = ML_(read_UShort)(dwarf1d + die_offset + 4);
1631 /* We're only interested in compile_unit DIEs; ignore others. */
1632 if (die_kind != TAG_compile_unit) {
1633 die_offset += die_szb;
1634 continue;
1637 if (0)
1638 VG_(printf)("compile-unit DIE: offset %d, tag 0x%x, size %d\n",
1639 die_offset, (Int)die_kind, die_szb );
1641 /* We've got a compile_unit DIE starting at (dwarf1d +
1642 die_offset+6). Try and find the AT_name and AT_stmt_list
1643 attributes. Then, finally, we can read the line number info
1644 for this source file. */
1646 /* The next 3 are set as we find the relevant attrs. */
1647 src_filename = NULL;
1648 stmt_list_found = False;
1649 stmt_list = 0;
1651 /* This loop scans the Attrs inside compile_unit DIEs. */
1652 at_base = dwarf1d + die_offset + 6;
1653 at_offset = 0;
1654 while (True) {
1655 if (at_offset >= die_szb-6) break;
1657 at_kind = ML_(read_UShort)(at_base + at_offset);
1658 if (0) VG_(printf)("atoffset %d, attag 0x%x\n",
1659 at_offset, (Int)at_kind );
1660 at_offset += 2; /* step over the attribute itself */
1661 /* We have to examine the attribute to figure out its
1662 length. */
1663 switch (at_kind) {
1664 case AT_stmt_list:
1665 case AT_language:
1666 case AT_sibling:
1667 if (at_kind == AT_stmt_list) {
1668 stmt_list_found = True;
1669 stmt_list = ML_(read_Int)(at_base+at_offset);
1671 at_offset += 4; break;
1672 case AT_high_pc:
1673 case AT_low_pc:
1674 at_offset += sizeof(void*); break;
1675 case AT_name:
1676 case AT_producer:
1677 case AT_comp_dir:
1678 /* Zero terminated string, step over it. */
1679 if (at_kind == AT_name)
1680 src_filename = (HChar *)(at_base + at_offset);
1681 while (at_offset < die_szb-6 && at_base[at_offset] != 0)
1682 at_offset++;
1683 at_offset++;
1684 break;
1685 default:
1686 VG_(printf)("Unhandled DWARF-1 attribute 0x%x\n",
1687 (Int)at_kind );
1688 VG_(core_panic)("Unhandled DWARF-1 attribute");
1689 } /* switch (at_kind) */
1690 } /* looping over attributes */
1692 /* So, did we find the required stuff for a line number table in
1693 this DIE? If yes, read it. */
1694 if (stmt_list_found /* there is a line number table */
1695 && src_filename != NULL /* we know the source filename */
1697 /* Table starts:
1698 Length:
1699 4 bytes, includes the entire table
1700 Base address:
1701 unclear (4? 8?), assuming native pointer size here.
1702 Then a sequence of triples
1703 (source line number -- 32 bits
1704 source line column -- 16 bits
1705 address delta -- 32 bits)
1707 Addr base;
1708 Int len;
1709 HChar* curr_filenm;
1710 UChar* ptr;
1711 UInt prev_line, prev_delta;
1713 curr_filenm = ML_(addStr) ( di, src_filename, -1 );
1714 prev_line = prev_delta = 0;
1716 ptr = dwarf1l + stmt_list;
1717 len = ML_(read_Int)(ptr); ptr += sizeof(Int);
1718 base = ML_(read_Addr)(ptr); ptr += sizeof(void*);
1719 len -= (sizeof(Int) + sizeof(void*));
1720 while (len > 0) {
1721 UInt line;
1722 UShort col;
1723 UInt delta;
1724 line = ML_(read_UInt)(ptr); ptr += sizeof(UInt);
1725 col = ML_(read_UShort)(ptr); ptr += sizeof(UShort);
1726 delta = ML_(read_UInt)(ptr); ptr += sizeof(UInt);
1727 if (0) VG_(printf)("line %d, col %d, delta %d\n",
1728 line, (Int)col, delta );
1729 len -= (sizeof(UInt) + sizeof(UShort) + sizeof(UInt));
1731 if (delta > 0 && prev_line > 0) {
1732 if (0) VG_(printf) (" %d %d-%d\n",
1733 prev_line, prev_delta, delta-1);
1734 ML_(addLineInfo) ( di, curr_filenm, NULL,
1735 base + prev_delta, base + delta,
1736 prev_line, 0 );
1738 prev_line = line;
1739 prev_delta = delta;
1743 /* Move on the next DIE. */
1744 die_offset += die_szb;
1746 } /* Looping over DIEs */
1749 #endif
1751 /*------------------------------------------------------------*/
1752 /*--- Read call-frame info from an .eh_frame section ---*/
1753 /*------------------------------------------------------------*/
1755 /* Sources of info:
1757 The DWARF3 spec, available from http://www.dwarfstd.org/Download.php
1759 This describes how to read CFA data from .debug_frame sections.
1760 So as to maximise everybody's annoyance and confusion, .eh_frame
1761 sections are almost the same as .debug_frame sections, but differ
1762 in a few subtle and ill documented but important aspects.
1764 Generic ELF Specification, sections 7.5 (DWARF Extensions) and 7.6
1765 (Exception Frames), available from
1767 http://www.linux-foundation.org/spec/book/ELF-generic/ELF-generic.html
1769 This really does describe .eh_frame, at least the aspects that
1770 differ from standard DWARF3. It's better than guessing, and
1771 (marginally) more fun than reading the gdb source code.
1774 /* Useful info ..
1776 In general:
1777 gdb-6.3/gdb/dwarf2-frame.c
1779 gdb-6.3/gdb/i386-tdep.c:
1781 DWARF2/GCC uses the stack address *before* the function call as a
1782 frame's CFA. [jrs: I presume this means %esp before the call as
1783 the CFA].
1785 JRS: on amd64, the dwarf register numbering is, as per
1786 gdb-6.3/gdb/amd64-tdep.c and also amd64-abi-0.98.pdf:
1788 0 1 2 3 4 5 6 7
1789 RAX RDX RCX RBX RSI RDI RBP RSP
1791 8 ... 15
1792 R8 ... R15
1794 16 is the return address (RIP)
1795 "The table defines Return Address to have a register number,
1796 even though the address is stored in 0(%rsp) and not in a
1797 physical register."
1799 17 ... 24
1800 XMM0 ... XMM7
1802 25 ... 32
1803 XMM8 ... XMM15
1805 33 ... 40
1806 ST0 ... ST7
1808 41 ... 48
1809 MM0 ... MM7
1811 49 RFLAGS
1812 50,51,52,53,54,55 ES,CS,SS,DS,FS,GS
1813 58 FS.BASE (what's that?)
1814 59 GS.BASE (what's that?)
1815 62 TR (task register)
1816 63 LDTR (LDT register)
1817 64 MXCSR
1818 65 FCW (x87 control word)
1819 66 FSW (x86 status word)
1821 On x86 I cannot find any documentation. It _appears_ to be the
1822 actual instruction encoding, viz:
1824 0 1 2 3 4 5 6 7
1825 EAX ECX EDX EBX ESP EBP ESI EDI
1827 8 is the return address (EIP) */
1830 /* Comments re DW_CFA_set_loc, 16 Nov 06.
1832 JRS:
1833 Someone recently sent me a libcrypto.so.0.9.8 as distributed with
1834 Ubuntu of some flavour, compiled with gcc 4.1.2 on amd64. It
1835 causes V's CF reader to complain a lot:
1837 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
1838 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
1839 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
1840 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
1841 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:48
1842 >> --19976-- DWARF2 CFI reader: unhandled CFI instruction 0:24
1844 After chasing this around a bit it seems that the CF bytecode
1845 parser lost sync at a DW_CFA_set_loc, which has a single argument
1846 denoting an address.
1848 As it stands that address is extracted by read_Addr(). On amd64
1849 that just fetches 8 bytes regardless of anything else.
1851 read_encoded_Addr() is more sophisticated. This appears to take
1852 into account some kind of encoding flag. When I replace the uses
1853 of read_Addr by read_encoded_Addr for DW_CFA_set_loc, the
1854 complaints go away, there is no loss of sync, and the parsed CF
1855 instructions are the same as shown by readelf --debug-dump=frames.
1857 So it seems a plausible fix. The problem is I looked in the DWARF3
1858 spec and completely failed to figure out whether or not the arg to
1859 DW_CFA_set_loc is supposed to be encoded in a way suitable for
1860 read_encoded_Addr, nor for that matter any description of what it
1861 is that read_encoded_Addr is really decoding.
1863 TomH:
1864 The problem is that the encoding is not standard - the eh_frame
1865 section uses the same encoding as the dwarf_frame section except
1866 for a few small changes, and this is one of them. So this is not
1867 something the DWARF standard covers.
1869 There is an augmentation string to indicate what is going on though
1870 so that programs can recognise it.
1872 What we are doing seems to match what gdb 6.5 and libdwarf 20060614
1873 do though. I'm not sure about readelf though.
1875 (later): Well dwarfdump barfs on it:
1877 dwarfdump ERROR: dwarf_get_fde_info_for_reg:
1878 DW_DLE_DF_FRAME_DECODING_ERROR(193) (193)
1880 I've looked at binutils as well now, and the code in readelf agrees
1881 with your patch - ie it treats set_loc as having an encoded address
1882 if there is a zR augmentation indicating an encoding.
1884 Quite why gdb and libdwarf don't understand this is an interesting
1885 question...
1887 Final outcome: all uses of read_Addr were replaced by
1888 read_encoded_Addr. A new type AddressDecodingInfo was added to
1889 make it relatively clean to plumb through the extra info needed by
1890 read_encoded_Addr.
1893 /* More badness re address encoding, 12 Jan 07.
1895 Most gcc provided CIEs have a "zR" augmentation, which means they
1896 supply their own address encoding, and that works fine. However,
1897 some icc9 supplied CIEs have no augmentation, which means they use
1898 the default_Addr_encoding(). That says to use a machine-word sized
1899 value, literally unmodified.
1901 Since .so's are, in general, relocated when loaded, having absolute
1902 addresses in the CFI data makes no sense when read_encoded_Addr is
1903 used to find the initial location for a FDE. The resulting saga:
1905 TomH:
1906 > I'm chasing a stack backtrace failure for an amd64 .so which was
1907 > created I believe by icc 9.1. After a while I wound up looking at
1908 > this: (readdwarf.c)
1910 > 5083 tom static UChar default_Addr_encoding ( void )
1911 > 3584 tom {
1912 > 3584 tom switch (sizeof(Addr)) {
1913 > 3584 tom case 4: return DW_EH_PE_udata4;
1914 > 3584 tom case 8: return DW_EH_PE_udata8;
1915 > 3584 tom default: vg_assert(0);
1916 > 3584 tom }
1917 > 3584 tom }
1919 > If a CIE does not have an "augmentation string" (typically "zR") then
1920 > addresses are decoded as described by default_Addr_encoding. If there
1921 > is an 'R' in the augmentation string then the encoding to use
1922 > is specified by the CIE itself, which works fine with GCC compiled code
1923 > since that always appears to specify zR.
1925 Correct.
1927 > Problem is this .so has no augmentation string and so uses the
1928 > default encoding, viz DW_EH_PE_udata8. That appears to mean
1929 > "read a 64 bit number" and use that as-is (for the starting value
1930 > of the program counter when running the CFA program).
1932 Strictly speaking the default is DW_EH_PE_absptr, but that amounts
1933 to either udata4 or udata8 depending on the platform's pointer size
1934 which is a shortcut I used.
1936 > For this .so that gives nonsense (very small) PCs which are later
1937 > rejected by the sanity check which ensures PC ranges fall inside
1938 > the mapped text segment. It seems like the .so expects to have the
1939 > start VMA of the text segment added on. This would correspond to
1941 > static UChar default_Addr_encoding ( void )
1943 > switch (sizeof(Addr)) {
1944 > case 4: return DW_EH_PE_textrel + DW_EH_PE_udata4;
1945 > case 8: return DW_EH_PE_textrel + DW_EH_PE_udata8;
1946 > default: vg_assert(0);
1950 The problem you're seeing is that you have absolute pointers inside
1951 a shared library, which obviously makes little sense on the face of
1952 things as how would the linker know where the library will be
1953 loaded?
1955 The answer of course is that it doesn't, so if it points absolute
1956 pointers in the frame unwind data is has to include relocations for
1957 them, and I'm betting that if you look at the relocations in the
1958 library you will there are some for that data.
1960 That is fine of course when ld.so maps the library - it will
1961 relocate the eh_frame data as it maps it (or prelinking will
1962 already have done so) and when the g++ exception code kicks in and
1963 unwinds the stack it will see relocated data.
1965 We of course are mapping the section from the ELF file ourselves
1966 and are not applying the relocations, hence the problem you are
1967 seeing.
1969 Strictly speaking we should apply the relocations but the cheap
1970 solution is essentially to do what you've done - strictly speaking
1971 you should adjust by the difference between the address the library
1972 was linked for and the address it has been loaded at, but a shared
1973 library will normally be linked for address zero I believe. It's
1974 possible that prelinking might change that though?
1976 JRS:
1977 That all syncs with what I am seeing.
1979 So what I am inclined to do is:
1981 - Leave default_Addr_encoding as it is
1983 - Change read_encoded_Addr's handling of "case DW_EH_PE_absptr" so
1984 it sets base to, as you say, the difference between the address
1985 the library was linked for and the address it has been loaded at
1986 (== the SegInfo's text_bias)
1988 Does that sound sane? I think it should even handle the prelinked
1989 case.
1991 (JRS, later)
1993 Hmm. Plausible as it sounds, it doesn't work. It now produces
1994 bogus backtraces for locations inside the (statically linked)
1995 memcheck executable.
1997 Besides, there are a couple of other places where read_encoded_Addr
1998 is used -- one of which is used to establish the length of the
1999 address range covered by the current FDE:
2001 fde_arange = read_encoded_Addr(&nbytes, &adi, data);
2003 and it doesn't seem to make any sense for read_encoded_Addr to add
2004 on the text segment bias in that context. The DWARF3 spec says
2005 that both the initial_location and address_range (length) fields
2006 are encoded the same way ("target address"), so it is unclear at
2007 what stage in the process it would be appropriate to relocate the
2008 former but not the latter.
2010 One unprincipled kludge that does work is the following: just
2011 before handing one of the address range fragments off to
2012 ML_(addDiCfSI) for permanent storage, check its start address. If
2013 that is very low (less than 2 M), and is far below the mapped text
2014 segment, and adding the text bias would move the fragment entirely
2015 inside the mapped text segment, then do so. A kind of kludged
2016 last-minute relocation, if you like.
2018 12 Jan 07: committing said kludge (see kludge_then_addDiCfSI). If
2019 the situation clarifies, it can easily enough be backed out and
2020 replaced by a better fix.
2023 /* --------------- Decls --------------- */
2025 #if defined(VGP_x86_linux) || defined(VGP_x86_solaris) || defined(VGP_x86_freebsd)
2026 # define FP_REG 5
2027 # define SP_REG 4
2028 # define RA_REG_DEFAULT 8
2029 #elif defined(VGP_amd64_linux) || defined(VGP_amd64_solaris) || defined(VGP_amd64_freebsd)
2030 # define FP_REG 6
2031 # define SP_REG 7
2032 # define RA_REG_DEFAULT 16
2033 #elif defined(VGP_ppc32_linux)
2034 # define FP_REG 1
2035 # define SP_REG 1
2036 # define RA_REG_DEFAULT 65
2037 #elif defined(VGP_ppc64be_linux) || defined(VGP_ppc64le_linux)
2038 # define FP_REG 1
2039 # define SP_REG 1
2040 # define RA_REG_DEFAULT 65
2041 #elif defined(VGP_arm_linux)
2042 # define FP_REG 12
2043 # define SP_REG 13
2044 # define RA_REG_DEFAULT 14
2045 #elif defined(VGP_arm64_linux)
2046 # define FP_REG 29
2047 # define SP_REG 31
2048 # define RA_REG_DEFAULT 30
2049 #elif defined(VGP_x86_darwin)
2050 # define FP_REG 5
2051 # define SP_REG 4
2052 # define RA_REG_DEFAULT 8
2053 #elif defined(VGP_amd64_darwin)
2054 # define FP_REG 6
2055 # define SP_REG 7
2056 # define RA_REG_DEFAULT 16
2057 #elif defined(VGP_s390x_linux)
2058 # define FP_REG 11 // sometimes s390 has a frame pointer in r11
2059 # define SP_REG 15 // stack is always r15
2060 # define RA_REG_DEFAULT 14 // the return address is in r14
2061 #elif defined(VGP_mips32_linux) || defined(VGP_nanomips_linux)
2062 # define FP_REG 30
2063 # define SP_REG 29
2064 # define RA_REG_DEFAULT 31
2065 #elif defined(VGP_mips64_linux)
2066 # define FP_REG 30
2067 # define SP_REG 29
2068 # define RA_REG_DEFAULT 31
2069 #else
2070 # error "Unknown platform"
2071 #endif
2073 /* The number of regs we are prepared to unwind. The number for
2074 arm-linux (320) seems ludicrously high, but the ARM IHI 0040A page
2075 7 (DWARF for the ARM Architecture) specifies that values up to 320
2076 might exist, for Neon/VFP-v3. */
2077 #if defined(VGP_ppc32_linux) || defined(VGP_ppc64be_linux) \
2078 || defined(VGP_ppc64le_linux) || defined(VGP_mips32_linux) \
2079 || defined(VGP_nanomips_linux) || defined(VGP_mips64_linux)
2080 # define N_CFI_REGS 72
2081 #elif defined(VGP_arm_linux)
2082 # define N_CFI_REGS 320
2083 #elif defined(VGP_arm64_linux)
2084 # define N_CFI_REGS 128
2085 #elif defined(VGP_s390x_linux)
2086 # define N_CFI_REGS 66
2087 #else
2088 # define N_CFI_REGS 20
2089 #endif
2091 /* Instructions for the automaton */
2092 enum dwarf_cfa_primary_ops
2094 DW_CFA_use_secondary = 0,
2095 DW_CFA_advance_loc = 1,
2096 DW_CFA_offset = 2,
2097 DW_CFA_restore = 3
2100 enum dwarf_cfa_secondary_ops
2102 DW_CFA_nop = 0x00,
2103 DW_CFA_set_loc = 0x01,
2104 DW_CFA_advance_loc1 = 0x02,
2105 DW_CFA_advance_loc2 = 0x03,
2106 DW_CFA_advance_loc4 = 0x04,
2107 DW_CFA_offset_extended = 0x05,
2108 DW_CFA_restore_extended = 0x06,
2109 DW_CFA_undefined = 0x07,
2110 DW_CFA_same_value = 0x08,
2111 DW_CFA_register = 0x09,
2112 DW_CFA_remember_state = 0x0a,
2113 DW_CFA_restore_state = 0x0b,
2114 DW_CFA_def_cfa = 0x0c,
2115 DW_CFA_def_cfa_register = 0x0d,
2116 DW_CFA_def_cfa_offset = 0x0e,
2117 DW_CFA_def_cfa_expression = 0x0f, /* DWARF3 only */
2118 DW_CFA_expression = 0x10, /* DWARF3 only */
2119 DW_CFA_offset_extended_sf = 0x11, /* DWARF3 only */
2120 DW_CFA_def_cfa_sf = 0x12, /* DWARF3 only */
2121 DW_CFA_def_cfa_offset_sf = 0x13, /* DWARF3 only */
2122 DW_CFA_val_offset = 0x14, /* DWARF3 only */
2123 DW_CFA_val_offset_sf = 0x15, /* DWARF3 only */
2124 DW_CFA_val_expression = 0x16, /* DWARF3 only */
2125 DW_CFA_lo_user = 0x1c,
2126 DW_CFA_GNU_window_save = 0x2d, /* GNU extension */
2127 DW_CFA_GNU_args_size = 0x2e, /* GNU extension */
2128 DW_CFA_GNU_negative_offset_extended = 0x2f, /* GNU extension */
2129 DW_CFA_ORCL_arg_loc = 0x30, /* Oracle extension */
2130 DW_CFA_hi_user = 0x3f
2133 #define DW_EH_PE_absptr 0x00
2134 #define DW_EH_PE_omit 0xff
2136 #define DW_EH_PE_uleb128 0x01
2137 #define DW_EH_PE_udata2 0x02
2138 #define DW_EH_PE_udata4 0x03
2139 #define DW_EH_PE_udata8 0x04
2140 #define DW_EH_PE_sleb128 0x09
2141 #define DW_EH_PE_sdata2 0x0A
2142 #define DW_EH_PE_sdata4 0x0B
2143 #define DW_EH_PE_sdata8 0x0C
2144 #define DW_EH_PE_signed 0x08
2146 #define DW_EH_PE_pcrel 0x10
2147 #define DW_EH_PE_textrel 0x20
2148 #define DW_EH_PE_datarel 0x30
2149 #define DW_EH_PE_funcrel 0x40
2150 #define DW_EH_PE_aligned 0x50
2152 #define DW_EH_PE_indirect 0x80
2155 /* RegRule and UnwindContext are used temporarily to do the unwinding.
2156 The result is then summarised into a sequence of CfiSIs, if
2157 possible. UnwindContext effectively holds the state of the
2158 abstract machine whilst it is running.
2160 The CFA can either be a signed offset from a register,
2161 or an expression:
2163 CFA = cfa_reg + cfa_off when UnwindContext.cfa_is_regoff==True
2164 | [[ cfa_expr_id ]]
2166 When .cfa_is_regoff == True, cfa_expr_id must be zero
2167 When .cfa_is_regoff == False, cfa_reg must be zero
2168 and cfa_off must be zero
2170 RegRule describes, for each register, how to get its
2171 value in the previous frame, where 'cfa' denotes the cfa
2172 for the frame as a whole:
2174 RegRule = RR_Undef -- undefined
2175 | RR_Same -- same as in previous frame
2176 | RR_CFAOff arg -- is at * ( cfa + arg )
2177 | RR_CFAValOff arg -- is ( cfa + arg )
2178 | RR_Reg arg -- is in register 'arg'
2179 | RR_Expr arg -- is at * [[ arg ]]
2180 | RR_ValExpr arg -- is [[ arg ]]
2182 Note that RR_Expr is redundant since the same can be represented
2183 using RR_ValExpr with an explicit dereference (CfiExpr_Deref) at
2184 the outermost level.
2186 All expressions are stored in exprs in the containing
2187 UnwindContext. Since the UnwindContext gets reinitialised for each
2188 new FDE, summarise_context needs to copy out any expressions it
2189 wants to keep into the cfsi_exprs field of the containing SegInfo.
2191 typedef
2192 struct {
2193 enum { RR_Undef, RR_Same, RR_CFAOff, RR_CFAValOff,
2194 RR_Reg, /*RR_Expr,*/ RR_ValExpr } tag;
2195 /* meaning: int offset for CFAoff/CFAValOff
2196 reg # for Reg
2197 expr index for Expr/ValExpr */
2198 Int arg;
2200 RegRule;
2202 static void ppRegRule ( const XArray* exprs, const RegRule* rrule )
2204 vg_assert(exprs);
2205 switch (rrule->tag) {
2206 case RR_Undef: VG_(printf)("u "); break;
2207 case RR_Same: VG_(printf)("s "); break;
2208 case RR_CFAOff: VG_(printf)("c%d ", rrule->arg); break;
2209 case RR_CFAValOff: VG_(printf)("v%d ", rrule->arg); break;
2210 case RR_Reg: VG_(printf)("dwReg%d ", rrule->arg); break;
2211 case RR_ValExpr: VG_(printf)("ve{");
2212 ML_(ppCfiExpr)( exprs, rrule->arg );
2213 VG_(printf)("} ");
2214 break;
2215 default: VG_(core_panic)("ppRegRule");
2220 /* Size of the stack of register unwind rules. This is only
2221 exceedingly rarely used, so a stack of size 1 should actually work
2222 with almost all compiler-generated CFA. */
2223 #define N_RR_STACK 4
2225 typedef
2226 struct {
2227 /* Read-only fields (set by the CIE) */
2228 Int code_a_f;
2229 Int data_a_f;
2230 Addr initloc;
2231 Int ra_reg;
2232 /* The rest of these fields can be modified by
2233 run_CF_instruction. */
2234 /* The LOC entry */
2235 Addr loc;
2236 /* We need a stack of these in order to handle
2237 DW_CFA_{remember,restore}_state. */
2238 struct UnwindContextState {
2239 /* The CFA entry. This can be either reg+/-offset or an expr. */
2240 Bool cfa_is_regoff; /* True=>is reg+offset; False=>is expr */
2241 Int cfa_reg;
2242 Int cfa_off; /* in bytes */
2243 Int cfa_expr_ix; /* index into cfa_exprs */
2244 /* Register unwind rules. */
2245 RegRule reg[N_CFI_REGS];
2247 state[N_RR_STACK];
2248 Int state_sp; /* 0 <= state_sp < N_RR_STACK; points at the
2249 currently-in-use rule set. */
2250 /* array of CfiExpr, shared by reg[] and cfa_expr_ix */
2251 XArray* exprs;
2253 UnwindContext;
2255 static void ppUnwindContext ( const UnwindContext* ctx )
2257 Int j, i;
2258 VG_(printf)("0x%llx: ", (ULong)ctx->loc);
2259 for (j = 0; j <= ctx->state_sp; j++) {
2260 const struct UnwindContextState* ctxs = &ctx->state[j];
2261 VG_(printf)("%s[%d]={ ", j > 0 ? " " : "", j);
2262 if (ctxs->cfa_is_regoff) {
2263 VG_(printf)("%d(r%d) ", ctxs->cfa_off, ctxs->cfa_reg);
2264 } else {
2265 vg_assert(ctx->exprs);
2266 VG_(printf)("{");
2267 ML_(ppCfiExpr)( ctx->exprs, ctxs->cfa_expr_ix );
2268 VG_(printf)("} ");
2270 VG_(printf)("{ ");
2271 for (i = 0; i < N_CFI_REGS; i++)
2272 ppRegRule(ctx->exprs, &ctxs->reg[i]);
2273 VG_(printf)("}");
2275 VG_(printf)("\n");
2278 static void initUnwindContext ( /*OUT*/UnwindContext* ctx )
2280 Int j, i;
2281 VG_(memset)(ctx, 0, sizeof(*ctx));
2282 /* ctx->code_a_f = 0;
2283 ctx->data_a_f = 0;
2284 ctx->initloc = 0; */
2285 ctx->ra_reg = RA_REG_DEFAULT;
2286 /* ctx->loc = 0;
2287 ctx->exprs = NULL;
2288 ctx->state_sp = 0; */
2289 for (j = 0; j < N_RR_STACK; j++) {
2290 ctx->state[j].cfa_is_regoff = True;
2291 /* ctx->state[j].cfa_reg = 0;
2292 ctx->state[j].cfa_off = 0;
2293 ctx->state[j].cfa_expr_ix = 0; */
2294 for (i = 0; i < N_CFI_REGS; i++) {
2295 if (RR_Undef != 0)
2296 ctx->state[j].reg[i].tag = RR_Undef;
2297 /* ctx->state[j].reg[i].arg = 0; */
2299 # if defined(VGA_arm)
2300 /* All callee-saved registers (or at least the ones we are
2301 summarising for) should start out as RR_Same, on ARM. */
2302 ctx->state[j].reg[11].tag = RR_Same;
2303 /* ctx->state[j].reg[13].tag = RR_Same; */
2304 ctx->state[j].reg[14].tag = RR_Same;
2305 ctx->state[j].reg[12].tag = RR_Same;
2306 ctx->state[j].reg[7].tag = RR_Same;
2307 /* this can't be right though: R12 (IP) isn't callee saved. */
2308 # elif defined(VGA_arm64)
2309 /* Callee-saved registers (that we are interested in) should
2310 start out as RR_Same. */
2311 ctx->state[j].reg[29/*FP*/].tag = RR_Same;
2312 ctx->state[j].reg[30/*LR*/].tag = RR_Same;
2313 # endif
2318 /* A structure which holds information needed by read_encoded_Addr().
2320 typedef
2321 struct {
2322 UChar encoding;
2323 DiCursor ehframe_image;
2324 Addr ehframe_avma;
2325 Addr text_bias;
2326 Addr got_avma;
2328 AddressDecodingInfo;
2331 /* ------------ Deal with summary-info records ------------ */
2333 /* --------------- Summarisation --------------- */
2335 /* Forward */
2336 static
2337 Int copy_convert_CfiExpr_tree ( XArray* dst, const UnwindContext* srcuc,
2338 Int nd );
2340 /* Summarise ctx into si, if possible. Returns True if successful.
2341 This is taken to be just after ctx's loc advances; hence the
2342 summary is up to but not including the current loc. This works
2343 on both x86 and amd64.
2345 static Bool summarise_context(/*OUT*/Addr* base,
2346 /*OUT*/UInt* len,
2347 /*OUT*/DiCfSI_m* si_m,
2348 Addr loc_start,
2349 const UnwindContext* ctx,
2350 DebugInfo* debuginfo )
2352 Int why = 0;
2353 const struct UnwindContextState* ctxs;
2355 *base = 0;
2356 *len = 0;
2357 VG_(bzero_inline)(si_m, sizeof(*si_m));
2359 /*const*/ Bool is_s390x_linux = False;
2360 # if defined(VGP_s390x_linux)
2361 is_s390x_linux = True;
2362 # endif
2364 /* Guard against obviously stupid settings of the reg-rule stack
2365 pointer. */
2366 if (ctx->state_sp < 0) { why = 8; goto failed; }
2367 if (ctx->state_sp >= N_RR_STACK) { why = 9; goto failed; }
2368 ctxs = &ctx->state[ctx->state_sp];
2370 /* First, summarise the method for generating the CFA */
2371 if (!ctxs->cfa_is_regoff) {
2372 /* it was set by DW_CFA_def_cfa_expression; try to convert */
2373 XArray *src, *dst;
2374 Int conv;
2375 src = ctx->exprs;
2376 dst = debuginfo->cfsi_exprs;
2377 if (src && (VG_(sizeXA)(src) > 0) && (!dst)) {
2378 dst = VG_(newXA)( ML_(dinfo_zalloc), "di.ccCt.1", ML_(dinfo_free),
2379 sizeof(CfiExpr) );
2380 debuginfo->cfsi_exprs = dst;
2382 conv = copy_convert_CfiExpr_tree
2383 ( dst, ctx, ctxs->cfa_expr_ix );
2384 vg_assert(conv >= -1);
2385 if (conv == -1) { why = 6; goto failed; }
2386 si_m->cfa_how = CFIC_EXPR;
2387 si_m->cfa_off = conv;
2388 if (0 && debuginfo->ddump_frames)
2389 ML_(ppCfiExpr)(dst, conv);
2391 else
2392 if (ctxs->cfa_is_regoff && ctxs->cfa_reg == SP_REG) {
2393 si_m->cfa_off = ctxs->cfa_off;
2394 # if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) \
2395 || defined(VGA_mips32) || defined(VGA_nanomips) || defined(VGA_mips64)
2396 si_m->cfa_how = CFIC_IA_SPREL;
2397 # elif defined(VGA_arm)
2398 si_m->cfa_how = CFIC_ARM_R13REL;
2399 # elif defined(VGA_arm64)
2400 si_m->cfa_how = CFIC_ARM64_SPREL;
2401 # else
2402 si_m->cfa_how = 0; /* invalid */
2403 # endif
2405 else
2406 if (ctxs->cfa_is_regoff && ctxs->cfa_reg == FP_REG) {
2407 si_m->cfa_off = ctxs->cfa_off;
2408 # if defined(VGA_x86) || defined(VGA_amd64) || defined(VGA_s390x) \
2409 || defined(VGA_mips32) || defined(VGA_nanomips) || defined(VGA_mips64)
2410 si_m->cfa_how = CFIC_IA_BPREL;
2411 # elif defined(VGA_arm)
2412 si_m->cfa_how = CFIC_ARM_R12REL;
2413 # elif defined(VGA_arm64)
2414 si_m->cfa_how = CFIC_ARM64_X29REL;
2415 # else
2416 si_m->cfa_how = 0; /* invalid */
2417 # endif
2419 # if defined(VGA_arm)
2420 else
2421 if (ctxs->cfa_is_regoff && ctxs->cfa_reg == 11/*??_REG*/) {
2422 si_m->cfa_how = CFIC_ARM_R11REL;
2423 si_m->cfa_off = ctxs->cfa_off;
2425 else
2426 if (ctxs->cfa_is_regoff && ctxs->cfa_reg == 7/*??_REG*/) {
2427 si_m->cfa_how = CFIC_ARM_R7REL;
2428 si_m->cfa_off = ctxs->cfa_off;
2430 # elif defined(VGA_arm64)
2431 // do we need any arm64 specifics here?
2432 # endif
2433 else {
2434 why = 1;
2435 goto failed;
2438 # define SUMMARISE_HOW(_how, _off, _ctxreg) \
2439 _how = CFIR_UNKNOWN; /* install safe initial values */ \
2440 _off = 0; \
2441 switch (_ctxreg.tag) { \
2442 case RR_Undef: \
2443 _how = CFIR_UNKNOWN; _off = 0; break; \
2444 case RR_Same: \
2445 _how = CFIR_SAME; _off = 0; break; \
2446 case RR_CFAOff: \
2447 _how = CFIR_MEMCFAREL; _off = _ctxreg.arg; break; \
2448 case RR_CFAValOff: \
2449 _how = CFIR_CFAREL; _off = _ctxreg.arg; break; \
2450 case RR_ValExpr: { \
2451 XArray *src, *dst; \
2452 Int conv; \
2453 src = ctx->exprs; \
2454 dst = debuginfo->cfsi_exprs; \
2455 if (src && (VG_(sizeXA)(src) > 0) && (!dst)) { \
2456 dst = VG_(newXA)( ML_(dinfo_zalloc), \
2457 "di.ccCt.2", \
2458 ML_(dinfo_free), \
2459 sizeof(CfiExpr) ); \
2460 debuginfo->cfsi_exprs = dst; \
2462 conv = copy_convert_CfiExpr_tree \
2463 ( dst, ctx, _ctxreg.arg ); \
2464 vg_assert(conv >= -1); \
2465 if (conv == -1) { why = 7; goto failed; } \
2466 _how = CFIR_EXPR; \
2467 _off = conv; \
2468 if (0 && debuginfo->ddump_frames) \
2469 ML_(ppCfiExpr)(dst, conv); \
2470 break; \
2472 case RR_Reg: \
2473 if (is_s390x_linux) { \
2474 if (_ctxreg.arg == 16/*dwarf reg 16 is %f0*/) { \
2475 _how = CFIR_S390X_F0; \
2476 _off = 0; \
2477 break; \
2479 else if (_ctxreg.arg == 17/*dwarf reg 17 is %f2*/) { \
2480 _how = CFIR_S390X_F2; \
2481 _off = 0; \
2482 break; \
2484 else if (_ctxreg.arg == 18/*dwarf reg 18 is %f4*/) { \
2485 _how = CFIR_S390X_F4; \
2486 _off = 0; \
2487 break; \
2489 else if (_ctxreg.arg == 19/*dwarf reg 19 is %f6*/) { \
2490 _how = CFIR_S390X_F6; \
2491 _off = 0; \
2492 break; \
2494 else if (_ctxreg.arg == 20/*dwarf reg 20 is %f1*/) { \
2495 _how = CFIR_S390X_F1; \
2496 _off = 0; \
2497 break; \
2499 else if (_ctxreg.arg == 21/*dwarf reg 21 is %f3*/) { \
2500 _how = CFIR_S390X_F3; \
2501 _off = 0; \
2502 break; \
2504 else if (_ctxreg.arg == 22/*dwarf reg 22 is %f5*/) { \
2505 _how = CFIR_S390X_F5; \
2506 _off = 0; \
2507 break; \
2509 else if (_ctxreg.arg == 23/*dwarf reg 23 is %f7*/) { \
2510 _how = CFIR_S390X_F7; \
2511 _off = 0; \
2512 break; \
2515 /* Currently we only support RR_Reg for s390. */ \
2516 why = 2; goto failed; \
2517 default: \
2518 why = 2; goto failed; /* otherwise give up */ \
2522 # if defined(VGA_x86) || defined(VGA_amd64)
2524 /* --- entire tail of this fn specialised for x86/amd64 --- */
2526 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off,
2527 ctxs->reg[ctx->ra_reg] );
2528 SUMMARISE_HOW(si_m->bp_how, si_m->bp_off,
2529 ctxs->reg[FP_REG] );
2531 /* on x86/amd64, it seems the old %{e,r}sp value before the call is
2532 always the same as the CFA. Therefore ... */
2533 si_m->sp_how = CFIR_CFAREL;
2534 si_m->sp_off = 0;
2536 /* also, gcc says "Undef" for %{e,r}bp when it is unchanged. So
2537 .. */
2538 if (ctxs->reg[FP_REG].tag == RR_Undef)
2539 si_m->bp_how = CFIR_SAME;
2541 /* knock out some obviously stupid cases */
2542 if (si_m->ra_how == CFIR_SAME)
2543 { why = 3; goto failed; }
2545 /* bogus looking range? Note, we require that the difference is
2546 representable in 32 bits. */
2547 if (loc_start >= ctx->loc)
2548 { why = 4; goto failed; }
2549 if (ctx->loc - loc_start > 10000000 /* let's say */)
2550 { why = 5; goto failed; }
2552 *base = loc_start + ctx->initloc;
2553 *len = (UInt)(ctx->loc - loc_start);
2555 return True;
2557 # elif defined(VGA_arm)
2559 /* ---- entire tail of this fn specialised for arm ---- */
2561 SUMMARISE_HOW(si_m->r14_how, si_m->r14_off,
2562 ctxs->reg[14] );
2564 //SUMMARISE_HOW(si_m->r13_how, si_m->r13_off,
2565 // ctxs->reg[13] );
2567 SUMMARISE_HOW(si_m->r12_how, si_m->r12_off,
2568 ctxs->reg[FP_REG] );
2570 SUMMARISE_HOW(si_m->r11_how, si_m->r11_off,
2571 ctxs->reg[11/*FP_REG*/] );
2573 SUMMARISE_HOW(si_m->r7_how, si_m->r7_off,
2574 ctxs->reg[7] );
2576 if (ctxs->reg[14/*LR*/].tag == RR_Same
2577 && ctx->ra_reg == 14/*as we expect it always to be*/) {
2578 /* Generate a trivial CfiExpr, which merely says "r14". First
2579 ensure this DebugInfo has a cfsi_expr array in which to park
2580 it. */
2581 if (!debuginfo->cfsi_exprs)
2582 debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc),
2583 "di.ccCt.2a",
2584 ML_(dinfo_free),
2585 sizeof(CfiExpr) );
2586 si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs,
2587 Creg_ARM_R14);
2588 si_m->ra_how = CFIR_EXPR;
2589 } else {
2590 /* Just summarise it in the normal way */
2591 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off,
2592 ctxs->reg[ctx->ra_reg] );
2595 /* on arm, it seems the old r13 (SP) value before the call is
2596 always the same as the CFA. Therefore ... */
2597 si_m->r13_how = CFIR_CFAREL;
2598 si_m->r13_off = 0;
2600 /* bogus looking range? Note, we require that the difference is
2601 representable in 32 bits. */
2602 if (loc_start >= ctx->loc)
2603 { why = 4; goto failed; }
2604 if (ctx->loc - loc_start > 10000000 /* let's say */)
2605 { why = 5; goto failed; }
2607 *base = loc_start + ctx->initloc;
2608 *len = (UInt)(ctx->loc - loc_start);
2610 return True;
2612 # elif defined(VGA_arm64)
2614 /* --- entire tail of this fn specialised for arm64 --- */
2616 SUMMARISE_HOW(si_m->x30_how, si_m->x30_off, ctxs->reg[30/*LR*/]);
2617 SUMMARISE_HOW(si_m->x29_how, si_m->x29_off, ctxs->reg[29/*FP*/]);
2619 if (ctxs->reg[30/*LR*/].tag == RR_Same
2620 && ctx->ra_reg == 30/*as we expect it always to be*/) {
2621 /* Generate a trivial CfiExpr, which merely says "x30". First
2622 ensure this DebugInfo has a cfsi_expr array in which to park
2623 it. */
2624 if (!debuginfo->cfsi_exprs)
2625 debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc),
2626 "di.ccCt.2a-arm64",
2627 ML_(dinfo_free),
2628 sizeof(CfiExpr) );
2629 si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs,
2630 Creg_ARM64_X30);
2631 si_m->ra_how = CFIR_EXPR;
2632 } else {
2633 /* Just summarise it in the normal way */
2634 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off, ctxs->reg[ctx->ra_reg]);
2637 /* on arm64, it seems the old SP value before the call is always
2638 the same as the CFA. Therefore ... */
2639 si_m->sp_how = CFIR_CFAREL;
2640 si_m->sp_off = 0;
2642 /* bogus looking range? Note, we require that the difference is
2643 representable in 32 bits. */
2644 if (loc_start >= ctx->loc)
2645 { why = 4; goto failed; }
2646 if (ctx->loc - loc_start > 10000000 /* let's say */)
2647 { why = 5; goto failed; }
2649 *base = loc_start + ctx->initloc;
2650 *len = (UInt)(ctx->loc - loc_start);
2652 return True;
2654 # elif defined(VGA_s390x)
2656 /* --- entire tail of this fn specialised for s390 --- */
2658 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off,
2659 ctxs->reg[ctx->ra_reg] );
2660 SUMMARISE_HOW(si_m->fp_how, si_m->fp_off,
2661 ctxs->reg[FP_REG] );
2662 SUMMARISE_HOW(si_m->sp_how, si_m->sp_off,
2663 ctxs->reg[SP_REG] );
2664 SUMMARISE_HOW(si_m->f0_how, si_m->f0_off,
2665 ctxs->reg[16/*%f0*/]);
2666 SUMMARISE_HOW(si_m->f2_how, si_m->f2_off,
2667 ctxs->reg[17/*%f2*/]);
2668 SUMMARISE_HOW(si_m->f4_how, si_m->f4_off,
2669 ctxs->reg[18/*%f4*/]);
2670 SUMMARISE_HOW(si_m->f6_how, si_m->f6_off,
2671 ctxs->reg[19/*%f6*/]);
2672 SUMMARISE_HOW(si_m->f1_how, si_m->f1_off,
2673 ctxs->reg[20/*%f1*/]);
2674 SUMMARISE_HOW(si_m->f3_how, si_m->f3_off,
2675 ctxs->reg[21/*%f3*/]);
2676 SUMMARISE_HOW(si_m->f5_how, si_m->f5_off,
2677 ctxs->reg[22/*%f5*/]);
2678 SUMMARISE_HOW(si_m->f7_how, si_m->f7_off,
2679 ctxs->reg[23/*%f7*/]);
2681 /* change some defaults to consumable values */
2682 if (si_m->sp_how == CFIR_UNKNOWN)
2683 si_m->sp_how = CFIR_SAME;
2685 if (si_m->fp_how == CFIR_UNKNOWN)
2686 si_m->fp_how = CFIR_SAME;
2688 if (si_m->cfa_how == CFIR_UNKNOWN) {
2689 si_m->cfa_how = CFIC_IA_SPREL;
2690 si_m->cfa_off = 160;
2693 if (si_m->ra_how == CFIR_UNKNOWN) {
2694 if (!debuginfo->cfsi_exprs)
2695 debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc),
2696 "di.ccCt.2a",
2697 ML_(dinfo_free),
2698 sizeof(CfiExpr) );
2699 si_m->ra_how = CFIR_EXPR;
2700 si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs,
2701 Creg_S390_LR);
2704 if (si_m->f0_how == CFIR_UNKNOWN)
2705 si_m->f0_how = CFIR_SAME;
2707 if (si_m->f1_how == CFIR_UNKNOWN)
2708 si_m->f1_how = CFIR_SAME;
2710 if (si_m->f2_how == CFIR_UNKNOWN)
2711 si_m->f2_how = CFIR_SAME;
2713 if (si_m->f3_how == CFIR_UNKNOWN)
2714 si_m->f3_how = CFIR_SAME;
2716 if (si_m->f4_how == CFIR_UNKNOWN)
2717 si_m->f4_how = CFIR_SAME;
2719 if (si_m->f5_how == CFIR_UNKNOWN)
2720 si_m->f5_how = CFIR_SAME;
2722 if (si_m->f6_how == CFIR_UNKNOWN)
2723 si_m->f6_how = CFIR_SAME;
2725 if (si_m->f7_how == CFIR_UNKNOWN)
2726 si_m->f7_how = CFIR_SAME;
2728 /* knock out some obviously stupid cases */
2729 if (si_m->ra_how == CFIR_SAME)
2730 { why = 3; goto failed; }
2732 /* bogus looking range? Note, we require that the difference is
2733 representable in 32 bits. */
2734 if (loc_start >= ctx->loc)
2735 { why = 4; goto failed; }
2736 if (ctx->loc - loc_start > 10000000 /* let's say */)
2737 { why = 5; goto failed; }
2739 *base = loc_start + ctx->initloc;
2740 *len = (UInt)(ctx->loc - loc_start);
2742 return True;
2744 # elif defined(VGA_mips32) || defined(VGA_mips64) || defined(VGA_nanomips)
2746 /* --- entire tail of this fn specialised for mips --- */
2748 SUMMARISE_HOW(si_m->ra_how, si_m->ra_off,
2749 ctxs->reg[ctx->ra_reg] );
2750 SUMMARISE_HOW(si_m->fp_how, si_m->fp_off,
2751 ctxs->reg[FP_REG] );
2752 SUMMARISE_HOW(si_m->sp_how, si_m->sp_off,
2753 ctxs->reg[SP_REG] );
2754 si_m->sp_how = CFIR_CFAREL;
2755 si_m->sp_off = 0;
2757 if (si_m->fp_how == CFIR_UNKNOWN)
2758 si_m->fp_how = CFIR_SAME;
2759 if (si_m->cfa_how == CFIR_UNKNOWN) {
2760 si_m->cfa_how = CFIC_IA_SPREL;
2761 si_m->cfa_off = 160;
2763 if (si_m->ra_how == CFIR_UNKNOWN) {
2764 if (!debuginfo->cfsi_exprs)
2765 debuginfo->cfsi_exprs = VG_(newXA)( ML_(dinfo_zalloc),
2766 "di.ccCt.2a",
2767 ML_(dinfo_free),
2768 sizeof(CfiExpr) );
2769 si_m->ra_how = CFIR_EXPR;
2770 si_m->ra_off = ML_(CfiExpr_CfiReg)( debuginfo->cfsi_exprs,
2771 Creg_MIPS_RA);
2774 if (si_m->ra_how == CFIR_SAME)
2775 { why = 3; goto failed; }
2777 if (loc_start >= ctx->loc)
2778 { why = 4; goto failed; }
2779 if (ctx->loc - loc_start > 10000000 /* let's say */)
2780 { why = 5; goto failed; }
2782 *base = loc_start + ctx->initloc;
2783 *len = (UInt)(ctx->loc - loc_start);
2785 return True;
2786 # elif defined(VGA_ppc32) || defined(VGA_ppc64be) || defined(VGA_ppc64le)
2787 /* These don't use CFI based unwinding (is that really true?) */
2789 # else
2790 # error "Unknown arch"
2791 # endif
2793 /* --- non-specialised code after this point --- */
2795 # undef SUMMARISE_HOW
2797 failed:
2798 if (VG_(clo_verbosity) > 2 || debuginfo->trace_cfi) {
2799 VG_(message)(Vg_DebugMsg,
2800 "summarise_context(loc_start = %#lx)"
2801 ": cannot summarise(why=%d): \n", loc_start, why);
2802 ppUnwindContext(ctx);
2804 return False;
2807 /* Copy the tree rooted at srcuc->exprs node srcix to dstxa, on the
2808 way converting any DwReg regs (regs numbered using the Dwarf scheme
2809 defined by each architecture's ABI) into CfiRegs, which are
2810 platform independent. If the conversion isn't possible because
2811 there is no equivalent register, return -1. This has the
2812 undesirable side effect of de-dagifying the input; oh well. */
2813 static Int copy_convert_CfiExpr_tree ( XArray* dstxa,
2814 const UnwindContext* srcuc,
2815 Int srcix )
2817 CfiExpr* src;
2818 Int cpL, cpR, cpA;
2819 XArray* srcxa = srcuc->exprs;
2820 vg_assert(srcxa);
2821 vg_assert(dstxa);
2822 vg_assert(srcix >= 0 && srcix < VG_(sizeXA)(srcxa));
2824 src = VG_(indexXA)( srcxa, srcix );
2825 switch (src->tag) {
2826 case Cex_Undef:
2827 return ML_(CfiExpr_Undef)( dstxa );
2828 case Cex_Deref:
2829 cpA = copy_convert_CfiExpr_tree( dstxa, srcuc, src->Cex.Deref.ixAddr );
2830 if (cpA == -1)
2831 return -1; /* propagate failure */
2832 return ML_(CfiExpr_Deref)( dstxa, cpA );
2833 case Cex_Const:
2834 return ML_(CfiExpr_Const)( dstxa, src->Cex.Const.con );
2835 case Cex_Binop:
2836 cpL = copy_convert_CfiExpr_tree( dstxa, srcuc, src->Cex.Binop.ixL );
2837 cpR = copy_convert_CfiExpr_tree( dstxa, srcuc, src->Cex.Binop.ixR );
2838 vg_assert(cpL >= -1 && cpR >= -1);
2839 if (cpL == -1 || cpR == -1)
2840 return -1; /* propagate failure */
2841 return ML_(CfiExpr_Binop)( dstxa, src->Cex.Binop.op, cpL, cpR );
2842 case Cex_CfiReg:
2843 /* should not see these in input (are created only by this
2844 conversion step!) */
2845 VG_(core_panic)("copy_convert_CfiExpr_tree: CfiReg in input");
2846 case Cex_DwReg: {
2847 /* This is the only place where the conversion can fail. */
2848 Int dwreg __attribute__((unused));
2849 dwreg = src->Cex.DwReg.reg;
2850 # if defined(VGA_x86) || defined(VGA_amd64)
2851 if (dwreg == SP_REG)
2852 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_SP );
2853 if (dwreg == FP_REG)
2854 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_BP );
2855 if (dwreg == srcuc->ra_reg)
2856 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_IP ); /* correct? */
2857 # elif defined(VGA_arm)
2858 if (dwreg == SP_REG)
2859 return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM_R13 );
2860 if (dwreg == FP_REG)
2861 return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM_R12 );
2862 if (dwreg == srcuc->ra_reg)
2863 return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM_R15 ); /* correct? */
2864 # elif defined(VGA_s390x)
2865 if (dwreg == SP_REG)
2866 return ML_(CfiExpr_CfiReg)( dstxa, Creg_S390_SP );
2867 if (dwreg == FP_REG)
2868 return ML_(CfiExpr_CfiReg)( dstxa, Creg_S390_FP );
2869 if (dwreg == srcuc->ra_reg)
2870 return ML_(CfiExpr_CfiReg)( dstxa, Creg_S390_IA );
2871 # elif defined(VGA_mips32) || defined(VGA_mips64) \
2872 || defined(VGA_nanomips)
2873 if (dwreg == SP_REG)
2874 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_SP );
2875 if (dwreg == FP_REG)
2876 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_BP );
2877 if (dwreg == srcuc->ra_reg)
2878 return ML_(CfiExpr_CfiReg)( dstxa, Creg_IA_IP );
2879 # elif defined(VGA_arm64)
2880 if (dwreg == SP_REG)
2881 return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM64_SP );
2882 if (dwreg == FP_REG)
2883 return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM64_X29 );
2884 if (dwreg == srcuc->ra_reg)
2885 return ML_(CfiExpr_CfiReg)( dstxa, Creg_ARM64_X30 );
2886 # elif defined(VGA_ppc32) || defined(VGA_ppc64be) \
2887 || defined(VGA_ppc64le)
2888 # else
2889 # error "Unknown arch"
2890 # endif
2891 /* else we must fail - can't represent the reg */
2892 return -1;
2894 default:
2895 VG_(core_panic)("copy_convert_CfiExpr_tree: default");
2900 static void ppUnwindContext_summary ( const UnwindContext* ctx )
2902 const struct UnwindContextState* ctxs = &ctx->state[ctx->state_sp];
2904 VG_(printf)("0x%llx-1: ", (ULong)ctx->loc);
2906 if (ctxs->cfa_reg == SP_REG) {
2907 VG_(printf)("SP/CFA=%d+SP ", ctxs->cfa_off);
2908 } else
2909 if (ctxs->cfa_reg == FP_REG) {
2910 VG_(printf)("SP/CFA=%d+FP ", ctxs->cfa_off);
2911 } else {
2912 VG_(printf)("SP/CFA=unknown ");
2915 VG_(printf)("RA=");
2916 ppRegRule( ctx->exprs, &ctxs->reg[ctx->ra_reg] );
2918 VG_(printf)("FP=");
2919 ppRegRule( ctx->exprs, &ctxs->reg[FP_REG] );
2920 VG_(printf)("\n");
2924 /* ------------ Pick apart DWARF2 byte streams ------------ */
2926 static ULong step_le_u_encoded_literal ( DiCursor* data, UInt size )
2928 switch (size) {
2929 case 8: return (ULong)ML_(cur_step_ULong)( data );
2930 case 4: return (ULong)ML_(cur_step_UInt)( data );
2931 case 2: return (ULong)ML_(cur_step_UShort)( data );
2932 case 1: return (ULong)ML_(cur_step_UChar)( data );
2933 default: vg_assert(0); /*NOTREACHED*/ return 0;
2937 static Long step_le_s_encoded_literal ( DiCursor* data, UInt size )
2939 ULong u64 = step_le_u_encoded_literal( data, size );
2940 Long s64;
2941 switch (size) {
2942 case 8: s64 = u64; break;
2943 case 4: s64 = u64 << 32; s64 >>= 32; break;
2944 case 2: s64 = u64 << 48; s64 >>= 48; break;
2945 case 1: s64 = u64 << 56; s64 >>= 56; break;
2946 default: vg_assert(0); /*NOTREACHED*/ return 0;
2948 return s64;
2951 static UChar default_Addr_encoding ( void )
2953 switch (sizeof(Addr)) {
2954 case 4: return DW_EH_PE_udata4;
2955 case 8: return DW_EH_PE_udata8;
2956 default: vg_assert(0);
2960 static UInt size_of_encoded_Addr ( UChar encoding )
2962 if (encoding == DW_EH_PE_omit)
2963 return 0;
2965 switch (encoding & 0x07) {
2966 case DW_EH_PE_absptr: return sizeof(Addr);
2967 case DW_EH_PE_udata2: return sizeof(UShort);
2968 case DW_EH_PE_udata4: return sizeof(UInt);
2969 case DW_EH_PE_udata8: return sizeof(ULong);
2970 default: vg_assert(0);
2974 static Addr step_encoded_Addr ( const AddressDecodingInfo* adi,
2975 /*MOD*/DiCursor* data )
2977 /* Regarding the handling of DW_EH_PE_absptr. DWARF3 says this
2978 denotes an absolute address, hence you would think 'base' is
2979 zero. However, that is nonsensical (unless relocations are to
2980 be applied to the unwind data before reading it, which sounds
2981 unlikely). My interpretation is that DW_EH_PE_absptr indicates
2982 an address relative to where the object was loaded (technically,
2983 relative to its stated load VMA, hence the use of text_bias
2984 rather than text_avma). Hmm, should we use text_bias or
2985 text_avma here? Not sure.
2987 This view appears to be supported by DWARF3 spec sec 7.3
2988 "Executable Objects and Shared Objects":
2990 This requirement makes the debugging information for shared
2991 objects position independent. Virtual addresses in a shared
2992 object may be calculated by adding the offset to the base
2993 address at which the object was attached. This offset is
2994 available in the run-time linker's data structures.
2996 Addr base;
2997 Word offset;
2998 UChar encoding = adi->encoding;
2999 DiCursor ehframe_image = adi->ehframe_image;
3000 Addr ehframe_avma = adi->ehframe_avma;
3001 Addr got_avma = adi->got_avma;
3003 vg_assert((encoding & DW_EH_PE_indirect) == 0);
3005 switch (encoding & 0x70) {
3006 case DW_EH_PE_absptr:
3007 base = adi->text_bias;
3008 break;
3009 case DW_EH_PE_pcrel:
3010 base = ehframe_avma + ML_(cur_minus)(*data, ehframe_image);
3011 break;
3012 case DW_EH_PE_datarel:
3013 base = got_avma;
3014 break;
3015 case DW_EH_PE_textrel:
3016 vg_assert(0);
3017 base = /* text base address */ 0;
3018 break;
3019 case DW_EH_PE_funcrel:
3020 base = 0;
3021 break;
3022 case DW_EH_PE_aligned:
3023 base = 0;
3024 offset = ML_(cur_minus)(*data, ehframe_image);
3025 if ((offset % sizeof(Addr)) != 0) {
3026 Word nbytes = sizeof(Addr) - (offset % sizeof(Addr));
3027 *data = ML_(cur_plus)(*data, nbytes);
3029 break;
3030 default:
3031 vg_assert(0);
3034 if ((encoding & 0x07) == 0x00)
3035 encoding |= default_Addr_encoding();
3037 switch (encoding & 0x0f) {
3038 case DW_EH_PE_udata2:
3039 return base + ML_(cur_step_UShort)(data);
3040 case DW_EH_PE_udata4:
3041 return base + ML_(cur_step_UInt)(data);
3042 case DW_EH_PE_udata8:
3043 return base + ML_(cur_step_ULong)(data);
3044 case DW_EH_PE_sdata2:
3045 return base + ML_(cur_step_Short)(data);
3046 case DW_EH_PE_sdata4:
3047 return base + ML_(cur_step_Int)(data);
3048 case DW_EH_PE_sdata8:
3049 return base + ML_(cur_step_Long)(data);
3050 default:
3051 vg_assert2(0, "read encoded address %d\n", encoding & 0x0f);
3056 /* ------------ Run/show DWARF3 expressions ---------- */
3058 /* Convert the DWARF3 expression in expr[0 .. exprlen-1] into a dag
3059 (of CfiExprs) stored in ctx->exprs, and return the index in
3060 ctx->exprs of the root node. Or fail in which case return -1. */
3061 /* IMPORTANT: when adding expression forms here, also remember to
3062 add suitable evaluation code in evalCfiExpr in debuginfo.c. */
3063 static Int dwarfexpr_to_dag ( const UnwindContext* ctx,
3064 DiCursor expr, Int exprlen,
3065 Bool push_cfa_at_start,
3066 Bool ddump_frames )
3068 # define N_EXPR_STACK 20
3070 # define PUSH(_arg) \
3071 do { \
3072 vg_assert(sp >= -1 && sp < N_EXPR_STACK); \
3073 if (sp == N_EXPR_STACK-1) \
3074 return -1; \
3075 sp++; \
3076 stack[sp] = (_arg); \
3077 } while (0)
3079 # define POP(_lval) \
3080 do { \
3081 vg_assert(sp >= -1 && sp < N_EXPR_STACK); \
3082 if (sp == -1) \
3083 return -1; \
3084 _lval = stack[sp]; \
3085 sp--; \
3086 } while (0)
3088 Int ix, ix2, reg;
3089 UChar opcode;
3090 Word sw;
3091 UWord uw;
3092 CfiUnop uop;
3093 CfiBinop bop;
3094 const HChar* opname;
3096 Int sp; /* # of top element: valid is -1 .. N_EXPR_STACK-1 */
3097 Int stack[N_EXPR_STACK]; /* indices into ctx->exprs */
3098 const struct UnwindContextState* ctxs = &ctx->state[ctx->state_sp];
3100 XArray* dst = ctx->exprs;
3101 DiCursor limit = ML_(cur_plus)(expr, exprlen);
3103 vg_assert(dst);
3104 vg_assert(exprlen >= 0);
3106 sp = -1; /* empty */
3108 /* Synthesise the CFA as a CfiExpr */
3109 if (push_cfa_at_start) {
3110 if (ctxs->cfa_is_regoff) {
3111 /* cfa is reg +/- offset */
3112 ix = ML_(CfiExpr_Binop)( dst,
3113 Cbinop_Add,
3114 ML_(CfiExpr_DwReg)( dst, ctxs->cfa_reg ),
3115 ML_(CfiExpr_Const)( dst, (UWord)(Word)ctxs->cfa_off )
3117 PUSH(ix);
3118 } else {
3119 /* CFA is already an expr; use its root node */
3120 PUSH(ctxs->cfa_expr_ix);
3124 while (True) {
3126 vg_assert(sp >= -1 && sp < N_EXPR_STACK);
3128 if (ML_(cur_cmpGT)(expr, limit)) /* "expr > limit" */
3129 return -1; /* overrun - something's wrong */
3131 if (ML_(cur_cmpEQ)(expr, limit)) { /* "expr == limit" */
3132 /* end of expr - return expr on the top of stack. */
3133 if (sp == -1)
3134 return -1; /* stack empty. Bad. */
3135 else
3136 break;
3139 uop = 0; bop = 0; opname = NULL; /* excessively conservative */
3141 opcode = ML_(cur_step_UChar)(&expr);
3142 switch (opcode) {
3144 case DW_OP_lit0 ... DW_OP_lit31:
3145 /* push: literal 0 .. 31 */
3146 sw = (Word)opcode - (Word)DW_OP_lit0;
3147 vg_assert(sw >= 0 && sw <= 31);
3148 PUSH( ML_(CfiExpr_Const)( dst, (UWord)sw ) );
3149 if (ddump_frames)
3150 VG_(printf)("DW_OP_lit%ld", sw);
3151 break;
3153 case DW_OP_breg0 ... DW_OP_breg31:
3154 /* push: reg + sleb128 */
3155 reg = (Int)opcode - (Int)DW_OP_breg0;
3156 vg_assert(reg >= 0 && reg <= 31);
3157 sw = step_leb128S( &expr );
3158 ix = ML_(CfiExpr_Binop)( dst,
3159 Cbinop_Add,
3160 ML_(CfiExpr_DwReg)( dst, reg ),
3161 ML_(CfiExpr_Const)( dst, (UWord)sw )
3163 PUSH(ix);
3164 if (ddump_frames)
3165 VG_(printf)("DW_OP_breg%d: %ld", reg, sw);
3166 break;
3168 case DW_OP_reg0 ... DW_OP_reg31:
3169 /* push: reg */
3170 reg = (Int)opcode - (Int)DW_OP_reg0;
3171 vg_assert(reg >= 0 && reg <= 31);
3172 ix = ML_(CfiExpr_DwReg)( dst, reg );
3173 PUSH(ix);
3174 if (ddump_frames)
3175 VG_(printf)("DW_OP_reg%d", reg);
3176 break;
3178 case DW_OP_plus_uconst:
3179 uw = step_leb128U( &expr );
3180 PUSH( ML_(CfiExpr_Const)( dst, uw ) );
3181 POP( ix );
3182 POP( ix2 );
3183 PUSH( ML_(CfiExpr_Binop)( dst, Cbinop_Add, ix2, ix ) );
3184 if (ddump_frames)
3185 VG_(printf)("DW_OP_plus_uconst: %lu", uw);
3186 break;
3188 case DW_OP_const4s:
3189 /* push: 32-bit signed immediate */
3190 sw = step_le_s_encoded_literal( &expr, 4 );
3191 PUSH( ML_(CfiExpr_Const)( dst, (UWord)sw ) );
3192 if (ddump_frames)
3193 VG_(printf)("DW_OP_const4s: %ld", sw);
3194 break;
3196 case DW_OP_const2s:
3197 /* push: 16-bit signed immediate */
3198 sw = step_le_s_encoded_literal( &expr, 2 );
3199 PUSH( ML_(CfiExpr_Const)( dst, (UWord)sw ) );
3200 if (ddump_frames)
3201 VG_(printf)("DW_OP_const2s: %ld", sw);
3202 break;
3204 case DW_OP_const1s:
3205 /* push: 8-bit signed immediate */
3206 sw = step_le_s_encoded_literal( &expr, 1 );
3207 PUSH( ML_(CfiExpr_Const)( dst, (UWord)sw ) );
3208 if (ddump_frames)
3209 VG_(printf)("DW_OP_const1s: %ld", sw);
3210 break;
3212 case DW_OP_const1u:
3213 /* push: 8-bit unsigned immediate */
3214 uw = step_le_u_encoded_literal( &expr, 1 );
3215 PUSH( ML_(CfiExpr_Const)( dst, uw ) );
3216 if (ddump_frames)
3217 VG_(printf)("DW_OP_const1: %lu", uw);
3218 break;
3220 case DW_OP_const2u:
3221 /* push: 16-bit unsigned immediate */
3222 uw = step_le_u_encoded_literal( &expr, 2 );
3223 PUSH( ML_(CfiExpr_Const)( dst, uw ) );
3224 if (ddump_frames)
3225 VG_(printf)("DW_OP_const2: %lu", uw);
3226 break;
3228 case DW_OP_const4u:
3229 /* push: 32-bit unsigned immediate */
3230 uw = step_le_u_encoded_literal( &expr, 4 );
3231 PUSH( ML_(CfiExpr_Const)( dst, uw ) );
3232 if (ddump_frames)
3233 VG_(printf)("DW_OP_const4: %lu", uw);
3234 break;
3236 case DW_OP_abs:
3237 uop = Cunop_Abs; opname = "abs"; goto unop;
3238 case DW_OP_neg:
3239 uop = Cunop_Neg; opname = "neg"; goto unop;
3240 case DW_OP_not:
3241 uop = Cunop_Not; opname = "not"; goto unop;
3242 unop:
3243 POP( ix );
3244 PUSH( ML_(CfiExpr_Unop)( dst, uop, ix ) );
3245 if (ddump_frames)
3246 VG_(printf)("DW_OP_%s", opname);
3247 break;
3249 case DW_OP_minus:
3250 bop = Cbinop_Sub; opname = "minus"; goto binop;
3251 case DW_OP_plus:
3252 bop = Cbinop_Add; opname = "plus"; goto binop;
3253 case DW_OP_and:
3254 bop = Cbinop_And; opname = "and"; goto binop;
3255 case DW_OP_mul:
3256 bop = Cbinop_Mul; opname = "mul"; goto binop;
3257 case DW_OP_shl:
3258 bop = Cbinop_Shl; opname = "shl"; goto binop;
3259 case DW_OP_shr:
3260 bop = Cbinop_Shr; opname = "shr"; goto binop;
3261 case DW_OP_eq:
3262 bop = Cbinop_Eq; opname = "eq"; goto binop;
3263 case DW_OP_ge:
3264 bop = Cbinop_Ge; opname = "ge"; goto binop;
3265 case DW_OP_gt:
3266 bop = Cbinop_Gt; opname = "gt"; goto binop;
3267 case DW_OP_le:
3268 bop = Cbinop_Le; opname = "le"; goto binop;
3269 case DW_OP_lt:
3270 bop = Cbinop_Lt; opname = "lt"; goto binop;
3271 case DW_OP_ne:
3272 bop = Cbinop_Ne; opname = "ne"; goto binop;
3273 binop:
3274 POP( ix );
3275 POP( ix2 );
3276 PUSH( ML_(CfiExpr_Binop)( dst, bop, ix2, ix ) );
3277 if (ddump_frames)
3278 VG_(printf)("DW_OP_%s", opname);
3279 break;
3281 case DW_OP_deref:
3282 POP( ix );
3283 PUSH( ML_(CfiExpr_Deref)( dst, ix ) );
3284 if (ddump_frames)
3285 VG_(printf)("DW_OP_deref");
3286 break;
3288 case DW_OP_drop:
3289 POP( ix );
3290 if (ddump_frames)
3291 VG_(printf)("DW_OP_drop");
3292 break;
3294 default:
3295 if (!VG_(clo_xml))
3296 VG_(message)(Vg_DebugMsg,
3297 "Warning: DWARF2 CFI reader: unhandled DW_OP_ "
3298 "opcode 0x%x\n", (Int)opcode);
3299 return -1;
3302 if (ML_(cur_cmpLT)(expr, limit) && ddump_frames)
3303 VG_(printf)("; ");
3307 vg_assert(sp >= -1 && sp < N_EXPR_STACK);
3308 if (sp == -1)
3309 return -1;
3311 if (0 && ddump_frames)
3312 ML_(ppCfiExpr)( dst, stack[sp] );
3313 return stack[sp];
3315 # undef POP
3316 # undef PUSH
3317 # undef N_EXPR_STACK
3321 /* ------------ Run/show CFI instructions ------------ */
3323 /* Run a CFI instruction, and also return its length.
3324 Returns 0 if the instruction could not be executed.
3326 static Int run_CF_instruction ( /*MOD*/UnwindContext* ctx,
3327 DiCursor instrIN,
3328 const UnwindContext* restore_ctx,
3329 const AddressDecodingInfo* adi,
3330 const DebugInfo* di )
3332 Int off, reg, reg2, len, j;
3333 UInt delta;
3334 Addr printing_bias = ((Addr)ctx->initloc) - ((Addr)di->text_bias);
3335 struct UnwindContextState* ctxs;
3337 DiCursor instr = instrIN;
3338 UChar instr_0 = ML_(cur_step_UChar)(&instr);
3339 UChar hi2 = (instr_0 >> 6) & 3;
3340 UChar lo6 = instr_0 & 0x3F;
3342 if (ctx->state_sp < 0 || ctx->state_sp >= N_RR_STACK)
3343 return 0; /* bogus reg-rule stack pointer */
3345 ctxs = &ctx->state[ctx->state_sp];
3346 if (hi2 == DW_CFA_advance_loc) {
3347 delta = (UInt)lo6;
3348 delta *= ctx->code_a_f;
3349 ctx->loc += delta;
3350 if (di->ddump_frames)
3351 VG_(printf)(" DW_CFA_advance_loc: %d to %08lx\n",
3352 (Int)delta, (Addr)ctx->loc + printing_bias);
3353 return ML_(cur_minus)(instr, instrIN);
3356 if (hi2 == DW_CFA_offset) {
3357 /* Set rule for reg 'lo6' to CFAOff(off * data_af) */
3358 off = step_leb128( &instr, 0 );
3359 reg = (Int)lo6;
3360 if (reg < 0 || reg >= N_CFI_REGS)
3361 return 0; /* fail */
3362 ctxs->reg[reg].tag = RR_CFAOff;
3363 ctxs->reg[reg].arg = off * ctx->data_a_f;
3364 if (di->ddump_frames)
3365 VG_(printf)(" DW_CFA_offset: r%d at cfa%s%d\n",
3366 (Int)reg,
3367 ctxs->reg[reg].arg < 0 ? "" : "+",
3368 (Int)ctxs->reg[reg].arg );
3369 return ML_(cur_minus)(instr, instrIN);
3372 if (hi2 == DW_CFA_restore) {
3373 reg = (Int)lo6;
3374 if (reg < 0 || reg >= N_CFI_REGS)
3375 return 0; /* fail */
3376 if (restore_ctx == NULL)
3377 return 0; /* fail */
3378 ctxs->reg[reg] = restore_ctx->state[restore_ctx->state_sp].reg[reg];
3379 if (di->ddump_frames)
3380 VG_(printf)(" DW_CFA_restore: r%d\n", (Int)reg);
3381 return ML_(cur_minus)(instr, instrIN);
3384 vg_assert(hi2 == DW_CFA_use_secondary);
3386 switch (lo6) {
3387 case DW_CFA_nop:
3388 if (di->ddump_frames)
3389 VG_(printf)(" DW_CFA_nop\n");
3390 break;
3391 case DW_CFA_set_loc:
3392 /* WAS:
3393 ctx->loc = read_Addr(&instr[i]) - ctx->initloc; i+= sizeof(Addr);
3394 Was this ever right? */
3395 /* 2007 Feb 23: No. binutils/dwarf.c treats it as an encoded
3396 address and that appears to be in accordance with the
3397 DWARF3 spec. */
3398 ctx->loc = step_encoded_Addr(adi, &instr);
3399 if (di->ddump_frames)
3400 VG_(printf)(" rci:DW_CFA_set_loc\n");
3401 break;
3402 case DW_CFA_advance_loc1:
3403 delta = (UInt)ML_(cur_step_UChar)(&instr);
3404 delta *= ctx->code_a_f;
3405 ctx->loc += delta;
3406 if (di->ddump_frames)
3407 VG_(printf)(" DW_CFA_advance_loc1: %d to %08lx\n",
3408 (Int)delta, (Addr)ctx->loc + printing_bias);
3409 break;
3410 case DW_CFA_advance_loc2:
3411 delta = (UInt)ML_(cur_step_UShort)(&instr);
3412 delta *= ctx->code_a_f;
3413 ctx->loc += delta;
3414 if (di->ddump_frames)
3415 VG_(printf)(" DW_CFA_advance_loc2: %d to %08lx\n",
3416 (Int)delta, (Addr)ctx->loc + printing_bias);
3417 break;
3418 case DW_CFA_advance_loc4:
3419 delta = (UInt)ML_(cur_step_UInt)(&instr);
3420 delta *= ctx->code_a_f;
3421 ctx->loc += delta;
3422 if (di->ddump_frames)
3423 VG_(printf)(" DW_CFA_advance_loc4: %d to %08lx\n",
3424 (Int)delta, (Addr)ctx->loc + printing_bias);
3425 break;
3427 case DW_CFA_def_cfa:
3428 reg = step_leb128( &instr, 0 );
3429 off = step_leb128( &instr, 0 );
3430 if (reg < 0 || reg >= N_CFI_REGS)
3431 return 0; /* fail */
3432 ctxs->cfa_is_regoff = True;
3433 ctxs->cfa_expr_ix = 0;
3434 ctxs->cfa_reg = reg;
3435 ctxs->cfa_off = off;
3436 if (di->ddump_frames)
3437 VG_(printf)(" DW_CFA_def_cfa: r%d ofs %d\n", (Int)reg, (Int)off);
3438 break;
3440 case DW_CFA_def_cfa_sf:
3441 reg = step_leb128( &instr, 0 );
3442 off = step_leb128( &instr, 1 );
3443 if (reg < 0 || reg >= N_CFI_REGS)
3444 return 0; /* fail */
3445 ctxs->cfa_is_regoff = True;
3446 ctxs->cfa_expr_ix = 0;
3447 ctxs->cfa_reg = reg;
3448 ctxs->cfa_off = off * ctx->data_a_f;
3449 if (di->ddump_frames)
3450 VG_(printf)(" rci:DW_CFA_def_cfa_sf\n");
3451 break;
3453 case DW_CFA_register:
3454 reg = step_leb128( &instr, 0 );
3455 reg2 = step_leb128( &instr, 0 );
3456 if (reg < 0 || reg >= N_CFI_REGS)
3457 return 0; /* fail */
3458 if (reg2 < 0 || reg2 >= N_CFI_REGS)
3459 return 0; /* fail */
3460 ctxs->reg[reg].tag = RR_Reg;
3461 ctxs->reg[reg].arg = reg2;
3462 if (di->ddump_frames)
3463 VG_(printf)(" DW_CFA_register: r%d in r%d\n",
3464 (Int)reg, (Int)reg2);
3465 break;
3467 case DW_CFA_offset_extended:
3468 reg = step_leb128( &instr, 0 );
3469 off = step_leb128( &instr, 0 );
3470 if (reg < 0 || reg >= N_CFI_REGS)
3471 return 0; /* fail */
3472 ctxs->reg[reg].tag = RR_CFAOff;
3473 ctxs->reg[reg].arg = off * ctx->data_a_f;
3474 if (di->ddump_frames)
3475 VG_(printf)(" rci:DW_CFA_offset_extended\n");
3476 break;
3478 case DW_CFA_offset_extended_sf:
3479 reg = step_leb128( &instr, 0 );
3480 off = step_leb128( &instr, 1 );
3481 if (reg < 0 || reg >= N_CFI_REGS)
3482 return 0; /* fail */
3483 ctxs->reg[reg].tag = RR_CFAOff;
3484 ctxs->reg[reg].arg = off * ctx->data_a_f;
3485 if (di->ddump_frames)
3486 VG_(printf)(" DW_CFA_offset_extended_sf: r%d at cfa%s%d\n",
3487 reg,
3488 ctxs->reg[reg].arg < 0 ? "" : "+",
3489 (Int)ctxs->reg[reg].arg);
3490 break;
3492 case DW_CFA_GNU_negative_offset_extended:
3493 reg = step_leb128( &instr, 0 );
3494 off = step_leb128( &instr, 0 );
3495 if (reg < 0 || reg >= N_CFI_REGS)
3496 return 0; /* fail */
3497 ctxs->reg[reg].tag = RR_CFAOff;
3498 ctxs->reg[reg].arg = (-off) * ctx->data_a_f;
3499 if (di->ddump_frames)
3500 VG_(printf)(" rci:DW_CFA_GNU_negative_offset_extended\n");
3501 break;
3503 case DW_CFA_restore_extended:
3504 reg = step_leb128( &instr, 0 );
3505 if (reg < 0 || reg >= N_CFI_REGS)
3506 return 0; /* fail */
3507 if (restore_ctx == NULL)
3508 return 0; /* fail */
3509 ctxs->reg[reg] = restore_ctx->state[restore_ctx->state_sp].reg[reg];
3510 if (di->ddump_frames)
3511 VG_(printf)(" rci:DW_CFA_restore_extended\n");
3512 break;
3514 case DW_CFA_val_offset:
3515 reg = step_leb128( &instr, 0 );
3516 off = step_leb128( &instr, 0 );
3517 if (reg < 0 || reg >= N_CFI_REGS)
3518 return 0; /* fail */
3519 ctxs->reg[reg].tag = RR_CFAValOff;
3520 ctxs->reg[reg].arg = off * ctx->data_a_f;
3521 if (di->ddump_frames)
3522 VG_(printf)(" rci:DW_CFA_val_offset\n");
3523 break;
3525 case DW_CFA_val_offset_sf:
3526 reg = step_leb128( &instr, 0 );
3527 off = step_leb128( &instr, 1 );
3528 if (reg < 0 || reg >= N_CFI_REGS)
3529 return 0; /* fail */
3530 ctxs->reg[reg].tag = RR_CFAValOff;
3531 ctxs->reg[reg].arg = off * ctx->data_a_f;
3532 if (di->ddump_frames)
3533 VG_(printf)(" rci:DW_CFA_val_offset_sf\n");
3534 break;
3536 case DW_CFA_def_cfa_register:
3537 reg = step_leb128( &instr, 0);
3538 if (reg < 0 || reg >= N_CFI_REGS)
3539 return 0; /* fail */
3540 ctxs->cfa_is_regoff = True;
3541 ctxs->cfa_expr_ix = 0;
3542 ctxs->cfa_reg = reg;
3543 /* ->cfa_off unchanged */
3544 if (di->ddump_frames)
3545 VG_(printf)(" DW_CFA_def_cfa_register: r%d\n", (Int)reg );
3546 break;
3548 case DW_CFA_def_cfa_offset:
3549 off = step_leb128( &instr, 0);
3550 ctxs->cfa_is_regoff = True;
3551 ctxs->cfa_expr_ix = 0;
3552 /* ->reg is unchanged */
3553 ctxs->cfa_off = off;
3554 if (di->ddump_frames)
3555 VG_(printf)(" DW_CFA_def_cfa_offset: %d\n", (Int)off);
3556 break;
3558 case DW_CFA_def_cfa_offset_sf:
3559 off = step_leb128( &instr, 1);
3560 ctxs->cfa_is_regoff = True;
3561 ctxs->cfa_expr_ix = 0;
3562 /* ->reg is unchanged */
3563 ctxs->cfa_off = off * ctx->data_a_f;
3564 if (di->ddump_frames)
3565 VG_(printf)(" DW_CFA_def_cfa_offset_sf: %d\n", ctxs->cfa_off);
3566 break;
3568 case DW_CFA_undefined:
3569 reg = step_leb128( &instr, 0);
3570 if (reg < 0 || reg >= N_CFI_REGS)
3571 return 0; /* fail */
3572 ctxs->reg[reg].tag = RR_Undef;
3573 ctxs->reg[reg].arg = 0;
3574 if (di->ddump_frames)
3575 VG_(printf)(" rci:DW_CFA_undefined\n");
3576 break;
3578 case DW_CFA_same_value:
3579 reg = step_leb128( &instr, 0);
3580 if (reg < 0 || reg >= N_CFI_REGS)
3581 return 0; /* fail */
3582 ctxs->reg[reg].tag = RR_Same;
3583 ctxs->reg[reg].arg = 0;
3584 if (di->ddump_frames)
3585 VG_(printf)(" rci:DW_CFA_same_value\n");
3586 break;
3588 case DW_CFA_GNU_args_size:
3589 /* No idea what is supposed to happen. gdb-6.3 simply
3590 ignores these. */
3591 /*off = */ (void)step_leb128( &instr, 0 );
3592 if (di->ddump_frames)
3593 VG_(printf)(" rci:DW_CFA_GNU_args_size (ignored)\n");
3594 break;
3596 case DW_CFA_expression: {
3597 /* Identical to DW_CFA_val_expression except that the value
3598 computed is an address and so needs one final
3599 dereference. */
3600 DiCursor expr;
3601 reg = step_leb128( &instr, 0 );
3602 len = step_leb128( &instr, 0 );
3603 expr = instr;
3604 instr = ML_(cur_plus)(instr, len);
3605 if (reg < 0 || reg >= N_CFI_REGS)
3606 return 0; /* fail */
3607 if (di->ddump_frames)
3608 VG_(printf)(" DW_CFA_expression: r%d (",
3609 (Int)reg);
3610 /* Convert the expression into a dag rooted at ctx->exprs index j,
3611 or fail. */
3612 j = dwarfexpr_to_dag ( ctx, expr, len, True/*push CFA at start*/,
3613 di->ddump_frames);
3614 if (di->ddump_frames)
3615 VG_(printf)(")\n");
3616 vg_assert(j >= -1);
3617 if (j >= 0) {
3618 vg_assert(ctx->exprs);
3619 vg_assert( j < VG_(sizeXA)(ctx->exprs) );
3621 if (j == -1)
3622 return 0; /* fail */
3623 /* Add an extra dereference */
3624 j = ML_(CfiExpr_Deref)( ctx->exprs, j );
3625 ctxs->reg[reg].tag = RR_ValExpr;
3626 ctxs->reg[reg].arg = j;
3627 break;
3630 case DW_CFA_val_expression: {
3631 DiCursor expr;
3632 reg = step_leb128( &instr, 0 );
3633 len = step_leb128( &instr, 0 );
3634 expr = instr;
3635 instr = ML_(cur_plus)(instr, len);
3636 if (reg < 0 || reg >= N_CFI_REGS)
3637 return 0; /* fail */
3638 if (di->ddump_frames)
3639 VG_(printf)(" DW_CFA_val_expression: r%d (",
3640 (Int)reg);
3641 /* Convert the expression into a dag rooted at ctx->exprs index j,
3642 or fail. */
3643 j = dwarfexpr_to_dag ( ctx, expr, len, True/*push CFA at start*/,
3644 di->ddump_frames);
3645 if (di->ddump_frames)
3646 VG_(printf)(")\n");
3647 vg_assert(j >= -1);
3648 if (j >= 0) {
3649 vg_assert(ctx->exprs);
3650 vg_assert( j < VG_(sizeXA)(ctx->exprs) );
3652 if (j == -1)
3653 return 0; /* fail */
3654 ctxs->reg[reg].tag = RR_ValExpr;
3655 ctxs->reg[reg].arg = j;
3656 break;
3659 case DW_CFA_def_cfa_expression: {
3660 DiCursor expr;
3661 len = step_leb128( &instr, 0 );
3662 expr = instr;
3663 instr = ML_(cur_plus)(instr, len);
3664 if (di->ddump_frames)
3665 VG_(printf)(" DW_CFA_def_cfa_expression (");
3666 /* Convert the expression into a dag rooted at ctx->exprs index j,
3667 or fail. */
3668 j = dwarfexpr_to_dag ( ctx, expr, len, False/*!push CFA at start*/,
3669 di->ddump_frames);
3670 if (di->ddump_frames)
3671 VG_(printf)(")\n");
3672 ctxs->cfa_is_regoff = False;
3673 ctxs->cfa_reg = 0;
3674 ctxs->cfa_off = 0;
3675 ctxs->cfa_expr_ix = j;
3676 break;
3679 case DW_CFA_GNU_window_save:
3680 /* Ignored. This appears to be sparc-specific; quite why it
3681 turns up in SuSE-supplied x86 .so's beats me. */
3682 if (di->ddump_frames)
3683 VG_(printf)(" DW_CFA_GNU_window_save\n");
3684 break;
3686 case DW_CFA_remember_state:
3687 if (di->ddump_frames)
3688 VG_(printf)(" DW_CFA_remember_state\n");
3689 /* we just checked this at entry, so: */
3690 vg_assert(ctx->state_sp >= 0 && ctx->state_sp < N_RR_STACK);
3691 ctx->state_sp++;
3692 if (ctx->state_sp == N_RR_STACK) {
3693 /* stack overflow. We're hosed. */
3694 VG_(message)(Vg_DebugMsg, "DWARF2 CFI reader: N_RR_STACK is "
3695 "too low; increase and recompile.");
3696 return 0; /* indicate failure */
3697 } else {
3698 VG_(memcpy)(/*dst*/&ctx->state[ctx->state_sp],
3699 /*src*/&ctx->state[ctx->state_sp - 1],
3700 sizeof(ctx->state[ctx->state_sp]) );
3702 break;
3704 case DW_CFA_restore_state:
3705 if (di->ddump_frames)
3706 VG_(printf)(" DW_CFA_restore_state\n");
3707 /* we just checked this at entry, so: */
3708 vg_assert(ctx->state_sp >= 0 && ctx->state_sp < N_RR_STACK);
3709 if (ctx->state_sp == 0) {
3710 /* stack undefflow. Give up. */
3711 return 0; /* indicate failure */
3712 } else {
3713 /* simply fall back to previous entry */
3714 ctx->state_sp--;
3716 break;
3718 case DW_CFA_ORCL_arg_loc:
3719 if (di->ddump_frames)
3720 VG_(printf)(" DW_CFA_ORCL_arg_loc\n");
3721 break;
3723 default:
3724 VG_(message)(Vg_DebugMsg, "DWARF2 CFI reader: unhandled CFI "
3725 "instruction 0:%d\n", (Int)lo6);
3726 if (di->ddump_frames)
3727 VG_(printf)(" rci:run_CF_instruction:default\n");
3728 return 0; /* failure */
3729 /*NOTREACHED*/
3732 return ML_(cur_minus)(instr, instrIN);
3736 /* Show a CFI instruction, and also return its length. Show it as
3737 close as possible (preferably identical) to how GNU binutils
3738 readelf --debug-dump=frames would. */
3740 static Int show_CF_instruction ( DiCursor instrIN,
3741 const AddressDecodingInfo* adi,
3742 Int code_a_f, Int data_a_f )
3744 Int off, coff, reg, reg2, len;
3745 UInt delta;
3746 Addr loc;
3747 DiCursor instr = instrIN;
3748 UChar instr_0 = ML_(cur_step_UChar)(&instr);
3749 UChar hi2 = (instr_0 >> 6) & 3;
3750 UChar lo6 = instr_0 & 0x3F;
3752 if (0) {
3753 DiCursor tmpi = instrIN;
3754 UInt i_0 = ML_(cur_step_UChar)(&tmpi);
3755 UInt i_1 = ML_(cur_step_UChar)(&tmpi);
3756 UInt i_2 = ML_(cur_step_UChar)(&tmpi);
3757 UInt i_3 = ML_(cur_step_UChar)(&tmpi);
3758 UInt i_4 = ML_(cur_step_UChar)(&tmpi);
3759 UInt i_5 = ML_(cur_step_UChar)(&tmpi);
3760 UInt i_6 = ML_(cur_step_UChar)(&tmpi);
3761 UInt i_7 = ML_(cur_step_UChar)(&tmpi);
3762 VG_(printf)("raw:%x/%x:%x:%x:%x:%x:%x:%x:%x:%x\n",
3763 hi2, lo6, i_0, i_1, i_2, i_3, i_4, i_5, i_6, i_7);
3766 if (hi2 == DW_CFA_advance_loc) {
3767 VG_(printf)(" sci:DW_CFA_advance_loc(%d)\n", (Int)lo6);
3768 return ML_(cur_minus)(instr, instrIN);
3771 if (hi2 == DW_CFA_offset) {
3772 off = step_leb128( &instr, 0 );
3773 coff = off * data_a_f;
3774 VG_(printf)(" DW_CFA_offset: r%d at cfa%s%d\n",
3775 (Int)lo6, coff < 0 ? "" : "+", (Int)coff );
3776 return ML_(cur_minus)(instr, instrIN);
3779 if (hi2 == DW_CFA_restore) {
3780 VG_(printf)(" sci:DW_CFA_restore(r%d)\n", (Int)lo6);
3781 return ML_(cur_minus)(instr, instrIN);
3784 vg_assert(hi2 == DW_CFA_use_secondary);
3786 switch (lo6) {
3788 case DW_CFA_nop:
3789 VG_(printf)(" DW_CFA_nop\n");
3790 break;
3792 case DW_CFA_set_loc:
3793 /* WAS: loc = read_Addr(&instr[i]); i+= sizeof(Addr);
3794 (now known to be incorrect -- the address is encoded) */
3795 loc = step_encoded_Addr(adi, &instr);
3796 VG_(printf)(" sci:DW_CFA_set_loc(%#lx)\n", loc);
3797 break;
3799 case DW_CFA_advance_loc1:
3800 delta = (UInt)ML_(cur_step_UChar)(&instr);
3801 VG_(printf)(" sci:DW_CFA_advance_loc1(%u)\n", delta);
3802 break;
3804 case DW_CFA_advance_loc2:
3805 delta = (UInt)ML_(cur_step_UShort)(&instr);
3806 VG_(printf)(" sci:DW_CFA_advance_loc2(%u)\n", delta);
3807 break;
3809 case DW_CFA_advance_loc4:
3810 delta = (UInt)ML_(cur_step_UInt)(&instr);
3811 VG_(printf)(" DW_CFA_advance_loc4(%u)\n", delta);
3812 break;
3814 case DW_CFA_def_cfa:
3815 reg = step_leb128( &instr, 0 );
3816 off = step_leb128( &instr, 0 );
3817 VG_(printf)(" DW_CFA_def_cfa: r%d ofs %d\n", reg, off);
3818 break;
3820 case DW_CFA_def_cfa_sf:
3821 reg = step_leb128( &instr, 0 );
3822 off = step_leb128( &instr, 1 );
3823 VG_(printf)(" DW_CFA_def_cfa_sf: r%d ofs %d\n",
3824 reg, off * data_a_f);
3825 break;
3827 case DW_CFA_register:
3828 reg = step_leb128( &instr, 0);
3829 reg2 = step_leb128( &instr, 0);
3830 VG_(printf)(" sci:DW_CFA_register(r%d, r%d)\n", reg, reg2);
3831 break;
3833 case DW_CFA_def_cfa_register:
3834 reg = step_leb128( &instr, 0);
3835 VG_(printf)(" sci:DW_CFA_def_cfa_register(r%d)\n", reg);
3836 break;
3838 case DW_CFA_def_cfa_offset:
3839 off = step_leb128( &instr, 0);
3840 VG_(printf)(" sci:DW_CFA_def_cfa_offset(%d)\n", off);
3841 break;
3843 case DW_CFA_def_cfa_offset_sf:
3844 off = step_leb128( &instr, 1);
3845 VG_(printf)(" sci:DW_CFA_def_cfa_offset_sf(%d)\n", off);
3846 break;
3848 case DW_CFA_restore_extended:
3849 reg = step_leb128( &instr, 0);
3850 VG_(printf)(" sci:DW_CFA_restore_extended(r%d)\n", reg);
3851 break;
3853 case DW_CFA_undefined:
3854 reg = step_leb128( &instr, 0);
3855 VG_(printf)(" sci:DW_CFA_undefined(r%d)\n", reg);
3856 break;
3858 case DW_CFA_same_value:
3859 reg = step_leb128( &instr, 0);
3860 VG_(printf)(" sci:DW_CFA_same_value(r%d)\n", reg);
3861 break;
3863 case DW_CFA_remember_state:
3864 VG_(printf)(" sci:DW_CFA_remember_state\n");
3865 break;
3867 case DW_CFA_restore_state:
3868 VG_(printf)(" sci:DW_CFA_restore_state\n");
3869 break;
3871 case DW_CFA_GNU_args_size:
3872 off = step_leb128( &instr, 0 );
3873 VG_(printf)(" sci:DW_CFA_GNU_args_size(%d)\n", off );
3874 break;
3876 case DW_CFA_def_cfa_expression:
3877 len = step_leb128( &instr, 0 );
3878 instr = ML_(cur_plus)(instr, len);
3879 VG_(printf)(" sci:DW_CFA_def_cfa_expression(length %d)\n", len);
3880 break;
3882 case DW_CFA_expression:
3883 reg = step_leb128( &instr, 0 );
3884 len = step_leb128( &instr, 0 );
3885 instr = ML_(cur_plus)(instr, len);
3886 VG_(printf)(" sci:DW_CFA_expression(r%d, length %d)\n", reg, len);
3887 break;
3889 case DW_CFA_val_expression:
3890 reg = step_leb128( &instr, 0 );
3891 len = step_leb128( &instr, 0 );
3892 instr = ML_(cur_plus)(instr, len);
3893 VG_(printf)(" sci:DW_CFA_val_expression(r%d, length %d)\n", reg, len);
3894 break;
3896 case DW_CFA_offset_extended:
3897 reg = step_leb128( &instr, 0 );
3898 off = step_leb128( &instr, 0 );
3899 VG_(printf)(" sci:DW_CFA_offset_extended(r%d, "
3900 "off %d x data_af)\n", reg, off);
3901 break;
3903 case DW_CFA_offset_extended_sf:
3904 reg = step_leb128( &instr, 0 );
3905 off = step_leb128( &instr, 1 );
3906 coff = (Int)(off * data_a_f);
3907 VG_(printf)(" DW_CFA_offset_extended_sf: r%d at cfa%s%d\n",
3908 reg, coff < 0 ? "" : "+", coff);
3909 break;
3911 case DW_CFA_GNU_negative_offset_extended:
3912 reg = step_leb128( &instr, 0 );
3913 off = step_leb128( &instr, 0 );
3914 VG_(printf)(" sci:DW_CFA_GNU_negative_offset_extended"
3915 "(r%d, off %d x data_af)\n", reg, -off);
3916 break;
3918 case DW_CFA_val_offset:
3919 reg = step_leb128( &instr, 0 );
3920 off = step_leb128( &instr, 0 );
3921 VG_(printf)(" sci:DW_CFA_val_offset(r%d, off %d x data_af)\n",
3922 reg, off);
3923 break;
3925 case DW_CFA_val_offset_sf:
3926 reg = step_leb128( &instr, 0 );
3927 off = step_leb128( &instr, 1 );
3928 VG_(printf)(" sci:DW_CFA_val_offset_sf(r%d, off %d x data_af)\n",
3929 reg, off);
3930 break;
3932 case DW_CFA_GNU_window_save:
3933 VG_(printf)(" sci:DW_CFA_GNU_window_save\n");
3934 break;
3936 case DW_CFA_ORCL_arg_loc:
3937 reg = step_leb128( &instr, 0 );
3938 len = step_leb128( &instr, 0 );
3939 VG_(printf)(" sci:DW_CFA_ORCL_arg_loc(%d, length %d)\n", reg, len);
3940 break;
3942 default:
3943 VG_(printf)(" sci:0:%d\n", (Int)lo6);
3944 break;
3947 return ML_(cur_minus)(instr, instrIN);
3951 /* Show the instructions in instrs[0 .. ilen-1]. */
3952 static void show_CF_instructions ( DiCursor instrs, Int ilen,
3953 const AddressDecodingInfo* adi,
3954 Int code_a_f, Int data_a_f )
3956 Int i = 0;
3957 while (True) {
3958 if (i >= ilen) break;
3959 i += show_CF_instruction( ML_(cur_plus)(instrs, i),
3960 adi, code_a_f, data_a_f );
3965 /* Run the CF instructions in instrs[0 .. ilen-1], until the end is
3966 reached, or until there is a failure. Return True iff success.
3968 static
3969 Bool run_CF_instructions ( DebugInfo* di,
3970 Bool record,
3971 UnwindContext* ctx, DiCursor instrs, Int ilen,
3972 UWord fde_arange,
3973 const UnwindContext* restore_ctx,
3974 const AddressDecodingInfo* adi )
3976 Addr base;
3977 UInt len;
3978 DiCfSI_m cfsi_m;
3979 Bool summ_ok;
3980 Int j, i = 0;
3981 Addr loc_prev;
3982 if (0) ppUnwindContext(ctx);
3983 if (0) ppUnwindContext_summary(ctx);
3984 while (True) {
3985 loc_prev = ctx->loc;
3986 if (i >= ilen) break;
3987 if (0) (void)show_CF_instruction( ML_(cur_plus)(instrs,i), adi,
3988 ctx->code_a_f, ctx->data_a_f );
3989 j = run_CF_instruction( ctx, ML_(cur_plus)(instrs,i),
3990 restore_ctx, adi, di );
3991 if (j == 0)
3992 return False; /* execution failed */
3993 i += j;
3994 if (0) ppUnwindContext(ctx);
3995 if (record && loc_prev != ctx->loc) {
3996 summ_ok = summarise_context ( &base, &len, &cfsi_m,
3997 loc_prev, ctx, di );
3998 if (summ_ok) {
3999 ML_(addDiCfSI)(di, base, len, &cfsi_m);
4000 if (di->trace_cfi)
4001 ML_(ppDiCfSI)(di->cfsi_exprs, base, len, &cfsi_m);
4005 if (ctx->loc < fde_arange) {
4006 loc_prev = ctx->loc;
4007 ctx->loc = fde_arange;
4008 if (record) {
4009 summ_ok = summarise_context ( &base, &len, &cfsi_m,
4010 loc_prev, ctx, di );
4011 if (summ_ok) {
4012 ML_(addDiCfSI)(di, base, len, &cfsi_m);
4013 if (di->trace_cfi)
4014 ML_(ppDiCfSI)(di->cfsi_exprs, base, len, &cfsi_m);
4018 return True;
4022 /* ------------ Main entry point for CFI reading ------------ */
4024 typedef
4025 struct {
4026 /* This gives the CIE an identity to which FDEs will refer. */
4027 ULong offset;
4028 /* Code, data factors. */
4029 Int code_a_f;
4030 Int data_a_f;
4031 /* Return-address pseudo-register. */
4032 Int ra_reg;
4033 UChar address_encoding;
4034 /* Where are the instrs? */
4035 DiCursor instrs;
4036 Int ilen;
4037 /* God knows .. don't ask */
4038 Bool saw_z_augmentation;
4040 CIE;
4042 static void init_CIE ( CIE* cie )
4044 cie->offset = 0;
4045 cie->code_a_f = 0;
4046 cie->data_a_f = 0;
4047 cie->ra_reg = 0;
4048 cie->address_encoding = 0;
4049 cie->instrs = DiCursor_INVALID;
4050 cie->ilen = 0;
4051 cie->saw_z_augmentation = False;
4054 static CIE *the_CIEs = NULL;
4055 static SizeT N_CIEs = 0;
4057 /* Read, summarise and store CFA unwind info from .eh_frame and
4058 .debug_frame sections. is_ehframe tells us which kind we are
4059 dealing with -- they are slightly different. */
4060 void ML_(read_callframe_info_dwarf3)
4061 ( /*OUT*/struct _DebugInfo* di,
4062 DiSlice escn_frame, Addr frame_avma, Bool is_ehframe )
4064 const HChar* how = NULL;
4065 Int n_CIEs = 0;
4066 DiCursor frame_image = ML_(cur_from_sli)(escn_frame); /* fixed */
4067 DiOffT frame_size = escn_frame.szB;
4068 DiCursor data = frame_image;
4069 UWord cfsi_used_orig;
4071 /* If we're dealing with a .debug_frame, assume zero frame_avma. */
4072 if (!is_ehframe)
4073 vg_assert(frame_avma == 0);
4075 # if defined(VGP_ppc32_linux) || defined(VGP_ppc64be_linux) \
4076 || defined(VGP_ppc64le_linux)
4077 /* These targets don't use CFI-based stack unwinding. */
4078 return;
4079 # endif
4081 /* If we read more than one .debug_frame or .eh_frame for this
4082 DebugInfo*, the second and subsequent reads should only add FDEs
4083 for address ranges not already covered by the FDEs already
4084 present. To be able to quickly check which address ranges are
4085 already present, any existing records (DiCFSIs) must be sorted,
4086 so we can binary-search them in the code below. We also record
4087 di->cfsi_used so that we know where the boundary is between
4088 existing and new records. */
4089 if (di->cfsi_used > 0) {
4090 ML_(canonicaliseCFI) ( di );
4092 cfsi_used_orig = di->cfsi_used;
4094 if (di->trace_cfi) {
4095 VG_(printf)("\n-----------------------------------------------\n");
4096 VG_(printf)("CFI info: szB %llu, _avma %#lx\n",
4097 escn_frame.szB, frame_avma );
4098 VG_(printf)("CFI info: name %s\n", di->fsm.filename );
4101 /* Loop over CIEs/FDEs */
4103 /* Conceptually, the frame info is a sequence of FDEs, one for each
4104 function. Inside an FDE is a miniature program for a special
4105 state machine, which, when run, produces the stack-unwinding
4106 info for that function.
4108 Because the FDEs typically have much in common, and because the
4109 DWARF designers appear to have been fanatical about space
4110 saving, the common parts are factored out into so-called CIEs.
4111 That means that what we traverse is a sequence of structs, each
4112 of which is either a FDE (usually) or a CIE (occasionally).
4113 Each FDE has a field indicating which CIE is the one pertaining
4114 to it.
4116 The following loop traverses the sequence. FDEs are dealt with
4117 immediately; once we harvest the useful info in an FDE, it is
4118 then forgotten about. By contrast, CIEs are validated and
4119 dumped into an array, because later FDEs may refer to any
4120 previously-seen CIE.
4122 while (True) {
4123 DiCursor ciefde_start;
4124 ULong ciefde_len;
4125 ULong cie_pointer;
4126 Bool dw64;
4128 /* Are we done? */
4129 if (ML_(cur_cmpEQ)(data, ML_(cur_plus)(frame_image, frame_size)))
4130 return;
4132 /* Overshot the end? Means something is wrong */
4133 if (ML_(cur_cmpGT)(data, ML_(cur_plus)(frame_image, frame_size))) {
4134 how = "overran the end of .eh_frame";
4135 goto bad;
4138 /* Ok, we must be looking at the start of a new CIE or FDE.
4139 Figure out which it is. */
4141 ciefde_start = data;
4142 if (di->trace_cfi)
4143 VG_(printf)("\ncie/fde.start = (frame_image + 0x%llx)\n",
4144 (ULong)ML_(cur_minus)(ciefde_start, frame_image));
4146 ciefde_len = (ULong)ML_(cur_step_UInt)(&data);
4147 if (di->trace_cfi)
4148 VG_(printf)("cie/fde.length = %llu\n", ciefde_len);
4150 /* Apparently, if the .length field is zero, we are at the end
4151 of the sequence. This is stated in the Generic Elf
4152 Specification (see comments far above here) and is one of the
4153 places where .eh_frame and .debug_frame data differ. */
4154 if (ciefde_len == 0) {
4155 if (di->ddump_frames)
4156 VG_(printf)("%08llx ZERO terminator\n\n",
4157 (ULong)ML_(cur_minus)(ciefde_start, frame_image));
4158 return;
4161 /* If the .length field is 0xFFFFFFFF then we're dealing with
4162 64-bit DWARF, and the real length is stored as a 64-bit
4163 number immediately following it. */
4164 dw64 = False;
4165 if (ciefde_len == 0xFFFFFFFFUL) {
4166 dw64 = True;
4167 ciefde_len = ML_(cur_step_ULong)(&data);
4170 /* Now get the CIE ID, whose size depends on the DWARF 32 vs
4171 64-ness. */
4172 if (dw64) {
4173 /* see XXX below */
4174 cie_pointer = ML_(cur_step_ULong)(&data);
4175 } else {
4176 /* see XXX below */
4177 cie_pointer = (ULong)ML_(cur_step_UInt)(&data);
4180 if (di->trace_cfi)
4181 VG_(printf)("cie.pointer = %llu\n", cie_pointer);
4183 /* If cie_pointer is zero for .eh_frame or all ones for .debug_frame,
4184 we've got a CIE; else it's an FDE. */
4185 if (cie_pointer == (is_ehframe ? 0ULL
4186 : dw64 ? 0xFFFFFFFFFFFFFFFFULL : 0xFFFFFFFFULL)) {
4188 Int this_CIE;
4189 UChar cie_version;
4190 DiCursor cie_augmentation;
4192 /* --------- CIE --------- */
4193 if (di->trace_cfi)
4194 VG_(printf)("------ new CIE #%d ------\n", n_CIEs);
4196 /* Allocate a new CIE record. */
4197 vg_assert(n_CIEs >= 0);
4198 if (n_CIEs == N_CIEs) {
4199 N_CIEs += 1000;
4200 the_CIEs = ML_(dinfo_realloc)("di.rcid3.2", the_CIEs,
4201 N_CIEs * sizeof the_CIEs[0]);
4204 this_CIE = n_CIEs;
4205 n_CIEs++;
4206 init_CIE( &the_CIEs[this_CIE] );
4208 /* Record its offset. This is how we will find it again
4209 later when looking at an FDE. */
4210 the_CIEs[this_CIE].offset
4211 = (ULong)ML_(cur_minus)(ciefde_start, frame_image);
4213 if (di->ddump_frames)
4214 VG_(printf)("%08lx %08lx %08lx CIE\n",
4215 (Addr)ML_(cur_minus)(ciefde_start, frame_image),
4216 (Addr)ciefde_len,
4217 (Addr)(UWord)cie_pointer );
4219 cie_version = ML_(cur_step_UChar)(&data);
4220 if (di->trace_cfi)
4221 VG_(printf)("cie.version = %d\n", (Int)cie_version);
4222 if (di->ddump_frames)
4223 VG_(printf)(" Version: %d\n", (Int)cie_version);
4224 if (cie_version != 1 && cie_version != 3 && cie_version != 4) {
4225 how = "unexpected CIE version (not 1 nor 3 nor 4)";
4226 goto bad;
4229 cie_augmentation = data;
4230 data = ML_(cur_plus)(data, 1 + ML_(cur_strlen)(cie_augmentation));
4232 if (di->trace_cfi || di->ddump_frames) {
4233 HChar* str = ML_(cur_read_strdup)(cie_augmentation, "di.rcid3.1");
4234 if (di->trace_cfi)
4235 VG_(printf)("cie.augment = \"%s\"\n", str);
4236 if (di->ddump_frames)
4237 VG_(printf)(" Augmentation: \"%s\"\n", str);
4238 ML_(dinfo_free)(str);
4241 if (ML_(cur_read_UChar)(cie_augmentation) == 'e'
4242 && ML_(cur_read_UChar)
4243 (ML_(cur_plus)(cie_augmentation, 1)) == 'h') {
4244 data = ML_(cur_plus)(data, sizeof(Addr));
4245 cie_augmentation = ML_(cur_plus)(cie_augmentation, 2);
4248 if (cie_version >= 4) {
4249 if (ML_(cur_step_UChar)(&data) != sizeof(Addr)) {
4250 how = "unexpected address size";
4251 goto bad;
4253 if (ML_(cur_step_UChar)(&data) != 0) {
4254 how = "unexpected non-zero segment size";
4255 goto bad;
4259 the_CIEs[this_CIE].code_a_f = step_leb128( &data, 0);
4260 if (di->trace_cfi)
4261 VG_(printf)("cie.code_af = %d\n",
4262 the_CIEs[this_CIE].code_a_f);
4263 if (di->ddump_frames)
4264 VG_(printf)(" Code alignment factor: %d\n",
4265 (Int)the_CIEs[this_CIE].code_a_f);
4267 the_CIEs[this_CIE].data_a_f = step_leb128( &data, 1);
4268 if (di->trace_cfi)
4269 VG_(printf)("cie.data_af = %d\n",
4270 the_CIEs[this_CIE].data_a_f);
4271 if (di->ddump_frames)
4272 VG_(printf)(" Data alignment factor: %d\n",
4273 (Int)the_CIEs[this_CIE].data_a_f);
4275 if (cie_version == 1) {
4276 the_CIEs[this_CIE].ra_reg = (Int)ML_(cur_step_UChar)(&data);
4277 } else {
4278 the_CIEs[this_CIE].ra_reg = step_leb128( &data, 0);
4280 if (di->trace_cfi)
4281 VG_(printf)("cie.ra_reg = %d\n",
4282 the_CIEs[this_CIE].ra_reg);
4283 if (di->ddump_frames)
4284 VG_(printf)(" Return address column: %d\n",
4285 (Int)the_CIEs[this_CIE].ra_reg);
4287 if (the_CIEs[this_CIE].ra_reg < 0
4288 || the_CIEs[this_CIE].ra_reg >= N_CFI_REGS) {
4289 how = "cie.ra_reg has implausible value";
4290 goto bad;
4293 the_CIEs[this_CIE].saw_z_augmentation
4294 = ML_(cur_read_UChar)(cie_augmentation) == 'z';
4295 if (the_CIEs[this_CIE].saw_z_augmentation) {
4296 UInt length = step_leb128( &data, 0);
4297 the_CIEs[this_CIE].instrs = ML_(cur_plus)(data, length);
4298 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1);
4299 if (di->ddump_frames) {
4300 UInt i;
4301 VG_(printf)(" Augmentation data: ");
4302 for (i = 0; i < length; i++)
4303 VG_(printf)(" %02x", (UInt)ML_(cur_read_UChar)
4304 (ML_(cur_plus)(data, i)));
4305 VG_(printf)("\n");
4307 } else {
4308 the_CIEs[this_CIE].instrs = DiCursor_INVALID;
4311 the_CIEs[this_CIE].address_encoding = default_Addr_encoding();
4313 while (ML_(cur_read_UChar)(cie_augmentation)) {
4314 switch (ML_(cur_read_UChar)(cie_augmentation)) {
4315 case 'L':
4316 data = ML_(cur_plus)(data, 1);
4317 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1);
4318 break;
4319 case 'R':
4320 the_CIEs[this_CIE].address_encoding
4321 = ML_(cur_step_UChar)(&data);
4322 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1);
4323 break;
4324 case 'P':
4325 data = ML_(cur_plus)(data, size_of_encoded_Addr(
4326 ML_(cur_read_UChar)(data) ));
4327 data = ML_(cur_plus)(data, 1);
4328 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1);
4329 break;
4330 case 'S':
4331 cie_augmentation = ML_(cur_plus)(cie_augmentation, 1);
4332 break;
4333 default:
4334 if (!ML_(cur_is_valid)(the_CIEs[this_CIE].instrs)) {
4335 how = "unhandled cie.augmentation";
4336 goto bad;
4338 data = the_CIEs[this_CIE].instrs;
4339 goto done_augmentation;
4343 done_augmentation:
4345 if (di->trace_cfi)
4346 VG_(printf)("cie.encoding = 0x%x\n",
4347 the_CIEs[this_CIE].address_encoding);
4349 the_CIEs[this_CIE].instrs = data;
4350 the_CIEs[this_CIE].ilen = ML_(cur_minus)(ciefde_start, data)
4351 + (Long)ciefde_len + (Long)sizeof(UInt);
4352 if (di->trace_cfi) {
4353 //VG_(printf)("cie.instrs = %p\n", the_CIEs[this_CIE].instrs);
4354 VG_(printf)("cie.ilen = %d\n", the_CIEs[this_CIE].ilen);
4357 if (the_CIEs[this_CIE].ilen < 0
4358 || the_CIEs[this_CIE].ilen > frame_size) {
4359 how = "implausible # cie initial insns";
4360 goto bad;
4363 data = ML_(cur_plus)(data, the_CIEs[this_CIE].ilen);
4365 /* Show the CIE's instructions (the preamble for each FDE
4366 that uses this CIE). */
4367 if (di->ddump_frames)
4368 VG_(printf)("\n");
4370 if (di->trace_cfi || di->ddump_frames) {
4371 AddressDecodingInfo adi;
4372 adi.encoding = the_CIEs[this_CIE].address_encoding;
4373 adi.ehframe_image = frame_image;
4374 adi.ehframe_avma = frame_avma;
4375 adi.text_bias = di->text_debug_bias;
4376 adi.got_avma = di->got_avma;
4377 show_CF_instructions( the_CIEs[this_CIE].instrs,
4378 the_CIEs[this_CIE].ilen, &adi,
4379 the_CIEs[this_CIE].code_a_f,
4380 the_CIEs[this_CIE].data_a_f );
4383 if (di->ddump_frames)
4384 VG_(printf)("\n");
4386 } else {
4388 AddressDecodingInfo adi;
4389 UnwindContext ctx, restore_ctx;
4390 Int cie;
4391 ULong look_for;
4392 Bool ok;
4393 Addr fde_initloc;
4394 UWord fde_arange;
4395 DiCursor fde_instrs;
4396 Int fde_ilen;
4398 /* --------- FDE --------- */
4400 /* Find the relevant CIE. The CIE we want is located
4401 cie_pointer bytes back from here. */
4403 /* re sizeof(UInt) / sizeof(ULong), matches XXX above. */
4404 if (is_ehframe)
4405 look_for = ML_(cur_minus)(data, frame_image)
4406 - (dw64 ? sizeof(ULong) : sizeof(UInt))
4407 - cie_pointer;
4408 else
4409 look_for = cie_pointer;
4411 for (cie = 0; cie < n_CIEs; cie++) {
4412 if (0) VG_(printf)("look for %llu %llu\n",
4413 look_for, the_CIEs[cie].offset );
4414 if (the_CIEs[cie].offset == look_for)
4415 break;
4417 vg_assert(cie >= 0 && cie <= n_CIEs);
4418 if (cie == n_CIEs) {
4419 how = "FDE refers to not-findable CIE";
4420 goto bad;
4423 adi.encoding = the_CIEs[cie].address_encoding;
4424 adi.ehframe_image = frame_image;
4425 adi.ehframe_avma = frame_avma;
4426 adi.text_bias = di->text_debug_bias;
4427 adi.got_avma = di->got_avma;
4428 fde_initloc = step_encoded_Addr(&adi, &data);
4429 if (di->trace_cfi)
4430 VG_(printf)("fde.initloc = %#lx\n", fde_initloc);
4432 adi.encoding = the_CIEs[cie].address_encoding & 0xf;
4433 adi.ehframe_image = frame_image;
4434 adi.ehframe_avma = frame_avma;
4435 adi.text_bias = di->text_debug_bias;
4436 adi.got_avma = di->got_avma;
4438 /* WAS (incorrectly):
4439 fde_arange = read_encoded_Addr(&nbytes, &adi, data);
4440 data += nbytes;
4441 The following corresponds to what binutils/dwarf.c does:
4443 { UInt ptr_size = size_of_encoded_Addr( adi.encoding );
4444 switch (ptr_size) {
4445 case 8: case 4: case 2: case 1:
4446 fde_arange
4447 = (UWord)step_le_u_encoded_literal(&data, ptr_size);
4448 break;
4449 default:
4450 how = "unknown arange field encoding in FDE";
4451 goto bad;
4455 if (di->trace_cfi)
4456 VG_(printf)("fde.arangec = %#lx\n", fde_arange);
4458 if (di->ddump_frames)
4459 VG_(printf)("%08lx %08lx %08lx FDE cie=%08lx pc=%08lx..%08lx\n",
4460 (Addr)ML_(cur_minus)(ciefde_start, frame_image),
4461 (Addr)ciefde_len,
4462 (Addr)(UWord)cie_pointer,
4463 (Addr)look_for,
4464 ((Addr)fde_initloc) - di->text_debug_bias,
4465 ((Addr)fde_initloc) - di->text_debug_bias + fde_arange);
4467 if (the_CIEs[cie].saw_z_augmentation) {
4468 UInt length = step_leb128( &data, 0);
4469 if (di->ddump_frames && (length > 0)) {
4470 UInt i;
4471 VG_(printf)(" Augmentation data: ");
4472 for (i = 0; i < length; i++)
4473 VG_(printf)(" %02x", (UInt)ML_(cur_read_UChar)
4474 (ML_(cur_plus)(data, i)));
4475 VG_(printf)("\n\n");
4477 data = ML_(cur_plus)(data, length);
4480 fde_instrs = data;
4481 fde_ilen = ML_(cur_minus)(ciefde_start, data)
4482 + (Long)ciefde_len + (Long)sizeof(UInt);
4483 if (di->trace_cfi) {
4484 //VG_(printf)("fde.instrs = %p\n", fde_instrs);
4485 VG_(printf)("fde.ilen = %d\n", (Int)fde_ilen);
4488 if (fde_ilen < 0 || fde_ilen > frame_size) {
4489 how = "implausible # fde insns";
4490 goto bad;
4493 data = ML_(cur_plus)(data, fde_ilen);
4495 /* If this object's DebugInfo* had some DiCFSIs from a
4496 previous .eh_frame or .debug_frame read, we must check
4497 that we're not adding a duplicate. */
4498 if (cfsi_used_orig > 0) {
4499 Addr a_mid_lo, a_mid_hi;
4500 Word mid, size,
4501 lo = 0,
4502 hi = cfsi_used_orig-1;
4503 while (True) {
4504 /* current unsearched space is from lo to hi, inclusive. */
4505 if (lo > hi) break; /* not found */
4506 mid = (lo + hi) / 2;
4507 a_mid_lo = di->cfsi_rd[mid].base;
4508 size = di->cfsi_rd[mid].len;
4509 a_mid_hi = a_mid_lo + size - 1;
4510 vg_assert(a_mid_hi >= a_mid_lo);
4511 if (fde_initloc + fde_arange <= a_mid_lo) {
4512 hi = mid-1; continue;
4514 if (fde_initloc > a_mid_hi) { lo = mid+1; continue; }
4515 break;
4518 /* The range this .debug_frame FDE covers has been already
4519 covered in .eh_frame section. Don't add it from .debug_frame
4520 section again. */
4521 if (lo <= hi)
4522 continue;
4525 adi.encoding = the_CIEs[cie].address_encoding;
4526 adi.ehframe_image = frame_image;
4527 adi.ehframe_avma = frame_avma;
4528 adi.text_bias = di->text_debug_bias;
4529 adi.got_avma = di->got_avma;
4531 if (di->trace_cfi)
4532 show_CF_instructions( fde_instrs, fde_ilen, &adi,
4533 the_CIEs[cie].code_a_f,
4534 the_CIEs[cie].data_a_f );
4536 initUnwindContext(&ctx);
4537 ctx.code_a_f = the_CIEs[cie].code_a_f;
4538 ctx.data_a_f = the_CIEs[cie].data_a_f;
4539 ctx.initloc = fde_initloc;
4540 ctx.ra_reg = the_CIEs[cie].ra_reg;
4541 ctx.exprs = VG_(newXA)( ML_(dinfo_zalloc), "di.rcid.1",
4542 ML_(dinfo_free),
4543 sizeof(CfiExpr) );
4545 /* Run the CIE's instructions. Ugly hack: if
4546 --debug-dump=frames is in effect, suppress output for
4547 these instructions since they will already have been shown
4548 at the time the CIE was first encountered. Note, not
4549 thread safe - if this reader is ever made threaded, should
4550 fix properly. */
4551 { Bool hack = di->ddump_frames;
4552 di->ddump_frames = False;
4553 initUnwindContext(&restore_ctx);
4554 ok = run_CF_instructions(
4555 di, False, &ctx, the_CIEs[cie].instrs,
4556 the_CIEs[cie].ilen, 0, NULL, &adi
4558 di->ddump_frames = hack;
4560 /* And now run the instructions for the FDE, starting from
4561 the state created by running the CIE preamble
4562 instructions. */
4563 if (ok) {
4564 restore_ctx = ctx;
4565 ok = run_CF_instructions(
4566 di, True, &ctx, fde_instrs, fde_ilen, fde_arange,
4567 &restore_ctx, &adi
4569 if (di->ddump_frames)
4570 VG_(printf)("\n");
4573 VG_(deleteXA)( ctx.exprs );
4577 return;
4579 bad:
4580 if (!VG_(clo_xml) && VG_(clo_verbosity) > 1)
4581 VG_(message)(Vg_UserMsg,
4582 "Warning: %s in DWARF2 CFI reading\n", how);
4583 return;
4586 #endif // defined(VGO_linux) || defined(VGO_darwin) || defined(VGO_solaris) || defined(VGO_freebsd)
4588 /*--------------------------------------------------------------------*/
4589 /*--- end ---*/
4590 /*--------------------------------------------------------------------*/