Remove warning caused by D demangle testcase
[valgrind.git] / VEX / priv / guest_mips_defs.h
blob27e89d11200d92b74b2414f1c30f0e056ea5ae41
2 /*---------------------------------------------------------------*/
3 /*--- begin guest_mips_defs.h ---*/
4 /*---------------------------------------------------------------*/
6 /*
7 This file is part of Valgrind, a dynamic binary instrumentation
8 framework.
10 Copyright (C) 2010-2017 RT-RK
12 This program is free software; you can redistribute it and/or
13 modify it under the terms of the GNU General Public License as
14 published by the Free Software Foundation; either version 2 of the
15 License, or (at your option) any later version.
17 This program is distributed in the hope that it will be useful, but
18 WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
20 General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with this program; if not, see <http://www.gnu.org/licenses/>.
25 The GNU General Public License is contained in the file COPYING.
28 /* Only to be used within the guest-mips directory. */
30 #ifndef __VEX_GUEST_MIPS_DEFS_H
31 #define __VEX_GUEST_MIPS_DEFS_H
33 #include "libvex_basictypes.h"
34 #include "guest_generic_bb_to_IR.h" /* DisResult */
36 /*---------------------------------------------------------*/
37 /*--- mips to IR conversion ---*/
38 /*---------------------------------------------------------*/
40 /* Convert one MIPS insn to IR. See the type DisOneInstrFn in
41 guest_generic_bb_to_IR.h. */
42 extern DisResult disInstr_MIPS ( IRSB* irbb,
43 const UChar* guest_code,
44 Long delta,
45 Addr guest_IP,
46 VexArch guest_arch,
47 const VexArchInfo* archinfo,
48 const VexAbiInfo* abiinfo,
49 VexEndness host_endness,
50 Bool sigill_diag );
52 /* Used by the optimiser to specialise calls to helpers. */
53 extern IRExpr *guest_mips32_spechelper ( const HChar * function_name,
54 IRExpr ** args,
55 IRStmt ** precedingStmts,
56 Int n_precedingStmts );
58 extern IRExpr *guest_mips64_spechelper ( const HChar * function_name,
59 IRExpr ** args,
60 IRStmt ** precedingStmts,
61 Int n_precedingStmts);
63 /* Describes to the optimser which part of the guest state require
64 precise memory exceptions. This is logically part of the guest
65 state description. */
66 extern
67 Bool guest_mips32_state_requires_precise_mem_exns ( Int, Int,
68 VexRegisterUpdates );
70 extern
71 Bool guest_mips64_state_requires_precise_mem_exns ( Int, Int,
72 VexRegisterUpdates );
74 extern VexGuestLayout mips32Guest_layout;
75 extern VexGuestLayout mips64Guest_layout;
77 /*---------------------------------------------------------*/
78 /*--- mips guest helpers ---*/
79 /*---------------------------------------------------------*/
80 typedef enum {
81 CEILWS=0, CEILWD, CEILLS, CEILLD,
82 FLOORWS, FLOORWD, FLOORLS, FLOORLD,
83 ROUNDWS, ROUNDWD, ROUNDLS, ROUNDLD,
84 TRUNCWS, TRUNCWD, TRUNCLS, TRUNCLD,
85 CVTDS, CVTDW, CVTSD, CVTSW,
86 CVTWS, CVTWD, CVTDL, CVTLS,
87 CVTLD, CVTSL, ADDS, ADDD,
88 SUBS, SUBD, DIVS,
89 RINTS, RINTD,
90 MAXS, MAXD, MINS, MIND,
91 MAXAS, MAXAD, MINAS, MINAD,
92 CMPAFS, CMPAFD, CMPSAFS, CMPSAFD,
93 } flt_op;
95 typedef enum {
96 FADDW=0, FADDD, FSUBW, FSUBD, FMULW, FMULD, FDIVW, FDIVD, FMADDW, FMADDD,
97 FCAFD, FCAFW, FSAFD, FSAFW, FCEQD, FCEQW, FSEQD, FSEQW, FCLTD, FCLTW, FSLTD,
98 FSLTW, FCLED, FCLEW, FSLED, FSLEW, FCNED, FCNEW, FSNED, FSNEW, FCUND, FCUNW,
99 FSUND, FSUNW, FCORD, FCORW, FSORD, FSORW, FCUEQD, FCUEQW, FSUEQD, FSUEQW,
100 FCUNED, FCUNEW, FSUNED, FSUNEW, FCULED, FCULEW, FSULED, FSULEW, FCULTD,
101 FCULTW, FSULTD, FSULTW, FEXP2W, FEXP2D, FMINW, FMIND, FMINAW, FMINAD, FMAXW,
102 FMAXD, FMAXAW, FMAXAD, FFINTSW, FFINTSD, FRCPW, FRCPD, FRSQRTW, FRSQRTD,
103 FSQRTW, FSQRTD, FRINTW, FRINTD, FTRUNCUW, FTRUNCUD, FTRUNCSW, FTRUNCSD,
104 FEXDOH, FEXDOW, FEXUPRD, FEXUPRW, FEXUPLD, FEXUPLW, FLOG2W, FLOG2D,
105 FTQH, FTQW, FFQRW, FFQRD,FFQLW, FFQLD, FTINT_SW, FTINT_SD,
106 FTINT_UW, FTINT_UD, FFINT_UW, FFINT_UD,
107 } msa_flt_op;
109 #if defined (_MIPSEL)
110 #define MIPS_IEND Iend_LE
111 #else
112 #define MIPS_IEND Iend_BE
113 #endif
115 extern HWord mips_dirtyhelper_rdhwr ( UInt rd );
117 /* Calculate FCSR in fp32 mode. */
118 extern UInt mips_dirtyhelper_calculate_FCSR_fp32 ( void* guest_state, UInt fs,
119 UInt ft, flt_op op );
120 /* Calculate FCSR in fp64 mode. */
121 extern UInt mips_dirtyhelper_calculate_FCSR_fp64 ( void* guest_state, UInt fs,
122 UInt ft, flt_op op );
124 extern UInt mips_dirtyhelper_calculate_MSACSR ( void* gs, UInt ws, UInt wt,
125 msa_flt_op inst );
126 extern UInt mips_dirtyhelper_get_MSAIR ( void );
129 /*---------------------------------------------------------*/
130 /*--- Condition code stuff ---*/
131 /*---------------------------------------------------------*/
133 typedef enum {
134 MIPSCondEQ = 0, /* equal : Z=1 */
135 MIPSCondNE = 1, /* not equal : Z=0 */
137 MIPSCondHS = 2, /* >=u (higher or same) : C=1 */
138 MIPSCondLO = 3, /* <u (lower) : C=0 */
140 MIPSCondMI = 4, /* minus (negative) : N=1 */
141 MIPSCondPL = 5, /* plus (zero or +ve) : N=0 */
143 MIPSCondVS = 6, /* overflow : V=1 */
144 MIPSCondVC = 7, /* no overflow : V=0 */
146 MIPSCondHI = 8, /* >u (higher) : C=1 && Z=0 */
147 MIPSCondLS = 9, /* <=u (lower or same) : C=0 || Z=1 */
149 MIPSCondGE = 10, /* >=s (signed greater or equal) : N=V */
150 MIPSCondLT = 11, /* <s (signed less than) : N!=V */
152 MIPSCondGT = 12, /* >s (signed greater) : Z=0 && N=V */
153 MIPSCondLE = 13, /* <=s (signed less or equal) : Z=1 || N!=V */
155 MIPSCondAL = 14, /* always (unconditional) : 1 */
156 MIPSCondNV = 15 /* never (unconditional): : 0 */
157 } MIPSCondcode;
159 #endif /* __VEX_GUEST_MIPS_DEFS_H */
161 /*---------------------------------------------------------------*/
162 /*--- end guest_mips_defs.h ---*/
163 /*---------------------------------------------------------------*/