Initial implementation of C-source-level &&-idiom recovery
[valgrind.git] / VEX / priv / guest_mips_defs.h
blob3bbb3eeed13c8658f22c3a45ce847450e63e122e
2 /*---------------------------------------------------------------*/
3 /*--- begin guest_mips_defs.h ---*/
4 /*---------------------------------------------------------------*/
6 /*
7 This file is part of Valgrind, a dynamic binary instrumentation
8 framework.
10 Copyright (C) 2010-2017 RT-RK
11 mips-valgrind@rt-rk.com
13 This program is free software; you can redistribute it and/or
14 modify it under the terms of the GNU General Public License as
15 published by the Free Software Foundation; either version 2 of the
16 License, or (at your option) any later version.
18 This program is distributed in the hope that it will be useful, but
19 WITHOUT ANY WARRANTY; without even the implied warranty of
20 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
21 General Public License for more details.
23 You should have received a copy of the GNU General Public License
24 along with this program; if not, see <http://www.gnu.org/licenses/>.
26 The GNU General Public License is contained in the file COPYING.
29 /* Only to be used within the guest-mips directory. */
31 #ifndef __VEX_GUEST_MIPS_DEFS_H
32 #define __VEX_GUEST_MIPS_DEFS_H
34 #include "libvex_basictypes.h"
35 #include "guest_generic_bb_to_IR.h" /* DisResult */
37 /*---------------------------------------------------------*/
38 /*--- mips to IR conversion ---*/
39 /*---------------------------------------------------------*/
41 /* Convert one MIPS insn to IR. See the type DisOneInstrFn in
42 guest_generic_bb_to_IR.h. */
43 extern DisResult disInstr_MIPS ( IRSB* irbb,
44 const UChar* guest_code,
45 Long delta,
46 Addr guest_IP,
47 VexArch guest_arch,
48 const VexArchInfo* archinfo,
49 const VexAbiInfo* abiinfo,
50 VexEndness host_endness,
51 Bool sigill_diag );
53 /* Used by the optimiser to specialise calls to helpers. */
54 extern IRExpr *guest_mips32_spechelper ( const HChar * function_name,
55 IRExpr ** args,
56 IRStmt ** precedingStmts,
57 Int n_precedingStmts );
59 extern IRExpr *guest_mips64_spechelper ( const HChar * function_name,
60 IRExpr ** args,
61 IRStmt ** precedingStmts,
62 Int n_precedingStmts);
64 /* Describes to the optimser which part of the guest state require
65 precise memory exceptions. This is logically part of the guest
66 state description. */
67 extern
68 Bool guest_mips32_state_requires_precise_mem_exns ( Int, Int,
69 VexRegisterUpdates );
71 extern
72 Bool guest_mips64_state_requires_precise_mem_exns ( Int, Int,
73 VexRegisterUpdates );
75 extern VexGuestLayout mips32Guest_layout;
76 extern VexGuestLayout mips64Guest_layout;
78 /*---------------------------------------------------------*/
79 /*--- mips guest helpers ---*/
80 /*---------------------------------------------------------*/
81 typedef enum {
82 CEILWS=0, CEILWD, CEILLS, CEILLD,
83 FLOORWS, FLOORWD, FLOORLS, FLOORLD,
84 ROUNDWS, ROUNDWD, ROUNDLS, ROUNDLD,
85 TRUNCWS, TRUNCWD, TRUNCLS, TRUNCLD,
86 CVTDS, CVTDW, CVTSD, CVTSW,
87 CVTWS, CVTWD, CVTDL, CVTLS,
88 CVTLD, CVTSL, ADDS, ADDD,
89 SUBS, SUBD, DIVS,
90 RINTS, RINTD,
91 MAXS, MAXD, MINS, MIND,
92 MAXAS, MAXAD, MINAS, MINAD,
93 CMPAFS, CMPAFD, CMPSAFS, CMPSAFD,
94 } flt_op;
96 typedef enum {
97 FADDW=0, FADDD, FSUBW, FSUBD, FMULW, FMULD, FDIVW, FDIVD, FMADDW, FMADDD,
98 FCAFD, FCAFW, FSAFD, FSAFW, FCEQD, FCEQW, FSEQD, FSEQW, FCLTD, FCLTW, FSLTD,
99 FSLTW, FCLED, FCLEW, FSLED, FSLEW, FCNED, FCNEW, FSNED, FSNEW, FCUND, FCUNW,
100 FSUND, FSUNW, FCORD, FCORW, FSORD, FSORW, FCUEQD, FCUEQW, FSUEQD, FSUEQW,
101 FCUNED, FCUNEW, FSUNED, FSUNEW, FCULED, FCULEW, FSULED, FSULEW, FCULTD,
102 FCULTW, FSULTD, FSULTW, FEXP2W, FEXP2D, FMINW, FMIND, FMINAW, FMINAD, FMAXW,
103 FMAXD, FMAXAW, FMAXAD, FFINTSW, FFINTSD, FRCPW, FRCPD, FRSQRTW, FRSQRTD,
104 FSQRTW, FSQRTD, FRINTW, FRINTD, FTRUNCUW, FTRUNCUD, FTRUNCSW, FTRUNCSD,
105 FEXDOH, FEXDOW, FEXUPRD, FEXUPRW, FEXUPLD, FEXUPLW, FLOG2W, FLOG2D,
106 FTQH, FTQW, FFQRW, FFQRD,FFQLW, FFQLD, FTINT_SW, FTINT_SD,
107 FTINT_UW, FTINT_UD, FFINT_UW, FFINT_UD,
108 } msa_flt_op;
110 #if defined (_MIPSEL)
111 #define MIPS_IEND Iend_LE
112 #else
113 #define MIPS_IEND Iend_BE
114 #endif
116 extern HWord mips_dirtyhelper_rdhwr ( UInt rd );
118 /* Calculate FCSR in fp32 mode. */
119 extern UInt mips_dirtyhelper_calculate_FCSR_fp32 ( void* guest_state, UInt fs,
120 UInt ft, flt_op op );
121 /* Calculate FCSR in fp64 mode. */
122 extern UInt mips_dirtyhelper_calculate_FCSR_fp64 ( void* guest_state, UInt fs,
123 UInt ft, flt_op op );
125 extern UInt mips_dirtyhelper_calculate_MSACSR ( void* gs, UInt ws, UInt wt,
126 msa_flt_op inst );
127 extern UInt mips_dirtyhelper_get_MSAIR ( void );
130 /*---------------------------------------------------------*/
131 /*--- Condition code stuff ---*/
132 /*---------------------------------------------------------*/
134 typedef enum {
135 MIPSCondEQ = 0, /* equal : Z=1 */
136 MIPSCondNE = 1, /* not equal : Z=0 */
138 MIPSCondHS = 2, /* >=u (higher or same) : C=1 */
139 MIPSCondLO = 3, /* <u (lower) : C=0 */
141 MIPSCondMI = 4, /* minus (negative) : N=1 */
142 MIPSCondPL = 5, /* plus (zero or +ve) : N=0 */
144 MIPSCondVS = 6, /* overflow : V=1 */
145 MIPSCondVC = 7, /* no overflow : V=0 */
147 MIPSCondHI = 8, /* >u (higher) : C=1 && Z=0 */
148 MIPSCondLS = 9, /* <=u (lower or same) : C=0 || Z=1 */
150 MIPSCondGE = 10, /* >=s (signed greater or equal) : N=V */
151 MIPSCondLT = 11, /* <s (signed less than) : N!=V */
153 MIPSCondGT = 12, /* >s (signed greater) : Z=0 && N=V */
154 MIPSCondLE = 13, /* <=s (signed less or equal) : Z=1 || N!=V */
156 MIPSCondAL = 14, /* always (unconditional) : 1 */
157 MIPSCondNV = 15 /* never (unconditional): : 0 */
158 } MIPSCondcode;
160 #endif /* __VEX_GUEST_MIPS_DEFS_H */
162 /*---------------------------------------------------------------*/
163 /*--- end guest_mips_defs.h ---*/
164 /*---------------------------------------------------------------*/