drivers/scsi/ipr.h

   1 /*
   2  * ipr.h -- driver for IBM Power Linux RAID adapters
   3  *
   4  * Written By: Brian King <brking@us.ibm.com>, IBM Corporation
   5  *
   6  * Copyright (C) 2003, 2004 IBM Corporation
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  *
  13  * This program is distributed in the hope that it will be useful,
  14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  16  * GNU General Public License for more details.
  17  *
  18  * You should have received a copy of the GNU General Public License
  19  * along with this program; if not, write to the Free Software
  20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  21  *
  22  * Alan Cox <alan@redhat.com> - Removed several careless u32/dma_addr_t errors
  23  *                              that broke 64bit platforms.
  24  */
  25
  26 #ifndef _IPR_H
  27 #define _IPR_H
  28
  29 #include <linux/types.h>
  30 #include <linux/completion.h>
  31 #include <linux/list.h>
  32 #include <linux/kref.h>
  33 #include <scsi/scsi.h>
  34 #include <scsi/scsi_cmnd.h>
  35
  36 /*
  37  * Literals
  38  */
  39 #define IPR_DRIVER_VERSION "2.0.14"
  40 #define IPR_DRIVER_DATE "(May 2, 2005)"
  41
  42 /*
  43  * IPR_MAX_CMD_PER_LUN: This defines the maximum number of outstanding
  44  *      ops per device for devices not running tagged command queuing.
  45  *      This can be adjusted at runtime through sysfs device attributes.
  46  */
  47 #define IPR_MAX_CMD_PER_LUN                             6
  48
  49 /*
  50  * IPR_NUM_BASE_CMD_BLKS: This defines the maximum number of
  51  *      ops the mid-layer can send to the adapter.
  52  */
  53 #define IPR_NUM_BASE_CMD_BLKS                           100
  54
  55 #define IPR_SUBS_DEV_ID_2780    0x0264
  56 #define IPR_SUBS_DEV_ID_5702    0x0266
  57 #define IPR_SUBS_DEV_ID_5703    0x0278
  58 #define IPR_SUBS_DEV_ID_572E  0x028D
  59 #define IPR_SUBS_DEV_ID_573E  0x02D3
  60 #define IPR_SUBS_DEV_ID_573D  0x02D4
  61 #define IPR_SUBS_DEV_ID_571A    0x02C0
  62 #define IPR_SUBS_DEV_ID_571B    0x02BE
  63 #define IPR_SUBS_DEV_ID_571E  0x02BF
  64
  65 #define IPR_NAME                                "ipr"
  66
  67 /*
  68  * Return codes
  69  */
  70 #define IPR_RC_JOB_CONTINUE             1
  71 #define IPR_RC_JOB_RETURN               2
  72
  73 /*
  74  * IOASCs
  75  */
  76 #define IPR_IOASC_NR_INIT_CMD_REQUIRED          0x02040200
  77 #define IPR_IOASC_SYNC_REQUIRED                 0x023f0000
  78 #define IPR_IOASC_MED_DO_NOT_REALLOC            0x03110C00
  79 #define IPR_IOASC_HW_SEL_TIMEOUT                        0x04050000
  80 #define IPR_IOASC_HW_DEV_BUS_STATUS                     0x04448500
  81 #define IPR_IOASC_IOASC_MASK                    0xFFFFFF00
  82 #define IPR_IOASC_SCSI_STATUS_MASK              0x000000FF
  83 #define IPR_IOASC_IR_RESOURCE_HANDLE            0x05250000
  84 #define IPR_IOASC_IR_NO_CMDS_TO_2ND_IOA         0x05258100
  85 #define IPR_IOASA_IR_DUAL_IOA_DISABLED          0x052C8000
  86 #define IPR_IOASC_BUS_WAS_RESET                 0x06290000
  87 #define IPR_IOASC_BUS_WAS_RESET_BY_OTHER                0x06298000
  88 #define IPR_IOASC_ABORTED_CMD_TERM_BY_HOST      0x0B5A0000
  89
  90 #define IPR_FIRST_DRIVER_IOASC                  0x10000000
  91 #define IPR_IOASC_IOA_WAS_RESET                 0x10000001
  92 #define IPR_IOASC_PCI_ACCESS_ERROR                      0x10000002
  93
  94 #define IPR_NUM_LOG_HCAMS                               2
  95 #define IPR_NUM_CFG_CHG_HCAMS                           2
  96 #define IPR_NUM_HCAMS   (IPR_NUM_LOG_HCAMS + IPR_NUM_CFG_CHG_HCAMS)
  97 #define IPR_MAX_NUM_TARGETS_PER_BUS                     0x10
  98 #define IPR_MAX_NUM_LUNS_PER_TARGET                     256
  99 #define IPR_MAX_NUM_VSET_LUNS_PER_TARGET        8
 100 #define IPR_VSET_BUS                                    0xff
 101 #define IPR_IOA_BUS                                             0xff
 102 #define IPR_IOA_TARGET                                  0xff
 103 #define IPR_IOA_LUN                                             0xff
 104 #define IPR_MAX_NUM_BUSES                               4
 105 #define IPR_MAX_BUS_TO_SCAN                             IPR_MAX_NUM_BUSES
 106
 107 #define IPR_NUM_RESET_RELOAD_RETRIES            3
 108
 109 /* We need resources for HCAMS, IOA reset, IOA bringdown, and ERP */
 110 #define IPR_NUM_INTERNAL_CMD_BLKS       (IPR_NUM_HCAMS + \
 111                                      ((IPR_NUM_RESET_RELOAD_RETRIES + 1) * 2) + 3)
 112
 113 #define IPR_MAX_COMMANDS                IPR_NUM_BASE_CMD_BLKS
 114 #define IPR_NUM_CMD_BLKS                (IPR_NUM_BASE_CMD_BLKS + \
 115                                                 IPR_NUM_INTERNAL_CMD_BLKS)
 116
 117 #define IPR_MAX_PHYSICAL_DEVS                           192
 118
 119 #define IPR_MAX_SGLIST                                  64
 120 #define IPR_IOA_MAX_SECTORS                             32767
 121 #define IPR_VSET_MAX_SECTORS                            512
 122 #define IPR_MAX_CDB_LEN                                 16
 123
 124 #define IPR_DEFAULT_BUS_WIDTH                           16
 125 #define IPR_80MBs_SCSI_RATE             ((80 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 126 #define IPR_U160_SCSI_RATE      ((160 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 127 #define IPR_U320_SCSI_RATE      ((320 * 10) / (IPR_DEFAULT_BUS_WIDTH / 8))
 128 #define IPR_MAX_SCSI_RATE(width) ((320 * 10) / ((width) / 8))
 129
 130 #define IPR_IOA_RES_HANDLE                              0xffffffff
 131 #define IPR_IOA_RES_ADDR                                0x00ffffff
 132
 133 /*
 134  * Adapter Commands
 135  */
 136 #define IPR_QUERY_RSRC_STATE                            0xC2
 137 #define IPR_RESET_DEVICE                                0xC3
 138 #define IPR_RESET_TYPE_SELECT                           0x80
 139 #define IPR_LUN_RESET                                   0x40
 140 #define IPR_TARGET_RESET                                        0x20
 141 #define IPR_BUS_RESET                                   0x10
 142 #define IPR_ID_HOST_RR_Q                                0xC4
 143 #define IPR_QUERY_IOA_CONFIG                            0xC5
 144 #define IPR_CANCEL_ALL_REQUESTS                 0xCE
 145 #define IPR_HOST_CONTROLLED_ASYNC                       0xCF
 146 #define IPR_HCAM_CDB_OP_CODE_CONFIG_CHANGE      0x01
 147 #define IPR_HCAM_CDB_OP_CODE_LOG_DATA           0x02
 148 #define IPR_SET_SUPPORTED_DEVICES                       0xFB
 149 #define IPR_IOA_SHUTDOWN                                0xF7
 150 #define IPR_WR_BUF_DOWNLOAD_AND_SAVE                    0x05
 151
 152 /*
 153  * Timeouts
 154  */
 155 #define IPR_SHUTDOWN_TIMEOUT                    (ipr_fastfail ? 60 * HZ : 10 * 60 * HZ)
 156 #define IPR_VSET_RW_TIMEOUT                     (ipr_fastfail ? 30 * HZ : 2 * 60 * HZ)
 157 #define IPR_ABBREV_SHUTDOWN_TIMEOUT             (10 * HZ)
 158 #define IPR_DEVICE_RESET_TIMEOUT                (ipr_fastfail ? 10 * HZ : 30 * HZ)
 159 #define IPR_CANCEL_ALL_TIMEOUT          (ipr_fastfail ? 10 * HZ : 30 * HZ)
 160 #define IPR_ABORT_TASK_TIMEOUT          (ipr_fastfail ? 10 * HZ : 30 * HZ)
 161 #define IPR_INTERNAL_TIMEOUT                    (ipr_fastfail ? 10 * HZ : 30 * HZ)
 162 #define IPR_WRITE_BUFFER_TIMEOUT                (10 * 60 * HZ)
 163 #define IPR_SET_SUP_DEVICE_TIMEOUT              (2 * 60 * HZ)
 164 #define IPR_REQUEST_SENSE_TIMEOUT               (10 * HZ)
 165 #define IPR_OPERATIONAL_TIMEOUT         (5 * 60)
 166 #define IPR_WAIT_FOR_RESET_TIMEOUT              (2 * HZ)
 167 #define IPR_CHECK_FOR_RESET_TIMEOUT             (HZ / 10)
 168 #define IPR_WAIT_FOR_BIST_TIMEOUT               (2 * HZ)
 169 #define IPR_DUMP_TIMEOUT                        (15 * HZ)
 170
 171 /*
 172  * SCSI Literals
 173  */
 174 #define IPR_VENDOR_ID_LEN                       8
 175 #define IPR_PROD_ID_LEN                         16
 176 #define IPR_SERIAL_NUM_LEN                      8
 177
 178 /*
 179  * Hardware literals
 180  */
 181 #define IPR_FMT2_MBX_ADDR_MASK                          0x0fffffff
 182 #define IPR_FMT2_MBX_BAR_SEL_MASK                       0xf0000000
 183 #define IPR_FMT2_MKR_BAR_SEL_SHIFT                      28
 184 #define IPR_GET_FMT2_BAR_SEL(mbx) \
 185 (((mbx) & IPR_FMT2_MBX_BAR_SEL_MASK) >> IPR_FMT2_MKR_BAR_SEL_SHIFT)
 186 #define IPR_SDT_FMT2_BAR0_SEL                           0x0
 187 #define IPR_SDT_FMT2_BAR1_SEL                           0x1
 188 #define IPR_SDT_FMT2_BAR2_SEL                           0x2
 189 #define IPR_SDT_FMT2_BAR3_SEL                           0x3
 190 #define IPR_SDT_FMT2_BAR4_SEL                           0x4
 191 #define IPR_SDT_FMT2_BAR5_SEL                           0x5
 192 #define IPR_SDT_FMT2_EXP_ROM_SEL                        0x8
 193 #define IPR_FMT2_SDT_READY_TO_USE                       0xC4D4E3F2
 194 #define IPR_DOORBELL                                    0x82800000
 195 #define IPR_RUNTIME_RESET                               0x40000000
 196
 197 #define IPR_PCII_IOA_TRANS_TO_OPER                      (0x80000000 >> 0)
 198 #define IPR_PCII_IOARCB_XFER_FAILED                     (0x80000000 >> 3)
 199 #define IPR_PCII_IOA_UNIT_CHECKED                       (0x80000000 >> 4)
 200 #define IPR_PCII_NO_HOST_RRQ                            (0x80000000 >> 5)
 201 #define IPR_PCII_CRITICAL_OPERATION                     (0x80000000 >> 6)
 202 #define IPR_PCII_IO_DEBUG_ACKNOWLEDGE           (0x80000000 >> 7)
 203 #define IPR_PCII_IOARRIN_LOST                           (0x80000000 >> 27)
 204 #define IPR_PCII_MMIO_ERROR                             (0x80000000 >> 28)
 205 #define IPR_PCII_PROC_ERR_STATE                 (0x80000000 >> 29)
 206 #define IPR_PCII_HRRQ_UPDATED                           (0x80000000 >> 30)
 207 #define IPR_PCII_CORE_ISSUED_RST_REQ            (0x80000000 >> 31)
 208
 209 #define IPR_PCII_ERROR_INTERRUPTS \
 210 (IPR_PCII_IOARCB_XFER_FAILED | IPR_PCII_IOA_UNIT_CHECKED | \
 211 IPR_PCII_NO_HOST_RRQ | IPR_PCII_IOARRIN_LOST | IPR_PCII_MMIO_ERROR)
 212
 213 #define IPR_PCII_OPER_INTERRUPTS \
 214 (IPR_PCII_ERROR_INTERRUPTS | IPR_PCII_HRRQ_UPDATED | IPR_PCII_IOA_TRANS_TO_OPER)
 215
 216 #define IPR_UPROCI_RESET_ALERT                  (0x80000000 >> 7)
 217 #define IPR_UPROCI_IO_DEBUG_ALERT                       (0x80000000 >> 9)
 218
 219 #define IPR_LDUMP_MAX_LONG_ACK_DELAY_IN_USEC            200000  /* 200 ms */
 220 #define IPR_LDUMP_MAX_SHORT_ACK_DELAY_IN_USEC           200000  /* 200 ms */
 221
 222 /*
 223  * Dump literals
 224  */
 225 #define IPR_MAX_IOA_DUMP_SIZE                           (4 * 1024 * 1024)
 226 #define IPR_NUM_SDT_ENTRIES                             511
 227 #define IPR_MAX_NUM_DUMP_PAGES  ((IPR_MAX_IOA_DUMP_SIZE / PAGE_SIZE) + 1)
 228
 229 /*
 230  * Misc literals
 231  */
 232 #define IPR_NUM_IOADL_ENTRIES                   IPR_MAX_SGLIST
 233
 234 /*
 235  * Adapter interface types
 236  */
 237
 238 struct ipr_res_addr {
 239         u8 reserved;
 240         u8 bus;
 241         u8 target;
 242         u8 lun;
 243 #define IPR_GET_PHYS_LOC(res_addr) \
 244         (((res_addr).bus << 16) | ((res_addr).target << 8) | (res_addr).lun)
 245 }__attribute__((packed, aligned (4)));
 246
 247 struct ipr_std_inq_vpids {
 248         u8 vendor_id[IPR_VENDOR_ID_LEN];
 249         u8 product_id[IPR_PROD_ID_LEN];
 250 }__attribute__((packed));
 251
 252 struct ipr_vpd {
 253         struct ipr_std_inq_vpids vpids;
 254         u8 sn[IPR_SERIAL_NUM_LEN];
 255 }__attribute__((packed));
 256
 257 struct ipr_ext_vpd {
 258         struct ipr_vpd vpd;
 259         __be32 wwid[2];
 260 }__attribute__((packed));
 261
 262 struct ipr_std_inq_data {
 263         u8 peri_qual_dev_type;
 264 #define IPR_STD_INQ_PERI_QUAL(peri) ((peri) >> 5)
 265 #define IPR_STD_INQ_PERI_DEV_TYPE(peri) ((peri) & 0x1F)
 266
 267         u8 removeable_medium_rsvd;
 268 #define IPR_STD_INQ_REMOVEABLE_MEDIUM 0x80
 269
 270 #define IPR_IS_DASD_DEVICE(std_inq) \
 271 ((IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_DISK) && \
 272 !(((std_inq).removeable_medium_rsvd) & IPR_STD_INQ_REMOVEABLE_MEDIUM))
 273
 274 #define IPR_IS_SES_DEVICE(std_inq) \
 275 (IPR_STD_INQ_PERI_DEV_TYPE((std_inq).peri_qual_dev_type) == TYPE_ENCLOSURE)
 276
 277         u8 version;
 278         u8 aen_naca_fmt;
 279         u8 additional_len;
 280         u8 sccs_rsvd;
 281         u8 bq_enc_multi;
 282         u8 sync_cmdq_flags;
 283
 284         struct ipr_std_inq_vpids vpids;
 285
 286         u8 ros_rsvd_ram_rsvd[4];
 287
 288         u8 serial_num[IPR_SERIAL_NUM_LEN];
 289 }__attribute__ ((packed));
 290
 291 struct ipr_config_table_entry {
 292         u8 service_level;
 293         u8 array_id;
 294         u8 flags;
 295 #define IPR_IS_IOA_RESOURCE     0x80
 296 #define IPR_IS_ARRAY_MEMBER 0x20
 297 #define IPR_IS_HOT_SPARE        0x10
 298
 299         u8 rsvd_subtype;
 300 #define IPR_RES_SUBTYPE(res) (((res)->cfgte.rsvd_subtype) & 0x0f)
 301 #define IPR_SUBTYPE_AF_DASD                     0
 302 #define IPR_SUBTYPE_GENERIC_SCSI        1
 303 #define IPR_SUBTYPE_VOLUME_SET          2
 304
 305 #define IPR_QUEUEING_MODEL(res) ((((res)->cfgte.flags) & 0x70) >> 4)
 306 #define IPR_QUEUE_FROZEN_MODEL  0
 307 #define IPR_QUEUE_NACA_MODEL            1
 308
 309         struct ipr_res_addr res_addr;
 310         __be32 res_handle;
 311         __be32 reserved4[2];
 312         struct ipr_std_inq_data std_inq_data;
 313 }__attribute__ ((packed, aligned (4)));
 314
 315 struct ipr_config_table_hdr {
 316         u8 num_entries;
 317         u8 flags;
 318 #define IPR_UCODE_DOWNLOAD_REQ  0x10
 319         __be16 reserved;
 320 }__attribute__((packed, aligned (4)));
 321
 322 struct ipr_config_table {
 323         struct ipr_config_table_hdr hdr;
 324         struct ipr_config_table_entry dev[IPR_MAX_PHYSICAL_DEVS];
 325 }__attribute__((packed, aligned (4)));
 326
 327 struct ipr_hostrcb_cfg_ch_not {
 328         struct ipr_config_table_entry cfgte;
 329         u8 reserved[936];
 330 }__attribute__((packed, aligned (4)));
 331
 332 struct ipr_supported_device {
 333         __be16 data_length;
 334         u8 reserved;
 335         u8 num_records;
 336         struct ipr_std_inq_vpids vpids;
 337         u8 reserved2[16];
 338 }__attribute__((packed, aligned (4)));
 339
 340 /* Command packet structure */
 341 struct ipr_cmd_pkt {
 342         __be16 reserved;                /* Reserved by IOA */
 343         u8 request_type;
 344 #define IPR_RQTYPE_SCSICDB              0x00
 345 #define IPR_RQTYPE_IOACMD               0x01
 346 #define IPR_RQTYPE_HCAM                 0x02
 347
 348         u8 luntar_luntrn;
 349
 350         u8 flags_hi;
 351 #define IPR_FLAGS_HI_WRITE_NOT_READ             0x80
 352 #define IPR_FLAGS_HI_NO_ULEN_CHK                0x20
 353 #define IPR_FLAGS_HI_SYNC_OVERRIDE              0x10
 354 #define IPR_FLAGS_HI_SYNC_COMPLETE              0x08
 355 #define IPR_FLAGS_HI_NO_LINK_DESC               0x04
 356
 357         u8 flags_lo;
 358 #define IPR_FLAGS_LO_ALIGNED_BFR                0x20
 359 #define IPR_FLAGS_LO_DELAY_AFTER_RST    0x10
 360 #define IPR_FLAGS_LO_UNTAGGED_TASK              0x00
 361 #define IPR_FLAGS_LO_SIMPLE_TASK                0x02
 362 #define IPR_FLAGS_LO_ORDERED_TASK               0x04
 363 #define IPR_FLAGS_LO_HEAD_OF_Q_TASK             0x06
 364 #define IPR_FLAGS_LO_ACA_TASK                   0x08
 365
 366         u8 cdb[16];
 367         __be16 timeout;
 368 }__attribute__ ((packed, aligned(4)));
 369
 370 /* IOA Request Control Block    128 bytes  */
 371 struct ipr_ioarcb {
 372         __be32 ioarcb_host_pci_addr;
 373         __be32 reserved;
 374         __be32 res_handle;
 375         __be32 host_response_handle;
 376         __be32 reserved1;
 377         __be32 reserved2;
 378         __be32 reserved3;
 379
 380         __be32 write_data_transfer_length;
 381         __be32 read_data_transfer_length;
 382         __be32 write_ioadl_addr;
 383         __be32 write_ioadl_len;
 384         __be32 read_ioadl_addr;
 385         __be32 read_ioadl_len;
 386
 387         __be32 ioasa_host_pci_addr;
 388         __be16 ioasa_len;
 389         __be16 reserved4;
 390
 391         struct ipr_cmd_pkt cmd_pkt;
 392
 393         __be32 add_cmd_parms_len;
 394         __be32 add_cmd_parms[10];
 395 }__attribute__((packed, aligned (4)));
 396
 397 struct ipr_ioadl_desc {
 398         __be32 flags_and_data_len;
 399 #define IPR_IOADL_FLAGS_MASK            0xff000000
 400 #define IPR_IOADL_GET_FLAGS(x) (be32_to_cpu(x) & IPR_IOADL_FLAGS_MASK)
 401 #define IPR_IOADL_DATA_LEN_MASK         0x00ffffff
 402 #define IPR_IOADL_GET_DATA_LEN(x) (be32_to_cpu(x) & IPR_IOADL_DATA_LEN_MASK)
 403 #define IPR_IOADL_FLAGS_READ            0x48000000
 404 #define IPR_IOADL_FLAGS_READ_LAST       0x49000000
 405 #define IPR_IOADL_FLAGS_WRITE           0x68000000
 406 #define IPR_IOADL_FLAGS_WRITE_LAST      0x69000000
 407 #define IPR_IOADL_FLAGS_LAST            0x01000000
 408
 409         __be32 address;
 410 }__attribute__((packed, aligned (8)));
 411
 412 struct ipr_ioasa_vset {
 413         __be32 failing_lba_hi;
 414         __be32 failing_lba_lo;
 415         __be32 reserved;
 416 }__attribute__((packed, aligned (4)));
 417
 418 struct ipr_ioasa_af_dasd {
 419         __be32 failing_lba;
 420         __be32 reserved[2];
 421 }__attribute__((packed, aligned (4)));
 422
 423 struct ipr_ioasa_gpdd {
 424         u8 end_state;
 425         u8 bus_phase;
 426         __be16 reserved;
 427         __be32 ioa_data[2];
 428 }__attribute__((packed, aligned (4)));
 429
 430 struct ipr_auto_sense {
 431         __be16 auto_sense_len;
 432         __be16 ioa_data_len;
 433         __be32 data[SCSI_SENSE_BUFFERSIZE/sizeof(__be32)];
 434 };
 435
 436 struct ipr_ioasa {
 437         __be32 ioasc;
 438 #define IPR_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
 439 #define IPR_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
 440 #define IPR_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
 441 #define IPR_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
 442
 443         __be16 ret_stat_len;    /* Length of the returned IOASA */
 444
 445         __be16 avail_stat_len;  /* Total Length of status available. */
 446
 447         __be32 residual_data_len;       /* number of bytes in the host data */
 448         /* buffers that were not used by the IOARCB command. */
 449
 450         __be32 ilid;
 451 #define IPR_NO_ILID                     0
 452 #define IPR_DRIVER_ILID         0xffffffff
 453
 454         __be32 fd_ioasc;
 455
 456         __be32 fd_phys_locator;
 457
 458         __be32 fd_res_handle;
 459
 460         __be32 ioasc_specific;  /* status code specific field */
 461 #define IPR_ADDITIONAL_STATUS_FMT               0x80000000
 462 #define IPR_AUTOSENSE_VALID                     0x40000000
 463 #define IPR_IOASC_SPECIFIC_MASK         0x00ffffff
 464 #define IPR_FIELD_POINTER_VALID         (0x80000000 >> 8)
 465 #define IPR_FIELD_POINTER_MASK          0x0000ffff
 466
 467         union {
 468                 struct ipr_ioasa_vset vset;
 469                 struct ipr_ioasa_af_dasd dasd;
 470                 struct ipr_ioasa_gpdd gpdd;
 471         } u;
 472
 473         struct ipr_auto_sense auto_sense;
 474 }__attribute__((packed, aligned (4)));
 475
 476 struct ipr_mode_parm_hdr {
 477         u8 length;
 478         u8 medium_type;
 479         u8 device_spec_parms;
 480         u8 block_desc_len;
 481 }__attribute__((packed));
 482
 483 struct ipr_mode_pages {
 484         struct ipr_mode_parm_hdr hdr;
 485         u8 data[255 - sizeof(struct ipr_mode_parm_hdr)];
 486 }__attribute__((packed));
 487
 488 struct ipr_mode_page_hdr {
 489         u8 ps_page_code;
 490 #define IPR_MODE_PAGE_PS        0x80
 491 #define IPR_GET_MODE_PAGE_CODE(hdr) ((hdr)->ps_page_code & 0x3F)
 492         u8 page_length;
 493 }__attribute__ ((packed));
 494
 495 struct ipr_dev_bus_entry {
 496         struct ipr_res_addr res_addr;
 497         u8 flags;
 498 #define IPR_SCSI_ATTR_ENABLE_QAS                        0x80
 499 #define IPR_SCSI_ATTR_DISABLE_QAS                       0x40
 500 #define IPR_SCSI_ATTR_QAS_MASK                          0xC0
 501 #define IPR_SCSI_ATTR_ENABLE_TM                         0x20
 502 #define IPR_SCSI_ATTR_NO_TERM_PWR                       0x10
 503 #define IPR_SCSI_ATTR_TM_SUPPORTED                      0x08
 504 #define IPR_SCSI_ATTR_LVD_TO_SE_NOT_ALLOWED     0x04
 505
 506         u8 scsi_id;
 507         u8 bus_width;
 508         u8 extended_reset_delay;
 509 #define IPR_EXTENDED_RESET_DELAY        7
 510
 511         __be32 max_xfer_rate;
 512
 513         u8 spinup_delay;
 514         u8 reserved3;
 515         __be16 reserved4;
 516 }__attribute__((packed, aligned (4)));
 517
 518 struct ipr_mode_page28 {
 519         struct ipr_mode_page_hdr hdr;
 520         u8 num_entries;
 521         u8 entry_length;
 522         struct ipr_dev_bus_entry bus[0];
 523 }__attribute__((packed));
 524
 525 struct ipr_ioa_vpd {
 526         struct ipr_std_inq_data std_inq_data;
 527         u8 ascii_part_num[12];
 528         u8 reserved[40];
 529         u8 ascii_plant_code[4];
 530 }__attribute__((packed));
 531
 532 struct ipr_inquiry_page3 {
 533         u8 peri_qual_dev_type;
 534         u8 page_code;
 535         u8 reserved1;
 536         u8 page_length;
 537         u8 ascii_len;
 538         u8 reserved2[3];
 539         u8 load_id[4];
 540         u8 major_release;
 541         u8 card_type;
 542         u8 minor_release[2];
 543         u8 ptf_number[4];
 544         u8 patch_number[4];
 545 }__attribute__((packed));
 546
 547 #define IPR_INQUIRY_PAGE0_ENTRIES 20
 548 struct ipr_inquiry_page0 {
 549         u8 peri_qual_dev_type;
 550         u8 page_code;
 551         u8 reserved1;
 552         u8 len;
 553         u8 page[IPR_INQUIRY_PAGE0_ENTRIES];
 554 }__attribute__((packed));
 555
 556 struct ipr_hostrcb_device_data_entry {
 557         struct ipr_vpd vpd;
 558         struct ipr_res_addr dev_res_addr;
 559         struct ipr_vpd new_vpd;
 560         struct ipr_vpd ioa_last_with_dev_vpd;
 561         struct ipr_vpd cfc_last_with_dev_vpd;
 562         __be32 ioa_data[5];
 563 }__attribute__((packed, aligned (4)));
 564
 565 struct ipr_hostrcb_device_data_entry_enhanced {
 566         struct ipr_ext_vpd vpd;
 567         u8 ccin[4];
 568         struct ipr_res_addr dev_res_addr;
 569         struct ipr_ext_vpd new_vpd;
 570         u8 new_ccin[4];
 571         struct ipr_ext_vpd ioa_last_with_dev_vpd;
 572         struct ipr_ext_vpd cfc_last_with_dev_vpd;
 573 }__attribute__((packed, aligned (4)));
 574
 575 struct ipr_hostrcb_array_data_entry {
 576         struct ipr_vpd vpd;
 577         struct ipr_res_addr expected_dev_res_addr;
 578         struct ipr_res_addr dev_res_addr;
 579 }__attribute__((packed, aligned (4)));
 580
 581 struct ipr_hostrcb_array_data_entry_enhanced {
 582         struct ipr_ext_vpd vpd;
 583         u8 ccin[4];
 584         struct ipr_res_addr expected_dev_res_addr;
 585         struct ipr_res_addr dev_res_addr;
 586 }__attribute__((packed, aligned (4)));
 587
 588 struct ipr_hostrcb_type_ff_error {
 589         __be32 ioa_data[502];
 590 }__attribute__((packed, aligned (4)));
 591
 592 struct ipr_hostrcb_type_01_error {
 593         __be32 seek_counter;
 594         __be32 read_counter;
 595         u8 sense_data[32];
 596         __be32 ioa_data[236];
 597 }__attribute__((packed, aligned (4)));
 598
 599 struct ipr_hostrcb_type_02_error {
 600         struct ipr_vpd ioa_vpd;
 601         struct ipr_vpd cfc_vpd;
 602         struct ipr_vpd ioa_last_attached_to_cfc_vpd;
 603         struct ipr_vpd cfc_last_attached_to_ioa_vpd;
 604         __be32 ioa_data[3];
 605 }__attribute__((packed, aligned (4)));
 606
 607 struct ipr_hostrcb_type_12_error {
 608         struct ipr_ext_vpd ioa_vpd;
 609         struct ipr_ext_vpd cfc_vpd;
 610         struct ipr_ext_vpd ioa_last_attached_to_cfc_vpd;
 611         struct ipr_ext_vpd cfc_last_attached_to_ioa_vpd;
 612         __be32 ioa_data[3];
 613 }__attribute__((packed, aligned (4)));
 614
 615 struct ipr_hostrcb_type_03_error {
 616         struct ipr_vpd ioa_vpd;
 617         struct ipr_vpd cfc_vpd;
 618         __be32 errors_detected;
 619         __be32 errors_logged;
 620         u8 ioa_data[12];
 621         struct ipr_hostrcb_device_data_entry dev[3];
 622 }__attribute__((packed, aligned (4)));
 623
 624 struct ipr_hostrcb_type_13_error {
 625         struct ipr_ext_vpd ioa_vpd;
 626         struct ipr_ext_vpd cfc_vpd;
 627         __be32 errors_detected;
 628         __be32 errors_logged;
 629         struct ipr_hostrcb_device_data_entry_enhanced dev[3];
 630 }__attribute__((packed, aligned (4)));
 631
 632 struct ipr_hostrcb_type_04_error {
 633         struct ipr_vpd ioa_vpd;
 634         struct ipr_vpd cfc_vpd;
 635         u8 ioa_data[12];
 636         struct ipr_hostrcb_array_data_entry array_member[10];
 637         __be32 exposed_mode_adn;
 638         __be32 array_id;
 639         struct ipr_vpd incomp_dev_vpd;
 640         __be32 ioa_data2;
 641         struct ipr_hostrcb_array_data_entry array_member2[8];
 642         struct ipr_res_addr last_func_vset_res_addr;
 643         u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
 644         u8 protection_level[8];
 645 }__attribute__((packed, aligned (4)));
 646
 647 struct ipr_hostrcb_type_14_error {
 648         struct ipr_ext_vpd ioa_vpd;
 649         struct ipr_ext_vpd cfc_vpd;
 650         __be32 exposed_mode_adn;
 651         __be32 array_id;
 652         struct ipr_res_addr last_func_vset_res_addr;
 653         u8 vset_serial_num[IPR_SERIAL_NUM_LEN];
 654         u8 protection_level[8];
 655         __be32 num_entries;
 656         struct ipr_hostrcb_array_data_entry_enhanced array_member[18];
 657 }__attribute__((packed, aligned (4)));
 658
 659 struct ipr_hostrcb_type_07_error {
 660         u8 failure_reason[64];
 661         struct ipr_vpd vpd;
 662         u32 data[222];
 663 }__attribute__((packed, aligned (4)));
 664
 665 struct ipr_hostrcb_type_17_error {
 666         u8 failure_reason[64];
 667         struct ipr_ext_vpd vpd;
 668         u32 data[476];
 669 }__attribute__((packed, aligned (4)));
 670
 671 struct ipr_hostrcb_error {
 672         __be32 failing_dev_ioasc;
 673         struct ipr_res_addr failing_dev_res_addr;
 674         __be32 failing_dev_res_handle;
 675         __be32 prc;
 676         union {
 677                 struct ipr_hostrcb_type_ff_error type_ff_error;
 678                 struct ipr_hostrcb_type_01_error type_01_error;
 679                 struct ipr_hostrcb_type_02_error type_02_error;
 680                 struct ipr_hostrcb_type_03_error type_03_error;
 681                 struct ipr_hostrcb_type_04_error type_04_error;
 682                 struct ipr_hostrcb_type_07_error type_07_error;
 683                 struct ipr_hostrcb_type_12_error type_12_error;
 684                 struct ipr_hostrcb_type_13_error type_13_error;
 685                 struct ipr_hostrcb_type_14_error type_14_error;
 686                 struct ipr_hostrcb_type_17_error type_17_error;
 687         } u;
 688 }__attribute__((packed, aligned (4)));
 689
 690 struct ipr_hostrcb_raw {
 691         __be32 data[sizeof(struct ipr_hostrcb_error)/sizeof(__be32)];
 692 }__attribute__((packed, aligned (4)));
 693
 694 struct ipr_hcam {
 695         u8 op_code;
 696 #define IPR_HOST_RCB_OP_CODE_CONFIG_CHANGE                      0xE1
 697 #define IPR_HOST_RCB_OP_CODE_LOG_DATA                           0xE2
 698
 699         u8 notify_type;
 700 #define IPR_HOST_RCB_NOTIF_TYPE_EXISTING_CHANGED        0x00
 701 #define IPR_HOST_RCB_NOTIF_TYPE_NEW_ENTRY                       0x01
 702 #define IPR_HOST_RCB_NOTIF_TYPE_REM_ENTRY                       0x02
 703 #define IPR_HOST_RCB_NOTIF_TYPE_ERROR_LOG_ENTRY         0x10
 704 #define IPR_HOST_RCB_NOTIF_TYPE_INFORMATION_ENTRY       0x11
 705
 706         u8 notifications_lost;
 707 #define IPR_HOST_RCB_NO_NOTIFICATIONS_LOST                      0
 708 #define IPR_HOST_RCB_NOTIFICATIONS_LOST                         0x80
 709
 710         u8 flags;
 711 #define IPR_HOSTRCB_INTERNAL_OPER       0x80
 712 #define IPR_HOSTRCB_ERR_RESP_SENT       0x40
 713
 714         u8 overlay_id;
 715 #define IPR_HOST_RCB_OVERLAY_ID_1                               0x01
 716 #define IPR_HOST_RCB_OVERLAY_ID_2                               0x02
 717 #define IPR_HOST_RCB_OVERLAY_ID_3                               0x03
 718 #define IPR_HOST_RCB_OVERLAY_ID_4                               0x04
 719 #define IPR_HOST_RCB_OVERLAY_ID_6                               0x06
 720 #define IPR_HOST_RCB_OVERLAY_ID_7                               0x07
 721 #define IPR_HOST_RCB_OVERLAY_ID_12                              0x12
 722 #define IPR_HOST_RCB_OVERLAY_ID_13                              0x13
 723 #define IPR_HOST_RCB_OVERLAY_ID_14                              0x14
 724 #define IPR_HOST_RCB_OVERLAY_ID_16                              0x16
 725 #define IPR_HOST_RCB_OVERLAY_ID_17                              0x17
 726 #define IPR_HOST_RCB_OVERLAY_ID_DEFAULT                 0xFF
 727
 728         u8 reserved1[3];
 729         __be32 ilid;
 730         __be32 time_since_last_ioa_reset;
 731         __be32 reserved2;
 732         __be32 length;
 733
 734         union {
 735                 struct ipr_hostrcb_error error;
 736                 struct ipr_hostrcb_cfg_ch_not ccn;
 737                 struct ipr_hostrcb_raw raw;
 738         } u;
 739 }__attribute__((packed, aligned (4)));
 740
 741 struct ipr_hostrcb {
 742         struct ipr_hcam hcam;
 743         dma_addr_t hostrcb_dma;
 744         struct list_head queue;
 745 };
 746
 747 /* IPR smart dump table structures */
 748 struct ipr_sdt_entry {
 749         __be32 bar_str_offset;
 750         __be32 end_offset;
 751         u8 entry_byte;
 752         u8 reserved[3];
 753
 754         u8 flags;
 755 #define IPR_SDT_ENDIAN          0x80
 756 #define IPR_SDT_VALID_ENTRY     0x20
 757
 758         u8 resv;
 759         __be16 priority;
 760 }__attribute__((packed, aligned (4)));
 761
 762 struct ipr_sdt_header {
 763         __be32 state;
 764         __be32 num_entries;
 765         __be32 num_entries_used;
 766         __be32 dump_size;
 767 }__attribute__((packed, aligned (4)));
 768
 769 struct ipr_sdt {
 770         struct ipr_sdt_header hdr;
 771         struct ipr_sdt_entry entry[IPR_NUM_SDT_ENTRIES];
 772 }__attribute__((packed, aligned (4)));
 773
 774 struct ipr_uc_sdt {
 775         struct ipr_sdt_header hdr;
 776         struct ipr_sdt_entry entry[1];
 777 }__attribute__((packed, aligned (4)));
 778
 779 /*
 780  * Driver types
 781  */
 782 struct ipr_bus_attributes {
 783         u8 bus;
 784         u8 qas_enabled;
 785         u8 bus_width;
 786         u8 reserved;
 787         u32 max_xfer_rate;
 788 };
 789
 790 struct ipr_resource_entry {
 791         struct ipr_config_table_entry cfgte;
 792         u8 needs_sync_complete:1;
 793         u8 in_erp:1;
 794         u8 add_to_ml:1;
 795         u8 del_from_ml:1;
 796         u8 resetting_device:1;
 797
 798         struct scsi_device *sdev;
 799         struct list_head queue;
 800 };
 801
 802 struct ipr_resource_hdr {
 803         u16 num_entries;
 804         u16 reserved;
 805 };
 806
 807 struct ipr_resource_table {
 808         struct ipr_resource_hdr hdr;
 809         struct ipr_resource_entry dev[IPR_MAX_PHYSICAL_DEVS];
 810 };
 811
 812 struct ipr_misc_cbs {
 813         struct ipr_ioa_vpd ioa_vpd;
 814         struct ipr_inquiry_page0 page0_data;
 815         struct ipr_inquiry_page3 page3_data;
 816         struct ipr_mode_pages mode_pages;
 817         struct ipr_supported_device supp_dev;
 818 };
 819
 820 struct ipr_interrupt_offsets {
 821         unsigned long set_interrupt_mask_reg;
 822         unsigned long clr_interrupt_mask_reg;
 823         unsigned long sense_interrupt_mask_reg;
 824         unsigned long clr_interrupt_reg;
 825
 826         unsigned long sense_interrupt_reg;
 827         unsigned long ioarrin_reg;
 828         unsigned long sense_uproc_interrupt_reg;
 829         unsigned long set_uproc_interrupt_reg;
 830         unsigned long clr_uproc_interrupt_reg;
 831 };
 832
 833 struct ipr_interrupts {
 834         void __iomem *set_interrupt_mask_reg;
 835         void __iomem *clr_interrupt_mask_reg;
 836         void __iomem *sense_interrupt_mask_reg;
 837         void __iomem *clr_interrupt_reg;
 838
 839         void __iomem *sense_interrupt_reg;
 840         void __iomem *ioarrin_reg;
 841         void __iomem *sense_uproc_interrupt_reg;
 842         void __iomem *set_uproc_interrupt_reg;
 843         void __iomem *clr_uproc_interrupt_reg;
 844 };
 845
 846 struct ipr_chip_cfg_t {
 847         u32 mailbox;
 848         u8 cache_line_size;
 849         struct ipr_interrupt_offsets regs;
 850 };
 851
 852 struct ipr_chip_t {
 853         u16 vendor;
 854         u16 device;
 855         const struct ipr_chip_cfg_t *cfg;
 856 };
 857
 858 enum ipr_shutdown_type {
 859         IPR_SHUTDOWN_NORMAL = 0x00,
 860         IPR_SHUTDOWN_PREPARE_FOR_NORMAL = 0x40,
 861         IPR_SHUTDOWN_ABBREV = 0x80,
 862         IPR_SHUTDOWN_NONE = 0x100
 863 };
 864
 865 struct ipr_trace_entry {
 866         u32 time;
 867
 868         u8 op_code;
 869         u8 type;
 870 #define IPR_TRACE_START                 0x00
 871 #define IPR_TRACE_FINISH                0xff
 872         u16 cmd_index;
 873
 874         __be32 res_handle;
 875         union {
 876                 u32 ioasc;
 877                 u32 add_data;
 878                 u32 res_addr;
 879         } u;
 880 };
 881
 882 struct ipr_sglist {
 883         u32 order;
 884         u32 num_sg;
 885         u32 num_dma_sg;
 886         u32 buffer_len;
 887         struct scatterlist scatterlist[1];
 888 };
 889
 890 enum ipr_sdt_state {
 891         INACTIVE,
 892         WAIT_FOR_DUMP,
 893         GET_DUMP,
 894         ABORT_DUMP,
 895         DUMP_OBTAINED
 896 };
 897
 898 enum ipr_cache_state {
 899         CACHE_NONE,
 900         CACHE_DISABLED,
 901         CACHE_ENABLED,
 902         CACHE_INVALID
 903 };
 904
 905 /* Per-controller data */
 906 struct ipr_ioa_cfg {
 907         char eye_catcher[8];
 908 #define IPR_EYECATCHER                  "iprcfg"
 909
 910         struct list_head queue;
 911
 912         u8 allow_interrupts:1;
 913         u8 in_reset_reload:1;
 914         u8 in_ioa_bringdown:1;
 915         u8 ioa_unit_checked:1;
 916         u8 ioa_is_dead:1;
 917         u8 dump_taken:1;
 918         u8 allow_cmds:1;
 919         u8 allow_ml_add_del:1;
 920
 921         enum ipr_cache_state cache_state;
 922         u16 type; /* CCIN of the card */
 923
 924         u8 log_level;
 925 #define IPR_MAX_LOG_LEVEL                       4
 926 #define IPR_DEFAULT_LOG_LEVEL           2
 927
 928 #define IPR_NUM_TRACE_INDEX_BITS        8
 929 #define IPR_NUM_TRACE_ENTRIES           (1 << IPR_NUM_TRACE_INDEX_BITS)
 930 #define IPR_TRACE_SIZE  (sizeof(struct ipr_trace_entry) * IPR_NUM_TRACE_ENTRIES)
 931         char trace_start[8];
 932 #define IPR_TRACE_START_LABEL                   "trace"
 933         struct ipr_trace_entry *trace;
 934         u32 trace_index:IPR_NUM_TRACE_INDEX_BITS;
 935
 936         /*
 937          * Queue for free command blocks
 938          */
 939         char ipr_free_label[8];
 940 #define IPR_FREEQ_LABEL                 "free-q"
 941         struct list_head free_q;
 942
 943         /*
 944          * Queue for command blocks outstanding to the adapter
 945          */
 946         char ipr_pending_label[8];
 947 #define IPR_PENDQ_LABEL                 "pend-q"
 948         struct list_head pending_q;
 949
 950         char cfg_table_start[8];
 951 #define IPR_CFG_TBL_START               "cfg"
 952         struct ipr_config_table *cfg_table;
 953         dma_addr_t cfg_table_dma;
 954
 955         char resource_table_label[8];
 956 #define IPR_RES_TABLE_LABEL             "res_tbl"
 957         struct ipr_resource_entry *res_entries;
 958         struct list_head free_res_q;
 959         struct list_head used_res_q;
 960
 961         char ipr_hcam_label[8];
 962 #define IPR_HCAM_LABEL                  "hcams"
 963         struct ipr_hostrcb *hostrcb[IPR_NUM_HCAMS];
 964         dma_addr_t hostrcb_dma[IPR_NUM_HCAMS];
 965         struct list_head hostrcb_free_q;
 966         struct list_head hostrcb_pending_q;
 967
 968         __be32 *host_rrq;
 969         dma_addr_t host_rrq_dma;
 970 #define IPR_HRRQ_REQ_RESP_HANDLE_MASK   0xfffffffc
 971 #define IPR_HRRQ_RESP_BIT_SET                   0x00000002
 972 #define IPR_HRRQ_TOGGLE_BIT                             0x00000001
 973 #define IPR_HRRQ_REQ_RESP_HANDLE_SHIFT  2
 974         volatile __be32 *hrrq_start;
 975         volatile __be32 *hrrq_end;
 976         volatile __be32 *hrrq_curr;
 977         volatile u32 toggle_bit;
 978
 979         struct ipr_bus_attributes bus_attr[IPR_MAX_NUM_BUSES];
 980
 981         const struct ipr_chip_cfg_t *chip_cfg;
 982
 983         void __iomem *hdw_dma_regs;     /* iomapped PCI memory space */
 984         unsigned long hdw_dma_regs_pci; /* raw PCI memory space */
 985         void __iomem *ioa_mailbox;
 986         struct ipr_interrupts regs;
 987
 988         u16 saved_pcix_cmd_reg;
 989         u16 reset_retries;
 990
 991         u32 errors_logged;
 992         u32 doorbell;
 993
 994         struct Scsi_Host *host;
 995         struct pci_dev *pdev;
 996         struct ipr_sglist *ucode_sglist;
 997         struct ipr_mode_pages *saved_mode_pages;
 998         u8 saved_mode_page_len;
 999
1000         struct work_struct work_q;
1001
1002         wait_queue_head_t reset_wait_q;
1003
1004         struct ipr_dump *dump;
1005         enum ipr_sdt_state sdt_state;
1006
1007         struct ipr_misc_cbs *vpd_cbs;
1008         dma_addr_t vpd_cbs_dma;
1009
1010         struct pci_pool *ipr_cmd_pool;
1011
1012         struct ipr_cmnd *reset_cmd;
1013
1014         char ipr_cmd_label[8];
1015 #define IPR_CMD_LABEL           "ipr_cmnd"
1016         struct ipr_cmnd *ipr_cmnd_list[IPR_NUM_CMD_BLKS];
1017         u32 ipr_cmnd_list_dma[IPR_NUM_CMD_BLKS];
1018 };
1019
1020 struct ipr_cmnd {
1021         struct ipr_ioarcb ioarcb;
1022         struct ipr_ioasa ioasa;
1023         struct ipr_ioadl_desc ioadl[IPR_NUM_IOADL_ENTRIES];
1024         struct list_head queue;
1025         struct scsi_cmnd *scsi_cmd;
1026         struct completion completion;
1027         struct timer_list timer;
1028         void (*done) (struct ipr_cmnd *);
1029         int (*job_step) (struct ipr_cmnd *);
1030         u16 cmd_index;
1031         u8 sense_buffer[SCSI_SENSE_BUFFERSIZE];
1032         dma_addr_t sense_buffer_dma;
1033         unsigned short dma_use_sg;
1034         dma_addr_t dma_handle;
1035         struct ipr_cmnd *sibling;
1036         union {
1037                 enum ipr_shutdown_type shutdown_type;
1038                 struct ipr_hostrcb *hostrcb;
1039                 unsigned long time_left;
1040                 unsigned long scratch;
1041                 struct ipr_resource_entry *res;
1042                 struct scsi_device *sdev;
1043         } u;
1044
1045         struct ipr_ioa_cfg *ioa_cfg;
1046 };
1047
1048 struct ipr_ses_table_entry {
1049         char product_id[17];
1050         char compare_product_id_byte[17];
1051         u32 max_bus_speed_limit;        /* MB/sec limit for this backplane */
1052 };
1053
1054 struct ipr_dump_header {
1055         u32 eye_catcher;
1056 #define IPR_DUMP_EYE_CATCHER            0xC5D4E3F2
1057         u32 len;
1058         u32 num_entries;
1059         u32 first_entry_offset;
1060         u32 status;
1061 #define IPR_DUMP_STATUS_SUCCESS                 0
1062 #define IPR_DUMP_STATUS_QUAL_SUCCESS            2
1063 #define IPR_DUMP_STATUS_FAILED                  0xffffffff
1064         u32 os;
1065 #define IPR_DUMP_OS_LINUX       0x4C4E5558
1066         u32 driver_name;
1067 #define IPR_DUMP_DRIVER_NAME    0x49505232
1068 }__attribute__((packed, aligned (4)));
1069
1070 struct ipr_dump_entry_header {
1071         u32 eye_catcher;
1072 #define IPR_DUMP_EYE_CATCHER            0xC5D4E3F2
1073         u32 len;
1074         u32 num_elems;
1075         u32 offset;
1076         u32 data_type;
1077 #define IPR_DUMP_DATA_TYPE_ASCII        0x41534349
1078 #define IPR_DUMP_DATA_TYPE_BINARY       0x42494E41
1079         u32 id;
1080 #define IPR_DUMP_IOA_DUMP_ID            0x494F4131
1081 #define IPR_DUMP_LOCATION_ID            0x4C4F4341
1082 #define IPR_DUMP_TRACE_ID               0x54524143
1083 #define IPR_DUMP_DRIVER_VERSION_ID      0x44525652
1084 #define IPR_DUMP_DRIVER_TYPE_ID 0x54595045
1085 #define IPR_DUMP_IOA_CTRL_BLK           0x494F4342
1086 #define IPR_DUMP_PEND_OPS               0x414F5053
1087         u32 status;
1088 }__attribute__((packed, aligned (4)));
1089
1090 struct ipr_dump_location_entry {
1091         struct ipr_dump_entry_header hdr;
1092         u8 location[BUS_ID_SIZE];
1093 }__attribute__((packed));
1094
1095 struct ipr_dump_trace_entry {
1096         struct ipr_dump_entry_header hdr;
1097         u32 trace[IPR_TRACE_SIZE / sizeof(u32)];
1098 }__attribute__((packed, aligned (4)));
1099
1100 struct ipr_dump_version_entry {
1101         struct ipr_dump_entry_header hdr;
1102         u8 version[sizeof(IPR_DRIVER_VERSION)];
1103 };
1104
1105 struct ipr_dump_ioa_type_entry {
1106         struct ipr_dump_entry_header hdr;
1107         u32 type;
1108         u32 fw_version;
1109 };
1110
1111 struct ipr_driver_dump {
1112         struct ipr_dump_header hdr;
1113         struct ipr_dump_version_entry version_entry;
1114         struct ipr_dump_location_entry location_entry;
1115         struct ipr_dump_ioa_type_entry ioa_type_entry;
1116         struct ipr_dump_trace_entry trace_entry;
1117 }__attribute__((packed));
1118
1119 struct ipr_ioa_dump {
1120         struct ipr_dump_entry_header hdr;
1121         struct ipr_sdt sdt;
1122         __be32 *ioa_data[IPR_MAX_NUM_DUMP_PAGES];
1123         u32 reserved;
1124         u32 next_page_index;
1125         u32 page_offset;
1126         u32 format;
1127 #define IPR_SDT_FMT2            2
1128 #define IPR_SDT_UNKNOWN         3
1129 }__attribute__((packed, aligned (4)));
1130
1131 struct ipr_dump {
1132         struct kref kref;
1133         struct ipr_ioa_cfg *ioa_cfg;
1134         struct ipr_driver_dump driver_dump;
1135         struct ipr_ioa_dump ioa_dump;
1136 };
1137
1138 struct ipr_error_table_t {
1139         u32 ioasc;
1140         int log_ioasa;
1141         int log_hcam;
1142         char *error;
1143 };
1144
1145 struct ipr_software_inq_lid_info {
1146         __be32 load_id;
1147         __be32 timestamp[3];
1148 }__attribute__((packed, aligned (4)));
1149
1150 struct ipr_ucode_image_header {
1151         __be32 header_length;
1152         __be32 lid_table_offset;
1153         u8 major_release;
1154         u8 card_type;
1155         u8 minor_release[2];
1156         u8 reserved[20];
1157         char eyecatcher[16];
1158         __be32 num_lids;
1159         struct ipr_software_inq_lid_info lid[1];
1160 }__attribute__((packed, aligned (4)));
1161
1162 /*
1163  * Macros
1164  */
1165 #define IPR_DBG_CMD(CMD) if (ipr_debug) { CMD; }
1166
1167 #ifdef CONFIG_SCSI_IPR_TRACE
1168 #define ipr_create_trace_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1169 #define ipr_remove_trace_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1170 #else
1171 #define ipr_create_trace_file(kobj, attr) 0
1172 #define ipr_remove_trace_file(kobj, attr) do { } while(0)
1173 #endif
1174
1175 #ifdef CONFIG_SCSI_IPR_DUMP
1176 #define ipr_create_dump_file(kobj, attr) sysfs_create_bin_file(kobj, attr)
1177 #define ipr_remove_dump_file(kobj, attr) sysfs_remove_bin_file(kobj, attr)
1178 #else
1179 #define ipr_create_dump_file(kobj, attr) 0
1180 #define ipr_remove_dump_file(kobj, attr) do { } while(0)
1181 #endif
1182
1183 /*
1184  * Error logging macros
1185  */
1186 #define ipr_err(...) printk(KERN_ERR IPR_NAME ": "__VA_ARGS__)
1187 #define ipr_info(...) printk(KERN_INFO IPR_NAME ": "__VA_ARGS__)
1188 #define ipr_crit(...) printk(KERN_CRIT IPR_NAME ": "__VA_ARGS__)
1189 #define ipr_warn(...) printk(KERN_WARNING IPR_NAME": "__VA_ARGS__)
1190 #define ipr_dbg(...) IPR_DBG_CMD(printk(KERN_INFO IPR_NAME ": "__VA_ARGS__))
1191
1192 #define ipr_sdev_printk(level, sdev, fmt, args...) \
1193         sdev_printk(level, sdev, fmt, ## args)
1194
1195 #define ipr_sdev_err(sdev, fmt, ...) \
1196         ipr_sdev_printk(KERN_ERR, sdev, fmt, ##__VA_ARGS__)
1197
1198 #define ipr_sdev_info(sdev, fmt, ...) \
1199         ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__)
1200
1201 #define ipr_sdev_dbg(sdev, fmt, ...) \
1202         IPR_DBG_CMD(ipr_sdev_printk(KERN_INFO, sdev, fmt, ##__VA_ARGS__))
1203
1204 #define ipr_res_printk(level, ioa_cfg, res, fmt, ...) \
1205         printk(level IPR_NAME ": %d:%d:%d:%d: " fmt, ioa_cfg->host->host_no, \
1206                 res.bus, res.target, res.lun, ##__VA_ARGS__)
1207
1208 #define ipr_res_err(ioa_cfg, res, fmt, ...) \
1209         ipr_res_printk(KERN_ERR, ioa_cfg, res, fmt, ##__VA_ARGS__)
1210 #define ipr_res_dbg(ioa_cfg, res, fmt, ...) \
1211         IPR_DBG_CMD(ipr_res_printk(KERN_INFO, ioa_cfg, res, fmt, ##__VA_ARGS__))
1212
1213 #define ipr_phys_res_err(ioa_cfg, res, fmt, ...)                        \
1214 {                                                                       \
1215         if ((res).bus >= IPR_MAX_NUM_BUSES) {                           \
1216                 ipr_err(fmt": unknown\n", ##__VA_ARGS__);               \
1217         } else {                                                        \
1218                 ipr_err(fmt": %d:%d:%d:%d\n",                           \
1219                         ##__VA_ARGS__, (ioa_cfg)->host->host_no,        \
1220                         (res).bus, (res).target, (res).lun);            \
1221         }                                                               \
1222 }
1223
1224 #define ipr_trace ipr_dbg("%s: %s: Line: %d\n",\
1225         __FILE__, __FUNCTION__, __LINE__)
1226
1227 #define ENTER IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Entering %s\n", __FUNCTION__))
1228 #define LEAVE IPR_DBG_CMD(printk(KERN_INFO IPR_NAME": Leaving %s\n", __FUNCTION__))
1229
1230 #define ipr_err_separator \
1231 ipr_err("----------------------------------------------------------\n")
1232
1233
1234 /*
1235  * Inlines
1236  */
1237
1238 /**
1239  * ipr_is_ioa_resource - Determine if a resource is the IOA
1240  * @res:        resource entry struct
1241  *
1242  * Return value:
1243  *      1 if IOA / 0 if not IOA
1244  **/
1245 static inline int ipr_is_ioa_resource(struct ipr_resource_entry *res)
1246 {
1247         return (res->cfgte.flags & IPR_IS_IOA_RESOURCE) ? 1 : 0;
1248 }
1249
1250 /**
1251  * ipr_is_af_dasd_device - Determine if a resource is an AF DASD
1252  * @res:        resource entry struct
1253  *
1254  * Return value:
1255  *      1 if AF DASD / 0 if not AF DASD
1256  **/
1257 static inline int ipr_is_af_dasd_device(struct ipr_resource_entry *res)
1258 {
1259         if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1260             !ipr_is_ioa_resource(res) &&
1261             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_AF_DASD)
1262                 return 1;
1263         else
1264                 return 0;
1265 }
1266
1267 /**
1268  * ipr_is_vset_device - Determine if a resource is a VSET
1269  * @res:        resource entry struct
1270  *
1271  * Return value:
1272  *      1 if VSET / 0 if not VSET
1273  **/
1274 static inline int ipr_is_vset_device(struct ipr_resource_entry *res)
1275 {
1276         if (IPR_IS_DASD_DEVICE(res->cfgte.std_inq_data) &&
1277             !ipr_is_ioa_resource(res) &&
1278             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_VOLUME_SET)
1279                 return 1;
1280         else
1281                 return 0;
1282 }
1283
1284 /**
1285  * ipr_is_gscsi - Determine if a resource is a generic scsi resource
1286  * @res:        resource entry struct
1287  *
1288  * Return value:
1289  *      1 if GSCSI / 0 if not GSCSI
1290  **/
1291 static inline int ipr_is_gscsi(struct ipr_resource_entry *res)
1292 {
1293         if (!ipr_is_ioa_resource(res) &&
1294             IPR_RES_SUBTYPE(res) == IPR_SUBTYPE_GENERIC_SCSI)
1295                 return 1;
1296         else
1297                 return 0;
1298 }
1299
1300 /**
1301  * ipr_is_naca_model - Determine if a resource is using NACA queueing model
1302  * @res:        resource entry struct
1303  *
1304  * Return value:
1305  *      1 if NACA queueing model / 0 if not NACA queueing model
1306  **/
1307 static inline int ipr_is_naca_model(struct ipr_resource_entry *res)
1308 {
1309         if (ipr_is_gscsi(res) && IPR_QUEUEING_MODEL(res) == IPR_QUEUE_NACA_MODEL)
1310                 return 1;
1311         return 0;
1312 }
1313
1314 /**
1315  * ipr_is_device - Determine if resource address is that of a device
1316  * @res_addr:   resource address struct
1317  *
1318  * Return value:
1319  *      1 if AF / 0 if not AF
1320  **/
1321 static inline int ipr_is_device(struct ipr_res_addr *res_addr)
1322 {
1323         if ((res_addr->bus < IPR_MAX_NUM_BUSES) &&
1324             (res_addr->target < IPR_MAX_NUM_TARGETS_PER_BUS))
1325                 return 1;
1326
1327         return 0;
1328 }
1329
1330 /**
1331  * ipr_sdt_is_fmt2 - Determine if a SDT address is in format 2
1332  * @sdt_word:   SDT address
1333  *
1334  * Return value:
1335  *      1 if format 2 / 0 if not
1336  **/
1337 static inline int ipr_sdt_is_fmt2(u32 sdt_word)
1338 {
1339         u32 bar_sel = IPR_GET_FMT2_BAR_SEL(sdt_word);
1340
1341         switch (bar_sel) {
1342         case IPR_SDT_FMT2_BAR0_SEL:
1343         case IPR_SDT_FMT2_BAR1_SEL:
1344         case IPR_SDT_FMT2_BAR2_SEL:
1345         case IPR_SDT_FMT2_BAR3_SEL:
1346         case IPR_SDT_FMT2_BAR4_SEL:
1347         case IPR_SDT_FMT2_BAR5_SEL:
1348         case IPR_SDT_FMT2_EXP_ROM_SEL:
1349                 return 1;
1350         };
1351
1352         return 0;
1353 }
1354
1355 #endif