header cleaning: don't include smp_lock.h when not used
[usb.git] / arch / cris / arch-v32 / kernel / ptrace.c
blobd4d57b74133436a607518e7471318c3c1def3b92
1 /*
2 * Copyright (C) 2000-2003, Axis Communications AB.
3 */
5 #include <linux/kernel.h>
6 #include <linux/sched.h>
7 #include <linux/mm.h>
8 #include <linux/smp.h>
9 #include <linux/errno.h>
10 #include <linux/ptrace.h>
11 #include <linux/user.h>
12 #include <linux/signal.h>
13 #include <linux/security.h>
15 #include <asm/uaccess.h>
16 #include <asm/page.h>
17 #include <asm/pgtable.h>
18 #include <asm/system.h>
19 #include <asm/processor.h>
20 #include <asm/arch/hwregs/supp_reg.h>
23 * Determines which bits in CCS the user has access to.
24 * 1 = access, 0 = no access.
26 #define CCS_MASK 0x00087c00 /* SXNZVC */
28 #define SBIT_USER (1 << (S_CCS_BITNR + CCS_SHIFT))
30 static int put_debugreg(long pid, unsigned int regno, long data);
31 static long get_debugreg(long pid, unsigned int regno);
32 static unsigned long get_pseudo_pc(struct task_struct *child);
33 void deconfigure_bp(long pid);
35 extern unsigned long cris_signal_return_page;
38 * Get contents of register REGNO in task TASK.
40 long get_reg(struct task_struct *task, unsigned int regno)
42 /* USP is a special case, it's not in the pt_regs struct but
43 * in the tasks thread struct
45 unsigned long ret;
47 if (regno <= PT_EDA)
48 ret = ((unsigned long *)task_pt_regs(task))[regno];
49 else if (regno == PT_USP)
50 ret = task->thread.usp;
51 else if (regno == PT_PPC)
52 ret = get_pseudo_pc(task);
53 else if (regno <= PT_MAX)
54 ret = get_debugreg(task->pid, regno);
55 else
56 ret = 0;
58 return ret;
62 * Write contents of register REGNO in task TASK.
64 int put_reg(struct task_struct *task, unsigned int regno, unsigned long data)
66 if (regno <= PT_EDA)
67 ((unsigned long *)task_pt_regs(task))[regno] = data;
68 else if (regno == PT_USP)
69 task->thread.usp = data;
70 else if (regno == PT_PPC) {
71 /* Write pseudo-PC to ERP only if changed. */
72 if (data != get_pseudo_pc(task))
73 task_pt_regs(task)->erp = data;
74 } else if (regno <= PT_MAX)
75 return put_debugreg(task->pid, regno, data);
76 else
77 return -1;
78 return 0;
82 * Called by kernel/ptrace.c when detaching.
84 * Make sure the single step bit is not set.
86 void
87 ptrace_disable(struct task_struct *child)
89 unsigned long tmp;
91 /* Deconfigure SPC and S-bit. */
92 tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
93 put_reg(child, PT_CCS, tmp);
94 put_reg(child, PT_SPC, 0);
96 /* Deconfigure any watchpoints associated with the child. */
97 deconfigure_bp(child->pid);
101 long arch_ptrace(struct task_struct *child, long request, long addr, long data)
103 int ret;
104 unsigned long __user *datap = (unsigned long __user *)data;
106 switch (request) {
107 /* Read word at location address. */
108 case PTRACE_PEEKTEXT:
109 case PTRACE_PEEKDATA: {
110 unsigned long tmp;
111 int copied;
113 ret = -EIO;
115 /* The signal trampoline page is outside the normal user-addressable
116 * space but still accessible. This is hack to make it possible to
117 * access the signal handler code in GDB.
119 if ((addr & PAGE_MASK) == cris_signal_return_page) {
120 /* The trampoline page is globally mapped, no page table to traverse.*/
121 tmp = *(unsigned long*)addr;
122 } else {
123 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
125 if (copied != sizeof(tmp))
126 break;
129 ret = put_user(tmp,datap);
130 break;
133 /* Read the word at location address in the USER area. */
134 case PTRACE_PEEKUSR: {
135 unsigned long tmp;
137 ret = -EIO;
138 if ((addr & 3) || addr < 0 || addr > PT_MAX << 2)
139 break;
141 tmp = get_reg(child, addr >> 2);
142 ret = put_user(tmp, datap);
143 break;
146 /* Write the word at location address. */
147 case PTRACE_POKETEXT:
148 case PTRACE_POKEDATA:
149 ret = 0;
151 if (access_process_vm(child, addr, &data, sizeof(data), 1) == sizeof(data))
152 break;
154 ret = -EIO;
155 break;
157 /* Write the word at location address in the USER area. */
158 case PTRACE_POKEUSR:
159 ret = -EIO;
160 if ((addr & 3) || addr < 0 || addr > PT_MAX << 2)
161 break;
163 addr >>= 2;
165 if (addr == PT_CCS) {
166 /* don't allow the tracing process to change stuff like
167 * interrupt enable, kernel/user bit, dma enables etc.
169 data &= CCS_MASK;
170 data |= get_reg(child, PT_CCS) & ~CCS_MASK;
172 if (put_reg(child, addr, data))
173 break;
174 ret = 0;
175 break;
177 case PTRACE_SYSCALL:
178 case PTRACE_CONT:
179 ret = -EIO;
181 if (!valid_signal(data))
182 break;
184 /* Continue means no single-step. */
185 put_reg(child, PT_SPC, 0);
187 if (!get_debugreg(child->pid, PT_BP_CTRL)) {
188 unsigned long tmp;
189 /* If no h/w bp configured, disable S bit. */
190 tmp = get_reg(child, PT_CCS) & ~SBIT_USER;
191 put_reg(child, PT_CCS, tmp);
194 if (request == PTRACE_SYSCALL) {
195 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
197 else {
198 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
201 child->exit_code = data;
203 /* TODO: make sure any pending breakpoint is killed */
204 wake_up_process(child);
205 ret = 0;
207 break;
209 /* Make the child exit by sending it a sigkill. */
210 case PTRACE_KILL:
211 ret = 0;
213 if (child->exit_state == EXIT_ZOMBIE)
214 break;
216 child->exit_code = SIGKILL;
218 /* Deconfigure single-step and h/w bp. */
219 ptrace_disable(child);
221 /* TODO: make sure any pending breakpoint is killed */
222 wake_up_process(child);
223 break;
225 /* Set the trap flag. */
226 case PTRACE_SINGLESTEP: {
227 unsigned long tmp;
228 ret = -EIO;
230 /* Set up SPC if not set already (in which case we have
231 no other choice but to trust it). */
232 if (!get_reg(child, PT_SPC)) {
233 /* In case we're stopped in a delay slot. */
234 tmp = get_reg(child, PT_ERP) & ~1;
235 put_reg(child, PT_SPC, tmp);
237 tmp = get_reg(child, PT_CCS) | SBIT_USER;
238 put_reg(child, PT_CCS, tmp);
240 if (!valid_signal(data))
241 break;
243 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
245 /* TODO: set some clever breakpoint mechanism... */
247 child->exit_code = data;
248 wake_up_process(child);
249 ret = 0;
250 break;
253 case PTRACE_DETACH:
254 ret = ptrace_detach(child, data);
255 break;
257 /* Get all GP registers from the child. */
258 case PTRACE_GETREGS: {
259 int i;
260 unsigned long tmp;
262 for (i = 0; i <= PT_MAX; i++) {
263 tmp = get_reg(child, i);
265 if (put_user(tmp, datap)) {
266 ret = -EFAULT;
267 goto out_tsk;
270 datap++;
273 ret = 0;
274 break;
277 /* Set all GP registers in the child. */
278 case PTRACE_SETREGS: {
279 int i;
280 unsigned long tmp;
282 for (i = 0; i <= PT_MAX; i++) {
283 if (get_user(tmp, datap)) {
284 ret = -EFAULT;
285 goto out_tsk;
288 if (i == PT_CCS) {
289 tmp &= CCS_MASK;
290 tmp |= get_reg(child, PT_CCS) & ~CCS_MASK;
293 put_reg(child, i, tmp);
294 datap++;
297 ret = 0;
298 break;
301 default:
302 ret = ptrace_request(child, request, addr, data);
303 break;
306 return ret;
309 void do_syscall_trace(void)
311 if (!test_thread_flag(TIF_SYSCALL_TRACE))
312 return;
314 if (!(current->ptrace & PT_PTRACED))
315 return;
317 /* the 0x80 provides a way for the tracing parent to distinguish
318 between a syscall stop and SIGTRAP delivery */
319 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
320 ? 0x80 : 0));
323 * This isn't the same as continuing with a signal, but it will do for
324 * normal use.
326 if (current->exit_code) {
327 send_sig(current->exit_code, current, 1);
328 current->exit_code = 0;
332 /* Returns the size of an instruction that has a delay slot. */
334 static int insn_size(struct task_struct *child, unsigned long pc)
336 unsigned long opcode;
337 int copied;
338 int opsize = 0;
340 /* Read the opcode at pc (do what PTRACE_PEEKTEXT would do). */
341 copied = access_process_vm(child, pc, &opcode, sizeof(opcode), 0);
342 if (copied != sizeof(opcode))
343 return 0;
345 switch ((opcode & 0x0f00) >> 8) {
346 case 0x0:
347 case 0x9:
348 case 0xb:
349 opsize = 2;
350 break;
351 case 0xe:
352 case 0xf:
353 opsize = 6;
354 break;
355 case 0xd:
356 /* Could be 4 or 6; check more bits. */
357 if ((opcode & 0xff) == 0xff)
358 opsize = 4;
359 else
360 opsize = 6;
361 break;
362 default:
363 panic("ERROR: Couldn't find size of opcode 0x%lx at 0x%lx\n",
364 opcode, pc);
367 return opsize;
370 static unsigned long get_pseudo_pc(struct task_struct *child)
372 /* Default value for PC is ERP. */
373 unsigned long pc = get_reg(child, PT_ERP);
375 if (pc & 0x1) {
376 unsigned long spc = get_reg(child, PT_SPC);
377 /* Delay slot bit set. Report as stopped on proper
378 instruction. */
379 if (spc) {
380 /* Rely on SPC if set. FIXME: We might want to check
381 that EXS indicates we stopped due to a single-step
382 exception. */
383 pc = spc;
384 } else {
385 /* Calculate the PC from the size of the instruction
386 that the delay slot we're in belongs to. */
387 pc += insn_size(child, pc & ~1) - 1;
390 return pc;
393 static long bp_owner = 0;
395 /* Reachable from exit_thread in signal.c, so not static. */
396 void deconfigure_bp(long pid)
398 int bp;
400 /* Only deconfigure if the pid is the owner. */
401 if (bp_owner != pid)
402 return;
404 for (bp = 0; bp < 6; bp++) {
405 unsigned long tmp;
406 /* Deconfigure start and end address (also gets rid of ownership). */
407 put_debugreg(pid, PT_BP + 3 + (bp * 2), 0);
408 put_debugreg(pid, PT_BP + 4 + (bp * 2), 0);
410 /* Deconfigure relevant bits in control register. */
411 tmp = get_debugreg(pid, PT_BP_CTRL) & ~(3 << (2 + (bp * 4)));
412 put_debugreg(pid, PT_BP_CTRL, tmp);
414 /* No owner now. */
415 bp_owner = 0;
418 static int put_debugreg(long pid, unsigned int regno, long data)
420 int ret = 0;
421 register int old_srs;
423 #ifdef CONFIG_ETRAX_KGDB
424 /* Ignore write, but pretend it was ok if value is 0
425 (we don't want POKEUSR/SETREGS failing unnessecarily). */
426 return (data == 0) ? ret : -1;
427 #endif
429 /* Simple owner management. */
430 if (!bp_owner)
431 bp_owner = pid;
432 else if (bp_owner != pid) {
433 /* Ignore write, but pretend it was ok if value is 0
434 (we don't want POKEUSR/SETREGS failing unnessecarily). */
435 return (data == 0) ? ret : -1;
438 /* Remember old SRS. */
439 SPEC_REG_RD(SPEC_REG_SRS, old_srs);
440 /* Switch to BP bank. */
441 SUPP_BANK_SEL(BANK_BP);
443 switch (regno - PT_BP) {
444 case 0:
445 SUPP_REG_WR(0, data); break;
446 case 1:
447 case 2:
448 if (data)
449 ret = -1;
450 break;
451 case 3:
452 SUPP_REG_WR(3, data); break;
453 case 4:
454 SUPP_REG_WR(4, data); break;
455 case 5:
456 SUPP_REG_WR(5, data); break;
457 case 6:
458 SUPP_REG_WR(6, data); break;
459 case 7:
460 SUPP_REG_WR(7, data); break;
461 case 8:
462 SUPP_REG_WR(8, data); break;
463 case 9:
464 SUPP_REG_WR(9, data); break;
465 case 10:
466 SUPP_REG_WR(10, data); break;
467 case 11:
468 SUPP_REG_WR(11, data); break;
469 case 12:
470 SUPP_REG_WR(12, data); break;
471 case 13:
472 SUPP_REG_WR(13, data); break;
473 case 14:
474 SUPP_REG_WR(14, data); break;
475 default:
476 ret = -1;
477 break;
480 /* Restore SRS. */
481 SPEC_REG_WR(SPEC_REG_SRS, old_srs);
482 /* Just for show. */
483 NOP();
484 NOP();
485 NOP();
487 return ret;
490 static long get_debugreg(long pid, unsigned int regno)
492 register int old_srs;
493 register long data;
495 if (pid != bp_owner) {
496 return 0;
499 /* Remember old SRS. */
500 SPEC_REG_RD(SPEC_REG_SRS, old_srs);
501 /* Switch to BP bank. */
502 SUPP_BANK_SEL(BANK_BP);
504 switch (regno - PT_BP) {
505 case 0:
506 SUPP_REG_RD(0, data); break;
507 case 1:
508 case 2:
509 /* error return value? */
510 data = 0;
511 break;
512 case 3:
513 SUPP_REG_RD(3, data); break;
514 case 4:
515 SUPP_REG_RD(4, data); break;
516 case 5:
517 SUPP_REG_RD(5, data); break;
518 case 6:
519 SUPP_REG_RD(6, data); break;
520 case 7:
521 SUPP_REG_RD(7, data); break;
522 case 8:
523 SUPP_REG_RD(8, data); break;
524 case 9:
525 SUPP_REG_RD(9, data); break;
526 case 10:
527 SUPP_REG_RD(10, data); break;
528 case 11:
529 SUPP_REG_RD(11, data); break;
530 case 12:
531 SUPP_REG_RD(12, data); break;
532 case 13:
533 SUPP_REG_RD(13, data); break;
534 case 14:
535 SUPP_REG_RD(14, data); break;
536 default:
537 /* error return value? */
538 data = 0;
541 /* Restore SRS. */
542 SPEC_REG_WR(SPEC_REG_SRS, old_srs);
543 /* Just for show. */
544 NOP();
545 NOP();
546 NOP();
548 return data;