2 * Kernel-based Virtual Machine driver for Linux
4 * This module enables machines with Intel VT-x extensions to run virtual
5 * machines without emulation or binary translation.
7 * Copyright (C) 2006 Qumranet, Inc.
10 * Avi Kivity <avi@qumranet.com>
11 * Yaniv Kamay <yaniv@qumranet.com>
13 * This work is licensed under the terms of the GNU GPL, version 2. See
14 * the COPYING file in the top-level directory.
21 #include <linux/module.h>
23 #include <linux/highmem.h>
24 #include <linux/profile.h>
28 #include "segment_descriptor.h"
30 MODULE_AUTHOR("Qumranet");
31 MODULE_LICENSE("GPL");
33 static DEFINE_PER_CPU(struct vmcs
*, vmxarea
);
34 static DEFINE_PER_CPU(struct vmcs
*, current_vmcs
);
42 static struct vmcs_descriptor
{
48 #define VMX_SEGMENT_FIELD(seg) \
49 [VCPU_SREG_##seg] = { \
50 .selector = GUEST_##seg##_SELECTOR, \
51 .base = GUEST_##seg##_BASE, \
52 .limit = GUEST_##seg##_LIMIT, \
53 .ar_bytes = GUEST_##seg##_AR_BYTES, \
56 static struct kvm_vmx_segment_field
{
61 } kvm_vmx_segment_fields
[] = {
62 VMX_SEGMENT_FIELD(CS
),
63 VMX_SEGMENT_FIELD(DS
),
64 VMX_SEGMENT_FIELD(ES
),
65 VMX_SEGMENT_FIELD(FS
),
66 VMX_SEGMENT_FIELD(GS
),
67 VMX_SEGMENT_FIELD(SS
),
68 VMX_SEGMENT_FIELD(TR
),
69 VMX_SEGMENT_FIELD(LDTR
),
72 static const u32 vmx_msr_index
[] = {
74 MSR_SYSCALL_MASK
, MSR_LSTAR
, MSR_CSTAR
, MSR_KERNEL_GS_BASE
,
76 MSR_EFER
, MSR_K6_STAR
,
78 #define NR_VMX_MSR (sizeof(vmx_msr_index) / sizeof(*vmx_msr_index))
80 static inline int is_page_fault(u32 intr_info
)
82 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
|
83 INTR_INFO_VALID_MASK
)) ==
84 (INTR_TYPE_EXCEPTION
| PF_VECTOR
| INTR_INFO_VALID_MASK
);
87 static inline int is_external_interrupt(u32 intr_info
)
89 return (intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VALID_MASK
))
90 == (INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
93 static struct vmx_msr_entry
*find_msr_entry(struct kvm_vcpu
*vcpu
, u32 msr
)
97 for (i
= 0; i
< vcpu
->nmsrs
; ++i
)
98 if (vcpu
->guest_msrs
[i
].index
== msr
)
99 return &vcpu
->guest_msrs
[i
];
103 static void vmcs_clear(struct vmcs
*vmcs
)
105 u64 phys_addr
= __pa(vmcs
);
108 asm volatile (ASM_VMX_VMCLEAR_RAX
"; setna %0"
109 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
112 printk(KERN_ERR
"kvm: vmclear fail: %p/%llx\n",
116 static void __vcpu_clear(void *arg
)
118 struct kvm_vcpu
*vcpu
= arg
;
119 int cpu
= raw_smp_processor_id();
121 if (vcpu
->cpu
== cpu
)
122 vmcs_clear(vcpu
->vmcs
);
123 if (per_cpu(current_vmcs
, cpu
) == vcpu
->vmcs
)
124 per_cpu(current_vmcs
, cpu
) = NULL
;
127 static void vcpu_clear(struct kvm_vcpu
*vcpu
)
129 if (vcpu
->cpu
!= raw_smp_processor_id() && vcpu
->cpu
!= -1)
130 smp_call_function_single(vcpu
->cpu
, __vcpu_clear
, vcpu
, 0, 1);
136 static unsigned long vmcs_readl(unsigned long field
)
140 asm volatile (ASM_VMX_VMREAD_RDX_RAX
141 : "=a"(value
) : "d"(field
) : "cc");
145 static u16
vmcs_read16(unsigned long field
)
147 return vmcs_readl(field
);
150 static u32
vmcs_read32(unsigned long field
)
152 return vmcs_readl(field
);
155 static u64
vmcs_read64(unsigned long field
)
158 return vmcs_readl(field
);
160 return vmcs_readl(field
) | ((u64
)vmcs_readl(field
+1) << 32);
164 static noinline
void vmwrite_error(unsigned long field
, unsigned long value
)
166 printk(KERN_ERR
"vmwrite error: reg %lx value %lx (err %d)\n",
167 field
, value
, vmcs_read32(VM_INSTRUCTION_ERROR
));
171 static void vmcs_writel(unsigned long field
, unsigned long value
)
175 asm volatile (ASM_VMX_VMWRITE_RAX_RDX
"; setna %0"
176 : "=q"(error
) : "a"(value
), "d"(field
) : "cc" );
178 vmwrite_error(field
, value
);
181 static void vmcs_write16(unsigned long field
, u16 value
)
183 vmcs_writel(field
, value
);
186 static void vmcs_write32(unsigned long field
, u32 value
)
188 vmcs_writel(field
, value
);
191 static void vmcs_write64(unsigned long field
, u64 value
)
194 vmcs_writel(field
, value
);
196 vmcs_writel(field
, value
);
198 vmcs_writel(field
+1, value
>> 32);
203 * Switches to specified vcpu, until a matching vcpu_put(), but assumes
204 * vcpu mutex is already taken.
206 static struct kvm_vcpu
*vmx_vcpu_load(struct kvm_vcpu
*vcpu
)
208 u64 phys_addr
= __pa(vcpu
->vmcs
);
213 if (vcpu
->cpu
!= cpu
)
216 if (per_cpu(current_vmcs
, cpu
) != vcpu
->vmcs
) {
219 per_cpu(current_vmcs
, cpu
) = vcpu
->vmcs
;
220 asm volatile (ASM_VMX_VMPTRLD_RAX
"; setna %0"
221 : "=g"(error
) : "a"(&phys_addr
), "m"(phys_addr
)
224 printk(KERN_ERR
"kvm: vmptrld %p/%llx fail\n",
225 vcpu
->vmcs
, phys_addr
);
228 if (vcpu
->cpu
!= cpu
) {
229 struct descriptor_table dt
;
230 unsigned long sysenter_esp
;
234 * Linux uses per-cpu TSS and GDT, so set these when switching
237 vmcs_writel(HOST_TR_BASE
, read_tr_base()); /* 22.2.4 */
239 vmcs_writel(HOST_GDTR_BASE
, dt
.base
); /* 22.2.4 */
241 rdmsrl(MSR_IA32_SYSENTER_ESP
, sysenter_esp
);
242 vmcs_writel(HOST_IA32_SYSENTER_ESP
, sysenter_esp
); /* 22.2.3 */
247 static void vmx_vcpu_put(struct kvm_vcpu
*vcpu
)
252 static void vmx_vcpu_decache(struct kvm_vcpu
*vcpu
)
257 static unsigned long vmx_get_rflags(struct kvm_vcpu
*vcpu
)
259 return vmcs_readl(GUEST_RFLAGS
);
262 static void vmx_set_rflags(struct kvm_vcpu
*vcpu
, unsigned long rflags
)
264 vmcs_writel(GUEST_RFLAGS
, rflags
);
267 static void skip_emulated_instruction(struct kvm_vcpu
*vcpu
)
270 u32 interruptibility
;
272 rip
= vmcs_readl(GUEST_RIP
);
273 rip
+= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
274 vmcs_writel(GUEST_RIP
, rip
);
277 * We emulated an instruction, so temporary interrupt blocking
278 * should be removed, if set.
280 interruptibility
= vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
);
281 if (interruptibility
& 3)
282 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
,
283 interruptibility
& ~3);
284 vcpu
->interrupt_window_open
= 1;
287 static void vmx_inject_gp(struct kvm_vcpu
*vcpu
, unsigned error_code
)
289 printk(KERN_DEBUG
"inject_general_protection: rip 0x%lx\n",
290 vmcs_readl(GUEST_RIP
));
291 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, error_code
);
292 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
294 INTR_TYPE_EXCEPTION
|
295 INTR_INFO_DELIEVER_CODE_MASK
|
296 INTR_INFO_VALID_MASK
);
300 * reads and returns guest's timestamp counter "register"
301 * guest_tsc = host_tsc + tsc_offset -- 21.3
303 static u64
guest_read_tsc(void)
305 u64 host_tsc
, tsc_offset
;
308 tsc_offset
= vmcs_read64(TSC_OFFSET
);
309 return host_tsc
+ tsc_offset
;
313 * writes 'guest_tsc' into guest's timestamp counter "register"
314 * guest_tsc = host_tsc + tsc_offset ==> tsc_offset = guest_tsc - host_tsc
316 static void guest_write_tsc(u64 guest_tsc
)
321 vmcs_write64(TSC_OFFSET
, guest_tsc
- host_tsc
);
324 static void reload_tss(void)
326 #ifndef CONFIG_X86_64
329 * VT restores TR but not its size. Useless.
331 struct descriptor_table gdt
;
332 struct segment_descriptor
*descs
;
335 descs
= (void *)gdt
.base
;
336 descs
[GDT_ENTRY_TSS
].type
= 9; /* available TSS */
342 * Reads an msr value (of 'msr_index') into 'pdata'.
343 * Returns 0 on success, non-0 otherwise.
344 * Assumes vcpu_load() was already called.
346 static int vmx_get_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64
*pdata
)
349 struct vmx_msr_entry
*msr
;
352 printk(KERN_ERR
"BUG: get_msr called with NULL pdata\n");
359 data
= vmcs_readl(GUEST_FS_BASE
);
362 data
= vmcs_readl(GUEST_GS_BASE
);
365 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
367 case MSR_IA32_TIME_STAMP_COUNTER
:
368 data
= guest_read_tsc();
370 case MSR_IA32_SYSENTER_CS
:
371 data
= vmcs_read32(GUEST_SYSENTER_CS
);
373 case MSR_IA32_SYSENTER_EIP
:
374 data
= vmcs_read32(GUEST_SYSENTER_EIP
);
376 case MSR_IA32_SYSENTER_ESP
:
377 data
= vmcs_read32(GUEST_SYSENTER_ESP
);
380 msr
= find_msr_entry(vcpu
, msr_index
);
385 return kvm_get_msr_common(vcpu
, msr_index
, pdata
);
393 * Writes msr value into into the appropriate "register".
394 * Returns 0 on success, non-0 otherwise.
395 * Assumes vcpu_load() was already called.
397 static int vmx_set_msr(struct kvm_vcpu
*vcpu
, u32 msr_index
, u64 data
)
399 struct vmx_msr_entry
*msr
;
403 return kvm_set_msr_common(vcpu
, msr_index
, data
);
405 vmcs_writel(GUEST_FS_BASE
, data
);
408 vmcs_writel(GUEST_GS_BASE
, data
);
411 case MSR_IA32_SYSENTER_CS
:
412 vmcs_write32(GUEST_SYSENTER_CS
, data
);
414 case MSR_IA32_SYSENTER_EIP
:
415 vmcs_write32(GUEST_SYSENTER_EIP
, data
);
417 case MSR_IA32_SYSENTER_ESP
:
418 vmcs_write32(GUEST_SYSENTER_ESP
, data
);
420 case MSR_IA32_TIME_STAMP_COUNTER
:
421 guest_write_tsc(data
);
424 msr
= find_msr_entry(vcpu
, msr_index
);
429 return kvm_set_msr_common(vcpu
, msr_index
, data
);
438 * Sync the rsp and rip registers into the vcpu structure. This allows
439 * registers to be accessed by indexing vcpu->regs.
441 static void vcpu_load_rsp_rip(struct kvm_vcpu
*vcpu
)
443 vcpu
->regs
[VCPU_REGS_RSP
] = vmcs_readl(GUEST_RSP
);
444 vcpu
->rip
= vmcs_readl(GUEST_RIP
);
448 * Syncs rsp and rip back into the vmcs. Should be called after possible
451 static void vcpu_put_rsp_rip(struct kvm_vcpu
*vcpu
)
453 vmcs_writel(GUEST_RSP
, vcpu
->regs
[VCPU_REGS_RSP
]);
454 vmcs_writel(GUEST_RIP
, vcpu
->rip
);
457 static int set_guest_debug(struct kvm_vcpu
*vcpu
, struct kvm_debug_guest
*dbg
)
459 unsigned long dr7
= 0x400;
460 u32 exception_bitmap
;
463 exception_bitmap
= vmcs_read32(EXCEPTION_BITMAP
);
464 old_singlestep
= vcpu
->guest_debug
.singlestep
;
466 vcpu
->guest_debug
.enabled
= dbg
->enabled
;
467 if (vcpu
->guest_debug
.enabled
) {
470 dr7
|= 0x200; /* exact */
471 for (i
= 0; i
< 4; ++i
) {
472 if (!dbg
->breakpoints
[i
].enabled
)
474 vcpu
->guest_debug
.bp
[i
] = dbg
->breakpoints
[i
].address
;
475 dr7
|= 2 << (i
*2); /* global enable */
476 dr7
|= 0 << (i
*4+16); /* execution breakpoint */
479 exception_bitmap
|= (1u << 1); /* Trap debug exceptions */
481 vcpu
->guest_debug
.singlestep
= dbg
->singlestep
;
483 exception_bitmap
&= ~(1u << 1); /* Ignore debug exceptions */
484 vcpu
->guest_debug
.singlestep
= 0;
487 if (old_singlestep
&& !vcpu
->guest_debug
.singlestep
) {
490 flags
= vmcs_readl(GUEST_RFLAGS
);
491 flags
&= ~(X86_EFLAGS_TF
| X86_EFLAGS_RF
);
492 vmcs_writel(GUEST_RFLAGS
, flags
);
495 vmcs_write32(EXCEPTION_BITMAP
, exception_bitmap
);
496 vmcs_writel(GUEST_DR7
, dr7
);
501 static __init
int cpu_has_kvm_support(void)
503 unsigned long ecx
= cpuid_ecx(1);
504 return test_bit(5, &ecx
); /* CPUID.1:ECX.VMX[bit 5] -> VT */
507 static __init
int vmx_disabled_by_bios(void)
511 rdmsrl(MSR_IA32_FEATURE_CONTROL
, msr
);
512 return (msr
& 5) == 1; /* locked but not enabled */
515 static void hardware_enable(void *garbage
)
517 int cpu
= raw_smp_processor_id();
518 u64 phys_addr
= __pa(per_cpu(vmxarea
, cpu
));
521 rdmsrl(MSR_IA32_FEATURE_CONTROL
, old
);
523 /* enable and lock */
524 wrmsrl(MSR_IA32_FEATURE_CONTROL
, old
| 5);
525 write_cr4(read_cr4() | CR4_VMXE
); /* FIXME: not cpu hotplug safe */
526 asm volatile (ASM_VMX_VMXON_RAX
: : "a"(&phys_addr
), "m"(phys_addr
)
530 static void hardware_disable(void *garbage
)
532 asm volatile (ASM_VMX_VMXOFF
: : : "cc");
535 static __init
void setup_vmcs_descriptor(void)
537 u32 vmx_msr_low
, vmx_msr_high
;
539 rdmsr(MSR_IA32_VMX_BASIC
, vmx_msr_low
, vmx_msr_high
);
540 vmcs_descriptor
.size
= vmx_msr_high
& 0x1fff;
541 vmcs_descriptor
.order
= get_order(vmcs_descriptor
.size
);
542 vmcs_descriptor
.revision_id
= vmx_msr_low
;
545 static struct vmcs
*alloc_vmcs_cpu(int cpu
)
547 int node
= cpu_to_node(cpu
);
551 pages
= alloc_pages_node(node
, GFP_KERNEL
, vmcs_descriptor
.order
);
554 vmcs
= page_address(pages
);
555 memset(vmcs
, 0, vmcs_descriptor
.size
);
556 vmcs
->revision_id
= vmcs_descriptor
.revision_id
; /* vmcs revision id */
560 static struct vmcs
*alloc_vmcs(void)
562 return alloc_vmcs_cpu(raw_smp_processor_id());
565 static void free_vmcs(struct vmcs
*vmcs
)
567 free_pages((unsigned long)vmcs
, vmcs_descriptor
.order
);
570 static __exit
void free_kvm_area(void)
574 for_each_online_cpu(cpu
)
575 free_vmcs(per_cpu(vmxarea
, cpu
));
578 extern struct vmcs
*alloc_vmcs_cpu(int cpu
);
580 static __init
int alloc_kvm_area(void)
584 for_each_online_cpu(cpu
) {
587 vmcs
= alloc_vmcs_cpu(cpu
);
593 per_cpu(vmxarea
, cpu
) = vmcs
;
598 static __init
int hardware_setup(void)
600 setup_vmcs_descriptor();
601 return alloc_kvm_area();
604 static __exit
void hardware_unsetup(void)
609 static void update_exception_bitmap(struct kvm_vcpu
*vcpu
)
611 if (vcpu
->rmode
.active
)
612 vmcs_write32(EXCEPTION_BITMAP
, ~0);
614 vmcs_write32(EXCEPTION_BITMAP
, 1 << PF_VECTOR
);
617 static void fix_pmode_dataseg(int seg
, struct kvm_save_segment
*save
)
619 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
621 if (vmcs_readl(sf
->base
) == save
->base
) {
622 vmcs_write16(sf
->selector
, save
->selector
);
623 vmcs_writel(sf
->base
, save
->base
);
624 vmcs_write32(sf
->limit
, save
->limit
);
625 vmcs_write32(sf
->ar_bytes
, save
->ar
);
627 u32 dpl
= (vmcs_read16(sf
->selector
) & SELECTOR_RPL_MASK
)
629 vmcs_write32(sf
->ar_bytes
, 0x93 | dpl
);
633 static void enter_pmode(struct kvm_vcpu
*vcpu
)
637 vcpu
->rmode
.active
= 0;
639 vmcs_writel(GUEST_TR_BASE
, vcpu
->rmode
.tr
.base
);
640 vmcs_write32(GUEST_TR_LIMIT
, vcpu
->rmode
.tr
.limit
);
641 vmcs_write32(GUEST_TR_AR_BYTES
, vcpu
->rmode
.tr
.ar
);
643 flags
= vmcs_readl(GUEST_RFLAGS
);
644 flags
&= ~(IOPL_MASK
| X86_EFLAGS_VM
);
645 flags
|= (vcpu
->rmode
.save_iopl
<< IOPL_SHIFT
);
646 vmcs_writel(GUEST_RFLAGS
, flags
);
648 vmcs_writel(GUEST_CR4
, (vmcs_readl(GUEST_CR4
) & ~CR4_VME_MASK
) |
649 (vmcs_readl(CR4_READ_SHADOW
) & CR4_VME_MASK
));
651 update_exception_bitmap(vcpu
);
653 fix_pmode_dataseg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
654 fix_pmode_dataseg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
655 fix_pmode_dataseg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
656 fix_pmode_dataseg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
658 vmcs_write16(GUEST_SS_SELECTOR
, 0);
659 vmcs_write32(GUEST_SS_AR_BYTES
, 0x93);
661 vmcs_write16(GUEST_CS_SELECTOR
,
662 vmcs_read16(GUEST_CS_SELECTOR
) & ~SELECTOR_RPL_MASK
);
663 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
666 static int rmode_tss_base(struct kvm
* kvm
)
668 gfn_t base_gfn
= kvm
->memslots
[0].base_gfn
+ kvm
->memslots
[0].npages
- 3;
669 return base_gfn
<< PAGE_SHIFT
;
672 static void fix_rmode_seg(int seg
, struct kvm_save_segment
*save
)
674 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
676 save
->selector
= vmcs_read16(sf
->selector
);
677 save
->base
= vmcs_readl(sf
->base
);
678 save
->limit
= vmcs_read32(sf
->limit
);
679 save
->ar
= vmcs_read32(sf
->ar_bytes
);
680 vmcs_write16(sf
->selector
, vmcs_readl(sf
->base
) >> 4);
681 vmcs_write32(sf
->limit
, 0xffff);
682 vmcs_write32(sf
->ar_bytes
, 0xf3);
685 static void enter_rmode(struct kvm_vcpu
*vcpu
)
689 vcpu
->rmode
.active
= 1;
691 vcpu
->rmode
.tr
.base
= vmcs_readl(GUEST_TR_BASE
);
692 vmcs_writel(GUEST_TR_BASE
, rmode_tss_base(vcpu
->kvm
));
694 vcpu
->rmode
.tr
.limit
= vmcs_read32(GUEST_TR_LIMIT
);
695 vmcs_write32(GUEST_TR_LIMIT
, RMODE_TSS_SIZE
- 1);
697 vcpu
->rmode
.tr
.ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
698 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
700 flags
= vmcs_readl(GUEST_RFLAGS
);
701 vcpu
->rmode
.save_iopl
= (flags
& IOPL_MASK
) >> IOPL_SHIFT
;
703 flags
|= IOPL_MASK
| X86_EFLAGS_VM
;
705 vmcs_writel(GUEST_RFLAGS
, flags
);
706 vmcs_writel(GUEST_CR4
, vmcs_readl(GUEST_CR4
) | CR4_VME_MASK
);
707 update_exception_bitmap(vcpu
);
709 vmcs_write16(GUEST_SS_SELECTOR
, vmcs_readl(GUEST_SS_BASE
) >> 4);
710 vmcs_write32(GUEST_SS_LIMIT
, 0xffff);
711 vmcs_write32(GUEST_SS_AR_BYTES
, 0xf3);
713 vmcs_write32(GUEST_CS_AR_BYTES
, 0xf3);
714 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
715 vmcs_write16(GUEST_CS_SELECTOR
, vmcs_readl(GUEST_CS_BASE
) >> 4);
717 fix_rmode_seg(VCPU_SREG_ES
, &vcpu
->rmode
.es
);
718 fix_rmode_seg(VCPU_SREG_DS
, &vcpu
->rmode
.ds
);
719 fix_rmode_seg(VCPU_SREG_GS
, &vcpu
->rmode
.gs
);
720 fix_rmode_seg(VCPU_SREG_FS
, &vcpu
->rmode
.fs
);
725 static void enter_lmode(struct kvm_vcpu
*vcpu
)
729 guest_tr_ar
= vmcs_read32(GUEST_TR_AR_BYTES
);
730 if ((guest_tr_ar
& AR_TYPE_MASK
) != AR_TYPE_BUSY_64_TSS
) {
731 printk(KERN_DEBUG
"%s: tss fixup for long mode. \n",
733 vmcs_write32(GUEST_TR_AR_BYTES
,
734 (guest_tr_ar
& ~AR_TYPE_MASK
)
735 | AR_TYPE_BUSY_64_TSS
);
738 vcpu
->shadow_efer
|= EFER_LMA
;
740 find_msr_entry(vcpu
, MSR_EFER
)->data
|= EFER_LMA
| EFER_LME
;
741 vmcs_write32(VM_ENTRY_CONTROLS
,
742 vmcs_read32(VM_ENTRY_CONTROLS
)
743 | VM_ENTRY_CONTROLS_IA32E_MASK
);
746 static void exit_lmode(struct kvm_vcpu
*vcpu
)
748 vcpu
->shadow_efer
&= ~EFER_LMA
;
750 vmcs_write32(VM_ENTRY_CONTROLS
,
751 vmcs_read32(VM_ENTRY_CONTROLS
)
752 & ~VM_ENTRY_CONTROLS_IA32E_MASK
);
757 static void vmx_decache_cr0_cr4_guest_bits(struct kvm_vcpu
*vcpu
)
759 vcpu
->cr0
&= KVM_GUEST_CR0_MASK
;
760 vcpu
->cr0
|= vmcs_readl(GUEST_CR0
) & ~KVM_GUEST_CR0_MASK
;
762 vcpu
->cr4
&= KVM_GUEST_CR4_MASK
;
763 vcpu
->cr4
|= vmcs_readl(GUEST_CR4
) & ~KVM_GUEST_CR4_MASK
;
766 static void vmx_set_cr0(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
768 if (vcpu
->rmode
.active
&& (cr0
& CR0_PE_MASK
))
771 if (!vcpu
->rmode
.active
&& !(cr0
& CR0_PE_MASK
))
775 if (vcpu
->shadow_efer
& EFER_LME
) {
776 if (!is_paging(vcpu
) && (cr0
& CR0_PG_MASK
))
778 if (is_paging(vcpu
) && !(cr0
& CR0_PG_MASK
))
783 vmcs_writel(CR0_READ_SHADOW
, cr0
);
784 vmcs_writel(GUEST_CR0
,
785 (cr0
& ~KVM_GUEST_CR0_MASK
) | KVM_VM_CR0_ALWAYS_ON
);
790 * Used when restoring the VM to avoid corrupting segment registers
792 static void vmx_set_cr0_no_modeswitch(struct kvm_vcpu
*vcpu
, unsigned long cr0
)
794 vcpu
->rmode
.active
= ((cr0
& CR0_PE_MASK
) == 0);
795 update_exception_bitmap(vcpu
);
796 vmcs_writel(CR0_READ_SHADOW
, cr0
);
797 vmcs_writel(GUEST_CR0
,
798 (cr0
& ~KVM_GUEST_CR0_MASK
) | KVM_VM_CR0_ALWAYS_ON
);
802 static void vmx_set_cr3(struct kvm_vcpu
*vcpu
, unsigned long cr3
)
804 vmcs_writel(GUEST_CR3
, cr3
);
807 static void vmx_set_cr4(struct kvm_vcpu
*vcpu
, unsigned long cr4
)
809 vmcs_writel(CR4_READ_SHADOW
, cr4
);
810 vmcs_writel(GUEST_CR4
, cr4
| (vcpu
->rmode
.active
?
811 KVM_RMODE_VM_CR4_ALWAYS_ON
: KVM_PMODE_VM_CR4_ALWAYS_ON
));
817 static void vmx_set_efer(struct kvm_vcpu
*vcpu
, u64 efer
)
819 struct vmx_msr_entry
*msr
= find_msr_entry(vcpu
, MSR_EFER
);
821 vcpu
->shadow_efer
= efer
;
822 if (efer
& EFER_LMA
) {
823 vmcs_write32(VM_ENTRY_CONTROLS
,
824 vmcs_read32(VM_ENTRY_CONTROLS
) |
825 VM_ENTRY_CONTROLS_IA32E_MASK
);
829 vmcs_write32(VM_ENTRY_CONTROLS
,
830 vmcs_read32(VM_ENTRY_CONTROLS
) &
831 ~VM_ENTRY_CONTROLS_IA32E_MASK
);
833 msr
->data
= efer
& ~EFER_LME
;
839 static u64
vmx_get_segment_base(struct kvm_vcpu
*vcpu
, int seg
)
841 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
843 return vmcs_readl(sf
->base
);
846 static void vmx_get_segment(struct kvm_vcpu
*vcpu
,
847 struct kvm_segment
*var
, int seg
)
849 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
852 var
->base
= vmcs_readl(sf
->base
);
853 var
->limit
= vmcs_read32(sf
->limit
);
854 var
->selector
= vmcs_read16(sf
->selector
);
855 ar
= vmcs_read32(sf
->ar_bytes
);
856 if (ar
& AR_UNUSABLE_MASK
)
859 var
->s
= (ar
>> 4) & 1;
860 var
->dpl
= (ar
>> 5) & 3;
861 var
->present
= (ar
>> 7) & 1;
862 var
->avl
= (ar
>> 12) & 1;
863 var
->l
= (ar
>> 13) & 1;
864 var
->db
= (ar
>> 14) & 1;
865 var
->g
= (ar
>> 15) & 1;
866 var
->unusable
= (ar
>> 16) & 1;
869 static void vmx_set_segment(struct kvm_vcpu
*vcpu
,
870 struct kvm_segment
*var
, int seg
)
872 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
875 vmcs_writel(sf
->base
, var
->base
);
876 vmcs_write32(sf
->limit
, var
->limit
);
877 vmcs_write16(sf
->selector
, var
->selector
);
882 ar
|= (var
->s
& 1) << 4;
883 ar
|= (var
->dpl
& 3) << 5;
884 ar
|= (var
->present
& 1) << 7;
885 ar
|= (var
->avl
& 1) << 12;
886 ar
|= (var
->l
& 1) << 13;
887 ar
|= (var
->db
& 1) << 14;
888 ar
|= (var
->g
& 1) << 15;
890 if (ar
== 0) /* a 0 value means unusable */
891 ar
= AR_UNUSABLE_MASK
;
892 vmcs_write32(sf
->ar_bytes
, ar
);
895 static void vmx_get_cs_db_l_bits(struct kvm_vcpu
*vcpu
, int *db
, int *l
)
897 u32 ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
899 *db
= (ar
>> 14) & 1;
903 static void vmx_get_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
905 dt
->limit
= vmcs_read32(GUEST_IDTR_LIMIT
);
906 dt
->base
= vmcs_readl(GUEST_IDTR_BASE
);
909 static void vmx_set_idt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
911 vmcs_write32(GUEST_IDTR_LIMIT
, dt
->limit
);
912 vmcs_writel(GUEST_IDTR_BASE
, dt
->base
);
915 static void vmx_get_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
917 dt
->limit
= vmcs_read32(GUEST_GDTR_LIMIT
);
918 dt
->base
= vmcs_readl(GUEST_GDTR_BASE
);
921 static void vmx_set_gdt(struct kvm_vcpu
*vcpu
, struct descriptor_table
*dt
)
923 vmcs_write32(GUEST_GDTR_LIMIT
, dt
->limit
);
924 vmcs_writel(GUEST_GDTR_BASE
, dt
->base
);
927 static int init_rmode_tss(struct kvm
* kvm
)
929 struct page
*p1
, *p2
, *p3
;
930 gfn_t fn
= rmode_tss_base(kvm
) >> PAGE_SHIFT
;
933 p1
= _gfn_to_page(kvm
, fn
++);
934 p2
= _gfn_to_page(kvm
, fn
++);
935 p3
= _gfn_to_page(kvm
, fn
);
937 if (!p1
|| !p2
|| !p3
) {
938 kvm_printf(kvm
,"%s: gfn_to_page failed\n", __FUNCTION__
);
942 page
= kmap_atomic(p1
, KM_USER0
);
943 memset(page
, 0, PAGE_SIZE
);
944 *(u16
*)(page
+ 0x66) = TSS_BASE_SIZE
+ TSS_REDIRECTION_SIZE
;
945 kunmap_atomic(page
, KM_USER0
);
947 page
= kmap_atomic(p2
, KM_USER0
);
948 memset(page
, 0, PAGE_SIZE
);
949 kunmap_atomic(page
, KM_USER0
);
951 page
= kmap_atomic(p3
, KM_USER0
);
952 memset(page
, 0, PAGE_SIZE
);
953 *(page
+ RMODE_TSS_SIZE
- 2 * PAGE_SIZE
- 1) = ~0;
954 kunmap_atomic(page
, KM_USER0
);
959 static void vmcs_write32_fixedbits(u32 msr
, u32 vmcs_field
, u32 val
)
961 u32 msr_high
, msr_low
;
963 rdmsr(msr
, msr_low
, msr_high
);
967 vmcs_write32(vmcs_field
, val
);
970 static void seg_setup(int seg
)
972 struct kvm_vmx_segment_field
*sf
= &kvm_vmx_segment_fields
[seg
];
974 vmcs_write16(sf
->selector
, 0);
975 vmcs_writel(sf
->base
, 0);
976 vmcs_write32(sf
->limit
, 0xffff);
977 vmcs_write32(sf
->ar_bytes
, 0x93);
981 * Sets up the vmcs for emulated real mode.
983 static int vmx_vcpu_setup(struct kvm_vcpu
*vcpu
)
985 u32 host_sysenter_cs
;
988 struct descriptor_table dt
;
992 extern asmlinkage
void kvm_vmx_return(void);
994 if (!init_rmode_tss(vcpu
->kvm
)) {
999 memset(vcpu
->regs
, 0, sizeof(vcpu
->regs
));
1000 vcpu
->regs
[VCPU_REGS_RDX
] = get_rdx_init_val();
1002 vcpu
->apic_base
= 0xfee00000 |
1003 /*for vcpu 0*/ MSR_IA32_APICBASE_BSP
|
1004 MSR_IA32_APICBASE_ENABLE
;
1009 * GUEST_CS_BASE should really be 0xffff0000, but VT vm86 mode
1010 * insists on having GUEST_CS_BASE == GUEST_CS_SELECTOR << 4. Sigh.
1012 vmcs_write16(GUEST_CS_SELECTOR
, 0xf000);
1013 vmcs_writel(GUEST_CS_BASE
, 0x000f0000);
1014 vmcs_write32(GUEST_CS_LIMIT
, 0xffff);
1015 vmcs_write32(GUEST_CS_AR_BYTES
, 0x9b);
1017 seg_setup(VCPU_SREG_DS
);
1018 seg_setup(VCPU_SREG_ES
);
1019 seg_setup(VCPU_SREG_FS
);
1020 seg_setup(VCPU_SREG_GS
);
1021 seg_setup(VCPU_SREG_SS
);
1023 vmcs_write16(GUEST_TR_SELECTOR
, 0);
1024 vmcs_writel(GUEST_TR_BASE
, 0);
1025 vmcs_write32(GUEST_TR_LIMIT
, 0xffff);
1026 vmcs_write32(GUEST_TR_AR_BYTES
, 0x008b);
1028 vmcs_write16(GUEST_LDTR_SELECTOR
, 0);
1029 vmcs_writel(GUEST_LDTR_BASE
, 0);
1030 vmcs_write32(GUEST_LDTR_LIMIT
, 0xffff);
1031 vmcs_write32(GUEST_LDTR_AR_BYTES
, 0x00082);
1033 vmcs_write32(GUEST_SYSENTER_CS
, 0);
1034 vmcs_writel(GUEST_SYSENTER_ESP
, 0);
1035 vmcs_writel(GUEST_SYSENTER_EIP
, 0);
1037 vmcs_writel(GUEST_RFLAGS
, 0x02);
1038 vmcs_writel(GUEST_RIP
, 0xfff0);
1039 vmcs_writel(GUEST_RSP
, 0);
1041 //todo: dr0 = dr1 = dr2 = dr3 = 0; dr6 = 0xffff0ff0
1042 vmcs_writel(GUEST_DR7
, 0x400);
1044 vmcs_writel(GUEST_GDTR_BASE
, 0);
1045 vmcs_write32(GUEST_GDTR_LIMIT
, 0xffff);
1047 vmcs_writel(GUEST_IDTR_BASE
, 0);
1048 vmcs_write32(GUEST_IDTR_LIMIT
, 0xffff);
1050 vmcs_write32(GUEST_ACTIVITY_STATE
, 0);
1051 vmcs_write32(GUEST_INTERRUPTIBILITY_INFO
, 0);
1052 vmcs_write32(GUEST_PENDING_DBG_EXCEPTIONS
, 0);
1055 vmcs_write64(IO_BITMAP_A
, 0);
1056 vmcs_write64(IO_BITMAP_B
, 0);
1060 vmcs_write64(VMCS_LINK_POINTER
, -1ull); /* 22.3.1.5 */
1062 /* Special registers */
1063 vmcs_write64(GUEST_IA32_DEBUGCTL
, 0);
1066 vmcs_write32_fixedbits(MSR_IA32_VMX_PINBASED_CTLS
,
1067 PIN_BASED_VM_EXEC_CONTROL
,
1068 PIN_BASED_EXT_INTR_MASK
/* 20.6.1 */
1069 | PIN_BASED_NMI_EXITING
/* 20.6.1 */
1071 vmcs_write32_fixedbits(MSR_IA32_VMX_PROCBASED_CTLS
,
1072 CPU_BASED_VM_EXEC_CONTROL
,
1073 CPU_BASED_HLT_EXITING
/* 20.6.2 */
1074 | CPU_BASED_CR8_LOAD_EXITING
/* 20.6.2 */
1075 | CPU_BASED_CR8_STORE_EXITING
/* 20.6.2 */
1076 | CPU_BASED_UNCOND_IO_EXITING
/* 20.6.2 */
1077 | CPU_BASED_MOV_DR_EXITING
1078 | CPU_BASED_USE_TSC_OFFSETING
/* 21.3 */
1081 vmcs_write32(EXCEPTION_BITMAP
, 1 << PF_VECTOR
);
1082 vmcs_write32(PAGE_FAULT_ERROR_CODE_MASK
, 0);
1083 vmcs_write32(PAGE_FAULT_ERROR_CODE_MATCH
, 0);
1084 vmcs_write32(CR3_TARGET_COUNT
, 0); /* 22.2.1 */
1086 vmcs_writel(HOST_CR0
, read_cr0()); /* 22.2.3 */
1087 vmcs_writel(HOST_CR4
, read_cr4()); /* 22.2.3, 22.2.5 */
1088 vmcs_writel(HOST_CR3
, read_cr3()); /* 22.2.3 FIXME: shadow tables */
1090 vmcs_write16(HOST_CS_SELECTOR
, __KERNEL_CS
); /* 22.2.4 */
1091 vmcs_write16(HOST_DS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1092 vmcs_write16(HOST_ES_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1093 vmcs_write16(HOST_FS_SELECTOR
, read_fs()); /* 22.2.4 */
1094 vmcs_write16(HOST_GS_SELECTOR
, read_gs()); /* 22.2.4 */
1095 vmcs_write16(HOST_SS_SELECTOR
, __KERNEL_DS
); /* 22.2.4 */
1096 #ifdef CONFIG_X86_64
1097 rdmsrl(MSR_FS_BASE
, a
);
1098 vmcs_writel(HOST_FS_BASE
, a
); /* 22.2.4 */
1099 rdmsrl(MSR_GS_BASE
, a
);
1100 vmcs_writel(HOST_GS_BASE
, a
); /* 22.2.4 */
1102 vmcs_writel(HOST_FS_BASE
, 0); /* 22.2.4 */
1103 vmcs_writel(HOST_GS_BASE
, 0); /* 22.2.4 */
1106 vmcs_write16(HOST_TR_SELECTOR
, GDT_ENTRY_TSS
*8); /* 22.2.4 */
1109 vmcs_writel(HOST_IDTR_BASE
, dt
.base
); /* 22.2.4 */
1112 vmcs_writel(HOST_RIP
, (unsigned long)kvm_vmx_return
); /* 22.2.5 */
1114 rdmsr(MSR_IA32_SYSENTER_CS
, host_sysenter_cs
, junk
);
1115 vmcs_write32(HOST_IA32_SYSENTER_CS
, host_sysenter_cs
);
1116 rdmsrl(MSR_IA32_SYSENTER_ESP
, a
);
1117 vmcs_writel(HOST_IA32_SYSENTER_ESP
, a
); /* 22.2.3 */
1118 rdmsrl(MSR_IA32_SYSENTER_EIP
, a
);
1119 vmcs_writel(HOST_IA32_SYSENTER_EIP
, a
); /* 22.2.3 */
1121 for (i
= 0; i
< NR_VMX_MSR
; ++i
) {
1122 u32 index
= vmx_msr_index
[i
];
1123 u32 data_low
, data_high
;
1125 int j
= vcpu
->nmsrs
;
1127 if (rdmsr_safe(index
, &data_low
, &data_high
) < 0)
1129 if (wrmsr_safe(index
, data_low
, data_high
) < 0)
1131 data
= data_low
| ((u64
)data_high
<< 32);
1132 vcpu
->host_msrs
[j
].index
= index
;
1133 vcpu
->host_msrs
[j
].reserved
= 0;
1134 vcpu
->host_msrs
[j
].data
= data
;
1135 vcpu
->guest_msrs
[j
] = vcpu
->host_msrs
[j
];
1138 printk(KERN_DEBUG
"kvm: msrs: %d\n", vcpu
->nmsrs
);
1140 nr_good_msrs
= vcpu
->nmsrs
- NR_BAD_MSRS
;
1141 vmcs_writel(VM_ENTRY_MSR_LOAD_ADDR
,
1142 virt_to_phys(vcpu
->guest_msrs
+ NR_BAD_MSRS
));
1143 vmcs_writel(VM_EXIT_MSR_STORE_ADDR
,
1144 virt_to_phys(vcpu
->guest_msrs
+ NR_BAD_MSRS
));
1145 vmcs_writel(VM_EXIT_MSR_LOAD_ADDR
,
1146 virt_to_phys(vcpu
->host_msrs
+ NR_BAD_MSRS
));
1147 vmcs_write32_fixedbits(MSR_IA32_VMX_EXIT_CTLS
, VM_EXIT_CONTROLS
,
1148 (HOST_IS_64
<< 9)); /* 22.2,1, 20.7.1 */
1149 vmcs_write32(VM_EXIT_MSR_STORE_COUNT
, nr_good_msrs
); /* 22.2.2 */
1150 vmcs_write32(VM_EXIT_MSR_LOAD_COUNT
, nr_good_msrs
); /* 22.2.2 */
1151 vmcs_write32(VM_ENTRY_MSR_LOAD_COUNT
, nr_good_msrs
); /* 22.2.2 */
1154 /* 22.2.1, 20.8.1 */
1155 vmcs_write32_fixedbits(MSR_IA32_VMX_ENTRY_CTLS
,
1156 VM_ENTRY_CONTROLS
, 0);
1157 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
, 0); /* 22.2.1 */
1159 #ifdef CONFIG_X86_64
1160 vmcs_writel(VIRTUAL_APIC_PAGE_ADDR
, 0);
1161 vmcs_writel(TPR_THRESHOLD
, 0);
1164 vmcs_writel(CR0_GUEST_HOST_MASK
, KVM_GUEST_CR0_MASK
);
1165 vmcs_writel(CR4_GUEST_HOST_MASK
, KVM_GUEST_CR4_MASK
);
1167 vcpu
->cr0
= 0x60000010;
1168 vmx_set_cr0(vcpu
, vcpu
->cr0
); // enter rmode
1169 vmx_set_cr4(vcpu
, 0);
1170 #ifdef CONFIG_X86_64
1171 vmx_set_efer(vcpu
, 0);
1180 static void inject_rmode_irq(struct kvm_vcpu
*vcpu
, int irq
)
1185 unsigned long flags
;
1186 unsigned long ss_base
= vmcs_readl(GUEST_SS_BASE
);
1187 u16 sp
= vmcs_readl(GUEST_RSP
);
1188 u32 ss_limit
= vmcs_read32(GUEST_SS_LIMIT
);
1190 if (sp
> ss_limit
|| sp
- 6 > sp
) {
1191 vcpu_printf(vcpu
, "%s: #SS, rsp 0x%lx ss 0x%lx limit 0x%x\n",
1193 vmcs_readl(GUEST_RSP
),
1194 vmcs_readl(GUEST_SS_BASE
),
1195 vmcs_read32(GUEST_SS_LIMIT
));
1199 if (kvm_read_guest(vcpu
, irq
* sizeof(ent
), sizeof(ent
), &ent
) !=
1201 vcpu_printf(vcpu
, "%s: read guest err\n", __FUNCTION__
);
1205 flags
= vmcs_readl(GUEST_RFLAGS
);
1206 cs
= vmcs_readl(GUEST_CS_BASE
) >> 4;
1207 ip
= vmcs_readl(GUEST_RIP
);
1210 if (kvm_write_guest(vcpu
, ss_base
+ sp
- 2, 2, &flags
) != 2 ||
1211 kvm_write_guest(vcpu
, ss_base
+ sp
- 4, 2, &cs
) != 2 ||
1212 kvm_write_guest(vcpu
, ss_base
+ sp
- 6, 2, &ip
) != 2) {
1213 vcpu_printf(vcpu
, "%s: write guest err\n", __FUNCTION__
);
1217 vmcs_writel(GUEST_RFLAGS
, flags
&
1218 ~( X86_EFLAGS_IF
| X86_EFLAGS_AC
| X86_EFLAGS_TF
));
1219 vmcs_write16(GUEST_CS_SELECTOR
, ent
[1]) ;
1220 vmcs_writel(GUEST_CS_BASE
, ent
[1] << 4);
1221 vmcs_writel(GUEST_RIP
, ent
[0]);
1222 vmcs_writel(GUEST_RSP
, (vmcs_readl(GUEST_RSP
) & ~0xffff) | (sp
- 6));
1225 static void kvm_do_inject_irq(struct kvm_vcpu
*vcpu
)
1227 int word_index
= __ffs(vcpu
->irq_summary
);
1228 int bit_index
= __ffs(vcpu
->irq_pending
[word_index
]);
1229 int irq
= word_index
* BITS_PER_LONG
+ bit_index
;
1231 clear_bit(bit_index
, &vcpu
->irq_pending
[word_index
]);
1232 if (!vcpu
->irq_pending
[word_index
])
1233 clear_bit(word_index
, &vcpu
->irq_summary
);
1235 if (vcpu
->rmode
.active
) {
1236 inject_rmode_irq(vcpu
, irq
);
1239 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1240 irq
| INTR_TYPE_EXT_INTR
| INTR_INFO_VALID_MASK
);
1244 static void do_interrupt_requests(struct kvm_vcpu
*vcpu
,
1245 struct kvm_run
*kvm_run
)
1247 u32 cpu_based_vm_exec_control
;
1249 vcpu
->interrupt_window_open
=
1250 ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) &&
1251 (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0);
1253 if (vcpu
->interrupt_window_open
&&
1254 vcpu
->irq_summary
&&
1255 !(vmcs_read32(VM_ENTRY_INTR_INFO_FIELD
) & INTR_INFO_VALID_MASK
))
1257 * If interrupts enabled, and not blocked by sti or mov ss. Good.
1259 kvm_do_inject_irq(vcpu
);
1261 cpu_based_vm_exec_control
= vmcs_read32(CPU_BASED_VM_EXEC_CONTROL
);
1262 if (!vcpu
->interrupt_window_open
&&
1263 (vcpu
->irq_summary
|| kvm_run
->request_interrupt_window
))
1265 * Interrupts blocked. Wait for unblock.
1267 cpu_based_vm_exec_control
|= CPU_BASED_VIRTUAL_INTR_PENDING
;
1269 cpu_based_vm_exec_control
&= ~CPU_BASED_VIRTUAL_INTR_PENDING
;
1270 vmcs_write32(CPU_BASED_VM_EXEC_CONTROL
, cpu_based_vm_exec_control
);
1273 static void kvm_guest_debug_pre(struct kvm_vcpu
*vcpu
)
1275 struct kvm_guest_debug
*dbg
= &vcpu
->guest_debug
;
1277 set_debugreg(dbg
->bp
[0], 0);
1278 set_debugreg(dbg
->bp
[1], 1);
1279 set_debugreg(dbg
->bp
[2], 2);
1280 set_debugreg(dbg
->bp
[3], 3);
1282 if (dbg
->singlestep
) {
1283 unsigned long flags
;
1285 flags
= vmcs_readl(GUEST_RFLAGS
);
1286 flags
|= X86_EFLAGS_TF
| X86_EFLAGS_RF
;
1287 vmcs_writel(GUEST_RFLAGS
, flags
);
1291 static int handle_rmode_exception(struct kvm_vcpu
*vcpu
,
1292 int vec
, u32 err_code
)
1294 if (!vcpu
->rmode
.active
)
1297 if (vec
== GP_VECTOR
&& err_code
== 0)
1298 if (emulate_instruction(vcpu
, NULL
, 0, 0) == EMULATE_DONE
)
1303 static int handle_exception(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1305 u32 intr_info
, error_code
;
1306 unsigned long cr2
, rip
;
1308 enum emulation_result er
;
1311 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1312 intr_info
= vmcs_read32(VM_EXIT_INTR_INFO
);
1314 if ((vect_info
& VECTORING_INFO_VALID_MASK
) &&
1315 !is_page_fault(intr_info
)) {
1316 printk(KERN_ERR
"%s: unexpected, vectoring info 0x%x "
1317 "intr info 0x%x\n", __FUNCTION__
, vect_info
, intr_info
);
1320 if (is_external_interrupt(vect_info
)) {
1321 int irq
= vect_info
& VECTORING_INFO_VECTOR_MASK
;
1322 set_bit(irq
, vcpu
->irq_pending
);
1323 set_bit(irq
/ BITS_PER_LONG
, &vcpu
->irq_summary
);
1326 if ((intr_info
& INTR_INFO_INTR_TYPE_MASK
) == 0x200) { /* nmi */
1331 rip
= vmcs_readl(GUEST_RIP
);
1332 if (intr_info
& INTR_INFO_DELIEVER_CODE_MASK
)
1333 error_code
= vmcs_read32(VM_EXIT_INTR_ERROR_CODE
);
1334 if (is_page_fault(intr_info
)) {
1335 cr2
= vmcs_readl(EXIT_QUALIFICATION
);
1337 spin_lock(&vcpu
->kvm
->lock
);
1338 r
= kvm_mmu_page_fault(vcpu
, cr2
, error_code
);
1340 spin_unlock(&vcpu
->kvm
->lock
);
1344 spin_unlock(&vcpu
->kvm
->lock
);
1348 er
= emulate_instruction(vcpu
, kvm_run
, cr2
, error_code
);
1349 spin_unlock(&vcpu
->kvm
->lock
);
1354 case EMULATE_DO_MMIO
:
1355 ++kvm_stat
.mmio_exits
;
1356 kvm_run
->exit_reason
= KVM_EXIT_MMIO
;
1359 vcpu_printf(vcpu
, "%s: emulate fail\n", __FUNCTION__
);
1366 if (vcpu
->rmode
.active
&&
1367 handle_rmode_exception(vcpu
, intr_info
& INTR_INFO_VECTOR_MASK
,
1371 if ((intr_info
& (INTR_INFO_INTR_TYPE_MASK
| INTR_INFO_VECTOR_MASK
)) == (INTR_TYPE_EXCEPTION
| 1)) {
1372 kvm_run
->exit_reason
= KVM_EXIT_DEBUG
;
1375 kvm_run
->exit_reason
= KVM_EXIT_EXCEPTION
;
1376 kvm_run
->ex
.exception
= intr_info
& INTR_INFO_VECTOR_MASK
;
1377 kvm_run
->ex
.error_code
= error_code
;
1381 static int handle_external_interrupt(struct kvm_vcpu
*vcpu
,
1382 struct kvm_run
*kvm_run
)
1384 ++kvm_stat
.irq_exits
;
1388 static int handle_triple_fault(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1390 kvm_run
->exit_reason
= KVM_EXIT_SHUTDOWN
;
1394 static int get_io_count(struct kvm_vcpu
*vcpu
, u64
*count
)
1401 if ((vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_VM
)) {
1404 u32 cs_ar
= vmcs_read32(GUEST_CS_AR_BYTES
);
1406 countr_size
= (cs_ar
& AR_L_MASK
) ? 8:
1407 (cs_ar
& AR_DB_MASK
) ? 4: 2;
1410 rip
= vmcs_readl(GUEST_RIP
);
1411 if (countr_size
!= 8)
1412 rip
+= vmcs_readl(GUEST_CS_BASE
);
1414 n
= kvm_read_guest(vcpu
, rip
, sizeof(inst
), &inst
);
1416 for (i
= 0; i
< n
; i
++) {
1417 switch (((u8
*)&inst
)[i
]) {
1430 countr_size
= (countr_size
== 2) ? 4: (countr_size
>> 1);
1438 *count
= vcpu
->regs
[VCPU_REGS_RCX
] & (~0ULL >> (64 - countr_size
));
1442 static int handle_io(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1444 u64 exit_qualification
;
1446 ++kvm_stat
.io_exits
;
1447 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1448 kvm_run
->exit_reason
= KVM_EXIT_IO
;
1449 if (exit_qualification
& 8)
1450 kvm_run
->io
.direction
= KVM_EXIT_IO_IN
;
1452 kvm_run
->io
.direction
= KVM_EXIT_IO_OUT
;
1453 kvm_run
->io
.size
= (exit_qualification
& 7) + 1;
1454 kvm_run
->io
.string
= (exit_qualification
& 16) != 0;
1455 kvm_run
->io
.string_down
1456 = (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_DF
) != 0;
1457 kvm_run
->io
.rep
= (exit_qualification
& 32) != 0;
1458 kvm_run
->io
.port
= exit_qualification
>> 16;
1459 if (kvm_run
->io
.string
) {
1460 if (!get_io_count(vcpu
, &kvm_run
->io
.count
))
1462 kvm_run
->io
.address
= vmcs_readl(GUEST_LINEAR_ADDRESS
);
1464 kvm_run
->io
.value
= vcpu
->regs
[VCPU_REGS_RAX
]; /* rax */
1468 static int handle_cr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1470 u64 exit_qualification
;
1474 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1475 cr
= exit_qualification
& 15;
1476 reg
= (exit_qualification
>> 8) & 15;
1477 switch ((exit_qualification
>> 4) & 3) {
1478 case 0: /* mov to cr */
1481 vcpu_load_rsp_rip(vcpu
);
1482 set_cr0(vcpu
, vcpu
->regs
[reg
]);
1483 skip_emulated_instruction(vcpu
);
1486 vcpu_load_rsp_rip(vcpu
);
1487 set_cr3(vcpu
, vcpu
->regs
[reg
]);
1488 skip_emulated_instruction(vcpu
);
1491 vcpu_load_rsp_rip(vcpu
);
1492 set_cr4(vcpu
, vcpu
->regs
[reg
]);
1493 skip_emulated_instruction(vcpu
);
1496 vcpu_load_rsp_rip(vcpu
);
1497 set_cr8(vcpu
, vcpu
->regs
[reg
]);
1498 skip_emulated_instruction(vcpu
);
1502 case 1: /*mov from cr*/
1505 vcpu_load_rsp_rip(vcpu
);
1506 vcpu
->regs
[reg
] = vcpu
->cr3
;
1507 vcpu_put_rsp_rip(vcpu
);
1508 skip_emulated_instruction(vcpu
);
1511 printk(KERN_DEBUG
"handle_cr: read CR8 "
1512 "cpu erratum AA15\n");
1513 vcpu_load_rsp_rip(vcpu
);
1514 vcpu
->regs
[reg
] = vcpu
->cr8
;
1515 vcpu_put_rsp_rip(vcpu
);
1516 skip_emulated_instruction(vcpu
);
1521 lmsw(vcpu
, (exit_qualification
>> LMSW_SOURCE_DATA_SHIFT
) & 0x0f);
1523 skip_emulated_instruction(vcpu
);
1528 kvm_run
->exit_reason
= 0;
1529 printk(KERN_ERR
"kvm: unhandled control register: op %d cr %d\n",
1530 (int)(exit_qualification
>> 4) & 3, cr
);
1534 static int handle_dr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1536 u64 exit_qualification
;
1541 * FIXME: this code assumes the host is debugging the guest.
1542 * need to deal with guest debugging itself too.
1544 exit_qualification
= vmcs_read64(EXIT_QUALIFICATION
);
1545 dr
= exit_qualification
& 7;
1546 reg
= (exit_qualification
>> 8) & 15;
1547 vcpu_load_rsp_rip(vcpu
);
1548 if (exit_qualification
& 16) {
1560 vcpu
->regs
[reg
] = val
;
1564 vcpu_put_rsp_rip(vcpu
);
1565 skip_emulated_instruction(vcpu
);
1569 static int handle_cpuid(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1571 kvm_run
->exit_reason
= KVM_EXIT_CPUID
;
1575 static int handle_rdmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1577 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1580 if (vmx_get_msr(vcpu
, ecx
, &data
)) {
1581 vmx_inject_gp(vcpu
, 0);
1585 /* FIXME: handling of bits 32:63 of rax, rdx */
1586 vcpu
->regs
[VCPU_REGS_RAX
] = data
& -1u;
1587 vcpu
->regs
[VCPU_REGS_RDX
] = (data
>> 32) & -1u;
1588 skip_emulated_instruction(vcpu
);
1592 static int handle_wrmsr(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1594 u32 ecx
= vcpu
->regs
[VCPU_REGS_RCX
];
1595 u64 data
= (vcpu
->regs
[VCPU_REGS_RAX
] & -1u)
1596 | ((u64
)(vcpu
->regs
[VCPU_REGS_RDX
] & -1u) << 32);
1598 if (vmx_set_msr(vcpu
, ecx
, data
) != 0) {
1599 vmx_inject_gp(vcpu
, 0);
1603 skip_emulated_instruction(vcpu
);
1607 static void post_kvm_run_save(struct kvm_vcpu
*vcpu
,
1608 struct kvm_run
*kvm_run
)
1610 kvm_run
->if_flag
= (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
) != 0;
1611 kvm_run
->cr8
= vcpu
->cr8
;
1612 kvm_run
->apic_base
= vcpu
->apic_base
;
1613 kvm_run
->ready_for_interrupt_injection
= (vcpu
->interrupt_window_open
&&
1614 vcpu
->irq_summary
== 0);
1617 static int handle_interrupt_window(struct kvm_vcpu
*vcpu
,
1618 struct kvm_run
*kvm_run
)
1621 * If the user space waits to inject interrupts, exit as soon as
1624 if (kvm_run
->request_interrupt_window
&&
1625 !vcpu
->irq_summary
) {
1626 kvm_run
->exit_reason
= KVM_EXIT_IRQ_WINDOW_OPEN
;
1627 ++kvm_stat
.irq_window_exits
;
1633 static int handle_halt(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1635 skip_emulated_instruction(vcpu
);
1636 if (vcpu
->irq_summary
)
1639 kvm_run
->exit_reason
= KVM_EXIT_HLT
;
1640 ++kvm_stat
.halt_exits
;
1645 * The exit handlers return 1 if the exit was handled fully and guest execution
1646 * may resume. Otherwise they set the kvm_run parameter to indicate what needs
1647 * to be done to userspace and return 0.
1649 static int (*kvm_vmx_exit_handlers
[])(struct kvm_vcpu
*vcpu
,
1650 struct kvm_run
*kvm_run
) = {
1651 [EXIT_REASON_EXCEPTION_NMI
] = handle_exception
,
1652 [EXIT_REASON_EXTERNAL_INTERRUPT
] = handle_external_interrupt
,
1653 [EXIT_REASON_TRIPLE_FAULT
] = handle_triple_fault
,
1654 [EXIT_REASON_IO_INSTRUCTION
] = handle_io
,
1655 [EXIT_REASON_CR_ACCESS
] = handle_cr
,
1656 [EXIT_REASON_DR_ACCESS
] = handle_dr
,
1657 [EXIT_REASON_CPUID
] = handle_cpuid
,
1658 [EXIT_REASON_MSR_READ
] = handle_rdmsr
,
1659 [EXIT_REASON_MSR_WRITE
] = handle_wrmsr
,
1660 [EXIT_REASON_PENDING_INTERRUPT
] = handle_interrupt_window
,
1661 [EXIT_REASON_HLT
] = handle_halt
,
1664 static const int kvm_vmx_max_exit_handlers
=
1665 sizeof(kvm_vmx_exit_handlers
) / sizeof(*kvm_vmx_exit_handlers
);
1668 * The guest has exited. See if we can fix it or if we need userspace
1671 static int kvm_handle_exit(struct kvm_run
*kvm_run
, struct kvm_vcpu
*vcpu
)
1673 u32 vectoring_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1674 u32 exit_reason
= vmcs_read32(VM_EXIT_REASON
);
1676 if ( (vectoring_info
& VECTORING_INFO_VALID_MASK
) &&
1677 exit_reason
!= EXIT_REASON_EXCEPTION_NMI
)
1678 printk(KERN_WARNING
"%s: unexpected, valid vectoring info and "
1679 "exit reason is 0x%x\n", __FUNCTION__
, exit_reason
);
1680 kvm_run
->instruction_length
= vmcs_read32(VM_EXIT_INSTRUCTION_LEN
);
1681 if (exit_reason
< kvm_vmx_max_exit_handlers
1682 && kvm_vmx_exit_handlers
[exit_reason
])
1683 return kvm_vmx_exit_handlers
[exit_reason
](vcpu
, kvm_run
);
1685 kvm_run
->exit_reason
= KVM_EXIT_UNKNOWN
;
1686 kvm_run
->hw
.hardware_exit_reason
= exit_reason
;
1692 * Check if userspace requested an interrupt window, and that the
1693 * interrupt window is open.
1695 * No need to exit to userspace if we already have an interrupt queued.
1697 static int dm_request_for_irq_injection(struct kvm_vcpu
*vcpu
,
1698 struct kvm_run
*kvm_run
)
1700 return (!vcpu
->irq_summary
&&
1701 kvm_run
->request_interrupt_window
&&
1702 vcpu
->interrupt_window_open
&&
1703 (vmcs_readl(GUEST_RFLAGS
) & X86_EFLAGS_IF
));
1706 static int vmx_vcpu_run(struct kvm_vcpu
*vcpu
, struct kvm_run
*kvm_run
)
1709 u16 fs_sel
, gs_sel
, ldt_sel
;
1710 int fs_gs_ldt_reload_needed
;
1715 * Set host fs and gs selectors. Unfortunately, 22.2.3 does not
1716 * allow segment selectors with cpl > 0 or ti == 1.
1720 ldt_sel
= read_ldt();
1721 fs_gs_ldt_reload_needed
= (fs_sel
& 7) | (gs_sel
& 7) | ldt_sel
;
1722 if (!fs_gs_ldt_reload_needed
) {
1723 vmcs_write16(HOST_FS_SELECTOR
, fs_sel
);
1724 vmcs_write16(HOST_GS_SELECTOR
, gs_sel
);
1726 vmcs_write16(HOST_FS_SELECTOR
, 0);
1727 vmcs_write16(HOST_GS_SELECTOR
, 0);
1730 #ifdef CONFIG_X86_64
1731 vmcs_writel(HOST_FS_BASE
, read_msr(MSR_FS_BASE
));
1732 vmcs_writel(HOST_GS_BASE
, read_msr(MSR_GS_BASE
));
1734 vmcs_writel(HOST_FS_BASE
, segment_base(fs_sel
));
1735 vmcs_writel(HOST_GS_BASE
, segment_base(gs_sel
));
1738 if (!vcpu
->mmio_read_completed
)
1739 do_interrupt_requests(vcpu
, kvm_run
);
1741 if (vcpu
->guest_debug
.enabled
)
1742 kvm_guest_debug_pre(vcpu
);
1744 fx_save(vcpu
->host_fx_image
);
1745 fx_restore(vcpu
->guest_fx_image
);
1747 save_msrs(vcpu
->host_msrs
, vcpu
->nmsrs
);
1748 load_msrs(vcpu
->guest_msrs
, NR_BAD_MSRS
);
1751 /* Store host registers */
1753 #ifdef CONFIG_X86_64
1754 "push %%rax; push %%rbx; push %%rdx;"
1755 "push %%rsi; push %%rdi; push %%rbp;"
1756 "push %%r8; push %%r9; push %%r10; push %%r11;"
1757 "push %%r12; push %%r13; push %%r14; push %%r15;"
1759 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1761 "pusha; push %%ecx \n\t"
1762 ASM_VMX_VMWRITE_RSP_RDX
"\n\t"
1764 /* Check if vmlaunch of vmresume is needed */
1766 /* Load guest registers. Don't clobber flags. */
1767 #ifdef CONFIG_X86_64
1768 "mov %c[cr2](%3), %%rax \n\t"
1769 "mov %%rax, %%cr2 \n\t"
1770 "mov %c[rax](%3), %%rax \n\t"
1771 "mov %c[rbx](%3), %%rbx \n\t"
1772 "mov %c[rdx](%3), %%rdx \n\t"
1773 "mov %c[rsi](%3), %%rsi \n\t"
1774 "mov %c[rdi](%3), %%rdi \n\t"
1775 "mov %c[rbp](%3), %%rbp \n\t"
1776 "mov %c[r8](%3), %%r8 \n\t"
1777 "mov %c[r9](%3), %%r9 \n\t"
1778 "mov %c[r10](%3), %%r10 \n\t"
1779 "mov %c[r11](%3), %%r11 \n\t"
1780 "mov %c[r12](%3), %%r12 \n\t"
1781 "mov %c[r13](%3), %%r13 \n\t"
1782 "mov %c[r14](%3), %%r14 \n\t"
1783 "mov %c[r15](%3), %%r15 \n\t"
1784 "mov %c[rcx](%3), %%rcx \n\t" /* kills %3 (rcx) */
1786 "mov %c[cr2](%3), %%eax \n\t"
1787 "mov %%eax, %%cr2 \n\t"
1788 "mov %c[rax](%3), %%eax \n\t"
1789 "mov %c[rbx](%3), %%ebx \n\t"
1790 "mov %c[rdx](%3), %%edx \n\t"
1791 "mov %c[rsi](%3), %%esi \n\t"
1792 "mov %c[rdi](%3), %%edi \n\t"
1793 "mov %c[rbp](%3), %%ebp \n\t"
1794 "mov %c[rcx](%3), %%ecx \n\t" /* kills %3 (ecx) */
1796 /* Enter guest mode */
1798 ASM_VMX_VMLAUNCH
"\n\t"
1799 "jmp kvm_vmx_return \n\t"
1800 "launched: " ASM_VMX_VMRESUME
"\n\t"
1801 ".globl kvm_vmx_return \n\t"
1803 /* Save guest registers, load host registers, keep flags */
1804 #ifdef CONFIG_X86_64
1805 "xchg %3, (%%rsp) \n\t"
1806 "mov %%rax, %c[rax](%3) \n\t"
1807 "mov %%rbx, %c[rbx](%3) \n\t"
1808 "pushq (%%rsp); popq %c[rcx](%3) \n\t"
1809 "mov %%rdx, %c[rdx](%3) \n\t"
1810 "mov %%rsi, %c[rsi](%3) \n\t"
1811 "mov %%rdi, %c[rdi](%3) \n\t"
1812 "mov %%rbp, %c[rbp](%3) \n\t"
1813 "mov %%r8, %c[r8](%3) \n\t"
1814 "mov %%r9, %c[r9](%3) \n\t"
1815 "mov %%r10, %c[r10](%3) \n\t"
1816 "mov %%r11, %c[r11](%3) \n\t"
1817 "mov %%r12, %c[r12](%3) \n\t"
1818 "mov %%r13, %c[r13](%3) \n\t"
1819 "mov %%r14, %c[r14](%3) \n\t"
1820 "mov %%r15, %c[r15](%3) \n\t"
1821 "mov %%cr2, %%rax \n\t"
1822 "mov %%rax, %c[cr2](%3) \n\t"
1823 "mov (%%rsp), %3 \n\t"
1825 "pop %%rcx; pop %%r15; pop %%r14; pop %%r13; pop %%r12;"
1826 "pop %%r11; pop %%r10; pop %%r9; pop %%r8;"
1827 "pop %%rbp; pop %%rdi; pop %%rsi;"
1828 "pop %%rdx; pop %%rbx; pop %%rax \n\t"
1830 "xchg %3, (%%esp) \n\t"
1831 "mov %%eax, %c[rax](%3) \n\t"
1832 "mov %%ebx, %c[rbx](%3) \n\t"
1833 "pushl (%%esp); popl %c[rcx](%3) \n\t"
1834 "mov %%edx, %c[rdx](%3) \n\t"
1835 "mov %%esi, %c[rsi](%3) \n\t"
1836 "mov %%edi, %c[rdi](%3) \n\t"
1837 "mov %%ebp, %c[rbp](%3) \n\t"
1838 "mov %%cr2, %%eax \n\t"
1839 "mov %%eax, %c[cr2](%3) \n\t"
1840 "mov (%%esp), %3 \n\t"
1842 "pop %%ecx; popa \n\t"
1847 : "r"(vcpu
->launched
), "d"((unsigned long)HOST_RSP
),
1849 [rax
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RAX
])),
1850 [rbx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBX
])),
1851 [rcx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RCX
])),
1852 [rdx
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDX
])),
1853 [rsi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RSI
])),
1854 [rdi
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RDI
])),
1855 [rbp
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_RBP
])),
1856 #ifdef CONFIG_X86_64
1857 [r8
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R8
])),
1858 [r9
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R9
])),
1859 [r10
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R10
])),
1860 [r11
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R11
])),
1861 [r12
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R12
])),
1862 [r13
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R13
])),
1863 [r14
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R14
])),
1864 [r15
]"i"(offsetof(struct kvm_vcpu
, regs
[VCPU_REGS_R15
])),
1866 [cr2
]"i"(offsetof(struct kvm_vcpu
, cr2
))
1871 save_msrs(vcpu
->guest_msrs
, NR_BAD_MSRS
);
1872 load_msrs(vcpu
->host_msrs
, NR_BAD_MSRS
);
1874 fx_save(vcpu
->guest_fx_image
);
1875 fx_restore(vcpu
->host_fx_image
);
1876 vcpu
->interrupt_window_open
= (vmcs_read32(GUEST_INTERRUPTIBILITY_INFO
) & 3) == 0;
1878 asm ("mov %0, %%ds; mov %0, %%es" : : "r"(__USER_DS
));
1880 kvm_run
->exit_type
= 0;
1882 kvm_run
->exit_type
= KVM_EXIT_TYPE_FAIL_ENTRY
;
1883 kvm_run
->exit_reason
= vmcs_read32(VM_INSTRUCTION_ERROR
);
1886 if (fs_gs_ldt_reload_needed
) {
1890 * If we have to reload gs, we must take care to
1891 * preserve our gs base.
1893 local_irq_disable();
1895 #ifdef CONFIG_X86_64
1896 wrmsrl(MSR_GS_BASE
, vmcs_readl(HOST_GS_BASE
));
1903 * Profile KVM exit RIPs:
1905 if (unlikely(prof_on
== KVM_PROFILING
))
1906 profile_hit(KVM_PROFILING
, (void *)vmcs_readl(GUEST_RIP
));
1909 kvm_run
->exit_type
= KVM_EXIT_TYPE_VM_EXIT
;
1910 r
= kvm_handle_exit(kvm_run
, vcpu
);
1912 /* Give scheduler a change to reschedule. */
1913 if (signal_pending(current
)) {
1914 ++kvm_stat
.signal_exits
;
1915 post_kvm_run_save(vcpu
, kvm_run
);
1919 if (dm_request_for_irq_injection(vcpu
, kvm_run
)) {
1920 ++kvm_stat
.request_irq_exits
;
1921 post_kvm_run_save(vcpu
, kvm_run
);
1930 post_kvm_run_save(vcpu
, kvm_run
);
1934 static void vmx_flush_tlb(struct kvm_vcpu
*vcpu
)
1936 vmcs_writel(GUEST_CR3
, vmcs_readl(GUEST_CR3
));
1939 static void vmx_inject_page_fault(struct kvm_vcpu
*vcpu
,
1943 u32 vect_info
= vmcs_read32(IDT_VECTORING_INFO_FIELD
);
1945 ++kvm_stat
.pf_guest
;
1947 if (is_page_fault(vect_info
)) {
1948 printk(KERN_DEBUG
"inject_page_fault: "
1949 "double fault 0x%lx @ 0x%lx\n",
1950 addr
, vmcs_readl(GUEST_RIP
));
1951 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, 0);
1952 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1954 INTR_TYPE_EXCEPTION
|
1955 INTR_INFO_DELIEVER_CODE_MASK
|
1956 INTR_INFO_VALID_MASK
);
1960 vmcs_write32(VM_ENTRY_EXCEPTION_ERROR_CODE
, err_code
);
1961 vmcs_write32(VM_ENTRY_INTR_INFO_FIELD
,
1963 INTR_TYPE_EXCEPTION
|
1964 INTR_INFO_DELIEVER_CODE_MASK
|
1965 INTR_INFO_VALID_MASK
);
1969 static void vmx_free_vmcs(struct kvm_vcpu
*vcpu
)
1972 on_each_cpu(__vcpu_clear
, vcpu
, 0, 1);
1973 free_vmcs(vcpu
->vmcs
);
1978 static void vmx_free_vcpu(struct kvm_vcpu
*vcpu
)
1980 vmx_free_vmcs(vcpu
);
1983 static int vmx_create_vcpu(struct kvm_vcpu
*vcpu
)
1987 vcpu
->guest_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
1988 if (!vcpu
->guest_msrs
)
1991 vcpu
->host_msrs
= kmalloc(PAGE_SIZE
, GFP_KERNEL
);
1992 if (!vcpu
->host_msrs
)
1993 goto out_free_guest_msrs
;
1995 vmcs
= alloc_vmcs();
2006 kfree(vcpu
->host_msrs
);
2007 vcpu
->host_msrs
= NULL
;
2009 out_free_guest_msrs
:
2010 kfree(vcpu
->guest_msrs
);
2011 vcpu
->guest_msrs
= NULL
;
2016 static struct kvm_arch_ops vmx_arch_ops
= {
2017 .cpu_has_kvm_support
= cpu_has_kvm_support
,
2018 .disabled_by_bios
= vmx_disabled_by_bios
,
2019 .hardware_setup
= hardware_setup
,
2020 .hardware_unsetup
= hardware_unsetup
,
2021 .hardware_enable
= hardware_enable
,
2022 .hardware_disable
= hardware_disable
,
2024 .vcpu_create
= vmx_create_vcpu
,
2025 .vcpu_free
= vmx_free_vcpu
,
2027 .vcpu_load
= vmx_vcpu_load
,
2028 .vcpu_put
= vmx_vcpu_put
,
2029 .vcpu_decache
= vmx_vcpu_decache
,
2031 .set_guest_debug
= set_guest_debug
,
2032 .get_msr
= vmx_get_msr
,
2033 .set_msr
= vmx_set_msr
,
2034 .get_segment_base
= vmx_get_segment_base
,
2035 .get_segment
= vmx_get_segment
,
2036 .set_segment
= vmx_set_segment
,
2037 .get_cs_db_l_bits
= vmx_get_cs_db_l_bits
,
2038 .decache_cr0_cr4_guest_bits
= vmx_decache_cr0_cr4_guest_bits
,
2039 .set_cr0
= vmx_set_cr0
,
2040 .set_cr0_no_modeswitch
= vmx_set_cr0_no_modeswitch
,
2041 .set_cr3
= vmx_set_cr3
,
2042 .set_cr4
= vmx_set_cr4
,
2043 #ifdef CONFIG_X86_64
2044 .set_efer
= vmx_set_efer
,
2046 .get_idt
= vmx_get_idt
,
2047 .set_idt
= vmx_set_idt
,
2048 .get_gdt
= vmx_get_gdt
,
2049 .set_gdt
= vmx_set_gdt
,
2050 .cache_regs
= vcpu_load_rsp_rip
,
2051 .decache_regs
= vcpu_put_rsp_rip
,
2052 .get_rflags
= vmx_get_rflags
,
2053 .set_rflags
= vmx_set_rflags
,
2055 .tlb_flush
= vmx_flush_tlb
,
2056 .inject_page_fault
= vmx_inject_page_fault
,
2058 .inject_gp
= vmx_inject_gp
,
2060 .run
= vmx_vcpu_run
,
2061 .skip_emulated_instruction
= skip_emulated_instruction
,
2062 .vcpu_setup
= vmx_vcpu_setup
,
2065 static int __init
vmx_init(void)
2067 return kvm_init_arch(&vmx_arch_ops
, THIS_MODULE
);
2070 static void __exit
vmx_exit(void)
2075 module_init(vmx_init
)
2076 module_exit(vmx_exit
)