2 * IBM Automatic Server Restart driver.
4 * Copyright (c) 2005 Andrey Panin <pazke@donpac.ru>
6 * Based on driver written by Pete Reynolds.
7 * Copyright (c) IBM Corporation, 1998-2004.
9 * This software may be used and distributed according to the terms
10 * of the GNU Public License, incorporated herein by reference.
13 #include <linux/config.h>
15 #include <linux/kernel.h>
16 #include <linux/slab.h>
17 #include <linux/module.h>
18 #include <linux/pci.h>
19 #include <linux/timer.h>
20 #include <linux/miscdevice.h>
21 #include <linux/watchdog.h>
22 #include <linux/dmi.h>
25 #include <asm/uaccess.h>
37 #define PFX "ibmasr: "
39 #define TOPAZ_ASR_REG_OFFSET 4
40 #define TOPAZ_ASR_TOGGLE 0x40
41 #define TOPAZ_ASR_DISABLE 0x80
43 /* PEARL ASR S/W REGISTER SUPERIO PORT ADDRESSES */
44 #define PEARL_BASE 0xe04
45 #define PEARL_WRITE 0xe06
46 #define PEARL_READ 0xe07
48 #define PEARL_ASR_DISABLE_MASK 0x80 /* bit 7: disable = 1, enable = 0 */
49 #define PEARL_ASR_TOGGLE_MASK 0x40 /* bit 6: 0, then 1, then 0 */
51 /* JASPER OFFSET FROM SIO BASE ADDR TO ASR S/W REGISTERS. */
52 #define JASPER_ASR_REG_OFFSET 0x38
54 #define JASPER_ASR_DISABLE_MASK 0x01 /* bit 0: disable = 1, enable = 0 */
55 #define JASPER_ASR_TOGGLE_MASK 0x02 /* bit 1: 0, then 1, then 0 */
57 #define JUNIPER_BASE_ADDRESS 0x54b /* Base address of Juniper ASR */
58 #define JUNIPER_ASR_DISABLE_MASK 0x01 /* bit 0: disable = 1 enable = 0 */
59 #define JUNIPER_ASR_TOGGLE_MASK 0x02 /* bit 1: 0, then 1, then 0 */
61 #define SPRUCE_BASE_ADDRESS 0x118e /* Base address of Spruce ASR */
62 #define SPRUCE_ASR_DISABLE_MASK 0x01 /* bit 1: disable = 1 enable = 0 */
63 #define SPRUCE_ASR_TOGGLE_MASK 0x02 /* bit 0: 0, then 1, then 0 */
66 static int nowayout
= WATCHDOG_NOWAYOUT
;
68 static unsigned long asr_is_open
;
69 static char asr_expect_close
;
71 static unsigned int asr_type
, asr_base
, asr_length
;
72 static unsigned int asr_read_addr
, asr_write_addr
;
73 static unsigned char asr_toggle_mask
, asr_disable_mask
;
75 static void asr_toggle(void)
77 unsigned char reg
= inb(asr_read_addr
);
79 outb(reg
& ~asr_toggle_mask
, asr_write_addr
);
80 reg
= inb(asr_read_addr
);
82 outb(reg
| asr_toggle_mask
, asr_write_addr
);
83 reg
= inb(asr_read_addr
);
85 outb(reg
& ~asr_toggle_mask
, asr_write_addr
);
86 reg
= inb(asr_read_addr
);
89 static void asr_enable(void)
93 if (asr_type
== ASMTYPE_TOPAZ
) {
94 /* asr_write_addr == asr_read_addr */
95 reg
= inb(asr_read_addr
);
96 outb(reg
& ~(TOPAZ_ASR_TOGGLE
| TOPAZ_ASR_DISABLE
),
100 * First make sure the hardware timer is reset by toggling
101 * ASR hardware timer line.
105 reg
= inb(asr_read_addr
);
106 outb(reg
& ~asr_disable_mask
, asr_write_addr
);
108 reg
= inb(asr_read_addr
);
111 static void asr_disable(void)
113 unsigned char reg
= inb(asr_read_addr
);
115 if (asr_type
== ASMTYPE_TOPAZ
)
116 /* asr_write_addr == asr_read_addr */
117 outb(reg
| TOPAZ_ASR_TOGGLE
| TOPAZ_ASR_DISABLE
,
120 outb(reg
| asr_toggle_mask
, asr_write_addr
);
121 reg
= inb(asr_read_addr
);
123 outb(reg
| asr_disable_mask
, asr_write_addr
);
125 reg
= inb(asr_read_addr
);
128 static int __init
asr_get_base_address(void)
130 unsigned char low
, high
;
131 const char *type
= "";
137 /* SELECT SuperIO CHIP FOR QUERYING (WRITE 0x07 TO BOTH 0x2E and 0x2F) */
141 /* SELECT AND READ THE HIGH-NIBBLE OF THE GPIO BASE ADDRESS */
145 /* SELECT AND READ THE LOW-NIBBLE OF THE GPIO BASE ADDRESS */
149 asr_base
= (high
<< 16) | low
;
150 asr_read_addr
= asr_write_addr
=
151 asr_base
+ TOPAZ_ASR_REG_OFFSET
;
159 /* FIXME: need to use pci_config_lock here, but it's not exported */
161 /* spin_lock_irqsave(&pci_config_lock, flags);*/
163 /* Select the SuperIO chip in the PCI I/O port register */
164 outl(0x8000f858, 0xcf8);
167 * Read the base address for the SuperIO chip.
168 * Only the lower 16 bits are valid, but the address is word
169 * aligned so the last bit must be masked off.
171 asr_base
= inl(0xcfc) & 0xfffe;
173 /* spin_unlock_irqrestore(&pci_config_lock, flags);*/
175 asr_read_addr
= asr_write_addr
=
176 asr_base
+ JASPER_ASR_REG_OFFSET
;
177 asr_toggle_mask
= JASPER_ASR_TOGGLE_MASK
;
178 asr_disable_mask
= JASPER_ASR_DISABLE_MASK
;
179 asr_length
= JASPER_ASR_REG_OFFSET
+ 1;
185 asr_base
= PEARL_BASE
;
186 asr_read_addr
= PEARL_READ
;
187 asr_write_addr
= PEARL_WRITE
;
188 asr_toggle_mask
= PEARL_ASR_TOGGLE_MASK
;
189 asr_disable_mask
= PEARL_ASR_DISABLE_MASK
;
193 case ASMTYPE_JUNIPER
:
195 asr_base
= JUNIPER_BASE_ADDRESS
;
196 asr_read_addr
= asr_write_addr
= asr_base
;
197 asr_toggle_mask
= JUNIPER_ASR_TOGGLE_MASK
;
198 asr_disable_mask
= JUNIPER_ASR_DISABLE_MASK
;
203 asr_base
= SPRUCE_BASE_ADDRESS
;
204 asr_read_addr
= asr_write_addr
= asr_base
;
205 asr_toggle_mask
= SPRUCE_ASR_TOGGLE_MASK
;
206 asr_disable_mask
= SPRUCE_ASR_DISABLE_MASK
;
210 if (!request_region(asr_base
, asr_length
, "ibmasr")) {
211 printk(KERN_ERR PFX
"address %#x already in use\n",
216 printk(KERN_INFO PFX
"found %sASR @ addr %#x\n", type
, asr_base
);
222 static ssize_t
asr_write(struct file
*file
, const char __user
*buf
,
223 size_t count
, loff_t
*ppos
)
229 /* In case it was set long ago */
230 asr_expect_close
= 0;
232 for (i
= 0; i
!= count
; i
++) {
234 if (get_user(c
, buf
+ i
))
237 asr_expect_close
= 42;
245 static int asr_ioctl(struct inode
*inode
, struct file
*file
,
246 unsigned int cmd
, unsigned long arg
)
248 static const struct watchdog_info ident
= {
249 .options
= WDIOF_KEEPALIVEPING
| WDIOF_SETTIMEOUT
|
251 .identity
= "IBM ASR"
253 void __user
*argp
= (void __user
*)arg
;
254 int __user
*p
= argp
;
258 case WDIOC_GETSUPPORT
:
259 return copy_to_user(argp
, &ident
, sizeof(ident
)) ?
262 case WDIOC_GETSTATUS
:
263 case WDIOC_GETBOOTSTATUS
:
264 return put_user(0, p
);
266 case WDIOC_KEEPALIVE
:
271 * The hardware has a fixed timeout value, so WDIOC_SETTIMEOUT
272 * is a noop and WDIOC_GETTIMEOUT always returns 256.
274 case WDIOC_SETTIMEOUT
:
275 if (get_user(heartbeat
, p
))
279 case WDIOC_GETTIMEOUT
:
281 return put_user(heartbeat
, p
);
283 case WDIOC_SETOPTIONS
: {
284 int new_options
, retval
= -EINVAL
;
286 if (get_user(new_options
, p
))
289 if (new_options
& WDIOS_DISABLECARD
) {
294 if (new_options
& WDIOS_ENABLECARD
) {
307 static int asr_open(struct inode
*inode
, struct file
*file
)
309 if(test_and_set_bit(0, &asr_is_open
))
315 return nonseekable_open(inode
, file
);
318 static int asr_release(struct inode
*inode
, struct file
*file
)
320 if (asr_expect_close
== 42)
323 printk(KERN_CRIT PFX
"unexpected close, not stopping watchdog!\n");
326 clear_bit(0, &asr_is_open
);
327 asr_expect_close
= 0;
331 static struct file_operations asr_fops
= {
332 .owner
= THIS_MODULE
,
337 .release
= asr_release
,
340 static struct miscdevice asr_miscdev
= {
341 .minor
= WATCHDOG_MINOR
,
352 static struct ibmasr_id __initdata ibmasr_id_table
[] = {
353 { "IBM Automatic Server Restart - eserver xSeries 220", ASMTYPE_TOPAZ
},
354 { "IBM Automatic Server Restart - Machine Type 8673", ASMTYPE_PEARL
},
355 { "IBM Automatic Server Restart - Machine Type 8480", ASMTYPE_JASPER
},
356 { "IBM Automatic Server Restart - Machine Type 8482", ASMTYPE_JUNIPER
},
357 { "IBM Automatic Server Restart - Machine Type 8648", ASMTYPE_SPRUCE
},
361 static int __init
ibmasr_init(void)
363 struct ibmasr_id
*id
;
366 for (id
= ibmasr_id_table
; id
->desc
; id
++) {
367 if (dmi_find_device(DMI_DEV_TYPE_OTHER
, id
->desc
, NULL
)) {
376 rc
= misc_register(&asr_miscdev
);
378 printk(KERN_ERR PFX
"failed to register misc device\n");
382 rc
= asr_get_base_address();
384 misc_deregister(&asr_miscdev
);
391 static void __exit
ibmasr_exit(void)
396 misc_deregister(&asr_miscdev
);
398 release_region(asr_base
, asr_length
);
401 module_init(ibmasr_init
);
402 module_exit(ibmasr_exit
);
404 module_param(nowayout
, int, 0);
405 MODULE_PARM_DESC(nowayout
, "Watchdog cannot be stopped once started (default=CONFIG_WATCHDOG_NOWAYOUT)");
407 MODULE_DESCRIPTION("IBM Automatic Server Restart driver");
408 MODULE_AUTHOR("Andrey Panin");
409 MODULE_LICENSE("GPL");
410 MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR
);