2 * Low-Level PCI Support for PC -- Routing of Interrupts
4 * (c) 1999--2000 Martin Mares <mj@ucw.cz>
7 #include <linux/types.h>
8 #include <linux/kernel.h>
10 #include <linux/init.h>
11 #include <linux/slab.h>
12 #include <linux/interrupt.h>
13 #include <linux/dmi.h>
16 #include <asm/io_apic.h>
17 #include <linux/irq.h>
18 #include <linux/acpi.h>
22 #define PIRQ_SIGNATURE (('$' << 0) + ('P' << 8) + ('I' << 16) + ('R' << 24))
23 #define PIRQ_VERSION 0x0100
25 static int broken_hp_bios_irq9
;
26 static int acer_tm360_irqrouting
;
28 static struct irq_routing_table
*pirq_table
;
30 static int pirq_enable_irq(struct pci_dev
*dev
);
33 * Never use: 0, 1, 2 (timer, keyboard, and cascade)
34 * Avoid using: 13, 14 and 15 (FP error and IDE).
35 * Penalize: 3, 4, 6, 7, 12 (known ISA uses: serial, floppy, parallel and mouse)
37 unsigned int pcibios_irq_mask
= 0xfff8;
39 static int pirq_penalty
[16] = {
40 1000000, 1000000, 1000000, 1000, 1000, 0, 1000, 1000,
41 0, 0, 0, 0, 1000, 100000, 100000, 100000
47 int (*get
)(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
);
48 int (*set
)(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int new);
51 struct irq_router_handler
{
53 int (*probe
)(struct irq_router
*r
, struct pci_dev
*router
, u16 device
);
56 int (*pcibios_enable_irq
)(struct pci_dev
*dev
) = NULL
;
57 void (*pcibios_disable_irq
)(struct pci_dev
*dev
) = NULL
;
60 * Check passed address for the PCI IRQ Routing Table signature
61 * and perform checksum verification.
64 static inline struct irq_routing_table
* pirq_check_routing_table(u8
*addr
)
66 struct irq_routing_table
*rt
;
70 rt
= (struct irq_routing_table
*) addr
;
71 if (rt
->signature
!= PIRQ_SIGNATURE
||
72 rt
->version
!= PIRQ_VERSION
||
74 rt
->size
< sizeof(struct irq_routing_table
))
77 for (i
=0; i
< rt
->size
; i
++)
80 DBG(KERN_DEBUG
"PCI: Interrupt Routing Table found at 0x%p\n", rt
);
89 * Search 0xf0000 -- 0xfffff for the PCI IRQ Routing Table.
92 static struct irq_routing_table
* __init
pirq_find_routing_table(void)
95 struct irq_routing_table
*rt
;
97 if (pirq_table_addr
) {
98 rt
= pirq_check_routing_table((u8
*) __va(pirq_table_addr
));
101 printk(KERN_WARNING
"PCI: PIRQ table NOT found at pirqaddr\n");
103 for(addr
= (u8
*) __va(0xf0000); addr
< (u8
*) __va(0x100000); addr
+= 16) {
104 rt
= pirq_check_routing_table(addr
);
112 * If we have a IRQ routing table, use it to search for peer host
113 * bridges. It's a gross hack, but since there are no other known
114 * ways how to get a list of buses, we have to go this way.
117 static void __init
pirq_peer_trick(void)
119 struct irq_routing_table
*rt
= pirq_table
;
124 memset(busmap
, 0, sizeof(busmap
));
125 for(i
=0; i
< (rt
->size
- sizeof(struct irq_routing_table
)) / sizeof(struct irq_info
); i
++) {
130 DBG(KERN_DEBUG
"%02x:%02x slot=%02x", e
->bus
, e
->devfn
/8, e
->slot
);
132 DBG(" %d:%02x/%04x", j
, e
->irq
[j
].link
, e
->irq
[j
].bitmap
);
138 for(i
= 1; i
< 256; i
++) {
139 if (!busmap
[i
] || pci_find_bus(0, i
))
141 if (pci_scan_bus(i
, &pci_root_ops
, NULL
))
142 printk(KERN_INFO
"PCI: Discovered primary peer bus %02x [IRQ]\n", i
);
144 pcibios_last_bus
= -1;
148 * Code for querying and setting of IRQ routes on various interrupt routers.
151 void eisa_set_level_irq(unsigned int irq
)
153 unsigned char mask
= 1 << (irq
& 7);
154 unsigned int port
= 0x4d0 + (irq
>> 3);
156 static u16 eisa_irq_mask
;
158 if (irq
>= 16 || (1 << irq
) & eisa_irq_mask
)
161 eisa_irq_mask
|= (1 << irq
);
162 printk(KERN_DEBUG
"PCI: setting IRQ %u as level-triggered\n", irq
);
165 DBG(KERN_DEBUG
" -> edge");
166 outb(val
| mask
, port
);
171 * Common IRQ routing practice: nybbles in config space,
172 * offset by some magic constant.
174 static unsigned int read_config_nybble(struct pci_dev
*router
, unsigned offset
, unsigned nr
)
177 unsigned reg
= offset
+ (nr
>> 1);
179 pci_read_config_byte(router
, reg
, &x
);
180 return (nr
& 1) ? (x
>> 4) : (x
& 0xf);
183 static void write_config_nybble(struct pci_dev
*router
, unsigned offset
, unsigned nr
, unsigned int val
)
186 unsigned reg
= offset
+ (nr
>> 1);
188 pci_read_config_byte(router
, reg
, &x
);
189 x
= (nr
& 1) ? ((x
& 0x0f) | (val
<< 4)) : ((x
& 0xf0) | val
);
190 pci_write_config_byte(router
, reg
, x
);
194 * ALI pirq entries are damn ugly, and completely undocumented.
195 * This has been figured out from pirq tables, and it's not a pretty
198 static int pirq_ali_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
200 static const unsigned char irqmap
[16] = { 0, 9, 3, 10, 4, 5, 7, 6, 1, 11, 0, 12, 0, 14, 0, 15 };
202 return irqmap
[read_config_nybble(router
, 0x48, pirq
-1)];
205 static int pirq_ali_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
207 static const unsigned char irqmap
[16] = { 0, 8, 0, 2, 4, 5, 7, 6, 0, 1, 3, 9, 11, 0, 13, 15 };
208 unsigned int val
= irqmap
[irq
];
211 write_config_nybble(router
, 0x48, pirq
-1, val
);
218 * The Intel PIIX4 pirq rules are fairly simple: "pirq" is
219 * just a pointer to the config space.
221 static int pirq_piix_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
225 pci_read_config_byte(router
, pirq
, &x
);
226 return (x
< 16) ? x
: 0;
229 static int pirq_piix_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
231 pci_write_config_byte(router
, pirq
, irq
);
236 * The VIA pirq rules are nibble-based, like ALI,
237 * but without the ugly irq number munging.
238 * However, PIRQD is in the upper instead of lower 4 bits.
240 static int pirq_via_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
242 return read_config_nybble(router
, 0x55, pirq
== 4 ? 5 : pirq
);
245 static int pirq_via_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
247 write_config_nybble(router
, 0x55, pirq
== 4 ? 5 : pirq
, irq
);
252 * The VIA pirq rules are nibble-based, like ALI,
253 * but without the ugly irq number munging.
254 * However, for 82C586, nibble map is different .
256 static int pirq_via586_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
258 static const unsigned int pirqmap
[4] = { 3, 2, 5, 1 };
259 return read_config_nybble(router
, 0x55, pirqmap
[pirq
-1]);
262 static int pirq_via586_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
264 static const unsigned int pirqmap
[4] = { 3, 2, 5, 1 };
265 write_config_nybble(router
, 0x55, pirqmap
[pirq
-1], irq
);
270 * ITE 8330G pirq rules are nibble-based
271 * FIXME: pirqmap may be { 1, 0, 3, 2 },
272 * 2+3 are both mapped to irq 9 on my system
274 static int pirq_ite_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
276 static const unsigned char pirqmap
[4] = { 1, 0, 2, 3 };
277 return read_config_nybble(router
,0x43, pirqmap
[pirq
-1]);
280 static int pirq_ite_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
282 static const unsigned char pirqmap
[4] = { 1, 0, 2, 3 };
283 write_config_nybble(router
, 0x43, pirqmap
[pirq
-1], irq
);
288 * OPTI: high four bits are nibble pointer..
289 * I wonder what the low bits do?
291 static int pirq_opti_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
293 return read_config_nybble(router
, 0xb8, pirq
>> 4);
296 static int pirq_opti_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
298 write_config_nybble(router
, 0xb8, pirq
>> 4, irq
);
303 * Cyrix: nibble offset 0x5C
304 * 0x5C bits 7:4 is INTB bits 3:0 is INTA
305 * 0x5D bits 7:4 is INTD bits 3:0 is INTC
307 static int pirq_cyrix_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
309 return read_config_nybble(router
, 0x5C, (pirq
-1)^1);
312 static int pirq_cyrix_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
314 write_config_nybble(router
, 0x5C, (pirq
-1)^1, irq
);
319 * PIRQ routing for SiS 85C503 router used in several SiS chipsets.
320 * We have to deal with the following issues here:
321 * - vendors have different ideas about the meaning of link values
322 * - some onboard devices (integrated in the chipset) have special
323 * links and are thus routed differently (i.e. not via PCI INTA-INTD)
324 * - different revision of the router have a different layout for
325 * the routing registers, particularly for the onchip devices
327 * For all routing registers the common thing is we have one byte
328 * per routeable link which is defined as:
329 * bit 7 IRQ mapping enabled (0) or disabled (1)
330 * bits [6:4] reserved (sometimes used for onchip devices)
331 * bits [3:0] IRQ to map to
332 * allowed: 3-7, 9-12, 14-15
333 * reserved: 0, 1, 2, 8, 13
335 * The config-space registers located at 0x41/0x42/0x43/0x44 are
336 * always used to route the normal PCI INT A/B/C/D respectively.
337 * Apparently there are systems implementing PCI routing table using
338 * link values 0x01-0x04 and others using 0x41-0x44 for PCI INTA..D.
339 * We try our best to handle both link mappings.
341 * Currently (2003-05-21) it appears most SiS chipsets follow the
342 * definition of routing registers from the SiS-5595 southbridge.
343 * According to the SiS 5595 datasheets the revision id's of the
344 * router (ISA-bridge) should be 0x01 or 0xb0.
346 * Furthermore we've also seen lspci dumps with revision 0x00 and 0xb1.
347 * Looks like these are used in a number of SiS 5xx/6xx/7xx chipsets.
348 * They seem to work with the current routing code. However there is
349 * some concern because of the two USB-OHCI HCs (original SiS 5595
350 * had only one). YMMV.
352 * Onchip routing for router rev-id 0x01/0xb0 and probably 0x00/0xb1:
355 * bits [6:5] must be written 01
356 * bit 4 channel-select primary (0), secondary (1)
359 * bit 6 OHCI function disabled (0), enabled (1)
361 * 0x6a: ACPI/SCI IRQ: bits 4-6 reserved
363 * 0x7e: Data Acq. Module IRQ - bits 4-6 reserved
365 * We support USBIRQ (in addition to INTA-INTD) and keep the
366 * IDE, ACPI and DAQ routing untouched as set by the BIOS.
368 * Currently the only reported exception is the new SiS 65x chipset
369 * which includes the SiS 69x southbridge. Here we have the 85C503
370 * router revision 0x04 and there are changes in the register layout
371 * mostly related to the different USB HCs with USB 2.0 support.
373 * Onchip routing for router rev-id 0x04 (try-and-error observation)
375 * 0x60/0x61/0x62/0x63: 1xEHCI and 3xOHCI (companion) USB-HCs
376 * bit 6-4 are probably unused, not like 5595
379 #define PIRQ_SIS_IRQ_MASK 0x0f
380 #define PIRQ_SIS_IRQ_DISABLE 0x80
381 #define PIRQ_SIS_USB_ENABLE 0x40
383 static int pirq_sis_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
389 if (reg
>= 0x01 && reg
<= 0x04)
391 pci_read_config_byte(router
, reg
, &x
);
392 return (x
& PIRQ_SIS_IRQ_DISABLE
) ? 0 : (x
& PIRQ_SIS_IRQ_MASK
);
395 static int pirq_sis_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
401 if (reg
>= 0x01 && reg
<= 0x04)
403 pci_read_config_byte(router
, reg
, &x
);
404 x
&= ~(PIRQ_SIS_IRQ_MASK
| PIRQ_SIS_IRQ_DISABLE
);
405 x
|= irq
? irq
: PIRQ_SIS_IRQ_DISABLE
;
406 pci_write_config_byte(router
, reg
, x
);
412 * VLSI: nibble offset 0x74 - educated guess due to routing table and
413 * config space of VLSI 82C534 PCI-bridge/router (1004:0102)
414 * Tested on HP OmniBook 800 covering PIRQ 1, 2, 4, 8 for onboard
415 * devices, PIRQ 3 for non-pci(!) soundchip and (untested) PIRQ 6
416 * for the busbridge to the docking station.
419 static int pirq_vlsi_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
422 printk(KERN_INFO
"VLSI router pirq escape (%d)\n", pirq
);
425 return read_config_nybble(router
, 0x74, pirq
-1);
428 static int pirq_vlsi_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
431 printk(KERN_INFO
"VLSI router pirq escape (%d)\n", pirq
);
434 write_config_nybble(router
, 0x74, pirq
-1, irq
);
439 * ServerWorks: PCI interrupts mapped to system IRQ lines through Index
440 * and Redirect I/O registers (0x0c00 and 0x0c01). The Index register
441 * format is (PCIIRQ## | 0x10), e.g.: PCIIRQ10=0x1a. The Redirect
442 * register is a straight binary coding of desired PIC IRQ (low nibble).
444 * The 'link' value in the PIRQ table is already in the correct format
445 * for the Index register. There are some special index values:
446 * 0x00 for ACPI (SCI), 0x01 for USB, 0x02 for IDE0, 0x04 for IDE1,
447 * and 0x03 for SMBus.
449 static int pirq_serverworks_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
452 return inb(0xc01) & 0xf;
455 static int pirq_serverworks_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
462 /* Support for AMD756 PCI IRQ Routing
463 * Jhon H. Caicedo <jhcaiced@osso.org.co>
464 * Jun/21/2001 0.2.0 Release, fixed to use "nybble" functions... (jhcaiced)
465 * Jun/19/2001 Alpha Release 0.1.0 (jhcaiced)
466 * The AMD756 pirq rules are nibble-based
467 * offset 0x56 0-3 PIRQA 4-7 PIRQB
468 * offset 0x57 0-3 PIRQC 4-7 PIRQD
470 static int pirq_amd756_get(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
)
476 irq
= read_config_nybble(router
, 0x56, pirq
- 1);
478 printk(KERN_INFO
"AMD756: dev %04x:%04x, router pirq : %d get irq : %2d\n",
479 dev
->vendor
, dev
->device
, pirq
, irq
);
483 static int pirq_amd756_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
485 printk(KERN_INFO
"AMD756: dev %04x:%04x, router pirq : %d SET irq : %2d\n",
486 dev
->vendor
, dev
->device
, pirq
, irq
);
489 write_config_nybble(router
, 0x56, pirq
- 1, irq
);
494 #ifdef CONFIG_PCI_BIOS
496 static int pirq_bios_set(struct pci_dev
*router
, struct pci_dev
*dev
, int pirq
, int irq
)
498 struct pci_dev
*bridge
;
499 int pin
= pci_get_interrupt_pin(dev
, &bridge
);
500 return pcibios_set_irq_routing(bridge
, pin
, irq
);
505 static __init
int intel_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
507 static struct pci_device_id __initdata pirq_440gx
[] = {
508 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82443GX_0
) },
509 { PCI_DEVICE(PCI_VENDOR_ID_INTEL
, PCI_DEVICE_ID_INTEL_82443GX_2
) },
513 /* 440GX has a proprietary PIRQ router -- don't use it */
514 if (pci_dev_present(pirq_440gx
))
519 case PCI_DEVICE_ID_INTEL_82371FB_0
:
520 case PCI_DEVICE_ID_INTEL_82371SB_0
:
521 case PCI_DEVICE_ID_INTEL_82371AB_0
:
522 case PCI_DEVICE_ID_INTEL_82371MX
:
523 case PCI_DEVICE_ID_INTEL_82443MX_0
:
524 case PCI_DEVICE_ID_INTEL_82801AA_0
:
525 case PCI_DEVICE_ID_INTEL_82801AB_0
:
526 case PCI_DEVICE_ID_INTEL_82801BA_0
:
527 case PCI_DEVICE_ID_INTEL_82801BA_10
:
528 case PCI_DEVICE_ID_INTEL_82801CA_0
:
529 case PCI_DEVICE_ID_INTEL_82801CA_12
:
530 case PCI_DEVICE_ID_INTEL_82801DB_0
:
531 case PCI_DEVICE_ID_INTEL_82801E_0
:
532 case PCI_DEVICE_ID_INTEL_82801EB_0
:
533 case PCI_DEVICE_ID_INTEL_ESB_1
:
534 case PCI_DEVICE_ID_INTEL_ICH6_0
:
535 case PCI_DEVICE_ID_INTEL_ICH6_1
:
536 case PCI_DEVICE_ID_INTEL_ICH7_0
:
537 case PCI_DEVICE_ID_INTEL_ICH7_1
:
538 case PCI_DEVICE_ID_INTEL_ICH7_30
:
539 case PCI_DEVICE_ID_INTEL_ICH7_31
:
540 case PCI_DEVICE_ID_INTEL_ESB2_0
:
541 case PCI_DEVICE_ID_INTEL_ICH8_0
:
542 case PCI_DEVICE_ID_INTEL_ICH8_1
:
543 case PCI_DEVICE_ID_INTEL_ICH8_2
:
544 case PCI_DEVICE_ID_INTEL_ICH8_3
:
545 case PCI_DEVICE_ID_INTEL_ICH8_4
:
546 r
->name
= "PIIX/ICH";
547 r
->get
= pirq_piix_get
;
548 r
->set
= pirq_piix_set
;
554 static __init
int via_router_probe(struct irq_router
*r
,
555 struct pci_dev
*router
, u16 device
)
557 /* FIXME: We should move some of the quirk fixup stuff here */
560 * work arounds for some buggy BIOSes
562 if (device
== PCI_DEVICE_ID_VIA_82C586_0
) {
563 switch(router
->device
) {
564 case PCI_DEVICE_ID_VIA_82C686
:
566 * Asus k7m bios wrongly reports 82C686A
569 device
= PCI_DEVICE_ID_VIA_82C686
;
571 case PCI_DEVICE_ID_VIA_8235
:
573 * Asus a7v-x bios wrongly reports 8235
576 device
= PCI_DEVICE_ID_VIA_8235
;
582 case PCI_DEVICE_ID_VIA_82C586_0
:
584 r
->get
= pirq_via586_get
;
585 r
->set
= pirq_via586_set
;
587 case PCI_DEVICE_ID_VIA_82C596
:
588 case PCI_DEVICE_ID_VIA_82C686
:
589 case PCI_DEVICE_ID_VIA_8231
:
590 case PCI_DEVICE_ID_VIA_8233A
:
591 case PCI_DEVICE_ID_VIA_8235
:
592 case PCI_DEVICE_ID_VIA_8237
:
593 /* FIXME: add new ones for 8233/5 */
595 r
->get
= pirq_via_get
;
596 r
->set
= pirq_via_set
;
602 static __init
int vlsi_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
606 case PCI_DEVICE_ID_VLSI_82C534
:
607 r
->name
= "VLSI 82C534";
608 r
->get
= pirq_vlsi_get
;
609 r
->set
= pirq_vlsi_set
;
616 static __init
int serverworks_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
620 case PCI_DEVICE_ID_SERVERWORKS_OSB4
:
621 case PCI_DEVICE_ID_SERVERWORKS_CSB5
:
622 r
->name
= "ServerWorks";
623 r
->get
= pirq_serverworks_get
;
624 r
->set
= pirq_serverworks_set
;
630 static __init
int sis_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
632 if (device
!= PCI_DEVICE_ID_SI_503
)
636 r
->get
= pirq_sis_get
;
637 r
->set
= pirq_sis_set
;
641 static __init
int cyrix_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
645 case PCI_DEVICE_ID_CYRIX_5520
:
647 r
->get
= pirq_cyrix_get
;
648 r
->set
= pirq_cyrix_set
;
654 static __init
int opti_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
658 case PCI_DEVICE_ID_OPTI_82C700
:
660 r
->get
= pirq_opti_get
;
661 r
->set
= pirq_opti_set
;
667 static __init
int ite_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
671 case PCI_DEVICE_ID_ITE_IT8330G_0
:
673 r
->get
= pirq_ite_get
;
674 r
->set
= pirq_ite_set
;
680 static __init
int ali_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
684 case PCI_DEVICE_ID_AL_M1533
:
685 case PCI_DEVICE_ID_AL_M1563
:
686 printk(KERN_DEBUG
"PCI: Using ALI IRQ Router\n");
688 r
->get
= pirq_ali_get
;
689 r
->set
= pirq_ali_set
;
695 static __init
int amd_router_probe(struct irq_router
*r
, struct pci_dev
*router
, u16 device
)
699 case PCI_DEVICE_ID_AMD_VIPER_740B
:
702 case PCI_DEVICE_ID_AMD_VIPER_7413
:
705 case PCI_DEVICE_ID_AMD_VIPER_7443
:
711 r
->get
= pirq_amd756_get
;
712 r
->set
= pirq_amd756_set
;
716 static __initdata
struct irq_router_handler pirq_routers
[] = {
717 { PCI_VENDOR_ID_INTEL
, intel_router_probe
},
718 { PCI_VENDOR_ID_AL
, ali_router_probe
},
719 { PCI_VENDOR_ID_ITE
, ite_router_probe
},
720 { PCI_VENDOR_ID_VIA
, via_router_probe
},
721 { PCI_VENDOR_ID_OPTI
, opti_router_probe
},
722 { PCI_VENDOR_ID_SI
, sis_router_probe
},
723 { PCI_VENDOR_ID_CYRIX
, cyrix_router_probe
},
724 { PCI_VENDOR_ID_VLSI
, vlsi_router_probe
},
725 { PCI_VENDOR_ID_SERVERWORKS
, serverworks_router_probe
},
726 { PCI_VENDOR_ID_AMD
, amd_router_probe
},
727 /* Someone with docs needs to add the ATI Radeon IGP */
730 static struct irq_router pirq_router
;
731 static struct pci_dev
*pirq_router_dev
;
735 * FIXME: should we have an option to say "generic for
739 static void __init
pirq_find_router(struct irq_router
*r
)
741 struct irq_routing_table
*rt
= pirq_table
;
742 struct irq_router_handler
*h
;
744 #ifdef CONFIG_PCI_BIOS
745 if (!rt
->signature
) {
746 printk(KERN_INFO
"PCI: Using BIOS for IRQ routing\n");
747 r
->set
= pirq_bios_set
;
753 /* Default unless a driver reloads it */
758 DBG(KERN_DEBUG
"PCI: Attempting to find IRQ router for %04x:%04x\n",
759 rt
->rtr_vendor
, rt
->rtr_device
);
761 pirq_router_dev
= pci_find_slot(rt
->rtr_bus
, rt
->rtr_devfn
);
762 if (!pirq_router_dev
) {
763 DBG(KERN_DEBUG
"PCI: Interrupt router not found at "
764 "%02x:%02x\n", rt
->rtr_bus
, rt
->rtr_devfn
);
768 for( h
= pirq_routers
; h
->vendor
; h
++) {
769 /* First look for a router match */
770 if (rt
->rtr_vendor
== h
->vendor
&& h
->probe(r
, pirq_router_dev
, rt
->rtr_device
))
772 /* Fall back to a device match */
773 if (pirq_router_dev
->vendor
== h
->vendor
&& h
->probe(r
, pirq_router_dev
, pirq_router_dev
->device
))
776 printk(KERN_INFO
"PCI: Using IRQ router %s [%04x/%04x] at %s\n",
778 pirq_router_dev
->vendor
,
779 pirq_router_dev
->device
,
780 pci_name(pirq_router_dev
));
783 static struct irq_info
*pirq_get_info(struct pci_dev
*dev
)
785 struct irq_routing_table
*rt
= pirq_table
;
786 int entries
= (rt
->size
- sizeof(struct irq_routing_table
)) / sizeof(struct irq_info
);
787 struct irq_info
*info
;
789 for (info
= rt
->slots
; entries
--; info
++)
790 if (info
->bus
== dev
->bus
->number
&& PCI_SLOT(info
->devfn
) == PCI_SLOT(dev
->devfn
))
795 static int pcibios_lookup_irq(struct pci_dev
*dev
, int assign
)
798 struct irq_info
*info
;
802 struct irq_router
*r
= &pirq_router
;
803 struct pci_dev
*dev2
= NULL
;
807 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
809 DBG(KERN_DEBUG
" -> no interrupt pin\n");
814 /* Find IRQ routing entry */
819 DBG(KERN_DEBUG
"IRQ for %s[%c]", pci_name(dev
), 'A' + pin
);
820 info
= pirq_get_info(dev
);
822 DBG(" -> not found in routing table\n" KERN_DEBUG
);
825 pirq
= info
->irq
[pin
].link
;
826 mask
= info
->irq
[pin
].bitmap
;
828 DBG(" -> not routed\n" KERN_DEBUG
);
831 DBG(" -> PIRQ %02x, mask %04x, excl %04x", pirq
, mask
, pirq_table
->exclusive_irqs
);
832 mask
&= pcibios_irq_mask
;
834 /* Work around broken HP Pavilion Notebooks which assign USB to
835 IRQ 9 even though it is actually wired to IRQ 11 */
837 if (broken_hp_bios_irq9
&& pirq
== 0x59 && dev
->irq
== 9) {
839 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, 11);
840 r
->set(pirq_router_dev
, dev
, pirq
, 11);
843 /* same for Acer Travelmate 360, but with CB and irq 11 -> 10 */
844 if (acer_tm360_irqrouting
&& dev
->irq
== 11 && dev
->vendor
== PCI_VENDOR_ID_O2
) {
847 dev
->irq
= r
->get(pirq_router_dev
, dev
, pirq
);
848 pci_write_config_byte(dev
, PCI_INTERRUPT_LINE
, dev
->irq
);
852 * Find the best IRQ to assign: use the one
853 * reported by the device if possible.
856 if (newirq
&& !((1 << newirq
) & mask
)) {
857 if ( pci_probe
& PCI_USE_PIRQ_MASK
) newirq
= 0;
858 else printk("\n" KERN_WARNING
859 "PCI: IRQ %i for device %s doesn't match PIRQ mask "
860 "- try pci=usepirqmask\n" KERN_DEBUG
, newirq
,
863 if (!newirq
&& assign
) {
864 for (i
= 0; i
< 16; i
++) {
865 if (!(mask
& (1 << i
)))
867 if (pirq_penalty
[i
] < pirq_penalty
[newirq
] && can_request_irq(i
, IRQF_SHARED
))
871 DBG(" -> newirq=%d", newirq
);
873 /* Check if it is hardcoded */
874 if ((pirq
& 0xf0) == 0xf0) {
876 DBG(" -> hardcoded IRQ %d\n", irq
);
878 } else if ( r
->get
&& (irq
= r
->get(pirq_router_dev
, dev
, pirq
)) && \
879 ((!(pci_probe
& PCI_USE_PIRQ_MASK
)) || ((1 << irq
) & mask
)) ) {
880 DBG(" -> got IRQ %d\n", irq
);
882 eisa_set_level_irq(irq
);
883 } else if (newirq
&& r
->set
&& (dev
->class >> 8) != PCI_CLASS_DISPLAY_VGA
) {
884 DBG(" -> assigning IRQ %d", newirq
);
885 if (r
->set(pirq_router_dev
, dev
, pirq
, newirq
)) {
886 eisa_set_level_irq(newirq
);
894 DBG(" ... failed\n");
895 if (newirq
&& mask
== (1 << newirq
)) {
901 printk(KERN_INFO
"PCI: %s IRQ %d for device %s\n", msg
, irq
, pci_name(dev
));
903 /* Update IRQ for all devices with the same pirq value */
904 while ((dev2
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev2
)) != NULL
) {
905 pci_read_config_byte(dev2
, PCI_INTERRUPT_PIN
, &pin
);
909 info
= pirq_get_info(dev2
);
912 if (info
->irq
[pin
].link
== pirq
) {
913 /* We refuse to override the dev->irq information. Give a warning! */
914 if ( dev2
->irq
&& dev2
->irq
!= irq
&& \
915 (!(pci_probe
& PCI_USE_PIRQ_MASK
) || \
916 ((1 << dev2
->irq
) & mask
)) ) {
917 #ifndef CONFIG_PCI_MSI
918 printk(KERN_INFO
"IRQ routing conflict for %s, have irq %d, want irq %d\n",
919 pci_name(dev2
), dev2
->irq
, irq
);
926 printk(KERN_INFO
"PCI: Sharing IRQ %d with %s\n", irq
, pci_name(dev2
));
932 static void __init
pcibios_fixup_irqs(void)
934 struct pci_dev
*dev
= NULL
;
937 DBG(KERN_DEBUG
"PCI: IRQ fixup\n");
938 while ((dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
)) != NULL
) {
940 * If the BIOS has set an out of range IRQ number, just ignore it.
941 * Also keep track of which IRQ's are already in use.
943 if (dev
->irq
>= 16) {
944 DBG(KERN_DEBUG
"%s: ignoring bogus IRQ %d\n", pci_name(dev
), dev
->irq
);
947 /* If the IRQ is already assigned to a PCI device, ignore its ISA use penalty */
948 if (pirq_penalty
[dev
->irq
] >= 100 && pirq_penalty
[dev
->irq
] < 100000)
949 pirq_penalty
[dev
->irq
] = 0;
950 pirq_penalty
[dev
->irq
]++;
954 while ((dev
= pci_get_device(PCI_ANY_ID
, PCI_ANY_ID
, dev
)) != NULL
) {
955 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
956 #ifdef CONFIG_X86_IO_APIC
958 * Recalculate IRQ numbers if we use the I/O APIC.
960 if (io_apic_assign_pci_irqs
)
965 pin
--; /* interrupt pins are numbered starting from 1 */
966 irq
= IO_APIC_get_PCI_irq_vector(dev
->bus
->number
, PCI_SLOT(dev
->devfn
), pin
);
968 * Busses behind bridges are typically not listed in the MP-table.
969 * In this case we have to look up the IRQ based on the parent bus,
970 * parent slot, and pin number. The SMP code detects such bridged
971 * busses itself so we should get into this branch reliably.
973 if (irq
< 0 && dev
->bus
->parent
) { /* go back to the bridge */
974 struct pci_dev
* bridge
= dev
->bus
->self
;
976 pin
= (pin
+ PCI_SLOT(dev
->devfn
)) % 4;
977 irq
= IO_APIC_get_PCI_irq_vector(bridge
->bus
->number
,
978 PCI_SLOT(bridge
->devfn
), pin
);
980 printk(KERN_WARNING
"PCI: using PPB %s[%c] to get irq %d\n",
981 pci_name(bridge
), 'A' + pin
, irq
);
984 printk(KERN_INFO
"PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
985 pci_name(dev
), 'A' + pin
, irq
);
992 * Still no IRQ? Try to lookup one...
994 if (pin
&& !dev
->irq
)
995 pcibios_lookup_irq(dev
, 0);
1000 * Work around broken HP Pavilion Notebooks which assign USB to
1001 * IRQ 9 even though it is actually wired to IRQ 11
1003 static int __init
fix_broken_hp_bios_irq9(struct dmi_system_id
*d
)
1005 if (!broken_hp_bios_irq9
) {
1006 broken_hp_bios_irq9
= 1;
1007 printk(KERN_INFO
"%s detected - fixing broken IRQ routing\n", d
->ident
);
1013 * Work around broken Acer TravelMate 360 Notebooks which assign
1014 * Cardbus to IRQ 11 even though it is actually wired to IRQ 10
1016 static int __init
fix_acer_tm360_irqrouting(struct dmi_system_id
*d
)
1018 if (!acer_tm360_irqrouting
) {
1019 acer_tm360_irqrouting
= 1;
1020 printk(KERN_INFO
"%s detected - fixing broken IRQ routing\n", d
->ident
);
1025 static struct dmi_system_id __initdata pciirq_dmi_table
[] = {
1027 .callback
= fix_broken_hp_bios_irq9
,
1028 .ident
= "HP Pavilion N5400 Series Laptop",
1030 DMI_MATCH(DMI_SYS_VENDOR
, "Hewlett-Packard"),
1031 DMI_MATCH(DMI_BIOS_VERSION
, "GE.M1.03"),
1032 DMI_MATCH(DMI_PRODUCT_VERSION
, "HP Pavilion Notebook Model GE"),
1033 DMI_MATCH(DMI_BOARD_VERSION
, "OmniBook N32N-736"),
1037 .callback
= fix_acer_tm360_irqrouting
,
1038 .ident
= "Acer TravelMate 36x Laptop",
1040 DMI_MATCH(DMI_SYS_VENDOR
, "Acer"),
1041 DMI_MATCH(DMI_PRODUCT_NAME
, "TravelMate 360"),
1047 static int __init
pcibios_irq_init(void)
1049 DBG(KERN_DEBUG
"PCI: IRQ init\n");
1051 if (pcibios_enable_irq
|| raw_pci_ops
== NULL
)
1054 dmi_check_system(pciirq_dmi_table
);
1056 pirq_table
= pirq_find_routing_table();
1058 #ifdef CONFIG_PCI_BIOS
1059 if (!pirq_table
&& (pci_probe
& PCI_BIOS_IRQ_SCAN
))
1060 pirq_table
= pcibios_get_irq_routing_table();
1064 pirq_find_router(&pirq_router
);
1065 if (pirq_table
->exclusive_irqs
) {
1067 for (i
=0; i
<16; i
++)
1068 if (!(pirq_table
->exclusive_irqs
& (1 << i
)))
1069 pirq_penalty
[i
] += 100;
1071 /* If we're using the I/O APIC, avoid using the PCI IRQ routing table */
1072 if (io_apic_assign_pci_irqs
)
1076 pcibios_enable_irq
= pirq_enable_irq
;
1078 pcibios_fixup_irqs();
1082 subsys_initcall(pcibios_irq_init
);
1085 static void pirq_penalize_isa_irq(int irq
, int active
)
1088 * If any ISAPnP device reports an IRQ in its list of possible
1089 * IRQ's, we try to avoid assigning it to PCI devices.
1093 pirq_penalty
[irq
] += 1000;
1095 pirq_penalty
[irq
] += 100;
1099 void pcibios_penalize_isa_irq(int irq
, int active
)
1103 acpi_penalize_isa_irq(irq
, active
);
1106 pirq_penalize_isa_irq(irq
, active
);
1109 static int pirq_enable_irq(struct pci_dev
*dev
)
1112 struct pci_dev
*temp_dev
;
1114 pci_read_config_byte(dev
, PCI_INTERRUPT_PIN
, &pin
);
1115 if (pin
&& !pcibios_lookup_irq(dev
, 1) && !dev
->irq
) {
1118 pin
--; /* interrupt pins are numbered starting from 1 */
1120 if (io_apic_assign_pci_irqs
) {
1123 irq
= IO_APIC_get_PCI_irq_vector(dev
->bus
->number
, PCI_SLOT(dev
->devfn
), pin
);
1125 * Busses behind bridges are typically not listed in the MP-table.
1126 * In this case we have to look up the IRQ based on the parent bus,
1127 * parent slot, and pin number. The SMP code detects such bridged
1128 * busses itself so we should get into this branch reliably.
1131 while (irq
< 0 && dev
->bus
->parent
) { /* go back to the bridge */
1132 struct pci_dev
* bridge
= dev
->bus
->self
;
1134 pin
= (pin
+ PCI_SLOT(dev
->devfn
)) % 4;
1135 irq
= IO_APIC_get_PCI_irq_vector(bridge
->bus
->number
,
1136 PCI_SLOT(bridge
->devfn
), pin
);
1138 printk(KERN_WARNING
"PCI: using PPB %s[%c] to get irq %d\n",
1139 pci_name(bridge
), 'A' + pin
, irq
);
1144 #ifdef CONFIG_PCI_MSI
1145 if (!platform_legacy_irq(irq
))
1146 irq
= IO_APIC_VECTOR(irq
);
1148 printk(KERN_INFO
"PCI->APIC IRQ transform: %s[%c] -> IRQ %d\n",
1149 pci_name(dev
), 'A' + pin
, irq
);
1153 msg
= " Probably buggy MP table.";
1154 } else if (pci_probe
& PCI_BIOS_IRQ_SCAN
)
1157 msg
= " Please try using pci=biosirq.";
1159 /* With IDE legacy devices the IRQ lookup failure is not a problem.. */
1160 if (dev
->class >> 8 == PCI_CLASS_STORAGE_IDE
&& !(dev
->class & 0x5))
1163 printk(KERN_WARNING
"PCI: No IRQ known for interrupt pin %c of device %s.%s\n",
1164 'A' + pin
, pci_name(dev
), msg
);