2 * processor_idle - idle state submodule to the ACPI processor driver
4 * Copyright (C) 2001, 2002 Andy Grover <andrew.grover@intel.com>
5 * Copyright (C) 2001, 2002 Paul Diefenbaugh <paul.s.diefenbaugh@intel.com>
6 * Copyright (C) 2004, 2005 Dominik Brodowski <linux@brodo.de>
7 * Copyright (C) 2004 Anil S Keshavamurthy <anil.s.keshavamurthy@intel.com>
8 * - Added processor hotplug support
9 * Copyright (C) 2005 Venkatesh Pallipadi <venkatesh.pallipadi@intel.com>
10 * - Added support for C3 on SMP
12 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License as published by
16 * the Free Software Foundation; either version 2 of the License, or (at
17 * your option) any later version.
19 * This program is distributed in the hope that it will be useful, but
20 * WITHOUT ANY WARRANTY; without even the implied warranty of
21 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
22 * General Public License for more details.
24 * You should have received a copy of the GNU General Public License along
25 * with this program; if not, write to the Free Software Foundation, Inc.,
26 * 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA.
28 * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
31 #include <linux/kernel.h>
32 #include <linux/module.h>
33 #include <linux/init.h>
34 #include <linux/cpufreq.h>
35 #include <linux/proc_fs.h>
36 #include <linux/seq_file.h>
37 #include <linux/acpi.h>
38 #include <linux/dmi.h>
39 #include <linux/moduleparam.h>
40 #include <linux/sched.h> /* need_resched() */
41 #include <linux/latency.h>
42 #include <linux/clockchips.h>
45 * Include the apic definitions for x86 to have the APIC timer related defines
46 * available also for UP (on SMP it gets magically included via linux/smp.h).
47 * asm/acpi.h is not an option, as it would require more include magic. Also
48 * creating an empty asm-ia64/apic.h would just trade pest vs. cholera.
55 #include <asm/uaccess.h>
57 #include <acpi/acpi_bus.h>
58 #include <acpi/processor.h>
60 #define ACPI_PROCESSOR_COMPONENT 0x01000000
61 #define ACPI_PROCESSOR_CLASS "processor"
62 #define _COMPONENT ACPI_PROCESSOR_COMPONENT
63 ACPI_MODULE_NAME("processor_idle");
64 #define ACPI_PROCESSOR_FILE_POWER "power"
65 #define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
66 #define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
67 #define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
68 #define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
69 static void (*pm_idle_save
) (void) __read_mostly
;
70 module_param(max_cstate
, uint
, 0644);
72 static unsigned int nocst __read_mostly
;
73 module_param(nocst
, uint
, 0000);
76 * bm_history -- bit-mask with a bit per jiffy of bus-master activity
77 * 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
78 * 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
79 * 100 HZ: 0x0000000F: 4 jiffies = 40ms
80 * reduce history for more aggressive entry into C3
82 static unsigned int bm_history __read_mostly
=
83 (HZ
>= 800 ? 0xFFFFFFFF : ((1U << (HZ
/ 25)) - 1));
84 module_param(bm_history
, uint
, 0644);
85 /* --------------------------------------------------------------------------
87 -------------------------------------------------------------------------- */
90 * IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
91 * For now disable this. Probably a bug somewhere else.
93 * To skip this limit, boot/load with a large max_cstate limit.
95 static int set_max_cstate(struct dmi_system_id
*id
)
97 if (max_cstate
> ACPI_PROCESSOR_MAX_POWER
)
100 printk(KERN_NOTICE PREFIX
"%s detected - limiting to C%ld max_cstate."
101 " Override with \"processor.max_cstate=%d\"\n", id
->ident
,
102 (long)id
->driver_data
, ACPI_PROCESSOR_MAX_POWER
+ 1);
104 max_cstate
= (long)id
->driver_data
;
109 /* Actually this shouldn't be __cpuinitdata, would be better to fix the
110 callers to only run once -AK */
111 static struct dmi_system_id __cpuinitdata processor_power_dmi_table
[] = {
112 { set_max_cstate
, "IBM ThinkPad R40e", {
113 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
114 DMI_MATCH(DMI_BIOS_VERSION
,"1SET70WW")}, (void *)1},
115 { set_max_cstate
, "IBM ThinkPad R40e", {
116 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
117 DMI_MATCH(DMI_BIOS_VERSION
,"1SET60WW")}, (void *)1},
118 { set_max_cstate
, "IBM ThinkPad R40e", {
119 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
120 DMI_MATCH(DMI_BIOS_VERSION
,"1SET43WW") }, (void*)1},
121 { set_max_cstate
, "IBM ThinkPad R40e", {
122 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
123 DMI_MATCH(DMI_BIOS_VERSION
,"1SET45WW") }, (void*)1},
124 { set_max_cstate
, "IBM ThinkPad R40e", {
125 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
126 DMI_MATCH(DMI_BIOS_VERSION
,"1SET47WW") }, (void*)1},
127 { set_max_cstate
, "IBM ThinkPad R40e", {
128 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
129 DMI_MATCH(DMI_BIOS_VERSION
,"1SET50WW") }, (void*)1},
130 { set_max_cstate
, "IBM ThinkPad R40e", {
131 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
132 DMI_MATCH(DMI_BIOS_VERSION
,"1SET52WW") }, (void*)1},
133 { set_max_cstate
, "IBM ThinkPad R40e", {
134 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
135 DMI_MATCH(DMI_BIOS_VERSION
,"1SET55WW") }, (void*)1},
136 { set_max_cstate
, "IBM ThinkPad R40e", {
137 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
138 DMI_MATCH(DMI_BIOS_VERSION
,"1SET56WW") }, (void*)1},
139 { set_max_cstate
, "IBM ThinkPad R40e", {
140 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
141 DMI_MATCH(DMI_BIOS_VERSION
,"1SET59WW") }, (void*)1},
142 { set_max_cstate
, "IBM ThinkPad R40e", {
143 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
144 DMI_MATCH(DMI_BIOS_VERSION
,"1SET60WW") }, (void*)1},
145 { set_max_cstate
, "IBM ThinkPad R40e", {
146 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
147 DMI_MATCH(DMI_BIOS_VERSION
,"1SET61WW") }, (void*)1},
148 { set_max_cstate
, "IBM ThinkPad R40e", {
149 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
150 DMI_MATCH(DMI_BIOS_VERSION
,"1SET62WW") }, (void*)1},
151 { set_max_cstate
, "IBM ThinkPad R40e", {
152 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
153 DMI_MATCH(DMI_BIOS_VERSION
,"1SET64WW") }, (void*)1},
154 { set_max_cstate
, "IBM ThinkPad R40e", {
155 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
156 DMI_MATCH(DMI_BIOS_VERSION
,"1SET65WW") }, (void*)1},
157 { set_max_cstate
, "IBM ThinkPad R40e", {
158 DMI_MATCH(DMI_BIOS_VENDOR
,"IBM"),
159 DMI_MATCH(DMI_BIOS_VERSION
,"1SET68WW") }, (void*)1},
160 { set_max_cstate
, "Medion 41700", {
161 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
162 DMI_MATCH(DMI_BIOS_VERSION
,"R01-A1J")}, (void *)1},
163 { set_max_cstate
, "Clevo 5600D", {
164 DMI_MATCH(DMI_BIOS_VENDOR
,"Phoenix Technologies LTD"),
165 DMI_MATCH(DMI_BIOS_VERSION
,"SHE845M0.86C.0013.D.0302131307")},
170 static inline u32
ticks_elapsed(u32 t1
, u32 t2
)
174 else if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_32BIT_TIMER
))
175 return (((0x00FFFFFF - t1
) + t2
) & 0x00FFFFFF);
177 return ((0xFFFFFFFF - t1
) + t2
);
181 acpi_processor_power_activate(struct acpi_processor
*pr
,
182 struct acpi_processor_cx
*new)
184 struct acpi_processor_cx
*old
;
189 old
= pr
->power
.state
;
192 old
->promotion
.count
= 0;
193 new->demotion
.count
= 0;
195 /* Cleanup from old state. */
199 /* Disable bus master reload */
200 if (new->type
!= ACPI_STATE_C3
&& pr
->flags
.bm_check
)
201 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 0);
206 /* Prepare to use new state. */
209 /* Enable bus master reload */
210 if (old
->type
!= ACPI_STATE_C3
&& pr
->flags
.bm_check
)
211 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 1);
215 pr
->power
.state
= new;
220 static void acpi_safe_halt(void)
222 current_thread_info()->status
&= ~TS_POLLING
;
224 * TS_POLLING-cleared state must be visible before we
230 current_thread_info()->status
|= TS_POLLING
;
233 static atomic_t c3_cpu_count
;
235 /* Common C-state entry for C2, C3, .. */
236 static void acpi_cstate_enter(struct acpi_processor_cx
*cstate
)
238 if (cstate
->space_id
== ACPI_CSTATE_FFH
) {
239 /* Call into architectural FFH based C-state */
240 acpi_processor_ffh_cstate_enter(cstate
);
243 /* IO port based C-state */
244 inb(cstate
->address
);
245 /* Dummy wait op - must do something useless after P_LVL2 read
246 because chipsets cannot guarantee that STPCLK# signal
247 gets asserted in time to freeze execution properly. */
248 unused
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
252 #ifdef ARCH_APICTIMER_STOPS_ON_C3
255 * Some BIOS implementations switch to C3 in the published C2 state.
256 * This seems to be a common problem on AMD boxen, but other vendors
257 * are affected too. We pick the most conservative approach: we assume
258 * that the local APIC stops in both C2 and C3.
260 static void acpi_timer_check_state(int state
, struct acpi_processor
*pr
,
261 struct acpi_processor_cx
*cx
)
263 struct acpi_processor_power
*pwr
= &pr
->power
;
264 u8 type
= local_apic_timer_c2_ok
? ACPI_STATE_C3
: ACPI_STATE_C2
;
267 * Check, if one of the previous states already marked the lapic
270 if (pwr
->timer_broadcast_on_state
< state
)
273 if (cx
->type
>= type
)
274 pr
->power
.timer_broadcast_on_state
= state
;
277 static void acpi_propagate_timer_broadcast(struct acpi_processor
*pr
)
279 #ifdef CONFIG_GENERIC_CLOCKEVENTS
280 unsigned long reason
;
282 reason
= pr
->power
.timer_broadcast_on_state
< INT_MAX
?
283 CLOCK_EVT_NOTIFY_BROADCAST_ON
: CLOCK_EVT_NOTIFY_BROADCAST_OFF
;
285 clockevents_notify(reason
, &pr
->id
);
287 cpumask_t mask
= cpumask_of_cpu(pr
->id
);
289 if (pr
->power
.timer_broadcast_on_state
< INT_MAX
)
290 on_each_cpu(switch_APIC_timer_to_ipi
, &mask
, 1, 1);
292 on_each_cpu(switch_ipi_to_APIC_timer
, &mask
, 1, 1);
296 /* Power(C) State timer broadcast control */
297 static void acpi_state_timer_broadcast(struct acpi_processor
*pr
,
298 struct acpi_processor_cx
*cx
,
301 #ifdef CONFIG_GENERIC_CLOCKEVENTS
303 int state
= cx
- pr
->power
.states
;
305 if (state
>= pr
->power
.timer_broadcast_on_state
) {
306 unsigned long reason
;
308 reason
= broadcast
? CLOCK_EVT_NOTIFY_BROADCAST_ENTER
:
309 CLOCK_EVT_NOTIFY_BROADCAST_EXIT
;
310 clockevents_notify(reason
, &pr
->id
);
317 static void acpi_timer_check_state(int state
, struct acpi_processor
*pr
,
318 struct acpi_processor_cx
*cstate
) { }
319 static void acpi_propagate_timer_broadcast(struct acpi_processor
*pr
) { }
320 static void acpi_state_timer_broadcast(struct acpi_processor
*pr
,
321 struct acpi_processor_cx
*cx
,
328 static void acpi_processor_idle(void)
330 struct acpi_processor
*pr
= NULL
;
331 struct acpi_processor_cx
*cx
= NULL
;
332 struct acpi_processor_cx
*next_state
= NULL
;
337 * Interrupts must be disabled during bus mastering calculations and
338 * for C2/C3 transitions.
342 pr
= processors
[smp_processor_id()];
349 * Check whether we truly need to go idle, or should
352 if (unlikely(need_resched())) {
357 cx
= pr
->power
.state
;
369 * Check for bus mastering activity (if required), record, and check
372 if (pr
->flags
.bm_check
) {
374 unsigned long diff
= jiffies
- pr
->power
.bm_check_timestamp
;
379 pr
->power
.bm_activity
<<= diff
;
381 acpi_get_register(ACPI_BITREG_BUS_MASTER_STATUS
, &bm_status
);
383 pr
->power
.bm_activity
|= 0x1;
384 acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS
, 1);
387 * PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
388 * the true state of bus mastering activity; forcing us to
389 * manually check the BMIDEA bit of each IDE channel.
391 else if (errata
.piix4
.bmisx
) {
392 if ((inb_p(errata
.piix4
.bmisx
+ 0x02) & 0x01)
393 || (inb_p(errata
.piix4
.bmisx
+ 0x0A) & 0x01))
394 pr
->power
.bm_activity
|= 0x1;
397 pr
->power
.bm_check_timestamp
= jiffies
;
400 * If bus mastering is or was active this jiffy, demote
401 * to avoid a faulty transition. Note that the processor
402 * won't enter a low-power state during this call (to this
403 * function) but should upon the next.
405 * TBD: A better policy might be to fallback to the demotion
406 * state (use it for this quantum only) istead of
407 * demoting -- and rely on duration as our sole demotion
408 * qualification. This may, however, introduce DMA
409 * issues (e.g. floppy DMA transfer overrun/underrun).
411 if ((pr
->power
.bm_activity
& 0x1) &&
412 cx
->demotion
.threshold
.bm
) {
414 next_state
= cx
->demotion
.state
;
419 #ifdef CONFIG_HOTPLUG_CPU
421 * Check for P_LVL2_UP flag before entering C2 and above on
422 * an SMP system. We do it here instead of doing it at _CST/P_LVL
423 * detection phase, to work cleanly with logical CPU hotplug.
425 if ((cx
->type
!= ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
426 !pr
->flags
.has_cst
&& !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
427 cx
= &pr
->power
.states
[ACPI_STATE_C1
];
433 * Invoke the current Cx state to put the processor to sleep.
435 if (cx
->type
== ACPI_STATE_C2
|| cx
->type
== ACPI_STATE_C3
) {
436 current_thread_info()->status
&= ~TS_POLLING
;
438 * TS_POLLING-cleared state must be visible before we
442 if (need_resched()) {
443 current_thread_info()->status
|= TS_POLLING
;
454 * Use the appropriate idle routine, the one that would
455 * be used without acpi C-states.
463 * TBD: Can't get time duration while in C1, as resumes
464 * go to an ISR rather than here. Need to instrument
465 * base interrupt handler.
467 * Note: the TSC better not stop in C1, sched_clock() will
470 sleep_ticks
= 0xFFFFFFFF;
474 /* Get start time (ticks) */
475 t1
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
476 /* Tell the scheduler that we are going deep-idle: */
477 sched_clock_idle_sleep_event();
479 acpi_state_timer_broadcast(pr
, cx
, 1);
480 acpi_cstate_enter(cx
);
481 /* Get end time (ticks) */
482 t2
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
484 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
485 /* TSC halts in C2, so notify users */
486 mark_tsc_unstable("possible TSC halt in C2");
488 /* Compute time (ticks) that we were actually asleep */
489 sleep_ticks
= ticks_elapsed(t1
, t2
);
491 /* Tell the scheduler how much we idled: */
492 sched_clock_idle_wakeup_event(sleep_ticks
*PM_TIMER_TICK_NS
);
494 /* Re-enable interrupts */
496 /* Do not account our idle-switching overhead: */
497 sleep_ticks
-= cx
->latency_ticks
+ C2_OVERHEAD
;
499 current_thread_info()->status
|= TS_POLLING
;
500 acpi_state_timer_broadcast(pr
, cx
, 0);
506 * bm_check implies we need ARB_DIS
507 * !bm_check implies we need cache flush
508 * bm_control implies whether we can do ARB_DIS
510 * That leaves a case where bm_check is set and bm_control is
511 * not set. In that case we cannot do much, we enter C3
512 * without doing anything.
514 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
515 if (atomic_inc_return(&c3_cpu_count
) ==
518 * All CPUs are trying to go to C3
519 * Disable bus master arbitration
521 acpi_set_register(ACPI_BITREG_ARB_DISABLE
, 1);
523 } else if (!pr
->flags
.bm_check
) {
524 /* SMP with no shared cache... Invalidate cache */
525 ACPI_FLUSH_CPU_CACHE();
528 /* Get start time (ticks) */
529 t1
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
531 acpi_state_timer_broadcast(pr
, cx
, 1);
532 /* Tell the scheduler that we are going deep-idle: */
533 sched_clock_idle_sleep_event();
534 acpi_cstate_enter(cx
);
535 /* Get end time (ticks) */
536 t2
= inl(acpi_gbl_FADT
.xpm_timer_block
.address
);
537 if (pr
->flags
.bm_check
&& pr
->flags
.bm_control
) {
538 /* Enable bus master arbitration */
539 atomic_dec(&c3_cpu_count
);
540 acpi_set_register(ACPI_BITREG_ARB_DISABLE
, 0);
543 #if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86_TSC)
544 /* TSC halts in C3, so notify users */
545 mark_tsc_unstable("TSC halts in C3");
547 /* Compute time (ticks) that we were actually asleep */
548 sleep_ticks
= ticks_elapsed(t1
, t2
);
549 /* Tell the scheduler how much we idled: */
550 sched_clock_idle_wakeup_event(sleep_ticks
*PM_TIMER_TICK_NS
);
552 /* Re-enable interrupts */
554 /* Do not account our idle-switching overhead: */
555 sleep_ticks
-= cx
->latency_ticks
+ C3_OVERHEAD
;
557 current_thread_info()->status
|= TS_POLLING
;
558 acpi_state_timer_broadcast(pr
, cx
, 0);
566 if ((cx
->type
!= ACPI_STATE_C1
) && (sleep_ticks
> 0))
567 cx
->time
+= sleep_ticks
;
569 next_state
= pr
->power
.state
;
571 #ifdef CONFIG_HOTPLUG_CPU
572 /* Don't do promotion/demotion */
573 if ((cx
->type
== ACPI_STATE_C1
) && (num_online_cpus() > 1) &&
574 !pr
->flags
.has_cst
&& !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
)) {
583 * Track the number of longs (time asleep is greater than threshold)
584 * and promote when the count threshold is reached. Note that bus
585 * mastering activity may prevent promotions.
586 * Do not promote above max_cstate.
588 if (cx
->promotion
.state
&&
589 ((cx
->promotion
.state
- pr
->power
.states
) <= max_cstate
)) {
590 if (sleep_ticks
> cx
->promotion
.threshold
.ticks
&&
591 cx
->promotion
.state
->latency
<= system_latency_constraint()) {
592 cx
->promotion
.count
++;
593 cx
->demotion
.count
= 0;
594 if (cx
->promotion
.count
>=
595 cx
->promotion
.threshold
.count
) {
596 if (pr
->flags
.bm_check
) {
598 (pr
->power
.bm_activity
& cx
->
599 promotion
.threshold
.bm
)) {
605 next_state
= cx
->promotion
.state
;
615 * Track the number of shorts (time asleep is less than time threshold)
616 * and demote when the usage threshold is reached.
618 if (cx
->demotion
.state
) {
619 if (sleep_ticks
< cx
->demotion
.threshold
.ticks
) {
620 cx
->demotion
.count
++;
621 cx
->promotion
.count
= 0;
622 if (cx
->demotion
.count
>= cx
->demotion
.threshold
.count
) {
623 next_state
= cx
->demotion
.state
;
631 * Demote if current state exceeds max_cstate
632 * or if the latency of the current state is unacceptable
634 if ((pr
->power
.state
- pr
->power
.states
) > max_cstate
||
635 pr
->power
.state
->latency
> system_latency_constraint()) {
636 if (cx
->demotion
.state
)
637 next_state
= cx
->demotion
.state
;
643 * If we're going to start using a new Cx state we must clean up
644 * from the previous and prepare to use the new.
646 if (next_state
!= pr
->power
.state
)
647 acpi_processor_power_activate(pr
, next_state
);
650 static int acpi_processor_set_power_policy(struct acpi_processor
*pr
)
653 unsigned int state_is_set
= 0;
654 struct acpi_processor_cx
*lower
= NULL
;
655 struct acpi_processor_cx
*higher
= NULL
;
656 struct acpi_processor_cx
*cx
;
663 * This function sets the default Cx state policy (OS idle handler).
664 * Our scheme is to promote quickly to C2 but more conservatively
665 * to C3. We're favoring C2 for its characteristics of low latency
666 * (quick response), good power savings, and ability to allow bus
667 * mastering activity. Note that the Cx state policy is completely
668 * customizable and can be altered dynamically.
672 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
673 cx
= &pr
->power
.states
[i
];
678 pr
->power
.state
= cx
;
687 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
688 cx
= &pr
->power
.states
[i
];
693 cx
->demotion
.state
= lower
;
694 cx
->demotion
.threshold
.ticks
= cx
->latency_ticks
;
695 cx
->demotion
.threshold
.count
= 1;
696 if (cx
->type
== ACPI_STATE_C3
)
697 cx
->demotion
.threshold
.bm
= bm_history
;
704 for (i
= (ACPI_PROCESSOR_MAX_POWER
- 1); i
> 0; i
--) {
705 cx
= &pr
->power
.states
[i
];
710 cx
->promotion
.state
= higher
;
711 cx
->promotion
.threshold
.ticks
= cx
->latency_ticks
;
712 if (cx
->type
>= ACPI_STATE_C2
)
713 cx
->promotion
.threshold
.count
= 4;
715 cx
->promotion
.threshold
.count
= 10;
716 if (higher
->type
== ACPI_STATE_C3
)
717 cx
->promotion
.threshold
.bm
= bm_history
;
726 static int acpi_processor_get_power_info_fadt(struct acpi_processor
*pr
)
735 /* if info is obtained from pblk/fadt, type equals state */
736 pr
->power
.states
[ACPI_STATE_C2
].type
= ACPI_STATE_C2
;
737 pr
->power
.states
[ACPI_STATE_C3
].type
= ACPI_STATE_C3
;
739 #ifndef CONFIG_HOTPLUG_CPU
741 * Check for P_LVL2_UP flag before entering C2 and above on
744 if ((num_online_cpus() > 1) &&
745 !(acpi_gbl_FADT
.flags
& ACPI_FADT_C2_MP_SUPPORTED
))
749 /* determine C2 and C3 address from pblk */
750 pr
->power
.states
[ACPI_STATE_C2
].address
= pr
->pblk
+ 4;
751 pr
->power
.states
[ACPI_STATE_C3
].address
= pr
->pblk
+ 5;
753 /* determine latencies from FADT */
754 pr
->power
.states
[ACPI_STATE_C2
].latency
= acpi_gbl_FADT
.C2latency
;
755 pr
->power
.states
[ACPI_STATE_C3
].latency
= acpi_gbl_FADT
.C3latency
;
757 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
758 "lvl2[0x%08x] lvl3[0x%08x]\n",
759 pr
->power
.states
[ACPI_STATE_C2
].address
,
760 pr
->power
.states
[ACPI_STATE_C3
].address
));
765 static int acpi_processor_get_power_info_default(struct acpi_processor
*pr
)
767 if (!pr
->power
.states
[ACPI_STATE_C1
].valid
) {
768 /* set the first C-State to C1 */
769 /* all processors need to support C1 */
770 pr
->power
.states
[ACPI_STATE_C1
].type
= ACPI_STATE_C1
;
771 pr
->power
.states
[ACPI_STATE_C1
].valid
= 1;
773 /* the C0 state only exists as a filler in our array */
774 pr
->power
.states
[ACPI_STATE_C0
].valid
= 1;
778 static int acpi_processor_get_power_info_cst(struct acpi_processor
*pr
)
780 acpi_status status
= 0;
784 struct acpi_buffer buffer
= { ACPI_ALLOCATE_BUFFER
, NULL
};
785 union acpi_object
*cst
;
793 status
= acpi_evaluate_object(pr
->handle
, "_CST", NULL
, &buffer
);
794 if (ACPI_FAILURE(status
)) {
795 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "No _CST, giving up\n"));
799 cst
= buffer
.pointer
;
801 /* There must be at least 2 elements */
802 if (!cst
|| (cst
->type
!= ACPI_TYPE_PACKAGE
) || cst
->package
.count
< 2) {
803 printk(KERN_ERR PREFIX
"not enough elements in _CST\n");
808 count
= cst
->package
.elements
[0].integer
.value
;
810 /* Validate number of power states. */
811 if (count
< 1 || count
!= cst
->package
.count
- 1) {
812 printk(KERN_ERR PREFIX
"count given by _CST is not valid\n");
817 /* Tell driver that at least _CST is supported. */
818 pr
->flags
.has_cst
= 1;
820 for (i
= 1; i
<= count
; i
++) {
821 union acpi_object
*element
;
822 union acpi_object
*obj
;
823 struct acpi_power_register
*reg
;
824 struct acpi_processor_cx cx
;
826 memset(&cx
, 0, sizeof(cx
));
828 element
= &(cst
->package
.elements
[i
]);
829 if (element
->type
!= ACPI_TYPE_PACKAGE
)
832 if (element
->package
.count
!= 4)
835 obj
= &(element
->package
.elements
[0]);
837 if (obj
->type
!= ACPI_TYPE_BUFFER
)
840 reg
= (struct acpi_power_register
*)obj
->buffer
.pointer
;
842 if (reg
->space_id
!= ACPI_ADR_SPACE_SYSTEM_IO
&&
843 (reg
->space_id
!= ACPI_ADR_SPACE_FIXED_HARDWARE
))
846 /* There should be an easy way to extract an integer... */
847 obj
= &(element
->package
.elements
[1]);
848 if (obj
->type
!= ACPI_TYPE_INTEGER
)
851 cx
.type
= obj
->integer
.value
;
853 * Some buggy BIOSes won't list C1 in _CST -
854 * Let acpi_processor_get_power_info_default() handle them later
856 if (i
== 1 && cx
.type
!= ACPI_STATE_C1
)
859 cx
.address
= reg
->address
;
860 cx
.index
= current_count
+ 1;
862 cx
.space_id
= ACPI_CSTATE_SYSTEMIO
;
863 if (reg
->space_id
== ACPI_ADR_SPACE_FIXED_HARDWARE
) {
864 if (acpi_processor_ffh_cstate_probe
865 (pr
->id
, &cx
, reg
) == 0) {
866 cx
.space_id
= ACPI_CSTATE_FFH
;
867 } else if (cx
.type
!= ACPI_STATE_C1
) {
869 * C1 is a special case where FIXED_HARDWARE
870 * can be handled in non-MWAIT way as well.
871 * In that case, save this _CST entry info.
872 * That is, we retain space_id of SYSTEM_IO for
874 * Otherwise, ignore this info and continue.
880 obj
= &(element
->package
.elements
[2]);
881 if (obj
->type
!= ACPI_TYPE_INTEGER
)
884 cx
.latency
= obj
->integer
.value
;
886 obj
= &(element
->package
.elements
[3]);
887 if (obj
->type
!= ACPI_TYPE_INTEGER
)
890 cx
.power
= obj
->integer
.value
;
893 memcpy(&(pr
->power
.states
[current_count
]), &cx
, sizeof(cx
));
896 * We support total ACPI_PROCESSOR_MAX_POWER - 1
897 * (From 1 through ACPI_PROCESSOR_MAX_POWER - 1)
899 if (current_count
>= (ACPI_PROCESSOR_MAX_POWER
- 1)) {
901 "Limiting number of power states to max (%d)\n",
902 ACPI_PROCESSOR_MAX_POWER
);
904 "Please increase ACPI_PROCESSOR_MAX_POWER if needed.\n");
909 ACPI_DEBUG_PRINT((ACPI_DB_INFO
, "Found %d power states\n",
912 /* Validate number of power states discovered */
913 if (current_count
< 2)
917 kfree(buffer
.pointer
);
922 static void acpi_processor_power_verify_c2(struct acpi_processor_cx
*cx
)
929 * C2 latency must be less than or equal to 100
932 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C2_LATENCY
) {
933 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
934 "latency too large [%d]\n", cx
->latency
));
939 * Otherwise we've met all of our C2 requirements.
940 * Normalize the C2 latency to expidite policy
943 cx
->latency_ticks
= US_TO_PM_TIMER_TICKS(cx
->latency
);
948 static void acpi_processor_power_verify_c3(struct acpi_processor
*pr
,
949 struct acpi_processor_cx
*cx
)
951 static int bm_check_flag
;
958 * C3 latency must be less than or equal to 1000
961 else if (cx
->latency
> ACPI_PROCESSOR_MAX_C3_LATENCY
) {
962 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
963 "latency too large [%d]\n", cx
->latency
));
968 * PIIX4 Erratum #18: We don't support C3 when Type-F (fast)
969 * DMA transfers are used by any ISA device to avoid livelock.
970 * Note that we could disable Type-F DMA (as recommended by
971 * the erratum), but this is known to disrupt certain ISA
972 * devices thus we take the conservative approach.
974 else if (errata
.piix4
.fdma
) {
975 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
976 "C3 not supported on PIIX4 with Type-F DMA\n"));
980 /* All the logic here assumes flags.bm_check is same across all CPUs */
981 if (!bm_check_flag
) {
982 /* Determine whether bm_check is needed based on CPU */
983 acpi_processor_power_init_bm_check(&(pr
->flags
), pr
->id
);
984 bm_check_flag
= pr
->flags
.bm_check
;
986 pr
->flags
.bm_check
= bm_check_flag
;
989 if (pr
->flags
.bm_check
) {
990 if (!pr
->flags
.bm_control
) {
991 if (pr
->flags
.has_cst
!= 1) {
992 /* bus mastering control is necessary */
993 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
994 "C3 support requires BM control\n"));
997 /* Here we enter C3 without bus mastering */
998 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
999 "C3 support without BM control\n"));
1004 * WBINVD should be set in fadt, for C3 state to be
1005 * supported on when bm_check is not required.
1007 if (!(acpi_gbl_FADT
.flags
& ACPI_FADT_WBINVD
)) {
1008 ACPI_DEBUG_PRINT((ACPI_DB_INFO
,
1009 "Cache invalidation should work properly"
1010 " for C3 to be enabled on SMP systems\n"));
1013 acpi_set_register(ACPI_BITREG_BUS_MASTER_RLD
, 0);
1017 * Otherwise we've met all of our C3 requirements.
1018 * Normalize the C3 latency to expidite policy. Enable
1019 * checking of bus mastering status (bm_check) so we can
1020 * use this in our C3 policy
1023 cx
->latency_ticks
= US_TO_PM_TIMER_TICKS(cx
->latency
);
1028 static int acpi_processor_power_verify(struct acpi_processor
*pr
)
1031 unsigned int working
= 0;
1033 pr
->power
.timer_broadcast_on_state
= INT_MAX
;
1035 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
1036 struct acpi_processor_cx
*cx
= &pr
->power
.states
[i
];
1044 acpi_processor_power_verify_c2(cx
);
1046 acpi_timer_check_state(i
, pr
, cx
);
1050 acpi_processor_power_verify_c3(pr
, cx
);
1052 acpi_timer_check_state(i
, pr
, cx
);
1060 acpi_propagate_timer_broadcast(pr
);
1065 static int acpi_processor_get_power_info(struct acpi_processor
*pr
)
1071 /* NOTE: the idle thread may not be running while calling
1074 /* Zero initialize all the C-states info. */
1075 memset(pr
->power
.states
, 0, sizeof(pr
->power
.states
));
1077 result
= acpi_processor_get_power_info_cst(pr
);
1078 if (result
== -ENODEV
)
1079 result
= acpi_processor_get_power_info_fadt(pr
);
1084 acpi_processor_get_power_info_default(pr
);
1086 pr
->power
.count
= acpi_processor_power_verify(pr
);
1089 * Set Default Policy
1090 * ------------------
1091 * Now that we know which states are supported, set the default
1092 * policy. Note that this policy can be changed dynamically
1093 * (e.g. encourage deeper sleeps to conserve battery life when
1096 result
= acpi_processor_set_power_policy(pr
);
1101 * if one state of type C2 or C3 is available, mark this
1102 * CPU as being "idle manageable"
1104 for (i
= 1; i
< ACPI_PROCESSOR_MAX_POWER
; i
++) {
1105 if (pr
->power
.states
[i
].valid
) {
1106 pr
->power
.count
= i
;
1107 if (pr
->power
.states
[i
].type
>= ACPI_STATE_C2
)
1108 pr
->flags
.power
= 1;
1115 int acpi_processor_cst_has_changed(struct acpi_processor
*pr
)
1127 if (!pr
->flags
.power_setup_done
)
1130 /* Fall back to the default idle loop */
1131 pm_idle
= pm_idle_save
;
1132 synchronize_sched(); /* Relies on interrupts forcing exit from idle. */
1134 pr
->flags
.power
= 0;
1135 result
= acpi_processor_get_power_info(pr
);
1136 if ((pr
->flags
.power
== 1) && (pr
->flags
.power_setup_done
))
1137 pm_idle
= acpi_processor_idle
;
1142 /* proc interface */
1144 static int acpi_processor_power_seq_show(struct seq_file
*seq
, void *offset
)
1146 struct acpi_processor
*pr
= seq
->private;
1153 seq_printf(seq
, "active state: C%zd\n"
1155 "bus master activity: %08x\n"
1156 "maximum allowed latency: %d usec\n",
1157 pr
->power
.state
? pr
->power
.state
- pr
->power
.states
: 0,
1158 max_cstate
, (unsigned)pr
->power
.bm_activity
,
1159 system_latency_constraint());
1161 seq_puts(seq
, "states:\n");
1163 for (i
= 1; i
<= pr
->power
.count
; i
++) {
1164 seq_printf(seq
, " %cC%d: ",
1165 (&pr
->power
.states
[i
] ==
1166 pr
->power
.state
? '*' : ' '), i
);
1168 if (!pr
->power
.states
[i
].valid
) {
1169 seq_puts(seq
, "<not supported>\n");
1173 switch (pr
->power
.states
[i
].type
) {
1175 seq_printf(seq
, "type[C1] ");
1178 seq_printf(seq
, "type[C2] ");
1181 seq_printf(seq
, "type[C3] ");
1184 seq_printf(seq
, "type[--] ");
1188 if (pr
->power
.states
[i
].promotion
.state
)
1189 seq_printf(seq
, "promotion[C%zd] ",
1190 (pr
->power
.states
[i
].promotion
.state
-
1193 seq_puts(seq
, "promotion[--] ");
1195 if (pr
->power
.states
[i
].demotion
.state
)
1196 seq_printf(seq
, "demotion[C%zd] ",
1197 (pr
->power
.states
[i
].demotion
.state
-
1200 seq_puts(seq
, "demotion[--] ");
1202 seq_printf(seq
, "latency[%03d] usage[%08d] duration[%020llu]\n",
1203 pr
->power
.states
[i
].latency
,
1204 pr
->power
.states
[i
].usage
,
1205 (unsigned long long)pr
->power
.states
[i
].time
);
1212 static int acpi_processor_power_open_fs(struct inode
*inode
, struct file
*file
)
1214 return single_open(file
, acpi_processor_power_seq_show
,
1218 static const struct file_operations acpi_processor_power_fops
= {
1219 .open
= acpi_processor_power_open_fs
,
1221 .llseek
= seq_lseek
,
1222 .release
= single_release
,
1226 static void smp_callback(void *v
)
1228 /* we already woke the CPU up, nothing more to do */
1232 * This function gets called when a part of the kernel has a new latency
1233 * requirement. This means we need to get all processors out of their C-state,
1234 * and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
1235 * wakes them all right up.
1237 static int acpi_processor_latency_notify(struct notifier_block
*b
,
1238 unsigned long l
, void *v
)
1240 smp_call_function(smp_callback
, NULL
, 0, 1);
1244 static struct notifier_block acpi_processor_latency_notifier
= {
1245 .notifier_call
= acpi_processor_latency_notify
,
1249 int __cpuinit
acpi_processor_power_init(struct acpi_processor
*pr
,
1250 struct acpi_device
*device
)
1252 acpi_status status
= 0;
1253 static int first_run
;
1254 struct proc_dir_entry
*entry
= NULL
;
1259 dmi_check_system(processor_power_dmi_table
);
1260 if (max_cstate
< ACPI_C_STATES_MAX
)
1262 "ACPI: processor limited to max C-state %d\n",
1266 register_latency_notifier(&acpi_processor_latency_notifier
);
1273 if (acpi_gbl_FADT
.cst_control
&& !nocst
) {
1275 acpi_os_write_port(acpi_gbl_FADT
.smi_command
, acpi_gbl_FADT
.cst_control
, 8);
1276 if (ACPI_FAILURE(status
)) {
1277 ACPI_EXCEPTION((AE_INFO
, status
,
1278 "Notifying BIOS of _CST ability failed"));
1282 acpi_processor_get_power_info(pr
);
1285 * Install the idle handler if processor power management is supported.
1286 * Note that we use previously set idle handler will be used on
1287 * platforms that only support C1.
1289 if ((pr
->flags
.power
) && (!boot_option_idle_override
)) {
1290 printk(KERN_INFO PREFIX
"CPU%d (power states:", pr
->id
);
1291 for (i
= 1; i
<= pr
->power
.count
; i
++)
1292 if (pr
->power
.states
[i
].valid
)
1293 printk(" C%d[C%d]", i
,
1294 pr
->power
.states
[i
].type
);
1298 pm_idle_save
= pm_idle
;
1299 pm_idle
= acpi_processor_idle
;
1304 entry
= create_proc_entry(ACPI_PROCESSOR_FILE_POWER
,
1305 S_IRUGO
, acpi_device_dir(device
));
1309 entry
->proc_fops
= &acpi_processor_power_fops
;
1310 entry
->data
= acpi_driver_data(device
);
1311 entry
->owner
= THIS_MODULE
;
1314 pr
->flags
.power_setup_done
= 1;
1319 int acpi_processor_power_exit(struct acpi_processor
*pr
,
1320 struct acpi_device
*device
)
1323 pr
->flags
.power_setup_done
= 0;
1325 if (acpi_device_dir(device
))
1326 remove_proc_entry(ACPI_PROCESSOR_FILE_POWER
,
1327 acpi_device_dir(device
));
1329 /* Unregister the idle handler when processor #0 is removed. */
1331 pm_idle
= pm_idle_save
;
1334 * We are about to unload the current idle thread pm callback
1335 * (pm_idle), Wait for all processors to update cached/local
1336 * copies of pm_idle before proceeding.
1340 unregister_latency_notifier(&acpi_processor_latency_notifier
);