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[PATCH] ARM: fixup irqflags breakage after ARM genirq merge
[usb.git] / drivers / video / pm3fb.c
blob0e0f977b05ee29a466fb7b07054e846750a76cf3
1 /*
2 * linux/drivers/video/pm3fb.c -- 3DLabs Permedia3 frame buffer device
3 *
4 * Copyright (C) 2001 Romain Dolbeau <dolbeau@irisa.fr>
5 * Based on code written by:
6 * Sven Luther, <luther@dpt-info.u-strasbg.fr>
7 * Alan Hourihane, <alanh@fairlite.demon.co.uk>
8 * Russell King, <rmk@arm.linux.org.uk>
9 * Based on linux/drivers/video/skeletonfb.c:
10 * Copyright (C) 1997 Geert Uytterhoeven
11 * Based on linux/driver/video/pm2fb.c:
12 * Copyright (C) 1998-1999 Ilario Nardinocchi (nardinoc@CS.UniBO.IT)
13 * Copyright (C) 1999 Jakub Jelinek (jakub@redhat.com)
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file COPYING in the main directory of this archive for
17 * more details.
18 *
19 * $Header: /cvsroot/linux/drivers/video/pm3fb.c,v 1.1 2002/02/25 19:11:06 marcelo Exp $
20 *
21 * CHANGELOG:
22 * Mon Feb 11 10:35:48 MET 2002, v 1.4.11B: Cosmetic update.
23 * Wed Jan 23 14:16:59 MET 2002, v 1.4.11: Preliminary 2.5.x support, patch for 2.5.2.
24 * Wed Nov 28 11:08:29 MET 2001, v 1.4.10: potential bug fix for SDRAM-based board, patch for 2.4.16.
25 * Thu Sep 20 10:24:42 MET DST 2001, v 1.4.9: sync bug fix, preliminary flatpanel support, better timings.
26 * Tue Aug 28 10:13:01 MET DST 2001, v 1.4.8: memory timings check, minor bug fixes.
27 * Wed Jul 18 19:06:14 CEST 2001, v 1.4.7: Mode fix (800x600-100, 1024x768-100 changed), using HW panning + accel bug fix.
28 * Mon Jun 25 10:33:56 MET DST 2001, v 1.4.6: Depth 12 fix, chip reset ioctl, moved memory erase ioctl to DEBUG.
29 * Wed Jun 20 11:13:08 MET DST 2001, v 1.4.5: Fixed missing blinking cursor in 8bpp, code cleaning, memory erase IOCTL.
30 * Mon Jun 18 16:00:27 CEST 2001, v 1.4.4: Depth 12 (RGBA 4444) support, code cleaning.
31 * Fri Jun 15 13:53:01 CEST 2001, v 1.4.3: Removed warnings, depth 15 support, add 'depth' option.
32 * Thu Jun 14 10:13:52 MET DST 2001, v 1.4.2: Fixed depth switching bug, preliminary 15bpp (RGB5551) support.
33 * Thu Apr 12 11:16:45 MET DST 2001, v 1.4.1B: Doc updates.
34 * Fri Apr 6 11:12:53 MET DST 2001, v 1.4.1: Configure.help, minor cleanup
35 * Thu Mar 29 10:56:50 MET DST 2001, v 1.4.0: Module & module options support (note: linux patch changed, 2.2.19 added).
36 * Thu Mar 15 15:30:31 MET 2001, v 1.3.2: Fixed mirroring bug on little-endian.
37 * Wed Mar 14 21:25:54 CET 2001, v 1.3.1: Fixed bug in BlockMove (_bmov).
38 * Tue Mar 13 10:53:19 MET 2001, v 1.3.0: Character drawing hardware support (in all width between 1 and 16), fixes.
39 * Thu Mar 8 10:20:16 MET 2001, v 1.2.2: Better J2000 support, "font:" option.
40 * Tue Mar 6 21:25:04 CET 2001, v 1.2.1: Better acceleration support.
41 * Mon Mar 5 21:54:17 CET 2001, v 1.2.0: Partial acceleration support (clear & bmove)
42 * Mon Mar 5 12:52:15 CET 2001, v 1.1.3: Big pan_display fix.
43 * Sun Mar 4 22:21:50 CET 2001, v 1.1.2: (numerous) bug fixes.
44 * Fri Mar 2 15:54:07 CET 2001, v 1.1.1: Might have Appian J2000 support, resource mangement in 2.4
45 * Wed Feb 28 18:21:35 CET 2001, v 1.1.0: Might have multiple boards support (added, but not yest tested)
46 * Tue Feb 27 17:31:12 CET 2001, v 1.0.6: fixes boot-time mode select, add more default mode
47 * Tue Feb 27 14:01:36 CET 2001, v 1.0.5: fixes (1.0.4 was broken for 2.2), cleaning up
48 * Mon Feb 26 23:17:36 CET 2001, v 1.0.4: preliminary 2.4.x support, dropped (useless on pm3) partial product, more OF fix
49 * Mon Feb 26 20:59:05 CET 2001, v 1.0.3: No more shadow register (and wasted memory), endianess fix, use OF-preset resolution by default
50 * Wed Feb 21 22:09:30 CET 2001, v 1.0.2: Code cleaning for future multiboard support, better OF support, bugs fix
51 * Wed Feb 21 19:58:56 CET 2001, v 1.0.1: OpenFirmware support, fixed memory detection, better debug support, code cleaning
52 * Wed Feb 21 14:47:06 CET 2001, v 1.0.0: First working version
53 */
54
55 #include <linux/module.h>
56 #include <linux/kernel.h>
57 #include <linux/errno.h>
58 #include <linux/string.h>
59 #include <linux/mm.h>
60 #include <linux/tty.h>
61 #include <linux/slab.h>
62 #include <linux/vmalloc.h>
63 #include <linux/delay.h>
64 #include <linux/interrupt.h>
65 #include <linux/fb.h>
66 #include <linux/init.h>
67 #include <linux/pci.h>
68 #include <linux/ioport.h>
69 #include <linux/ctype.h>
70
71 #include <video/fbcon.h>
72 #include <video/fbcon-mfb.h>
73 #include <video/fbcon-cfb2.h>
74 #include <video/fbcon-cfb4.h>
75 #include <video/fbcon-cfb8.h>
76 #include <video/fbcon-cfb16.h>
77 #include <video/fbcon-cfb24.h>
78 #include <video/fbcon-cfb32.h>
79 #include <video/pm3fb.h>
80
81 #include <asm/io.h>
82 #include <asm/uaccess.h>
83
84 #ifdef CONFIG_FB_OF
85 #include <asm/prom.h>
86 #endif
87
88 /* ************************************* */
89 /* ***** The various "global" data ***** */
90 /* ************************************* */
91
92 /* those will need a rework for multiple board support */
93 /* Driver name */
94 static const char permedia3_name[16] = "Permedia3";
95
96 /* the fb_par struct, mandatory */
97 struct pm3fb_par {
98 u32 pixclock; /* pixclock in KHz */
99
100 u32 width; /* width of virtual screen */
101 u32 height; /* height of virtual screen */
102
103 u32 hsstart; /* horiz. sync start */
104 u32 hsend; /* horiz. sync end */
105 u32 hbend; /* horiz. blank end (also gate end) */
106 u32 htotal; /* total width (w/ sync & blank) */
107
108 u32 vsstart; /* vert. sync start */
109 u32 vsend; /* vert. sync end */
110 u32 vbend; /* vert. blank end */
111 u32 vtotal; /* total height (w/ sync & blank) */
112
113 u32 stride; /* screen stride */
114 u32 base; /* screen base (xoffset+yoffset) in 128 bits unit */
115 /* NOTE : unlike other pm3 stuff above, stored *after* shiftbpp. don't ask */
116 u32 depth; /* screen depth (8, 12, 15, 16 or 32) */
117 u32 video; /* video control (hsync,vsync) */
118 };
119
120 /* memory timings */
121 struct pm3fb_timings
122 {
123 unsigned long caps;
124 unsigned long timings;
125 unsigned long control;
126 unsigned long refresh;
127 unsigned long powerdown;
128 };
129 typedef enum pm3fb_timing_result { pm3fb_timing_ok, pm3fb_timing_problem, pm3fb_timing_retry } pm3fb_timing_result;
130 #define PM3FB_UNKNOWN_TIMING_VALUE ((unsigned long)-1)
131 #define PM3FB_UNKNOWN_TIMINGS { PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE, PM3FB_UNKNOWN_TIMING_VALUE }
132
133 /* the fb_info struct, mandatory */
134 struct pm3fb_info {
135 struct fb_info_gen gen;
136 unsigned long board_num; /* internal board number */
137 unsigned long use_current;
138 struct pm3fb_par *current_par;
139 struct pci_dev *dev; /* PCI device */
140 unsigned long board_type; /* index in the cardbase */
141 unsigned char *fb_base; /* framebuffer memory base */
142 u32 fb_size; /* framebuffer memory size */
143 unsigned char *p_fb; /* physical address of frame buffer */
144 unsigned char *v_fb; /* virtual address of frame buffer */
145 unsigned char *pIOBase; /* physical address of registers region, must be rg_base or rg_base+PM2_REGS_SIZE depending on the host endianness */
146 unsigned char *vIOBase; /* address of registers after ioremap() */
147 struct {
148 u8 transp;
149 u8 red;
150 u8 green;
151 u8 blue;
152 } palette[256];
153 union {
154 #ifdef FBCON_HAS_CFB16
155 u16 cmap12[16]; /* RGBA 4444 */
156 u16 cmap15[16]; /* RGBA 5551 */
157 u16 cmap16[16]; /* RGBA 5650 */
158 #endif
159 #ifdef FBCON_HAS_CFB32
160 u32 cmap32[16];
161 #endif
162 } cmap;
163 struct pm3fb_timings memt;
164 };
165
166 /* regular resolution database*/
167 static struct {
168 char name[16];
169 struct pm3fb_par user_mode;
170 } mode_base[] __initdata = {
171 {
172 "default-800x600", {
173 49500, 800, 600, 16, 96, 256, 1056, 1, 4, 25, 625,
174 800, 0, 8,
175 PM3VideoControl_ENABLE |
176 PM3VideoControl_HSYNC_ACTIVE_HIGH
177 |
178 PM3VideoControl_VSYNC_ACTIVE_HIGH
179 | PM3VideoControl_PIXELSIZE_8BIT}}, {
180 "1024x768-74", {
181 78752, 1024, 768, 32, 128, 304, 1328, 1, 4, 38,
182 806, 1024, 0, 8,
183 PM3VideoControl_ENABLE |
184 PM3VideoControl_HSYNC_ACTIVE_HIGH
185 |
186 PM3VideoControl_VSYNC_ACTIVE_HIGH
187 | PM3VideoControl_PIXELSIZE_8BIT}}, {
188 "1024x768-74-32", {
189 78752, 1024, 768, 32, 128, 304, 1328, 1, 4, 38,
190 806, 1024, 0, 32,
191 PM3VideoControl_ENABLE |
192 PM3VideoControl_HSYNC_ACTIVE_HIGH
193 |
194 PM3VideoControl_VSYNC_ACTIVE_HIGH
195 | PM3VideoControl_PIXELSIZE_32BIT}},
196 /* Generated mode : "1600x1024", for the SGI 1600SW flat panel*/
197 {
198 "SGI1600SW", {
199 108000, 1600, 1024, 16, 56, 104, 1704, 3, 6, 32,
200 1056, 1600, 0, 8,
201 PM3VideoControl_ENABLE|
202 PM3VideoControl_HSYNC_ACTIVE_LOW|PM3VideoControl_VSYNC_ACTIVE_LOW|
203 PM3VideoControl_PIXELSIZE_32BIT}},
204 /* ##### auto-generated mode, by fbtimings2pm3 */
205 /* Generated mode : "640x480-60" */
206 {
207 "640x480-60", {
208 25174, 640, 480, 16, 112, 160, 800, 10, 12, 45,
209 525, 640, 0, 8,
210 PM3VideoControl_ENABLE |
211 PM3VideoControl_HSYNC_ACTIVE_LOW
212 |
213 PM3VideoControl_VSYNC_ACTIVE_LOW
214 | PM3VideoControl_PIXELSIZE_8BIT}},
215 /* Generated mode : "640x480-72" */
216 {
217 "640x480-72", {
218 31199, 640, 480, 24, 64, 192, 832, 9, 12, 40, 520,
219 640, 0, 8,
220 PM3VideoControl_ENABLE |
221 PM3VideoControl_HSYNC_ACTIVE_LOW
222 |
223 PM3VideoControl_VSYNC_ACTIVE_LOW
224 | PM3VideoControl_PIXELSIZE_8BIT}},
225 /* Generated mode : "640x480-75" */
226 {
227 "640x480-75", {
228 31499, 640, 480, 16, 80, 200, 840, 1, 4, 20, 500,
229 640, 0, 8,
230 PM3VideoControl_ENABLE |
231 PM3VideoControl_HSYNC_ACTIVE_LOW
232 |
233 PM3VideoControl_VSYNC_ACTIVE_LOW
234 | PM3VideoControl_PIXELSIZE_8BIT}},
235 /* Generated mode : "640x480-90" */
236 {
237 "640x480-90", {
238 39909, 640, 480, 32, 72, 192, 832, 25, 39, 53, 533,
239 640, 0, 8,
240 PM3VideoControl_ENABLE |
241 PM3VideoControl_HSYNC_ACTIVE_LOW
242 |
243 PM3VideoControl_VSYNC_ACTIVE_LOW
244 | PM3VideoControl_PIXELSIZE_8BIT}},
245 /* Generated mode : "640x480-100" */
246 {
247 "640x480-100", {
248 44899, 640, 480, 32, 160, 208, 848, 22, 34, 51,
249 531, 640, 0, 8,
250 PM3VideoControl_ENABLE |
251 PM3VideoControl_HSYNC_ACTIVE_LOW
252 |
253 PM3VideoControl_VSYNC_ACTIVE_LOW
254 | PM3VideoControl_PIXELSIZE_8BIT}},
255 /* Generated mode : "800x600-48-lace" */
256 /* INTERLACED NOT SUPPORTED
257 {"800x600-48-lace", {35999, 800, 600, 80, 208, 264, 1064, 11, 23, 102, 702, 800, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
258 INTERLACED NOT SUPPORTED */
259 /* Generated mode : "800x600-56" */
260 {
261 "800x600-56", {
262 35999, 800, 600, 24, 96, 224, 1024, 1, 3, 25, 625,
263 800, 0, 8,
264 PM3VideoControl_ENABLE |
265 PM3VideoControl_HSYNC_ACTIVE_HIGH
266 |
267 PM3VideoControl_VSYNC_ACTIVE_HIGH
268 | PM3VideoControl_PIXELSIZE_8BIT}},
269 /* Generated mode : "800x600-60" */
270 {
271 "800x600-60", {
272 40000, 800, 600, 40, 168, 256, 1056, 1, 5, 28, 628,
273 800, 0, 8,
274 PM3VideoControl_ENABLE |
275 PM3VideoControl_HSYNC_ACTIVE_HIGH
276 |
277 PM3VideoControl_VSYNC_ACTIVE_HIGH
278 | PM3VideoControl_PIXELSIZE_8BIT}},
279 /* Generated mode : "800x600-70" */
280 {
281 "800x600-70", {
282 44899, 800, 600, 24, 168, 208, 1008, 9, 21, 36,
283 636, 800, 0, 8,
284 PM3VideoControl_ENABLE |
285 PM3VideoControl_HSYNC_ACTIVE_HIGH
286 |
287 PM3VideoControl_VSYNC_ACTIVE_LOW
288 | PM3VideoControl_PIXELSIZE_8BIT}},
289 /* Generated mode : "800x600-72" */
290 {
291 "800x600-72", {
292 50000, 800, 600, 56, 176, 240, 1040, 37, 43, 66,
293 666, 800, 0, 8,
294 PM3VideoControl_ENABLE |
295 PM3VideoControl_HSYNC_ACTIVE_HIGH
296 |
297 PM3VideoControl_VSYNC_ACTIVE_HIGH
298 | PM3VideoControl_PIXELSIZE_8BIT}},
299 /* Generated mode : "800x600-75" */
300 {
301 "800x600-75", {
302 49497, 800, 600, 16, 96, 256, 1056, 1, 4, 25, 625,
303 800, 0, 8,
304 PM3VideoControl_ENABLE |
305 PM3VideoControl_HSYNC_ACTIVE_HIGH
306 |
307 PM3VideoControl_VSYNC_ACTIVE_HIGH
308 | PM3VideoControl_PIXELSIZE_8BIT}},
309 /* Generated mode : "800x600-90" */
310 {
311 "800x600-90", {
312 56637, 800, 600, 8, 72, 192, 992, 8, 19, 35, 635,
313 800, 0, 8,
314 PM3VideoControl_ENABLE |
315 PM3VideoControl_HSYNC_ACTIVE_HIGH
316 |
317 PM3VideoControl_VSYNC_ACTIVE_HIGH
318 | PM3VideoControl_PIXELSIZE_8BIT}},
319 /* Generated mode : "800x600-100", from /etc/fb.modes */
320 /* DISABLED, hsstart == 0
321 {
322 "800x600-100", {
323 67499, 800, 600, 0, 64, 280, 1080, 7, 11, 25, 625,
324 800, 0, 8,
325 PM3VideoControl_ENABLE |
326 PM3VideoControl_HSYNC_ACTIVE_HIGH
327 |
328 PM3VideoControl_VSYNC_ACTIVE_HIGH
329 | PM3VideoControl_PIXELSIZE_8BIT}},
330 */
331 /* Generated mode : "800x600-100", from ??? */
332 {
333 "800x600-100", {
334 69650, 800, 600, 64, 128, 288, 1088, 4, 10, 40, 640, 800, 0, 8,
335 PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_LOW|
336 PM3VideoControl_VSYNC_ACTIVE_LOW|PM3VideoControl_PIXELSIZE_8BIT}},
337 /* Generated mode : "1024x768-43-lace" */
338 /* INTERLACED NOT SUPPORTED
339 {"1024x768-43-lace", {44899, 1024, 768, 8, 184, 240, 1264, 1, 9, 49, 817, 1024, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
340 INTERLACED NOT SUPPORTED */
341 /* Generated mode : "1024x768-60" */
342 {
343 "1024x768-60", {
344 64998, 1024, 768, 24, 160, 320, 1344, 3, 9, 38,
345 806, 1024, 0, 8,
346 PM3VideoControl_ENABLE |
347 PM3VideoControl_HSYNC_ACTIVE_LOW
348 |
349 PM3VideoControl_VSYNC_ACTIVE_LOW
350 | PM3VideoControl_PIXELSIZE_8BIT}},
351 /* Generated mode : "1024x768-70" */
352 {
353 "1024x768-70", {
354 74996, 1024, 768, 24, 160, 304, 1328, 3, 9, 38,
355 806, 1024, 0, 8,
356 PM3VideoControl_ENABLE |
357 PM3VideoControl_HSYNC_ACTIVE_LOW
358 |
359 PM3VideoControl_VSYNC_ACTIVE_LOW
360 | PM3VideoControl_PIXELSIZE_8BIT}},
361 /* Generated mode : "1024x768-72" */
362 {
363 "1024x768-72", {
364 74996, 10224, 768, 24, 160, 264, 10488, 3, 9, 38,
365 806, 10224, 0, 8,
366 PM3VideoControl_ENABLE |
367 PM3VideoControl_HSYNC_ACTIVE_LOW
368 |
369 PM3VideoControl_VSYNC_ACTIVE_LOW
370 | PM3VideoControl_PIXELSIZE_8BIT}},
371 /* Generated mode : "1024x768-75" */
372 {
373 "1024x768-75", {
374 78746, 1024, 768, 16, 112, 288, 1312, 1, 4, 32,
375 800, 1024, 0, 8,
376 PM3VideoControl_ENABLE |
377 PM3VideoControl_HSYNC_ACTIVE_HIGH
378 |
379 PM3VideoControl_VSYNC_ACTIVE_HIGH
380 | PM3VideoControl_PIXELSIZE_8BIT}},
381 /* Generated mode : "1024x768-90" */
382 {
383 "1024x768-90", {
384 100000, 1024, 768, 0, 96, 288, 1312, 21, 36, 77,
385 845, 1024, 0, 8,
386 PM3VideoControl_ENABLE |
387 PM3VideoControl_HSYNC_ACTIVE_LOW
388 |
389 PM3VideoControl_VSYNC_ACTIVE_LOW
390 | PM3VideoControl_PIXELSIZE_8BIT}},
391 /* Generated mode : "1024x768-100", from /etc/fb.modes */
392 /* DISABLED, vsstart == 0
393 {
394 "1024x768-100", {
395 109998, 1024, 768, 0, 88, 368, 1392, 0, 8, 24, 792,
396 1024, 0, 8,
397 PM3VideoControl_ENABLE |
398 PM3VideoControl_HSYNC_ACTIVE_LOW
399 |
400 PM3VideoControl_VSYNC_ACTIVE_LOW
401 | PM3VideoControl_PIXELSIZE_8BIT}},
402 */
403 /* Generated mode : "1024x768-100", from ??? */
404 {
405 "1024x768-100", {
406 115500, 1024, 768, 32, 224, 416, 1440, 3, 13, 34, 802, 1024, 0, 8,
407 PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_LOW|
408 PM3VideoControl_VSYNC_ACTIVE_LOW|PM3VideoControl_PIXELSIZE_8BIT}},
409 /* Generated mode : "1152x864-43-lace" */
410 /* INTERLACED NOT SUPPORTED
411 {"1152x864-43-lace", {64998, 1152, 864, 72, 200, 264, 1416, 78, 87, 191, 1055, 1152, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
412 INTERLACED NOT SUPPORTED */
413 /* Generated mode : "1152x864-47-lace" */
414 /* INTERLACED NOT SUPPORTED
415 {"1152x864-47-lace", {64998, 1152, 864, 88, 216, 296, 1448, 30, 39, 83, 947, 1152, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
416 INTERLACED NOT SUPPORTED */
417 /* Generated mode : "1152x864-60" */
418 {
419 "1152x864-60", {
420 80000, 1152, 864, 64, 176, 304, 1456, 6, 11, 52,
421 916, 1152, 0, 8,
422 PM3VideoControl_ENABLE |
423 PM3VideoControl_HSYNC_ACTIVE_HIGH
424 |
425 PM3VideoControl_VSYNC_ACTIVE_HIGH
426 | PM3VideoControl_PIXELSIZE_8BIT}},
427 /* Generated mode : "1152x864-70" */
428 {
429 "1152x864-70", {
430 100000, 1152, 864, 40, 192, 360, 1512, 13, 24, 81,
431 945, 1152, 0, 8,
432 PM3VideoControl_ENABLE |
433 PM3VideoControl_HSYNC_ACTIVE_HIGH
434 |
435 PM3VideoControl_VSYNC_ACTIVE_HIGH
436 | PM3VideoControl_PIXELSIZE_8BIT}},
437 /* Generated mode : "1152x864-75" */
438 {
439 "1152x864-75", {
440 109998, 1152, 864, 24, 168, 312, 1464, 45, 53, 138,
441 1002, 1152, 0, 8,
442 PM3VideoControl_ENABLE |
443 PM3VideoControl_HSYNC_ACTIVE_HIGH
444 |
445 PM3VideoControl_VSYNC_ACTIVE_HIGH
446 | PM3VideoControl_PIXELSIZE_8BIT}},
447 /* Generated mode : "1152x864-80" */
448 {
449 "1152x864-80", {
450 109998, 1152, 864, 16, 128, 288, 1440, 30, 37, 94,
451 958, 1152, 0, 8,
452 PM3VideoControl_ENABLE |
453 PM3VideoControl_HSYNC_ACTIVE_HIGH
454 |
455 PM3VideoControl_VSYNC_ACTIVE_HIGH
456 | PM3VideoControl_PIXELSIZE_8BIT}},
457 /* Generated mode : "1280x1024-43-lace" */
458 /* INTERLACED NOT SUPPORTED
459 {"1280x1024-43-lace", {80000, 1024, 1024, 80, 160, 320, 1344, 50, 60, 125, 1149, 1024, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
460 INTERLACED NOT SUPPORTED */
461 /* Generated mode : "1280x1024-47-lace" */
462 /* INTERLACED NOT SUPPORTED
463 {"1280x1024-47-lace", {80000, 1280, 1024, 80, 160, 320, 1600, 1, 11, 29, 1053, 1280, 0, 8, PM3VideoControl_ENABLE|PM3VideoControl_HSYNC_ACTIVE_HIGH|PM3VideoControl_VSYNC_ACTIVE_HIGH|PM3VideoControl_PIXELSIZE_8BIT}},
464 INTERLACED NOT SUPPORTED */
465 /* Generated mode : "1280x1024-60" */
466 {
467 "1280x1024-60", {
468 107991, 1280, 1024, 48, 160, 408, 1688, 1, 4, 42,
469 1066, 1280, 0, 8,
470 PM3VideoControl_ENABLE |
471 PM3VideoControl_HSYNC_ACTIVE_HIGH
472 |
473 PM3VideoControl_VSYNC_ACTIVE_HIGH
474 | PM3VideoControl_PIXELSIZE_8BIT}},
475 /* Generated mode : "1280x1024-70" */
476 {
477 "1280x1024-70", {
478 125992, 1280, 1024, 80, 192, 408, 1688, 1, 6, 42,
479 1066, 1280, 0, 8,
480 PM3VideoControl_ENABLE |
481 PM3VideoControl_HSYNC_ACTIVE_HIGH
482 |
483 PM3VideoControl_VSYNC_ACTIVE_HIGH
484 | PM3VideoControl_PIXELSIZE_8BIT}},
485 /* Generated mode : "1280x1024-74" */
486 {
487 "1280x1024-74", {
488 134989, 1280, 1024, 32, 176, 432, 1712, 0, 30, 40,
489 1064, 1280, 0, 8,
490 PM3VideoControl_ENABLE |
491 PM3VideoControl_HSYNC_ACTIVE_HIGH
492 |
493 PM3VideoControl_VSYNC_ACTIVE_HIGH
494 | PM3VideoControl_PIXELSIZE_8BIT}},
495 /* Generated mode : "1280x1024-75" */
496 {
497 "1280x1024-75", {
498 134989, 1280, 1024, 16, 160, 408, 1688, 1, 4, 42,
499 1066, 1280, 0, 8,
500 PM3VideoControl_ENABLE |
501 PM3VideoControl_HSYNC_ACTIVE_HIGH
502 |
503 PM3VideoControl_VSYNC_ACTIVE_HIGH
504 | PM3VideoControl_PIXELSIZE_8BIT}},
505 /* Generated mode : "1600x1200-60" */
506 {
507 "1600x1200-60", {
508 155981, 1600, 1200, 32, 192, 448, 2048, 10, 18, 70,
509 1270, 1600, 0, 8,
510 PM3VideoControl_ENABLE |
511 PM3VideoControl_HSYNC_ACTIVE_LOW
512 |
513 PM3VideoControl_VSYNC_ACTIVE_LOW
514 | PM3VideoControl_PIXELSIZE_8BIT}},
515 /* Generated mode : "1600x1200-66" */
516 {
517 "1600x1200-66", {
518 171998, 1600, 1200, 40, 176, 480, 2080, 3, 6, 53,
519 1253, 1600, 0, 8,
520 PM3VideoControl_ENABLE |
521 PM3VideoControl_HSYNC_ACTIVE_LOW
522 |
523 PM3VideoControl_VSYNC_ACTIVE_LOW
524 | PM3VideoControl_PIXELSIZE_8BIT}},
525 /* Generated mode : "1600x1200-76" */
526 {
527 "1600x1200-76", {
528 197980, 1600, 1200, 40, 176, 480, 2080, 3, 8, 50,
529 1250, 1600, 0, 8,
530 PM3VideoControl_ENABLE |
531 PM3VideoControl_HSYNC_ACTIVE_LOW
532 |
533 PM3VideoControl_VSYNC_ACTIVE_LOW
534 | PM3VideoControl_PIXELSIZE_8BIT}},
535 /* ##### end of auto-generated mode */
536 {
537 "\0",}
538 };
539
540 /* more mandatory stuff (see skeletonfb.c + framebuffer driver HOWTO */
541 static struct pm3fb_info fb_info[PM3_MAX_BOARD];
542 static struct pm3fb_par current_par[PM3_MAX_BOARD];
543 static int current_par_valid[PM3_MAX_BOARD];
544 /* to allow explicit filtering of board */
545 short bus[PM3_MAX_BOARD];
546 short slot[PM3_MAX_BOARD];
547 short func[PM3_MAX_BOARD];
548 short disable[PM3_MAX_BOARD];
549 short noaccel[PM3_MAX_BOARD];
550 char fontn[PM3_MAX_BOARD][PM3_FONTNAME_SIZE];
551 short depth[PM3_MAX_BOARD];
552 short flatpanel[PM3_MAX_BOARD];
553 static struct display disp[PM3_MAX_BOARD];
554 static char g_options[PM3_OPTIONS_SIZE] __initdata = "pm3fb,dummy";
555 short printtimings = 0;
556 short forcesize[PM3_MAX_BOARD];
557
558 /* ********************* */
559 /* ***** prototype ***** */
560 /* ********************* */
561 /* card-specific */
562 static void pm3fb_j2000_setup(struct pm3fb_info *l_fb_info);
563 /* permedia3-specific */
564 static pm3fb_timing_result pm3fb_preserve_memory_timings(struct pm3fb_info *l_fb_info);
565 static pm3fb_timing_result pm3fb_try_memory_timings(struct pm3fb_info *l_fb_info);
566 static void pm3fb_write_memory_timings(struct pm3fb_info *l_fb_info);
567 static unsigned long pm3fb_read_dac_reg(struct pm3fb_info *l_fb_info,
568 unsigned long r);
569 static unsigned long pm3fb_CalculateClock(struct pm3fb_info *l_fb_info, unsigned long reqclock, /* In kHz units */
570 unsigned long refclock, /* In kHz units */
571 unsigned char *prescale, /* ClkPreScale */
572 unsigned char *feedback, /* ClkFeedBackScale */
573 unsigned char *postscale
574 /* ClkPostScale */ );
575 static void pm3fb_clear_memory(struct pm3fb_info *l_fb_info, u32 cc);
576 static void pm3fb_clear_colormap(struct pm3fb_info *l_fb_info, unsigned char r, unsigned char g, unsigned char b);
577 static void pm3fb_common_init(struct pm3fb_info *l_fb_info);
578 static int pm3fb_Shiftbpp(struct pm3fb_info *l_fb_info,
579 unsigned long depth, int v);
580 static int pm3fb_Unshiftbpp(struct pm3fb_info *l_fb_info,
581 unsigned long depth, int v);
582 static void pm3fb_mapIO(struct pm3fb_info *l_fb_info);
583 static void pm3fb_unmapIO(struct pm3fb_info *l_fb_info);
584 #if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
585 static void pm3fb_show_cur_mode(struct pm3fb_info *l_fb_info);
586 #endif
587 static void pm3fb_show_cur_timing(struct pm3fb_info *l_fb_info);
588 static void pm3fb_write_mode(struct pm3fb_info *l_fb_info);
589 static void pm3fb_read_mode(struct pm3fb_info *l_fb_info,
590 struct pm3fb_par *curpar);
591 static unsigned long pm3fb_size_memory(struct pm3fb_info *l_fb_info);
592 /* accelerated permedia3-specific */
593 #ifdef PM3FB_USE_ACCEL
594 static void pm3fb_wait_pm3(struct pm3fb_info *l_fb_info);
595 static void pm3fb_init_engine(struct pm3fb_info *l_fb_info);
596 #ifdef FBCON_HAS_CFB32
597 static void pm3fb_cfb32_clear(struct vc_data *conp,
598 struct display *p,
599 int sy, int sx, int height, int width);
600 static void pm3fb_cfb32_clear_margins(struct vc_data *conp,
601 struct display *p, int bottom_only);
602 #endif /* FBCON_HAS_CFB32 */
603 #ifdef FBCON_HAS_CFB16
604 static void pm3fb_cfb16_clear(struct vc_data *conp,
605 struct display *p,
606 int sy, int sx, int height, int width);
607 static void pm3fb_cfb16_clear_margins(struct vc_data *conp,
608 struct display *p, int bottom_only);
609 #endif /* FBCON_HAS_CFB16 */
610 #ifdef FBCON_HAS_CFB8
611 static void pm3fb_cfb8_clear(struct vc_data *conp,
612 struct display *p,
613 int sy, int sx, int height, int width);
614 static void pm3fb_cfb8_clear_margins(struct vc_data *conp,
615 struct display *p, int bottom_only);
616 #endif /* FBCON_HAS_CFB8 */
617 #if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
618 static void pm3fb_cfbX_bmove(struct display *p,
619 int sy, int sx,
620 int dy, int dx, int height, int width);
621 static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
622 int c, int yy, int xx);
623 static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
624 const unsigned short *s, int count, int yy,
625 int xx);
626 static void pm3fb_cfbX_revc(struct display *p, int xx, int yy);
627 #endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB16 || FBCON_HAS_CFB32 */
628 #endif /* PM3FB_USE_ACCEL */
629 /* pre-init */
630 static void pm3fb_mode_setup(char *mode, unsigned long board_num);
631 static void pm3fb_pciid_setup(char *pciid, unsigned long board_num);
632 static char *pm3fb_boardnum_setup(char *options, unsigned long *bn);
633 static void pm3fb_real_setup(char *options);
634 /* fbdev */
635 static int pm3fb_encode_fix(struct fb_fix_screeninfo *fix,
636 const void *par, struct fb_info_gen *info);
637 static int pm3fb_decode_var(const struct fb_var_screeninfo *var,
638 void *par, struct fb_info_gen *info);
639 static void pm3fb_encode_depth(struct fb_var_screeninfo *var, long d);
640 static int pm3fb_encode_var(struct fb_var_screeninfo *var,
641 const void *par, struct fb_info_gen *info);
642 static void pm3fb_get_par(void *par, struct fb_info_gen *info);
643 static void pm3fb_set_par(const void *par, struct fb_info_gen *info);
644 static void pm3fb_set_color(struct pm3fb_info *l_fb_info,
645 unsigned char regno, unsigned char r,
646 unsigned char g, unsigned char b);
647 static int pm3fb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
648 unsigned *blue, unsigned *transp,
649 struct fb_info *info);
650 static int pm3fb_setcolreg(unsigned regno, unsigned red, unsigned green,
651 unsigned blue, unsigned transp,
652 struct fb_info *info);
653 static int pm3fb_blank(int blank_mode, struct fb_info_gen *info);
654 static void pm3fb_set_disp(const void *par, struct display *disp,
655 struct fb_info_gen *info);
656 static void pm3fb_detect(void);
657 static int pm3fb_pan_display(const struct fb_var_screeninfo *var,
658 struct fb_info_gen *info);
659 static int pm3fb_ioctl(struct fb_info *info, u_int cmd, u_long arg);
660
661
662 /* the struct that hold them together */
663 struct fbgen_hwswitch pm3fb_switch = {
664 pm3fb_detect, pm3fb_encode_fix, pm3fb_decode_var, pm3fb_encode_var,
665 pm3fb_get_par, pm3fb_set_par, pm3fb_getcolreg,
666 pm3fb_pan_display, pm3fb_blank, pm3fb_set_disp
667 };
668
669 static struct fb_ops pm3fb_ops = {
670 .owner = THIS_MODULE,
671 .fb_get_fix = fbgen_get_fix,
672 .fb_get_var = fbgen_get_var,
673 .fb_set_var = fbgen_set_var,
674 .fb_get_cmap = fbgen_get_cmap,
675 .fb_set_cmap = fbgen_set_cmap,
676 .fb_setcolreg = pm3fb_setcolreg,
677 .fb_pan_display =fbgen_pan_display,
678 .fb_blank = fbgen_blank,
679 .fb_ioctl = pm3fb_ioctl,
680 };
681
682 #ifdef PM3FB_USE_ACCEL
683 #ifdef FBCON_HAS_CFB32
684 static struct display_switch pm3fb_cfb32 = {
685 fbcon_cfb32_setup, pm3fb_cfbX_bmove, pm3fb_cfb32_clear,
686 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
687 NULL /* cursor() */ , NULL /* set_font() */ ,
688 pm3fb_cfb32_clear_margins,
689 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
690 };
691 #endif /* FBCON_HAS_CFB32 */
692 #ifdef FBCON_HAS_CFB16
693 static struct display_switch pm3fb_cfb16 = {
694 fbcon_cfb16_setup, pm3fb_cfbX_bmove, pm3fb_cfb16_clear,
695 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
696 NULL /* cursor() */ , NULL /* set_font() */ ,
697 pm3fb_cfb16_clear_margins,
698 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
699 };
700 #endif /* FBCON_HAS_CFB16 */
701 #ifdef FBCON_HAS_CFB8
702 static struct display_switch pm3fb_cfb8 = {
703 fbcon_cfb8_setup, pm3fb_cfbX_bmove, pm3fb_cfb8_clear,
704 pm3fb_cfbX_putc, pm3fb_cfbX_putcs, pm3fb_cfbX_revc,
705 NULL /* cursor() */ , NULL /* set_font() */ ,
706 pm3fb_cfb8_clear_margins,
707 FONTWIDTHRANGE(1, 16) /* true only if accelerated... */
708 };
709 #endif /* FBCON_HAS_CFB8 */
710 #endif /* PM3FB_USE_ACCEL */
711
712 /* ****************************** */
713 /* ***** card-specific data ***** */
714 /* ****************************** */
715 struct pm3fb_card_timings {
716 unsigned long memsize; /* 0 for last value (i.e. default) */
717 struct pm3fb_timings memt;
718 };
719
720 static struct pm3fb_card_timings t_FormacProFormance3[] = {
721 { 16, { 0x02e311b8, 0x06100205, 0x08000002, 0x00000079, 0x00000000} },
722 { 0, { 0x02e311b8, 0x06100205, 0x08000002, 0x00000079, 0x00000000} } /* from 16 MB PF3 */
723 };
724
725 static struct pm3fb_card_timings t_AppianJeronimo2000[] = {
726 { 32, { 0x02e311B8, 0x07424905, 0x0c000003, 0x00000061, 0x00000000} },
727 { 0, { 0x02e311B8, 0x07424905, 0x0c000003, 0x00000061, 0x00000000} } /* from 32MB J2000 */
728 };
729
730 static struct pm3fb_card_timings t_3DLabsOxygenVX1[] = {
731 { 32, { 0x30e311b8, 0x08501204, 0x08000002, 0x0000006b, 0x00000000} },
732 { 0, { 0x30e311b8, 0x08501204, 0x08000002, 0x0000006b, 0x00000000} } /* from 32MB VX1 */
733 };
734
735 static struct {
736 char cardname[32]; /* recognized card name */
737 u16 subvendor; /* subvendor of the card */
738 u16 subdevice; /* subdevice of the card */
739 u8 func; /* function of the card to which the extra init apply */
740 void (*specific_setup)(struct pm3fb_info *l_fb_info); /* card/func specific setup, done before _any_ FB access */
741 struct pm3fb_card_timings *c_memt; /* defauls timings for the boards */
742 } cardbase[] = {
743 { "Unknown Permedia3 board", 0xFFFF, 0xFFFF, 0xFF, NULL, NULL },
744 { "Appian Jeronimo 2000 head 1", 0x1097, 0x3d32, 1, NULL,
745 t_AppianJeronimo2000
746 },
747 { "Appian Jeronimo 2000 head 2", 0x1097, 0x3d32, 2, pm3fb_j2000_setup,
748 t_AppianJeronimo2000
749 },
750 { "Formac ProFormance 3", PCI_VENDOR_ID_3DLABS, 0x000a, 0, NULL, /* Formac use 3DLabs ID ?!? */
751 t_FormacProFormance3
752 },
753 { "3DLabs Permedia3 Create!", PCI_VENDOR_ID_3DLABS, 0x0127, 0, NULL, NULL },
754 { "3DLabs Oxygen VX1 PCI", PCI_VENDOR_ID_3DLABS, 0x0121, 0, NULL,
755 t_3DLabsOxygenVX1
756 },
757 { "3DLabs Oxygen VX1 AGP", PCI_VENDOR_ID_3DLABS, 0x0125, 0, NULL, NULL },
758 { "3DLabs Oxygen VX1-16 AGP", PCI_VENDOR_ID_3DLABS, 0x0140, 0, NULL, NULL },
759 { "3DLabs Oxygen VX1-1600SW PCI", PCI_VENDOR_ID_3DLABS, 0x0800, 0, NULL, NULL },
760 { "\0", 0x0, 0x0, 0, NULL, NULL }
761 };
762
763 /* ********************************** */
764 /* ***** card-specific function ***** */
765 /* ********************************** */
766 static void pm3fb_j2000_setup(struct pm3fb_info *l_fb_info)
767 { /* the appian j2000 require more initialization of the second head */
768 /* l_fb_info must point to the _second_ head of the J2000 */
769
770 DTRACE;
771
772 l_fb_info->memt = t_AppianJeronimo2000[0].memt; /* 32 MB, first and only j2000 ? */
773
774 pm3fb_write_memory_timings(l_fb_info);
775 }
776
777 /* *************************************** */
778 /* ***** permedia3-specific function ***** */
779 /* *************************************** */
780 static pm3fb_timing_result pm3fb_preserve_memory_timings(struct pm3fb_info *l_fb_info)
781 {
782 l_fb_info->memt.caps = PM3_READ_REG(PM3LocalMemCaps);
783 l_fb_info->memt.timings = PM3_READ_REG(PM3LocalMemTimings);
784 l_fb_info->memt.control = PM3_READ_REG(PM3LocalMemControl);
785 l_fb_info->memt.refresh = PM3_READ_REG(PM3LocalMemRefresh);
786 l_fb_info->memt.powerdown = PM3_READ_REG(PM3LocalMemPowerDown);
787
788 if ((l_fb_info->memt.caps == PM3FB_UNKNOWN_TIMING_VALUE) ||
789 (l_fb_info->memt.timings == PM3FB_UNKNOWN_TIMING_VALUE) ||
790 (l_fb_info->memt.control == PM3FB_UNKNOWN_TIMING_VALUE) ||
791 (l_fb_info->memt.refresh == PM3FB_UNKNOWN_TIMING_VALUE) ||
792 (l_fb_info->memt.powerdown == PM3FB_UNKNOWN_TIMING_VALUE))
793 {
794 printk(KERN_ERR "pm3fb: invalid memory timings in permedia3 board #%ld\n", l_fb_info->board_num);
795 return(pm3fb_try_memory_timings(l_fb_info));
796 }
797 return(pm3fb_timing_ok);
798 }
799
800 static pm3fb_timing_result pm3fb_try_memory_timings(struct pm3fb_info *l_fb_info)
801 {
802 if (cardbase[l_fb_info->board_type].c_memt)
803 {
804 int i = 0, done = 0;
805 while (!done)
806 {
807 if ((cardbase[l_fb_info->board_type].c_memt[i].memsize == l_fb_info->fb_size)
808 || !(cardbase[l_fb_info->board_type].c_memt[i].memsize))
809 { /* will use the 0-sized timings by default */
810 done = 1;
811 l_fb_info->memt = cardbase[l_fb_info->board_type].c_memt[i].memt;
812 printk(KERN_WARNING "pm3fb: trying to use predefined memory timings for permedia3 board #%ld (%s, %ld MB)\n",
813 l_fb_info->board_num,
814 cardbase[l_fb_info->board_type].cardname,
815 cardbase[l_fb_info->board_type].c_memt[i].memsize);
816 pm3fb_write_memory_timings(l_fb_info);
817 return(pm3fb_timing_retry);
818 }
819 i++;
820 }
821 } else
822 return(pm3fb_timing_problem);
823 return(pm3fb_timing_ok);
824 }
825
826 static void pm3fb_write_memory_timings(struct pm3fb_info *l_fb_info)
827 {
828 unsigned char m, n, p;
829 unsigned long clockused;
830
831 PM3_SLOW_WRITE_REG(PM3LocalMemCaps, l_fb_info->memt.caps);
832 PM3_SLOW_WRITE_REG(PM3LocalMemTimings, l_fb_info->memt.timings);
833 PM3_SLOW_WRITE_REG(PM3LocalMemControl, l_fb_info->memt.control);
834 PM3_SLOW_WRITE_REG(PM3LocalMemRefresh, l_fb_info->memt.refresh);
835 PM3_SLOW_WRITE_REG(PM3LocalMemPowerDown, l_fb_info->memt.powerdown);
836
837 clockused =
838 pm3fb_CalculateClock(l_fb_info, 2 * 105000, PM3_REF_CLOCK, &m,
839 &n, &p);
840
841 PM3_WRITE_DAC_REG(PM3RD_KClkPreScale, m);
842 PM3_WRITE_DAC_REG(PM3RD_KClkFeedbackScale, n);
843 PM3_WRITE_DAC_REG(PM3RD_KClkPostScale, p);
844 PM3_WRITE_DAC_REG(PM3RD_KClkControl,
845 PM3RD_KClkControl_STATE_RUN |
846 PM3RD_KClkControl_SOURCE_PLL |
847 PM3RD_KClkControl_ENABLE);
848 PM3_WRITE_DAC_REG(PM3RD_MClkControl,
849 PM3RD_MClkControl_STATE_RUN |
850 PM3RD_MClkControl_SOURCE_KCLK |
851 PM3RD_MClkControl_ENABLE);
852 PM3_WRITE_DAC_REG(PM3RD_SClkControl,
853 PM3RD_SClkControl_STATE_RUN |
854 PM3RD_SClkControl_SOURCE_PCLK |
855 PM3RD_SClkControl_ENABLE);
856 }
857
858 static unsigned long pm3fb_read_dac_reg(struct pm3fb_info *l_fb_info,
859 unsigned long r)
860 {
861 DASSERT((l_fb_info->vIOBase != (unsigned char *) (-1)),
862 "l_fb_info->vIOBase mapped in read dac reg\n");
863 PM3_SET_INDEX(r);
864 mb();
865 return (PM3_READ_REG(PM3RD_IndexedData));
866 }
867
868 /* Calculating various clock parameter */
869 static unsigned long pm3fb_CalculateClock(struct pm3fb_info *l_fb_info, unsigned long reqclock, /* In kHz units */
870 unsigned long refclock, /* In kHz units */
871 unsigned char *prescale, /* ClkPreScale */
872 unsigned char *feedback, /* ClkFeedBackScale */
873 unsigned char *postscale
874 /* ClkPostScale */ )
875 {
876 int f, pre, post;
877 unsigned long freq;
878 long freqerr = 1000;
879 unsigned long actualclock = 0;
880
881 DTRACE;
882
883 for (f = 1; f < 256; f++) {
884 for (pre = 1; pre < 256; pre++) {
885 for (post = 0; post < 5; post++) {
886 freq =
887 ((2 * refclock * f) /
888 (pre * (1 << post)));
889 if ((reqclock > freq - freqerr)
890 && (reqclock < freq + freqerr)) {
891 freqerr =
892 (reqclock >
893 freq) ? reqclock -
894 freq : freq - reqclock;
895 *feedback = f;
896 *prescale = pre;
897 *postscale = post;
898 actualclock = freq;
899 }
900 }
901 }
902 }
903
904 return (actualclock);
905 }
906
907 static int pm3fb_Shiftbpp(struct pm3fb_info *l_fb_info,
908 unsigned long depth, int v)
909 {
910 DTRACE;
911
912 switch (depth) {
913 case 8:
914 return (v >> 4);
915 case 12:
916 case 15:
917 case 16:
918 return (v >> 3);
919 case 32:
920 return (v >> 2);
921 }
922 DPRINTK(1, "Unsupported depth %ld\n", depth);
923 return (0);
924 }
925
926 static int pm3fb_Unshiftbpp(struct pm3fb_info *l_fb_info,
927 unsigned long depth, int v)
928 {
929 DTRACE;
930
931 switch (depth) {
932 case 8:
933 return (v << 4);
934 case 12:
935 case 15:
936 case 16:
937 return (v << 3);
938 case 32:
939 return (v << 2);
940 }
941 DPRINTK(1, "Unsupported depth %ld\n", depth);
942 return (0);
943 }
944
945 static void pm3fb_mapIO(struct pm3fb_info *l_fb_info)
946 {
947 DTRACE;
948
949 l_fb_info->vIOBase =
950 ioremap((unsigned long) l_fb_info->pIOBase, PM3_REGS_SIZE);
951 l_fb_info->v_fb =
952 ioremap((unsigned long) l_fb_info->p_fb, l_fb_info->fb_size);
953 DPRINTK(2, "IO mapping : IOBase %lx / %lx, fb %lx / %lx\n",
954 (unsigned long) l_fb_info->pIOBase,
955 (unsigned long) l_fb_info->vIOBase,
956 (unsigned long) l_fb_info->p_fb,
957 (unsigned long) l_fb_info->v_fb);
958 }
959
960 static void pm3fb_unmapIO(struct pm3fb_info *l_fb_info)
961 {
962 DTRACE;
963
964 iounmap(l_fb_info->vIOBase);
965 iounmap(l_fb_info->v_fb);
966 l_fb_info->vIOBase = (unsigned char *) -1;
967 l_fb_info->v_fb = (unsigned char *) -1;
968 }
969
970 #if defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2)
971 static void pm3fb_show_cur_mode(struct pm3fb_info *l_fb_info)
972 {
973 DPRINTK(2, "PM3Aperture0: 0x%08x\n", PM3_READ_REG(PM3Aperture0));
974 DPRINTK(2, "PM3Aperture1: 0x%08x\n", PM3_READ_REG(PM3Aperture1));
975 DPRINTK(2, "PM3ByAperture1Mode: 0x%08x\n",
976 PM3_READ_REG(PM3ByAperture1Mode));
977 DPRINTK(2, "PM3ByAperture2Mode: 0x%08x\n",
978 PM3_READ_REG(PM3ByAperture2Mode));
979 DPRINTK(2, "PM3ChipConfig: 0x%08x\n", PM3_READ_REG(PM3ChipConfig));
980 DPRINTK(2, "PM3FIFODis: 0x%08x\n", PM3_READ_REG(PM3FIFODis));
981 DPRINTK(2, "PM3HTotal: 0x%08x\n", PM3_READ_REG(PM3HTotal));
982 DPRINTK(2, "PM3HbEnd: 0x%08x\n", PM3_READ_REG(PM3HbEnd));
983 DPRINTK(2, "PM3HgEnd: 0x%08x\n", PM3_READ_REG(PM3HgEnd));
984 DPRINTK(2, "PM3HsEnd: 0x%08x\n", PM3_READ_REG(PM3HsEnd));
985 DPRINTK(2, "PM3HsStart: 0x%08x\n", PM3_READ_REG(PM3HsStart));
986 DPRINTK(2, "PM3MemBypassWriteMask: 0x%08x\n",
987 PM3_READ_REG(PM3MemBypassWriteMask));
988 DPRINTK(2, "PM3RD_IndexControl: 0x%08x\n",
989 PM3_READ_REG(PM3RD_IndexControl));
990 DPRINTK(2, "PM3ScreenBase: 0x%08x\n", PM3_READ_REG(PM3ScreenBase));
991 DPRINTK(2, "PM3ScreenStride: 0x%08x\n",
992 PM3_READ_REG(PM3ScreenStride));
993 DPRINTK(2, "PM3VClkCtl: 0x%08x\n", PM3_READ_REG(PM3VClkCtl));
994 DPRINTK(2, "PM3VTotal: 0x%08x\n", PM3_READ_REG(PM3VTotal));
995 DPRINTK(2, "PM3VbEnd: 0x%08x\n", PM3_READ_REG(PM3VbEnd));
996 DPRINTK(2, "PM3VideoControl: 0x%08x\n",
997 PM3_READ_REG(PM3VideoControl));
998 DPRINTK(2, "PM3VsEnd: 0x%08x\n", PM3_READ_REG(PM3VsEnd));
999 DPRINTK(2, "PM3VsStart: 0x%08x\n", PM3_READ_REG(PM3VsStart));
1000
1001 DPRINTK(2, "PM3RD_ColorFormat: %ld\n",
1002 PM3_READ_DAC_REG(PM3RD_ColorFormat));
1003 DPRINTK(2, "PM3RD_DACControl: %ld\n",
1004 PM3_READ_DAC_REG(PM3RD_DACControl));
1005 DPRINTK(2, "PM3RD_DClk0FeedbackScale: %ld\n",
1006 PM3_READ_DAC_REG(PM3RD_DClk0FeedbackScale));
1007 DPRINTK(2, "PM3RD_DClk0PostScale: %ld\n",
1008 PM3_READ_DAC_REG(PM3RD_DClk0PostScale));
1009 DPRINTK(2, "PM3RD_DClk0PreScale: %ld\n",
1010 PM3_READ_DAC_REG(PM3RD_DClk0PreScale));
1011 DPRINTK(2, "[not set] PM3RD_IndexControl: %ld\n",
1012 PM3_READ_DAC_REG(PM3RD_IndexControl));
1013 DPRINTK(2, "PM3RD_MiscControl: %ld\n",
1014 PM3_READ_DAC_REG(PM3RD_MiscControl));
1015 DPRINTK(2, "PM3RD_PixelSize: %ld\n",
1016 PM3_READ_DAC_REG(PM3RD_PixelSize));
1017 DPRINTK(2, "PM3RD_SyncControl: %ld\n",
1018 PM3_READ_DAC_REG(PM3RD_SyncControl));
1019 }
1020
1021 #endif /* defined(PM3FB_MASTER_DEBUG) && (PM3FB_MASTER_DEBUG >= 2) */
1022 static void pm3fb_show_cur_timing(struct pm3fb_info *l_fb_info)
1023 {
1024 u16 subvendor, subdevice;
1025
1026 if ((!pci_read_config_word
1027 (l_fb_info->dev, PCI_SUBSYSTEM_VENDOR_ID, &subvendor))
1028 &&
1029 (!pci_read_config_word
1030 (l_fb_info->dev, PCI_SUBSYSTEM_ID, &subdevice))) {
1031 /* well, nothing... */
1032 } else {
1033 subvendor = subdevice = (u16)-1;
1034 }
1035
1036 printk(KERN_INFO "pm3fb: memory timings for board #%ld (subvendor: 0x%hx, subdevice: 0x%hx)\n", l_fb_info->board_num, subvendor, subdevice);
1037 printk(KERN_INFO " PM3LocalMemCaps: 0x%08x\n",
1038 PM3_READ_REG(PM3LocalMemCaps));
1039 printk(KERN_INFO " PM3LocalMemTimings: 0x%08x\n",
1040 PM3_READ_REG(PM3LocalMemTimings));
1041 printk(KERN_INFO " PM3LocalMemControl: 0x%08x\n",
1042 PM3_READ_REG(PM3LocalMemControl));
1043 printk(KERN_INFO " PM3LocalMemRefresh: 0x%08x\n",
1044 PM3_READ_REG(PM3LocalMemRefresh));
1045 printk(KERN_INFO " PM3LocalMemPowerDown: 0x%08x\n",
1046 PM3_READ_REG(PM3LocalMemPowerDown));
1047 }
1048
1049 /* write the mode to registers */
1050 static void pm3fb_write_mode(struct pm3fb_info *l_fb_info)
1051 {
1052 char tempsync = 0x00, tempmisc = 0x00;
1053 DTRACE;
1054
1055 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, 0xffffffff);
1056 PM3_SLOW_WRITE_REG(PM3Aperture0, 0x00000000);
1057 PM3_SLOW_WRITE_REG(PM3Aperture1, 0x00000000);
1058 PM3_SLOW_WRITE_REG(PM3FIFODis, 0x00000007);
1059
1060 PM3_SLOW_WRITE_REG(PM3HTotal,
1061 pm3fb_Shiftbpp(l_fb_info,
1062 l_fb_info->current_par->depth,
1063 l_fb_info->current_par->htotal -
1064 1));
1065 PM3_SLOW_WRITE_REG(PM3HsEnd,
1066 pm3fb_Shiftbpp(l_fb_info,
1067 l_fb_info->current_par->depth,
1068 l_fb_info->current_par->hsend));
1069 PM3_SLOW_WRITE_REG(PM3HsStart,
1070 pm3fb_Shiftbpp(l_fb_info,
1071 l_fb_info->current_par->depth,
1072 l_fb_info->current_par->
1073 hsstart));
1074 PM3_SLOW_WRITE_REG(PM3HbEnd,
1075 pm3fb_Shiftbpp(l_fb_info,
1076 l_fb_info->current_par->depth,
1077 l_fb_info->current_par->hbend));
1078 PM3_SLOW_WRITE_REG(PM3HgEnd,
1079 pm3fb_Shiftbpp(l_fb_info,
1080 l_fb_info->current_par->depth,
1081 l_fb_info->current_par->hbend));
1082 PM3_SLOW_WRITE_REG(PM3ScreenStride,
1083 pm3fb_Shiftbpp(l_fb_info,
1084 l_fb_info->current_par->depth,
1085 l_fb_info->current_par->stride));
1086 PM3_SLOW_WRITE_REG(PM3VTotal, l_fb_info->current_par->vtotal - 1);
1087 PM3_SLOW_WRITE_REG(PM3VsEnd, l_fb_info->current_par->vsend - 1);
1088 PM3_SLOW_WRITE_REG(PM3VsStart,
1089 l_fb_info->current_par->vsstart - 1);
1090 PM3_SLOW_WRITE_REG(PM3VbEnd, l_fb_info->current_par->vbend);
1091
1092 switch (l_fb_info->current_par->depth) {
1093 case 8:
1094 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1095 PM3ByApertureMode_PIXELSIZE_8BIT);
1096 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1097 PM3ByApertureMode_PIXELSIZE_8BIT);
1098 break;
1099
1100 case 12:
1101 case 15:
1102 case 16:
1103 #ifndef __BIG_ENDIAN
1104 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1105 PM3ByApertureMode_PIXELSIZE_16BIT);
1106 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1107 PM3ByApertureMode_PIXELSIZE_16BIT);
1108 #else
1109 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1110 PM3ByApertureMode_PIXELSIZE_16BIT |
1111 PM3ByApertureMode_BYTESWAP_BADC);
1112 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1113 PM3ByApertureMode_PIXELSIZE_16BIT |
1114 PM3ByApertureMode_BYTESWAP_BADC);
1115 #endif /* ! __BIG_ENDIAN */
1116 break;
1117
1118 case 32:
1119 #ifndef __BIG_ENDIAN
1120 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1121 PM3ByApertureMode_PIXELSIZE_32BIT);
1122 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1123 PM3ByApertureMode_PIXELSIZE_32BIT);
1124 #else
1125 PM3_SLOW_WRITE_REG(PM3ByAperture1Mode,
1126 PM3ByApertureMode_PIXELSIZE_32BIT |
1127 PM3ByApertureMode_BYTESWAP_DCBA);
1128 PM3_SLOW_WRITE_REG(PM3ByAperture2Mode,
1129 PM3ByApertureMode_PIXELSIZE_32BIT |
1130 PM3ByApertureMode_BYTESWAP_DCBA);
1131 #endif /* ! __BIG_ENDIAN */
1132 break;
1133
1134 default:
1135 DPRINTK(1, "Unsupported depth %d\n",
1136 l_fb_info->current_par->depth);
1137 break;
1138 }
1139
1140 /*
1141 * Oxygen VX1 - it appears that setting PM3VideoControl and
1142 * then PM3RD_SyncControl to the same SYNC settings undoes
1143 * any net change - they seem to xor together. Only set the
1144 * sync options in PM3RD_SyncControl. --rmk
1145 */
1146 {
1147 unsigned int video = l_fb_info->current_par->video;
1148
1149 video &= ~(PM3VideoControl_HSYNC_MASK |
1150 PM3VideoControl_VSYNC_MASK);
1151 video |= PM3VideoControl_HSYNC_ACTIVE_HIGH |
1152 PM3VideoControl_VSYNC_ACTIVE_HIGH;
1153 PM3_SLOW_WRITE_REG(PM3VideoControl, video);
1154 }
1155 PM3_SLOW_WRITE_REG(PM3VClkCtl,
1156 (PM3_READ_REG(PM3VClkCtl) & 0xFFFFFFFC));
1157 PM3_SLOW_WRITE_REG(PM3ScreenBase, l_fb_info->current_par->base);
1158 PM3_SLOW_WRITE_REG(PM3ChipConfig,
1159 (PM3_READ_REG(PM3ChipConfig) & 0xFFFFFFFD));
1160
1161 {
1162 unsigned char m; /* ClkPreScale */
1163 unsigned char n; /* ClkFeedBackScale */
1164 unsigned char p; /* ClkPostScale */
1165 (void)pm3fb_CalculateClock(l_fb_info, l_fb_info->current_par->pixclock, PM3_REF_CLOCK, &m, &n, &p);
1166
1167 DPRINTK(2,
1168 "Pixclock: %d, Pre: %d, Feedback: %d, Post: %d\n",
1169 l_fb_info->current_par->pixclock, (int) m, (int) n,
1170 (int) p);
1171
1172 PM3_WRITE_DAC_REG(PM3RD_DClk0PreScale, m);
1173 PM3_WRITE_DAC_REG(PM3RD_DClk0FeedbackScale, n);
1174 PM3_WRITE_DAC_REG(PM3RD_DClk0PostScale, p);
1175 }
1176 /*
1177 PM3_WRITE_DAC_REG(PM3RD_IndexControl, 0x00);
1178 */
1179 /*
1180 PM3_SLOW_WRITE_REG(PM3RD_IndexControl, 0x00);
1181 */
1182 if ((l_fb_info->current_par->video & PM3VideoControl_HSYNC_MASK) ==
1183 PM3VideoControl_HSYNC_ACTIVE_HIGH)
1184 tempsync |= PM3RD_SyncControl_HSYNC_ACTIVE_HIGH;
1185 if ((l_fb_info->current_par->video & PM3VideoControl_VSYNC_MASK) ==
1186 PM3VideoControl_VSYNC_ACTIVE_HIGH)
1187 tempsync |= PM3RD_SyncControl_VSYNC_ACTIVE_HIGH;
1188
1189 PM3_WRITE_DAC_REG(PM3RD_SyncControl, tempsync);
1190 DPRINTK(2, "PM3RD_SyncControl: %d\n", tempsync);
1191
1192 if (flatpanel[l_fb_info->board_num])
1193 {
1194 PM3_WRITE_DAC_REG(PM3RD_DACControl, PM3RD_DACControl_BLANK_PEDESTAL_ENABLE);
1195 PM3_WAIT(2);
1196 PM3_WRITE_REG(PM3VSConfiguration, 0x06);
1197 PM3_WRITE_REG(0x5a00, 1 << 14); /* black magic... */
1198 tempmisc = PM3RD_MiscControl_VSB_OUTPUT_ENABLE;
1199 }
1200 else
1201 PM3_WRITE_DAC_REG(PM3RD_DACControl, 0x00);
1202
1203 switch (l_fb_info->current_par->depth) {
1204 case 8:
1205 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1206 PM3RD_PixelSize_8_BIT_PIXELS);
1207 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1208 PM3RD_ColorFormat_CI8_COLOR |
1209 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW);
1210 tempmisc |= PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1211 break;
1212 case 12:
1213 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1214 PM3RD_PixelSize_16_BIT_PIXELS);
1215 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1216 PM3RD_ColorFormat_4444_COLOR |
1217 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1218 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1219 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1220 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1221 break;
1222 case 15:
1223 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1224 PM3RD_PixelSize_16_BIT_PIXELS);
1225 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1226 PM3RD_ColorFormat_5551_FRONT_COLOR |
1227 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1228 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1229 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1230 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1231 break;
1232 case 16:
1233 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1234 PM3RD_PixelSize_16_BIT_PIXELS);
1235 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1236 PM3RD_ColorFormat_565_FRONT_COLOR |
1237 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW |
1238 PM3RD_ColorFormat_LINEAR_COLOR_EXT_ENABLE);
1239 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1240 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1241 break;
1242 case 32:
1243 PM3_WRITE_DAC_REG(PM3RD_PixelSize,
1244 PM3RD_PixelSize_32_BIT_PIXELS);
1245 PM3_WRITE_DAC_REG(PM3RD_ColorFormat,
1246 PM3RD_ColorFormat_8888_COLOR |
1247 PM3RD_ColorFormat_COLOR_ORDER_BLUE_LOW);
1248 tempmisc |= PM3RD_MiscControl_DIRECTCOLOR_ENABLE |
1249 PM3RD_MiscControl_HIGHCOLOR_RES_ENABLE;
1250 break;
1251 }
1252 PM3_WRITE_DAC_REG(PM3RD_MiscControl, tempmisc);
1253
1254 PM3_SHOW_CUR_MODE;
1255 }
1256
1257 static void pm3fb_read_mode(struct pm3fb_info *l_fb_info,
1258 struct pm3fb_par *curpar)
1259 {
1260 unsigned long pixsize1, pixsize2, clockused;
1261 unsigned long pre, feedback, post;
1262
1263 DTRACE;
1264
1265 clockused = PM3_READ_REG(PM3VClkCtl);
1266
1267 switch (clockused) {
1268 case 3:
1269 pre = PM3_READ_DAC_REG(PM3RD_DClk3PreScale);
1270 feedback = PM3_READ_DAC_REG(PM3RD_DClk3FeedbackScale);
1271 post = PM3_READ_DAC_REG(PM3RD_DClk3PostScale);
1272
1273 DPRINTK(2,
1274 "DClk3 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1275 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1276 feedback,
1277 post));
1278 break;
1279 case 2:
1280 pre = PM3_READ_DAC_REG(PM3RD_DClk2PreScale);
1281 feedback = PM3_READ_DAC_REG(PM3RD_DClk2FeedbackScale);
1282 post = PM3_READ_DAC_REG(PM3RD_DClk2PostScale);
1283
1284 DPRINTK(2,
1285 "DClk2 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1286 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1287 feedback,
1288 post));
1289 break;
1290 case 1:
1291 pre = PM3_READ_DAC_REG(PM3RD_DClk1PreScale);
1292 feedback = PM3_READ_DAC_REG(PM3RD_DClk1FeedbackScale);
1293 post = PM3_READ_DAC_REG(PM3RD_DClk1PostScale);
1294
1295 DPRINTK(2,
1296 "DClk1 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1297 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1298 feedback,
1299 post));
1300 break;
1301 case 0:
1302 pre = PM3_READ_DAC_REG(PM3RD_DClk0PreScale);
1303 feedback = PM3_READ_DAC_REG(PM3RD_DClk0FeedbackScale);
1304 post = PM3_READ_DAC_REG(PM3RD_DClk0PostScale);
1305
1306 DPRINTK(2,
1307 "DClk0 parameter: Pre: %ld, Feedback: %ld, Post: %ld ; giving pixclock: %ld\n",
1308 pre, feedback, post, PM3_SCALE_TO_CLOCK(pre,
1309 feedback,
1310 post));
1311 break;
1312 default:
1313 pre = feedback = post = 0;
1314 DPRINTK(1, "Unknowk D clock used : %ld\n", clockused);
1315 break;
1316 }
1317
1318 curpar->pixclock = PM3_SCALE_TO_CLOCK(pre, feedback, post);
1319
1320 pixsize1 =
1321 PM3ByApertureMode_PIXELSIZE_MASK &
1322 (PM3_READ_REG(PM3ByAperture1Mode));
1323 pixsize2 =
1324 PM3ByApertureMode_PIXELSIZE_MASK &
1325 (PM3_READ_REG(PM3ByAperture2Mode));
1326
1327 DASSERT((pixsize1 == pixsize2),
1328 "pixsize the same in both aperture\n");
1329
1330 if (pixsize1 & PM3ByApertureMode_PIXELSIZE_32BIT)
1331 curpar->depth = 32;
1332 else if (pixsize1 & PM3ByApertureMode_PIXELSIZE_16BIT)
1333 {
1334 curpar->depth = 16;
1335 }
1336 else
1337 curpar->depth = 8;
1338
1339 /* not sure if I need to add one on the next ; it give better result with */
1340 curpar->htotal =
1341 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1342 1 + PM3_READ_REG(PM3HTotal));
1343 curpar->hsend =
1344 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1345 PM3_READ_REG(PM3HsEnd));
1346 curpar->hsstart =
1347 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1348 PM3_READ_REG(PM3HsStart));
1349 curpar->hbend =
1350 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1351 PM3_READ_REG(PM3HbEnd));
1352
1353 curpar->stride =
1354 pm3fb_Unshiftbpp(l_fb_info, curpar->depth,
1355 PM3_READ_REG(PM3ScreenStride));
1356
1357 curpar->vtotal = 1 + PM3_READ_REG(PM3VTotal);
1358 curpar->vsend = 1 + PM3_READ_REG(PM3VsEnd);
1359 curpar->vsstart = 1 + PM3_READ_REG(PM3VsStart);
1360 curpar->vbend = PM3_READ_REG(PM3VbEnd);
1361
1362 curpar->video = PM3_READ_REG(PM3VideoControl);
1363
1364 curpar->base = PM3_READ_REG(PM3ScreenBase);
1365 curpar->width = curpar->htotal - curpar->hbend; /* make virtual == displayed resolution */
1366 curpar->height = curpar->vtotal - curpar->vbend;
1367
1368 DPRINTK(2, "Found : %d * %d, %d Khz, stride is %08x\n",
1369 curpar->width, curpar->height, curpar->pixclock,
1370 curpar->stride);
1371 }
1372
1373 static unsigned long pm3fb_size_memory(struct pm3fb_info *l_fb_info)
1374 {
1375 unsigned long memsize = 0, tempBypass, i, temp1, temp2;
1376 u16 subvendor, subdevice;
1377 pm3fb_timing_result ptr;
1378
1379 DTRACE;
1380
1381 l_fb_info->fb_size = 64 * 1024 * 1024; /* pm3 aperture always 64 MB */
1382 pm3fb_mapIO(l_fb_info); /* temporary map IO */
1383
1384 DASSERT((l_fb_info->vIOBase != NULL),
1385 "IO successfully mapped before mem detect\n");
1386 DASSERT((l_fb_info->v_fb != NULL),
1387 "FB successfully mapped before mem detect\n");
1388
1389 /* card-specific stuff, *before* accessing *any* FB memory */
1390 if ((!pci_read_config_word
1391 (l_fb_info->dev, PCI_SUBSYSTEM_VENDOR_ID, &subvendor))
1392 &&
1393 (!pci_read_config_word
1394 (l_fb_info->dev, PCI_SUBSYSTEM_ID, &subdevice))) {
1395 i = 0; l_fb_info->board_type = 0;
1396 while ((cardbase[i].cardname[0]) && !(l_fb_info->board_type)) {
1397 if ((cardbase[i].subvendor == subvendor) &&
1398 (cardbase[i].subdevice == subdevice) &&
1399 (cardbase[i].func == PCI_FUNC(l_fb_info->dev->devfn))) {
1400 DPRINTK(2, "Card #%ld is an %s\n",
1401 l_fb_info->board_num,
1402 cardbase[i].cardname);
1403 if (cardbase[i].specific_setup)
1404 cardbase[i].specific_setup(l_fb_info);
1405 l_fb_info->board_type = i;
1406 }
1407 i++;
1408 }
1409 if (!l_fb_info->board_type) {
1410 DPRINTK(1, "Card #%ld is an unknown 0x%04x / 0x%04x\n",
1411 l_fb_info->board_num, subvendor, subdevice);
1412 }
1413 } else {
1414 printk(KERN_ERR "pm3fb: Error: pci_read_config_word failed, board #%ld\n",
1415 l_fb_info->board_num);
1416 }
1417
1418 if (printtimings)
1419 pm3fb_show_cur_timing(l_fb_info);
1420
1421 /* card-specific setup is done, we preserve the final
1422 memory timing for future reference */
1423 if ((ptr = pm3fb_preserve_memory_timings(l_fb_info)) == pm3fb_timing_problem) { /* memory timings were wrong ! oops.... */
1424 return(0);
1425 }
1426
1427 tempBypass = PM3_READ_REG(PM3MemBypassWriteMask);
1428
1429 DPRINTK(2, "PM3MemBypassWriteMask was: 0x%08lx\n", tempBypass);
1430
1431 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, 0xFFFFFFFF);
1432
1433 /* pm3 split up memory, replicates, and do a lot of nasty stuff IMHO ;-) */
1434 for (i = 0; i < 32; i++) {
1435 fb_writel(i * 0x00345678,
1436 (l_fb_info->v_fb + (i * 1048576)));
1437 mb();
1438 temp1 = fb_readl((l_fb_info->v_fb + (i * 1048576)));
1439
1440 /* Let's check for wrapover, write will fail at 16MB boundary */
1441 if (temp1 == (i * 0x00345678))
1442 memsize = i;
1443 else
1444 break;
1445 }
1446
1447 DPRINTK(2, "First detect pass already got %ld MB\n", memsize + 1);
1448
1449 if (memsize == i) {
1450 for (i = 0; i < 32; i++) {
1451 /* Clear first 32MB ; 0 is 0, no need to byteswap */
1452 writel(0x0000000,
1453 (l_fb_info->v_fb + (i * 1048576)));
1454 mb();
1455 }
1456
1457 for (i = 32; i < 64; i++) {
1458 fb_writel(i * 0x00345678,
1459 (l_fb_info->v_fb + (i * 1048576)));
1460 mb();
1461 temp1 =
1462 fb_readl((l_fb_info->v_fb + (i * 1048576)));
1463 temp2 =
1464 fb_readl((l_fb_info->v_fb +
1465 ((i - 32) * 1048576)));
1466 if ((temp1 == (i * 0x00345678)) && (temp2 == 0)) /* different value, different RAM... */
1467 memsize = i;
1468 else
1469 break;
1470 }
1471 }
1472
1473 DPRINTK(2, "Second detect pass got %ld MB\n", memsize + 1);
1474
1475 PM3_SLOW_WRITE_REG(PM3MemBypassWriteMask, tempBypass);
1476
1477 pm3fb_unmapIO(l_fb_info);
1478 memsize = 1048576 * (memsize + 1);
1479
1480 DPRINTK(2, "Returning 0x%08lx bytes\n", memsize);
1481
1482 if (forcesize[l_fb_info->board_num] && ((forcesize[l_fb_info->board_num] * 1048576) != memsize))
1483 {
1484 printk(KERN_WARNING "pm3fb: mismatch between probed (%ld MB) and specified (%hd MB) memory size, using SPECIFIED !\n", memsize, forcesize[l_fb_info->board_num]);
1485 memsize = 1048576 * forcesize[l_fb_info->board_num];
1486 }
1487
1488 l_fb_info->fb_size = memsize;
1489
1490 if (ptr == pm3fb_timing_retry)
1491 {
1492 printk(KERN_WARNING "pm3fb: retrying memory timings check");
1493 if (pm3fb_try_memory_timings(l_fb_info) == pm3fb_timing_problem)
1494 return(0);
1495 }
1496
1497 return (memsize);
1498 }
1499
1500 static void pm3fb_clear_memory(struct pm3fb_info *l_fb_info, u32 cc)
1501 {
1502 int i;
1503
1504 DTRACE;
1505
1506 for (i = 0; i < (l_fb_info->fb_size / sizeof(u32)) ; i++) /* clear entire FB memory to black */
1507 {
1508 fb_writel(cc, (l_fb_info->v_fb + (i * sizeof(u32))));
1509 }
1510 }
1511
1512 static void pm3fb_clear_colormap(struct pm3fb_info *l_fb_info, unsigned char r, unsigned char g, unsigned char b)
1513 {
1514 int i;
1515
1516 DTRACE;
1517
1518 for (i = 0; i < 256 ; i++) /* fill color map with white */
1519 pm3fb_set_color(l_fb_info, i, r, g, b);
1520
1521 }
1522
1523 /* common initialisation */
1524 static void pm3fb_common_init(struct pm3fb_info *l_fb_info)
1525 {
1526 DTRACE;
1527
1528 DPRINTK(2, "Initializing board #%ld @ %lx\n", l_fb_info->board_num,
1529 (unsigned long) l_fb_info);
1530
1531 strcpy(l_fb_info->gen.info.modename, permedia3_name);
1532 disp[l_fb_info->board_num].scrollmode = 0; /* SCROLL_YNOMOVE; *//* 0 means "let fbcon choose" */
1533 l_fb_info->gen.parsize = sizeof(struct pm3fb_par);
1534 l_fb_info->gen.info.changevar = NULL;
1535 l_fb_info->gen.info.fbops = &pm3fb_ops;
1536 l_fb_info->gen.info.disp = &(disp[l_fb_info->board_num]);
1537 if (fontn[l_fb_info->board_num][0])
1538 strcpy(l_fb_info->gen.info.fontname,
1539 fontn[l_fb_info->board_num]);
1540 l_fb_info->gen.info.switch_con = &fbgen_switch;
1541 l_fb_info->gen.info.updatevar = &fbgen_update_var; /* */
1542 l_fb_info->gen.info.flags = FBINFO_FLAG_DEFAULT;
1543
1544 pm3fb_mapIO(l_fb_info);
1545
1546 pm3fb_clear_memory(l_fb_info, 0);
1547 pm3fb_clear_colormap(l_fb_info, 0, 0, 0);
1548
1549 (void) fbgen_get_var(&(disp[l_fb_info->board_num]).var, -1,
1550 &l_fb_info->gen.info);
1551
1552 if (depth[l_fb_info->board_num]) /* override mode-defined depth */
1553 {
1554 pm3fb_encode_depth(&(disp[l_fb_info->board_num]).var, depth[l_fb_info->board_num]);
1555 (disp[l_fb_info->board_num]).var.bits_per_pixel = depth2bpp(depth[l_fb_info->board_num]);
1556 }
1557
1558 (void) fbgen_do_set_var(&(disp[l_fb_info->board_num]).var, 1,
1559 &l_fb_info->gen);
1560
1561 fbgen_set_disp(-1, &l_fb_info->gen);
1562
1563 do_install_cmap(0, &l_fb_info->gen.info);
1564
1565 if (register_framebuffer(&l_fb_info->gen.info) < 0) {
1566 DPRINTK(1, "Couldn't register framebuffer\n");
1567 return;
1568 }
1569
1570 PM3_WRITE_DAC_REG(PM3RD_CursorMode,
1571 PM3RD_CursorMode_CURSOR_DISABLE);
1572
1573 PM3_SHOW_CUR_MODE;
1574
1575 pm3fb_write_mode(l_fb_info);
1576
1577 printk("fb%d: %s, using %uK of video memory (%s)\n",
1578 l_fb_info->gen.info.node,
1579 permedia3_name, (u32) (l_fb_info->fb_size >> 10),
1580 cardbase[l_fb_info->board_type].cardname);
1581 }
1582
1583 /* **************************************************** */
1584 /* ***** accelerated permedia3-specific functions ***** */
1585 /* **************************************************** */
1586 #ifdef PM3FB_USE_ACCEL
1587 static void pm3fb_wait_pm3(struct pm3fb_info *l_fb_info)
1588 {
1589 DTRACE;
1590
1591 PM3_SLOW_WRITE_REG(PM3FilterMode, PM3FilterModeSync);
1592 PM3_SLOW_WRITE_REG(PM3Sync, 0);
1593 mb();
1594 do {
1595 while ((PM3_READ_REG(PM3OutFIFOWords)) == 0);
1596 rmb();
1597 } while ((PM3_READ_REG(PM3OutputFifo)) != PM3Sync_Tag);
1598 }
1599
1600 static void pm3fb_init_engine(struct pm3fb_info *l_fb_info)
1601 {
1602 PM3_SLOW_WRITE_REG(PM3FilterMode, PM3FilterModeSync);
1603 PM3_SLOW_WRITE_REG(PM3StatisticMode, 0x0);
1604 PM3_SLOW_WRITE_REG(PM3DeltaMode, 0x0);
1605 PM3_SLOW_WRITE_REG(PM3RasterizerMode, 0x0);
1606 PM3_SLOW_WRITE_REG(PM3ScissorMode, 0x0);
1607 PM3_SLOW_WRITE_REG(PM3LineStippleMode, 0x0);
1608 PM3_SLOW_WRITE_REG(PM3AreaStippleMode, 0x0);
1609 PM3_SLOW_WRITE_REG(PM3GIDMode, 0x0);
1610 PM3_SLOW_WRITE_REG(PM3DepthMode, 0x0);
1611 PM3_SLOW_WRITE_REG(PM3StencilMode, 0x0);
1612 PM3_SLOW_WRITE_REG(PM3StencilData, 0x0);
1613 PM3_SLOW_WRITE_REG(PM3ColorDDAMode, 0x0);
1614 PM3_SLOW_WRITE_REG(PM3TextureCoordMode, 0x0);
1615 PM3_SLOW_WRITE_REG(PM3TextureIndexMode0, 0x0);
1616 PM3_SLOW_WRITE_REG(PM3TextureIndexMode1, 0x0);
1617 PM3_SLOW_WRITE_REG(PM3TextureReadMode, 0x0);
1618 PM3_SLOW_WRITE_REG(PM3LUTMode, 0x0);
1619 PM3_SLOW_WRITE_REG(PM3TextureFilterMode, 0x0);
1620 PM3_SLOW_WRITE_REG(PM3TextureCompositeMode, 0x0);
1621 PM3_SLOW_WRITE_REG(PM3TextureApplicationMode, 0x0);
1622 PM3_SLOW_WRITE_REG(PM3TextureCompositeColorMode1, 0x0);
1623 PM3_SLOW_WRITE_REG(PM3TextureCompositeAlphaMode1, 0x0);
1624 PM3_SLOW_WRITE_REG(PM3TextureCompositeColorMode0, 0x0);
1625 PM3_SLOW_WRITE_REG(PM3TextureCompositeAlphaMode0, 0x0);
1626 PM3_SLOW_WRITE_REG(PM3FogMode, 0x0);
1627 PM3_SLOW_WRITE_REG(PM3ChromaTestMode, 0x0);
1628 PM3_SLOW_WRITE_REG(PM3AlphaTestMode, 0x0);
1629 PM3_SLOW_WRITE_REG(PM3AntialiasMode, 0x0);
1630 PM3_SLOW_WRITE_REG(PM3YUVMode, 0x0);
1631 PM3_SLOW_WRITE_REG(PM3AlphaBlendColorMode, 0x0);
1632 PM3_SLOW_WRITE_REG(PM3AlphaBlendAlphaMode, 0x0);
1633 PM3_SLOW_WRITE_REG(PM3DitherMode, 0x0);
1634 PM3_SLOW_WRITE_REG(PM3LogicalOpMode, 0x0);
1635 PM3_SLOW_WRITE_REG(PM3RouterMode, 0x0);
1636 PM3_SLOW_WRITE_REG(PM3Window, 0x0);
1637
1638 PM3_SLOW_WRITE_REG(PM3Config2D, 0x0);
1639
1640 PM3_SLOW_WRITE_REG(PM3SpanColorMask, 0xffffffff);
1641
1642 PM3_SLOW_WRITE_REG(PM3XBias, 0x0);
1643 PM3_SLOW_WRITE_REG(PM3YBias, 0x0);
1644 PM3_SLOW_WRITE_REG(PM3DeltaControl, 0x0);
1645
1646 PM3_SLOW_WRITE_REG(PM3BitMaskPattern, 0xffffffff);
1647
1648 PM3_SLOW_WRITE_REG(PM3FBDestReadEnables,
1649 PM3FBDestReadEnables_E(0xff) |
1650 PM3FBDestReadEnables_R(0xff) |
1651 PM3FBDestReadEnables_ReferenceAlpha(0xff));
1652 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferAddr0, 0x0);
1653 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferOffset0, 0x0);
1654 PM3_SLOW_WRITE_REG(PM3FBDestReadBufferWidth0,
1655 PM3FBDestReadBufferWidth_Width(l_fb_info->
1656 current_par->
1657 width));
1658
1659 PM3_SLOW_WRITE_REG(PM3FBDestReadMode,
1660 PM3FBDestReadMode_ReadEnable |
1661 PM3FBDestReadMode_Enable0);
1662 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferAddr, 0x0);
1663 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferOffset, 0x0);
1664 PM3_SLOW_WRITE_REG(PM3FBSourceReadBufferWidth,
1665 PM3FBSourceReadBufferWidth_Width(l_fb_info->
1666 current_par->
1667 width));
1668 PM3_SLOW_WRITE_REG(PM3FBSourceReadMode,
1669 PM3FBSourceReadMode_Blocking |
1670 PM3FBSourceReadMode_ReadEnable);
1671
1672 {
1673 unsigned long rm = 1;
1674 switch (l_fb_info->current_par->depth) {
1675 case 8:
1676 PM3_SLOW_WRITE_REG(PM3PixelSize,
1677 PM3PixelSize_GLOBAL_8BIT);
1678 break;
1679 case 12:
1680 case 15:
1681 case 16:
1682 PM3_SLOW_WRITE_REG(PM3PixelSize,
1683 PM3PixelSize_GLOBAL_16BIT);
1684 break;
1685 case 32:
1686 PM3_SLOW_WRITE_REG(PM3PixelSize,
1687 PM3PixelSize_GLOBAL_32BIT);
1688 break;
1689 default:
1690 DPRINTK(1, "Unsupported depth %d\n",
1691 l_fb_info->current_par->depth);
1692 break;
1693 }
1694 PM3_SLOW_WRITE_REG(PM3RasterizerMode, rm);
1695 }
1696
1697 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0xffffffff);
1698 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0xffffffff);
1699 PM3_SLOW_WRITE_REG(PM3FBWriteMode,
1700 PM3FBWriteMode_WriteEnable |
1701 PM3FBWriteMode_OpaqueSpan |
1702 PM3FBWriteMode_Enable0);
1703 PM3_SLOW_WRITE_REG(PM3FBWriteBufferAddr0, 0x0);
1704 PM3_SLOW_WRITE_REG(PM3FBWriteBufferOffset0, 0x0);
1705 PM3_SLOW_WRITE_REG(PM3FBWriteBufferWidth0,
1706 PM3FBWriteBufferWidth_Width(l_fb_info->
1707 current_par->
1708 width));
1709
1710 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, 0x0);
1711 {
1712 unsigned long sofb = (8UL * l_fb_info->fb_size) /
1713 ((depth2bpp(l_fb_info->current_par->depth))
1714 * l_fb_info->current_par->width); /* size in lines of FB */
1715 if (sofb > 4095)
1716 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, 4095);
1717 else
1718 PM3_SLOW_WRITE_REG(PM3SizeOfFramebuffer, sofb);
1719
1720 switch (l_fb_info->current_par->depth) {
1721 case 8:
1722 PM3_SLOW_WRITE_REG(PM3DitherMode,
1723 (1 << 10) | (2 << 3));
1724 break;
1725 case 12:
1726 case 15:
1727 case 16:
1728 PM3_SLOW_WRITE_REG(PM3DitherMode,
1729 (1 << 10) | (1 << 3));
1730 break;
1731 case 32:
1732 PM3_SLOW_WRITE_REG(PM3DitherMode,
1733 (1 << 10) | (0 << 3));
1734 break;
1735 default:
1736 DPRINTK(1, "Unsupported depth %d\n",
1737 l_fb_info->current_par->depth);
1738 break;
1739 }
1740 }
1741
1742 PM3_SLOW_WRITE_REG(PM3dXDom, 0x0);
1743 PM3_SLOW_WRITE_REG(PM3dXSub, 0x0);
1744 PM3_SLOW_WRITE_REG(PM3dY, (1 << 16));
1745 PM3_SLOW_WRITE_REG(PM3StartXDom, 0x0);
1746 PM3_SLOW_WRITE_REG(PM3StartXSub, 0x0);
1747 PM3_SLOW_WRITE_REG(PM3StartY, 0x0);
1748 PM3_SLOW_WRITE_REG(PM3Count, 0x0);
1749
1750 /* Disable LocalBuffer. better safe than sorry */
1751 PM3_SLOW_WRITE_REG(PM3LBDestReadMode, 0x0);
1752 PM3_SLOW_WRITE_REG(PM3LBDestReadEnables, 0x0);
1753 PM3_SLOW_WRITE_REG(PM3LBSourceReadMode, 0x0);
1754 PM3_SLOW_WRITE_REG(PM3LBWriteMode, 0x0);
1755
1756 pm3fb_wait_pm3(l_fb_info);
1757 }
1758
1759 #ifdef FBCON_HAS_CFB32
1760 static void pm3fb_cfb32_clear(struct vc_data *conp,
1761 struct display *p,
1762 int sy, int sx, int height, int width)
1763 {
1764 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1765 u32 c;
1766
1767 DTRACE;
1768
1769 sx = sx * fontwidth(p);
1770 width = width * fontwidth(p);
1771 sy = sy * fontheight(p);
1772 height = height * fontheight(p);
1773 c = ((u32 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1774
1775 /* block fills in 32bpp are hard, but in low res (width <= 1600 :-)
1776 we can use 16bpp operations, but not if NoWriteMask is on (SDRAM) */
1777 if ((l_fb_info->current_par->width > 1600) ||
1778 (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)) {
1779 PM3_WAIT(4);
1780
1781 PM3_WRITE_REG(PM3Config2D,
1782 PM3Config2D_UseConstantSource |
1783 PM3Config2D_ForegroundROPEnable |
1784 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1785 PM3Config2D_FBWriteEnable);
1786
1787 PM3_WRITE_REG(PM3ForegroundColor, c);
1788
1789 PM3_WRITE_REG(PM3RectanglePosition,
1790 (PM3RectanglePosition_XOffset(sx)) |
1791 (PM3RectanglePosition_YOffset(sy)));
1792
1793 PM3_WRITE_REG(PM3Render2D,
1794 PM3Render2D_XPositive |
1795 PM3Render2D_YPositive |
1796 PM3Render2D_Operation_Normal |
1797 PM3Render2D_SpanOperation |
1798 (PM3Render2D_Width(width)) |
1799 (PM3Render2D_Height(height)));
1800 } else {
1801 PM3_WAIT(8);
1802
1803 PM3_WRITE_REG(PM3FBBlockColor, c);
1804
1805 PM3_WRITE_REG(PM3PixelSize, PM3PixelSize_GLOBAL_16BIT);
1806
1807 PM3_WRITE_REG(PM3FBWriteBufferWidth0,
1808 PM3FBWriteBufferWidth_Width(l_fb_info->
1809 current_par->
1810 width << 1));
1811
1812 PM3_WRITE_REG(PM3Config2D,
1813 PM3Config2D_UseConstantSource |
1814 PM3Config2D_ForegroundROPEnable |
1815 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1816 PM3Config2D_FBWriteEnable);
1817
1818 PM3_WRITE_REG(PM3RectanglePosition,
1819 (PM3RectanglePosition_XOffset(sx << 1)) |
1820 (PM3RectanglePosition_YOffset(sy)));
1821
1822 PM3_WRITE_REG(PM3Render2D,
1823 PM3Render2D_XPositive |
1824 PM3Render2D_YPositive |
1825 PM3Render2D_Operation_Normal |
1826 (PM3Render2D_Width(width << 1)) |
1827 (PM3Render2D_Height(height)));
1828
1829 PM3_WRITE_REG(PM3FBWriteBufferWidth0,
1830 PM3FBWriteBufferWidth_Width(l_fb_info->
1831 current_par->
1832 width));
1833
1834 PM3_WRITE_REG(PM3PixelSize, PM3PixelSize_GLOBAL_32BIT);
1835 }
1836
1837 pm3fb_wait_pm3(l_fb_info);
1838 }
1839
1840 static void pm3fb_cfb32_clear_margins(struct vc_data *conp,
1841 struct display *p, int bottom_only)
1842 {
1843 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1844 int sx, sy;
1845 u32 c;
1846
1847 DTRACE;
1848
1849 sx = conp->vc_cols * fontwidth(p); /* right margin */
1850 sy = conp->vc_rows * fontheight(p); /* bottom margin */
1851 c = ((u32 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1852
1853 if (!bottom_only) { /* right margin top->bottom */
1854 PM3_WAIT(4);
1855
1856 PM3_WRITE_REG(PM3Config2D,
1857 PM3Config2D_UseConstantSource |
1858 PM3Config2D_ForegroundROPEnable |
1859 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1860 PM3Config2D_FBWriteEnable);
1861
1862 PM3_WRITE_REG(PM3ForegroundColor, c);
1863
1864 PM3_WRITE_REG(PM3RectanglePosition,
1865 (PM3RectanglePosition_XOffset
1866 (p->var.xoffset +
1867 sx)) | (PM3RectanglePosition_YOffset(p->
1868 var.
1869 yoffset)));
1870
1871 PM3_WRITE_REG(PM3Render2D,
1872 PM3Render2D_XPositive |
1873 PM3Render2D_YPositive |
1874 PM3Render2D_Operation_Normal |
1875 PM3Render2D_SpanOperation |
1876 (PM3Render2D_Width(p->var.xres - sx)) |
1877 (PM3Render2D_Height(p->var.yres)));
1878 }
1879
1880 /* bottom margin left -> right */
1881 PM3_WAIT(4);
1882
1883 PM3_WRITE_REG(PM3Config2D,
1884 PM3Config2D_UseConstantSource |
1885 PM3Config2D_ForegroundROPEnable |
1886 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1887 PM3Config2D_FBWriteEnable);
1888
1889 PM3_WRITE_REG(PM3ForegroundColor, c);
1890
1891 PM3_WRITE_REG(PM3RectanglePosition,
1892 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
1893 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
1894
1895 PM3_WRITE_REG(PM3Render2D,
1896 PM3Render2D_XPositive |
1897 PM3Render2D_YPositive |
1898 PM3Render2D_Operation_Normal |
1899 PM3Render2D_SpanOperation |
1900 (PM3Render2D_Width(p->var.xres)) |
1901 (PM3Render2D_Height(p->var.yres - sy)));
1902
1903 pm3fb_wait_pm3(l_fb_info);
1904 }
1905 #endif /* FBCON_HAS_CFB32 */
1906 #ifdef FBCON_HAS_CFB16
1907 static void pm3fb_cfb16_clear(struct vc_data *conp,
1908 struct display *p,
1909 int sy, int sx, int height, int width)
1910 {
1911 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1912 u32 c;
1913
1914 DTRACE;
1915
1916 sx = sx * fontwidth(p);
1917 width = width * fontwidth(p);
1918 sy = sy * fontheight(p);
1919 height = height * fontheight(p);
1920 c = ((u16 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1921 c = c | (c << 16);
1922
1923 PM3_WAIT(4);
1924
1925 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1926 PM3_WRITE_REG(PM3ForegroundColor, c);
1927 else
1928 PM3_WRITE_REG(PM3FBBlockColor, c);
1929
1930 PM3_WRITE_REG(PM3Config2D,
1931 PM3Config2D_UseConstantSource |
1932 PM3Config2D_ForegroundROPEnable |
1933 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1934 PM3Config2D_FBWriteEnable);
1935
1936 PM3_WRITE_REG(PM3RectanglePosition,
1937 (PM3RectanglePosition_XOffset(sx)) |
1938 (PM3RectanglePosition_YOffset(sy)));
1939
1940 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1941 PM3_WRITE_REG(PM3Render2D,
1942 PM3Render2D_XPositive |
1943 PM3Render2D_YPositive |
1944 PM3Render2D_Operation_Normal |
1945 PM3Render2D_SpanOperation |
1946 (PM3Render2D_Width(width)) |
1947 (PM3Render2D_Height(height)));
1948 else
1949 PM3_WRITE_REG(PM3Render2D,
1950 PM3Render2D_XPositive |
1951 PM3Render2D_YPositive |
1952 PM3Render2D_Operation_Normal |
1953 (PM3Render2D_Width(width)) |
1954 (PM3Render2D_Height(height)));
1955
1956 pm3fb_wait_pm3(l_fb_info);
1957 }
1958
1959 static void pm3fb_cfb16_clear_margins(struct vc_data *conp,
1960 struct display *p, int bottom_only)
1961 {
1962 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
1963 int sx, sy;
1964 u32 c;
1965
1966 DTRACE;
1967
1968 sx = conp->vc_cols * fontwidth(p); /* right margin */
1969 sy = conp->vc_rows * fontheight(p); /* bottom margin */
1970 c = ((u16 *) p->dispsw_data)[attr_bgcol_ec(p, conp)];
1971 c = c | (c << 16);
1972
1973 if (!bottom_only) { /* right margin top->bottom */
1974 PM3_WAIT(4);
1975
1976 PM3_WRITE_REG(PM3Config2D,
1977 PM3Config2D_UseConstantSource |
1978 PM3Config2D_ForegroundROPEnable |
1979 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
1980 PM3Config2D_FBWriteEnable);
1981
1982 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1983 PM3_WRITE_REG(PM3ForegroundColor, c);
1984 else
1985 PM3_WRITE_REG(PM3FBBlockColor, c);
1986
1987 PM3_WRITE_REG(PM3RectanglePosition,
1988 (PM3RectanglePosition_XOffset
1989 (p->var.xoffset +
1990 sx)) | (PM3RectanglePosition_YOffset(p->
1991 var.
1992 yoffset)));
1993 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
1994 PM3_WRITE_REG(PM3Render2D,
1995 PM3Render2D_XPositive |
1996 PM3Render2D_YPositive |
1997 PM3Render2D_Operation_Normal |
1998 PM3Render2D_SpanOperation |
1999 (PM3Render2D_Width(p->var.xres - sx)) |
2000 (PM3Render2D_Height(p->var.yres)));
2001 else
2002 PM3_WRITE_REG(PM3Render2D,
2003 PM3Render2D_XPositive |
2004 PM3Render2D_YPositive |
2005 PM3Render2D_Operation_Normal |
2006 (PM3Render2D_Width(p->var.xres - sx)) |
2007 (PM3Render2D_Height(p->var.yres)));
2008 }
2009
2010 /* bottom margin left -> right */
2011 PM3_WAIT(4);
2012
2013 PM3_WRITE_REG(PM3Config2D,
2014 PM3Config2D_UseConstantSource |
2015 PM3Config2D_ForegroundROPEnable |
2016 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2017 PM3Config2D_FBWriteEnable);
2018
2019 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2020 PM3_WRITE_REG(PM3ForegroundColor, c);
2021 else
2022 PM3_WRITE_REG(PM3FBBlockColor, c);
2023
2024
2025 PM3_WRITE_REG(PM3RectanglePosition,
2026 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
2027 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
2028
2029 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2030 PM3_WRITE_REG(PM3Render2D,
2031 PM3Render2D_XPositive |
2032 PM3Render2D_YPositive |
2033 PM3Render2D_Operation_Normal |
2034 PM3Render2D_SpanOperation |
2035 (PM3Render2D_Width(p->var.xres)) |
2036 (PM3Render2D_Height(p->var.yres - sy)));
2037 else
2038 PM3_WRITE_REG(PM3Render2D,
2039 PM3Render2D_XPositive |
2040 PM3Render2D_YPositive |
2041 PM3Render2D_Operation_Normal |
2042 (PM3Render2D_Width(p->var.xres)) |
2043 (PM3Render2D_Height(p->var.yres - sy)));
2044
2045 pm3fb_wait_pm3(l_fb_info);
2046 }
2047 #endif /* FBCON_HAS_CFB16 */
2048 #ifdef FBCON_HAS_CFB8
2049 static void pm3fb_cfb8_clear(struct vc_data *conp,
2050 struct display *p,
2051 int sy, int sx, int height, int width)
2052 {
2053 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2054 u32 c;
2055
2056 DTRACE;
2057
2058 sx = sx * fontwidth(p);
2059 width = width * fontwidth(p);
2060 sy = sy * fontheight(p);
2061 height = height * fontheight(p);
2062
2063 c = attr_bgcol_ec(p, conp);
2064 c |= c << 8;
2065 c |= c << 16;
2066
2067 PM3_WAIT(4);
2068
2069 PM3_WRITE_REG(PM3Config2D,
2070 PM3Config2D_UseConstantSource |
2071 PM3Config2D_ForegroundROPEnable |
2072 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2073 PM3Config2D_FBWriteEnable);
2074
2075 PM3_WRITE_REG(PM3ForegroundColor, c);
2076
2077 PM3_WRITE_REG(PM3RectanglePosition,
2078 (PM3RectanglePosition_XOffset(sx)) |
2079 (PM3RectanglePosition_YOffset(sy)));
2080
2081 PM3_WRITE_REG(PM3Render2D,
2082 PM3Render2D_XPositive |
2083 PM3Render2D_YPositive |
2084 PM3Render2D_Operation_Normal |
2085 PM3Render2D_SpanOperation |
2086 (PM3Render2D_Width(width)) |
2087 (PM3Render2D_Height(height)));
2088
2089 pm3fb_wait_pm3(l_fb_info);
2090 }
2091
2092 static void pm3fb_cfb8_clear_margins(struct vc_data *conp,
2093 struct display *p, int bottom_only)
2094 {
2095 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2096 int sx, sy;
2097 u32 c;
2098
2099 DTRACE;
2100
2101 sx = conp->vc_cols * fontwidth(p); /* right margin */
2102 sy = conp->vc_rows * fontheight(p); /* bottom margin */
2103 c = attr_bgcol_ec(p, conp);
2104 c |= c << 8;
2105 c |= c << 16;
2106
2107 if (!bottom_only) { /* right margin top->bottom */
2108 PM3_WAIT(4);
2109
2110 PM3_WRITE_REG(PM3Config2D,
2111 PM3Config2D_UseConstantSource |
2112 PM3Config2D_ForegroundROPEnable |
2113 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2114 PM3Config2D_FBWriteEnable);
2115
2116 PM3_WRITE_REG(PM3ForegroundColor, c);
2117
2118 PM3_WRITE_REG(PM3RectanglePosition,
2119 (PM3RectanglePosition_XOffset
2120 (p->var.xoffset +
2121 sx)) | (PM3RectanglePosition_YOffset(p->
2122 var.
2123 yoffset)));
2124
2125 PM3_WRITE_REG(PM3Render2D,
2126 PM3Render2D_XPositive |
2127 PM3Render2D_YPositive |
2128 PM3Render2D_Operation_Normal |
2129 PM3Render2D_SpanOperation |
2130 (PM3Render2D_Width(p->var.xres - sx)) |
2131 (PM3Render2D_Height(p->var.yres)));
2132 }
2133
2134 /* bottom margin left -> right */
2135 PM3_WAIT(4);
2136
2137 PM3_WRITE_REG(PM3Config2D,
2138 PM3Config2D_UseConstantSource |
2139 PM3Config2D_ForegroundROPEnable |
2140 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2141 PM3Config2D_FBWriteEnable);
2142
2143 PM3_WRITE_REG(PM3ForegroundColor, c);
2144
2145 PM3_WRITE_REG(PM3RectanglePosition,
2146 (PM3RectanglePosition_XOffset(p->var.xoffset)) |
2147 (PM3RectanglePosition_YOffset(p->var.yoffset + sy)));
2148
2149 PM3_WRITE_REG(PM3Render2D,
2150 PM3Render2D_XPositive |
2151 PM3Render2D_YPositive |
2152 PM3Render2D_Operation_Normal |
2153 PM3Render2D_SpanOperation |
2154 (PM3Render2D_Width(p->var.xres)) |
2155 (PM3Render2D_Height(p->var.yres - sy)));
2156
2157 pm3fb_wait_pm3(l_fb_info);
2158 }
2159 #endif /* FBCON_HAS_CFB8 */
2160 #if defined(FBCON_HAS_CFB8) || defined(FBCON_HAS_CFB16) || defined(FBCON_HAS_CFB32)
2161 static void pm3fb_cfbX_bmove(struct display *p,
2162 int sy, int sx,
2163 int dy, int dx, int height, int width)
2164 {
2165 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2166 int x_align, o_x, o_y;
2167
2168 DTRACE;
2169
2170 sx = sx * fontwidth(p);
2171 dx = dx * fontwidth(p);
2172 width = width * fontwidth(p);
2173 sy = sy * fontheight(p);
2174 dy = dy * fontheight(p);
2175 height = height * fontheight(p);
2176
2177 o_x = sx - dx; /*(sx > dx ) ? (sx - dx) : (dx - sx); */
2178 o_y = sy - dy; /*(sy > dy ) ? (sy - dy) : (dy - sy); */
2179
2180 x_align = (sx & 0x1f);
2181
2182 PM3_WAIT(6);
2183
2184 PM3_WRITE_REG(PM3Config2D,
2185 PM3Config2D_UserScissorEnable |
2186 PM3Config2D_ForegroundROPEnable |
2187 PM3Config2D_Blocking |
2188 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2189 PM3Config2D_FBWriteEnable);
2190
2191 PM3_WRITE_REG(PM3ScissorMinXY,
2192 ((dy & 0x0fff) << 16) | (dx & 0x0fff));
2193 PM3_WRITE_REG(PM3ScissorMaxXY,
2194 (((dy + height) & 0x0fff) << 16) |
2195 ((dx + width) & 0x0fff));
2196
2197 PM3_WRITE_REG(PM3FBSourceReadBufferOffset,
2198 PM3FBSourceReadBufferOffset_XOffset(o_x) |
2199 PM3FBSourceReadBufferOffset_YOffset(o_y));
2200
2201 PM3_WRITE_REG(PM3RectanglePosition,
2202 (PM3RectanglePosition_XOffset(dx - x_align)) |
2203 (PM3RectanglePosition_YOffset(dy)));
2204
2205 PM3_WRITE_REG(PM3Render2D,
2206 ((sx > dx) ? PM3Render2D_XPositive : 0) |
2207 ((sy > dy) ? PM3Render2D_YPositive : 0) |
2208 PM3Render2D_Operation_Normal |
2209 PM3Render2D_SpanOperation |
2210 PM3Render2D_FBSourceReadEnable |
2211 (PM3Render2D_Width(width + x_align)) |
2212 (PM3Render2D_Height(height)));
2213
2214 pm3fb_wait_pm3(l_fb_info);
2215 }
2216
2217 static void pm3fb_cfbX_putc(struct vc_data *conp, struct display *p,
2218 int c, int yy, int xx)
2219 {
2220 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2221 u8 *cdat, asx = 0, asy = 0, o_x = 0, o_y = 0;
2222 u32 fgx, bgx, ldat;
2223 int sx, sy, i;
2224
2225 DTRACE;
2226
2227 if (l_fb_info->current_par->depth == 8)
2228 fgx = attr_fgcol(p, c);
2229 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2230 fgx = ((u16 *) p->dispsw_data)[attr_fgcol(p, c)];
2231 else
2232 fgx = ((u32 *) p->dispsw_data)[attr_fgcol(p, c)];
2233
2234 PM3_COLOR(fgx);
2235
2236 if (l_fb_info->current_par->depth == 8)
2237 bgx = attr_bgcol(p, c);
2238 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2239 bgx = ((u16 *) p->dispsw_data)[attr_bgcol(p, c)];
2240 else
2241 bgx = ((u32 *) p->dispsw_data)[attr_bgcol(p, c)];
2242
2243 PM3_COLOR(bgx);
2244
2245 PM3_WAIT(4);
2246
2247 PM3_WRITE_REG(PM3Config2D,
2248 PM3Config2D_UseConstantSource |
2249 PM3Config2D_ForegroundROPEnable |
2250 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2251 PM3Config2D_FBWriteEnable | PM3Config2D_OpaqueSpan);
2252
2253 PM3_WRITE_REG(PM3ForegroundColor, fgx);
2254 PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
2255
2256 /* WARNING : address select X need to specify 8 bits for fontwidth <= 8 */
2257 /* and 16 bits for fontwidth <= 16 */
2258 /* same in _putcs, same for Y and fontheight */
2259 if (fontwidth(p) <= 8)
2260 asx = 2;
2261 else if (fontwidth(p) <= 16)
2262 asx = 3; /* look OK */
2263 if (fontheight(p) <= 8)
2264 asy = 2;
2265 else if (fontheight(p) <= 16)
2266 asy = 3; /* look OK */
2267 else if (fontheight(p) <= 32)
2268 asy = 4; /* look OK */
2269
2270 sx = xx * fontwidth(p);
2271 sy = yy * fontheight(p);
2272
2273 if (fontwidth(p) <= 8)
2274 o_x = (8 - (sx & 0x7)) & 0x7;
2275 else if (fontwidth(p) <= 16)
2276 o_x = (16 - (sx & 0xF)) & 0xF;
2277 if (fontheight(p) <= 8)
2278 o_y = (8 - (sy & 0x7)) & 0x7;
2279 else if (fontheight(p) <= 16)
2280 o_y = (16 - (sy & 0xF)) & 0xF;
2281 else if (fontheight(p) <= 32)
2282 o_y = (32 - (sy & 0x1F)) & 0x1F;
2283
2284 PM3_WRITE_REG(PM3AreaStippleMode, (o_x << 7) | (o_y << 12) | /* x_offset, y_offset in pattern */
2285 (1 << 18) | /* BE */
2286 1 | (asx << 1) | (asy << 4) | /* address select x/y */
2287 (1 << 20)); /* OpaqueSpan */
2288
2289 if (fontwidth(p) <= 8) {
2290 cdat = p->fontdata + (c & p->charmask) * fontheight(p);
2291 } else {
2292 cdat =
2293 p->fontdata +
2294 ((c & p->charmask) * (fontheight(p) << 1));
2295 }
2296
2297 PM3_WAIT(2 + fontheight(p));
2298
2299 for (i = 0; i < fontheight(p); i++) { /* assume fontheight <= 32 */
2300 if (fontwidth(p) <= 8) {
2301 ldat = *cdat++;
2302 } else { /* assume fontwidth <= 16 ATM */
2303
2304 ldat = ((*cdat++) << 8);
2305 ldat |= *cdat++;
2306 }
2307 PM3_WRITE_REG(AreaStipplePattern_indexed(i), ldat);
2308 }
2309
2310 PM3_WRITE_REG(PM3RectanglePosition,
2311 (PM3RectanglePosition_XOffset(sx)) |
2312 (PM3RectanglePosition_YOffset(sy)));
2313
2314 PM3_WRITE_REG(PM3Render2D,
2315 PM3Render2D_AreaStippleEnable |
2316 PM3Render2D_XPositive |
2317 PM3Render2D_YPositive |
2318 PM3Render2D_Operation_Normal |
2319 PM3Render2D_SpanOperation |
2320 (PM3Render2D_Width(fontwidth(p))) |
2321 (PM3Render2D_Height(fontheight(p))));
2322
2323 pm3fb_wait_pm3(l_fb_info);
2324 }
2325
2326 static void pm3fb_cfbX_putcs(struct vc_data *conp, struct display *p,
2327 const unsigned short *s, int count, int yy,
2328 int xx)
2329 {
2330 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2331 u8 *cdat, asx = 0, asy = 0, o_x = 0, o_y = 0;
2332 u32 fgx, bgx, ldat;
2333 int sx, sy, i, j;
2334 u16 sc;
2335
2336 DTRACE;
2337
2338 sc = scr_readw(s);
2339 if (l_fb_info->current_par->depth == 8)
2340 fgx = attr_fgcol(p, sc);
2341 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2342 fgx = ((u16 *) p->dispsw_data)[attr_fgcol(p, sc)];
2343 else
2344 fgx = ((u32 *) p->dispsw_data)[attr_fgcol(p, sc)];
2345
2346 PM3_COLOR(fgx);
2347
2348 if (l_fb_info->current_par->depth == 8)
2349 bgx = attr_bgcol(p, sc);
2350 else if (depth2bpp(l_fb_info->current_par->depth) == 16)
2351 bgx = ((u16 *) p->dispsw_data)[attr_bgcol(p, sc)];
2352 else
2353 bgx = ((u32 *) p->dispsw_data)[attr_bgcol(p, sc)];
2354
2355 PM3_COLOR(bgx);
2356
2357 PM3_WAIT(4);
2358
2359 PM3_WRITE_REG(PM3Config2D,
2360 PM3Config2D_UseConstantSource |
2361 PM3Config2D_ForegroundROPEnable |
2362 (PM3Config2D_ForegroundROP(0x3)) | /* Ox3 is GXcopy */
2363 PM3Config2D_FBWriteEnable |
2364 PM3Config2D_OpaqueSpan);
2365
2366 PM3_WRITE_REG(PM3ForegroundColor, fgx);
2367 PM3_WRITE_REG(PM3FillBackgroundColor, bgx);
2368
2369 /* WARNING : address select X need to specify 8 bits for fontwidth <= 8 */
2370 /* and 16 bits for fontwidth <= 16 */
2371 /* same in _putc, same for Y and fontheight */
2372 if (fontwidth(p) <= 8)
2373 asx = 2;
2374 else if (fontwidth(p) <= 16)
2375 asx = 3; /* look OK */
2376 if (fontheight(p) <= 8)
2377 asy = 2;
2378 else if (fontheight(p) <= 16)
2379 asy = 3; /* look OK */
2380 else if (fontheight(p) <= 32)
2381 asy = 4; /* look OK */
2382
2383 sy = yy * fontheight(p);
2384
2385 if (fontheight(p) <= 8)
2386 o_y = (8 - (sy & 0x7)) & 0x7;
2387 else if (fontheight(p) <= 16)
2388 o_y = (16 - (sy & 0xF)) & 0xF;
2389 else if (fontheight(p) <= 32)
2390 o_y = (32 - (sy & 0x1F)) & 0x1F;
2391
2392 for (j = 0; j < count; j++) {
2393 sc = scr_readw(s + j);
2394 if (fontwidth(p) <= 8)
2395 cdat = p->fontdata +
2396 (sc & p->charmask) * fontheight(p);
2397 else
2398 cdat = p->fontdata +
2399 ((sc & p->charmask) * fontheight(p) << 1);
2400
2401 sx = (xx + j) * fontwidth(p);
2402
2403 if (fontwidth(p) <= 8)
2404 o_x = (8 - (sx & 0x7)) & 0x7;
2405 else if (fontwidth(p) <= 16)
2406 o_x = (16 - (sx & 0xF)) & 0xF;
2407
2408 PM3_WAIT(3 + fontheight(p));
2409
2410 PM3_WRITE_REG(PM3AreaStippleMode, (o_x << 7) | (o_y << 12) | /* x_offset, y_offset in pattern */
2411 (1 << 18) | /* BE */
2412 1 | (asx << 1) | (asy << 4) | /* address select x/y */
2413 (1 << 20)); /* OpaqueSpan */
2414
2415 for (i = 0; i < fontheight(p); i++) { /* assume fontheight <= 32 */
2416 if (fontwidth(p) <= 8) {
2417 ldat = *cdat++;
2418 } else { /* assume fontwidth <= 16 ATM */
2419 ldat = ((*cdat++) << 8);
2420 ldat |= *cdat++;
2421 }
2422 PM3_WRITE_REG(AreaStipplePattern_indexed(i), ldat);
2423 }
2424
2425 PM3_WRITE_REG(PM3RectanglePosition,
2426 (PM3RectanglePosition_XOffset(sx)) |
2427 (PM3RectanglePosition_YOffset(sy)));
2428
2429 PM3_WRITE_REG(PM3Render2D,
2430 PM3Render2D_AreaStippleEnable |
2431 PM3Render2D_XPositive |
2432 PM3Render2D_YPositive |
2433 PM3Render2D_Operation_Normal |
2434 PM3Render2D_SpanOperation |
2435 (PM3Render2D_Width(fontwidth(p))) |
2436 (PM3Render2D_Height(fontheight(p))));
2437 }
2438 pm3fb_wait_pm3(l_fb_info);
2439 }
2440
2441 static void pm3fb_cfbX_revc(struct display *p, int xx, int yy)
2442 {
2443 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) p->fb_info;
2444
2445 xx = xx * fontwidth(p);
2446 yy = yy * fontheight(p);
2447
2448 if (l_fb_info->current_par->depth == 8)
2449 {
2450 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2451 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0x0F0F0F0F);
2452 else
2453 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0x0F0F0F0F);
2454 }
2455
2456 PM3_WAIT(3);
2457
2458 PM3_WRITE_REG(PM3Config2D,
2459 PM3Config2D_UseConstantSource |
2460 PM3Config2D_ForegroundROPEnable |
2461 (PM3Config2D_ForegroundROP(0xa)) | /* Oxa is GXinvert */
2462 PM3Config2D_FBDestReadEnable |
2463 PM3Config2D_FBWriteEnable);
2464
2465 PM3_WRITE_REG(PM3RectanglePosition,
2466 (PM3RectanglePosition_XOffset(xx)) |
2467 (PM3RectanglePosition_YOffset(yy)));
2468
2469 PM3_WRITE_REG(PM3Render2D,
2470 PM3Render2D_XPositive |
2471 PM3Render2D_YPositive |
2472 PM3Render2D_Operation_Normal |
2473 PM3Render2D_SpanOperation |
2474 (PM3Render2D_Width(fontwidth(p))) |
2475 (PM3Render2D_Height(fontheight(p))));
2476
2477 pm3fb_wait_pm3(l_fb_info);
2478
2479 if (l_fb_info->current_par->depth == 8)
2480 {
2481 if (l_fb_info->memt.caps & PM3LocalMemCaps_NoWriteMask)
2482 PM3_SLOW_WRITE_REG(PM3FBSoftwareWriteMask, 0xFFFFFFFF);
2483 else
2484 PM3_SLOW_WRITE_REG(PM3FBHardwareWriteMask, 0xFFFFFFFF);
2485 }
2486 }
2487
2488 #endif /* FBCON_HAS_CFB8 || FBCON_HAS_CFB16 || FBCON_HAS_CFB32 */
2489 #endif /* PM3FB_USE_ACCEL */
2490 /* *********************************** */
2491 /* ***** pre-init board(s) setup ***** */
2492 /* *********************************** */
2493
2494 static void pm3fb_mode_setup(char *mode, unsigned long board_num)
2495 {
2496 struct pm3fb_info *l_fb_info = &(fb_info[board_num]);
2497 struct pm3fb_par *l_fb_par = &(current_par[board_num]);
2498 unsigned long i = 0;
2499
2500 current_par_valid[board_num] = 0;
2501
2502 if (!strncmp(mode, "current", 7)) {
2503 l_fb_info->use_current = 1; /* default w/ OpenFirmware */
2504 } else {
2505 while ((mode_base[i].name[0])
2506 && (!current_par_valid[board_num])) {
2507 if (!
2508 (strncmp
2509 (mode, mode_base[i].name,
2510 strlen(mode_base[i].name)))) {
2511 memcpy(l_fb_par, &(mode_base[i].user_mode),
2512 sizeof(struct pm3fb_par));
2513 current_par_valid[board_num] = 1;
2514 DPRINTK(2, "Mode set to %s\n",
2515 mode_base[i].name);
2516 }
2517 i++;
2518 }
2519 DASSERT(current_par_valid[board_num],
2520 "Valid mode on command line\n");
2521 }
2522 }
2523
2524 static void pm3fb_pciid_setup(char *pciid, unsigned long board_num)
2525 {
2526 short l_bus = -1, l_slot = -1, l_func = -1;
2527 char *next;
2528
2529 if (pciid) {
2530 l_bus = simple_strtoul(pciid, &next, 10);
2531 if (next && (next[0] == ':')) {
2532 pciid = next + 1;
2533 l_slot = simple_strtoul(pciid, &next, 10);
2534 if (next && (next[0] == ':')) {
2535 pciid = next + 1;
2536 l_func =
2537 simple_strtoul(pciid, (char **) NULL,
2538 10);
2539 }
2540 }
2541 } else
2542 return;
2543
2544 if ((l_bus >= 0) && (l_slot >= 0) && (l_func >= 0)) {
2545 bus[board_num] = l_bus;
2546 slot[board_num] = l_slot;
2547 func[board_num] = l_func;
2548 DPRINTK(2, "Board #%ld will be PciId: %hd:%hd:%hd\n",
2549 board_num, l_bus, l_slot, l_func);
2550 } else {
2551 DPRINTK(1, "Invalid PciId: %hd:%hd:%hd for board #%ld\n",
2552 l_bus, l_slot, l_func, board_num);
2553 }
2554 }
2555
2556 static void pm3fb_font_setup(char *lf, unsigned long board_num)
2557 {
2558 unsigned long lfs = strlen(lf);
2559
2560 if (lfs > (PM3_FONTNAME_SIZE - 1)) {
2561 DPRINTK(1, "Fontname %s too long\n", lf);
2562 return;
2563 }
2564 strlcpy(fontn[board_num], lf, lfs + 1);
2565 }
2566
2567 static void pm3fb_bootdepth_setup(char *bds, unsigned long board_num)
2568 {
2569 unsigned long bd = simple_strtoul(bds, (char **) NULL, 10);
2570
2571 if (!(depth_supported(bd))) {
2572 printk(KERN_WARNING "pm3fb: ignoring invalid depth %s for board #%ld\n",
2573 bds, board_num);
2574 return;
2575 }
2576 depth[board_num] = bd;
2577 }
2578
2579 static void pm3fb_forcesize_setup(char *bds, unsigned long board_num)
2580 {
2581 unsigned long bd = simple_strtoul(bds, (char **) NULL, 10);
2582
2583 if (bd > 64) {
2584 printk(KERN_WARNING "pm3fb: ignoring invalid memory size %s for board #%ld\n",
2585 bds, board_num);
2586 return;
2587 }
2588 forcesize[board_num] = bd;
2589 }
2590
2591 static char *pm3fb_boardnum_setup(char *options, unsigned long *bn)
2592 {
2593 char *next;
2594
2595 if (!(isdigit(options[0]))) {
2596 (*bn) = 0;
2597 return (options);
2598 }
2599
2600 (*bn) = simple_strtoul(options, &next, 10);
2601
2602 if (next && (next[0] == ':') && ((*bn) >= 0)
2603 && ((*bn) <= PM3_MAX_BOARD)) {
2604 DPRINTK(2, "Board_num seen as %ld\n", (*bn));
2605 return (next + 1);
2606 } else {
2607 (*bn) = 0;
2608 DPRINTK(2, "Board_num default to %ld\n", (*bn));
2609 return (options);
2610 }
2611 }
2612
2613 static void pm3fb_real_setup(char *options)
2614 {
2615 char *next;
2616 unsigned long i, bn;
2617 struct pm3fb_info *l_fb_info;
2618
2619 DTRACE;
2620
2621 DPRINTK(2, "Options : %s\n", options);
2622
2623 for (i = 0; i < PM3_MAX_BOARD; i++) {
2624 l_fb_info = &(fb_info[i]);
2625 memset(l_fb_info, 0, sizeof(struct pm3fb_info));
2626 l_fb_info->gen.fbhw = &pm3fb_switch;
2627 l_fb_info->board_num = i;
2628 current_par_valid[i] = 0;
2629 slot[i] = -1;
2630 func[i] = -1;
2631 bus[i] = -1;
2632 disable[i] = 0;
2633 noaccel[i] = 0;
2634 fontn[i][0] = '\0';
2635 depth[i] = 0;
2636 l_fb_info->current_par = &(current_par[i]);
2637 }
2638
2639 /* eat up prefix pm3fb and whatever is used as separator i.e. :,= */
2640 if (!strncmp(options, "pm3fb", 5)) {
2641 options += 5;
2642 while (((*options) == ',') || ((*options) == ':')
2643 || ((*options) == '='))
2644 options++;
2645 }
2646
2647 while (options) {
2648 bn = 0;
2649 if ((next = strchr(options, ','))) {
2650 (*next) = '\0';
2651 next++;
2652 }
2653
2654 if (!strncmp(options, "mode:", 5)) {
2655 options = pm3fb_boardnum_setup(options + 5, &bn);
2656 DPRINTK(2, "Setting mode for board #%ld\n", bn);
2657 pm3fb_mode_setup(options, bn);
2658 } else if (!strncmp(options, "off:", 4)) {
2659 options = pm3fb_boardnum_setup(options + 4, &bn);
2660 DPRINTK(2, "Disabling board #%ld\n", bn);
2661 disable[bn] = 1;
2662 } else if (!strncmp(options, "off", 3)) { /* disable everything */
2663 for (i = 0; i < PM3_MAX_BOARD; i++)
2664 disable[i] = 1;
2665 } else if (!strncmp(options, "disable:", 8)) {
2666 options = pm3fb_boardnum_setup(options + 8, &bn);
2667 DPRINTK(2, "Disabling board #%ld\n", bn);
2668 disable[bn] = 1;
2669 } else if (!strncmp(options, "pciid:", 6)) {
2670 options = pm3fb_boardnum_setup(options + 6, &bn);
2671 DPRINTK(2, "Setting PciID for board #%ld\n", bn);
2672 pm3fb_pciid_setup(options, bn);
2673 } else if (!strncmp(options, "noaccel:", 8)) {
2674 options = pm3fb_boardnum_setup(options + 8, &bn);
2675 noaccel[bn] = 1;
2676 } else if (!strncmp(options, "font:", 5)) {
2677 options = pm3fb_boardnum_setup(options + 5, &bn);
2678 pm3fb_font_setup(options, bn);
2679 } else if (!strncmp(options, "depth:", 6)) {
2680 options = pm3fb_boardnum_setup(options + 6, &bn);
2681 pm3fb_bootdepth_setup(options, bn);
2682 } else if (!strncmp(options, "printtimings", 12)) {
2683 printtimings = 1;
2684 } else if (!strncmp(options, "flatpanel:", 10)) {
2685 options = pm3fb_boardnum_setup(options + 10, &bn);
2686 flatpanel[bn] = 1;
2687 } else if (!strncmp(options, "forcesize:", 10)) {
2688 options = pm3fb_boardnum_setup(options + 10, &bn);
2689 pm3fb_forcesize_setup(options, bn);
2690 }
2691 options = next;
2692 }
2693 }
2694
2695 /* ********************************************** */
2696 /* ***** framebuffer API standard functions ***** */
2697 /* ********************************************** */
2698
2699 static int pm3fb_encode_fix(struct fb_fix_screeninfo *fix,
2700 const void *par, struct fb_info_gen *info)
2701 {
2702 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2703 struct pm3fb_par *p = (struct pm3fb_par *) par;
2704
2705 DTRACE;
2706
2707 strcpy(fix->id, permedia3_name);
2708 fix->smem_start = (unsigned long)l_fb_info->p_fb;
2709 fix->smem_len = l_fb_info->fb_size;
2710 fix->mmio_start = (unsigned long)l_fb_info->pIOBase;
2711 fix->mmio_len = PM3_REGS_SIZE;
2712 #ifdef PM3FB_USE_ACCEL
2713 if (!(noaccel[l_fb_info->board_num]))
2714 fix->accel = FB_ACCEL_3DLABS_PERMEDIA3;
2715 else
2716 #endif /* PM3FB_USE_ACCEL */
2717 fix->accel = FB_ACCEL_NONE;
2718 fix->type = FB_TYPE_PACKED_PIXELS;
2719 fix->visual =
2720 (p->depth == 8) ? FB_VISUAL_PSEUDOCOLOR : FB_VISUAL_TRUECOLOR;
2721 if (current_par_valid[l_fb_info->board_num])
2722 fix->line_length =
2723 l_fb_info->current_par->width *
2724 depth2ByPP(l_fb_info->current_par->depth);
2725 else
2726 fix->line_length = 0;
2727 fix->xpanstep = 64 / depth2bpp(p->depth);
2728 fix->ypanstep = 1;
2729 fix->ywrapstep = 0;
2730 return (0);
2731 }
2732
2733 static int pm3fb_decode_var(const struct fb_var_screeninfo *var,
2734 void *par, struct fb_info_gen *info)
2735 {
2736 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2737 struct pm3fb_par *p = (struct pm3fb_par *) par;
2738 struct pm3fb_par temp_p;
2739 u32 xres;
2740
2741 DTRACE;
2742
2743 DASSERT((var != NULL), "fb_var_screeninfo* not NULL");
2744 DASSERT((p != NULL), "pm3fb_par* not NULL");
2745 DASSERT((l_fb_info != NULL), "pm3fb_info* not NULL");
2746
2747 memset(&temp_p, 0, sizeof(struct pm3fb_par));
2748 temp_p.width = (var->xres_virtual + 7) & ~7;
2749 temp_p.height = var->yres_virtual;
2750
2751 if (!(depth_supported(var->bits_per_pixel))) /* round unsupported up to a multiple of 8 */
2752 temp_p.depth = depth2bpp(var->bits_per_pixel);
2753 else
2754 temp_p.depth = var->bits_per_pixel;
2755
2756 temp_p.depth = (temp_p.depth > 32) ? 32 : temp_p.depth; /* max 32 */
2757 temp_p.depth = (temp_p.depth == 24) ? 32 : temp_p.depth; /* 24 unsupported, round-up to 32 */
2758
2759 if ((temp_p.depth == 16) && (var->red.length == 5) && (var->green.length == 5) && (var->blue.length == 5))
2760 temp_p.depth = 15; /* RGBA 5551 is stored as depth 15 */
2761
2762 if ((temp_p.depth == 16) && (var->red.length == 4) && (var->green.length == 4) && (var->blue.length == 4))
2763 temp_p.depth = 12; /* RGBA 4444 is stored as depth 12 */
2764
2765
2766 DPRINTK(2,
2767 "xres: %d, yres: %d, vxres: %d, vyres: %d ; xoffset:%d, yoffset: %d\n",
2768 var->xres, var->yres, var->xres_virtual, var->yres_virtual,
2769 var->xoffset, var->yoffset);
2770
2771 xres = (var->xres + 31) & ~31;
2772 if (temp_p.width < xres + var->xoffset)
2773 temp_p.width = xres + var->xoffset;
2774 if (temp_p.height < var->yres + var->yoffset)
2775 temp_p.height = var->yres + var->yoffset;
2776
2777 if (temp_p.width > 2048) {
2778 DPRINTK(1, "virtual width not supported: %u\n",
2779 temp_p.width);
2780 return (-EINVAL);
2781 }
2782 if (var->yres < 200) {
2783 DPRINTK(1, "height not supported: %u\n", (u32) var->yres);
2784 return (-EINVAL);
2785 }
2786 if (temp_p.height < 200 || temp_p.height > 4095) {
2787 DPRINTK(1, "virtual height not supported: %u\n",
2788 temp_p.height);
2789 return (-EINVAL);
2790 }
2791 if (!(depth_supported(temp_p.depth))) {
2792 DPRINTK(1, "depth not supported: %u\n", temp_p.depth);
2793 return (-EINVAL);
2794 }
2795 if ((temp_p.width * temp_p.height * depth2ByPP(temp_p.depth)) >
2796 l_fb_info->fb_size) {
2797 DPRINTK(1, "no memory for screen (%ux%ux%u)\n",
2798 temp_p.width, temp_p.height, temp_p.depth);
2799 return (-EINVAL);
2800 }
2801
2802 if ((!var->pixclock) ||
2803 (!var->right_margin) ||
2804 (!var->hsync_len) ||
2805 (!var->left_margin) ||
2806 (!var->lower_margin) ||
2807 (!var->vsync_len) || (!var->upper_margin)
2808 ) {
2809 unsigned long i = 0, done = 0;
2810 printk(KERN_WARNING "pm3fb: refusing to use a likely wrong timing\n");
2811
2812 while ((mode_base[i].user_mode.width) && !done) {
2813 if ((mode_base[i].user_mode.width == temp_p.width)
2814 && (mode_base[i].user_mode.height ==
2815 temp_p.height)) {
2816 printk(KERN_NOTICE "pm3fb: using close match %s\n",
2817 mode_base[i].name);
2818 temp_p = mode_base[i].user_mode;
2819 done = 1;
2820 }
2821 i++;
2822 }
2823 if (!done)
2824 return (-EINVAL);
2825 } else {
2826 temp_p.pixclock = PICOS2KHZ(var->pixclock);
2827 if (temp_p.pixclock > PM3_MAX_PIXCLOCK) {
2828 DPRINTK(1, "pixclock too high (%uKHz)\n",
2829 temp_p.pixclock);
2830 return (-EINVAL);
2831 }
2832
2833 temp_p.hsstart = var->right_margin;
2834 temp_p.hsend = var->right_margin + var->hsync_len;
2835 temp_p.hbend =
2836 var->right_margin + var->hsync_len + var->left_margin;
2837 temp_p.htotal = xres + temp_p.hbend;
2838
2839 temp_p.vsstart = var->lower_margin;
2840 temp_p.vsend = var->lower_margin + var->vsync_len;
2841 temp_p.vbend =
2842 var->lower_margin + var->vsync_len + var->upper_margin;
2843 temp_p.vtotal = var->yres + temp_p.vbend;
2844
2845 temp_p.stride = temp_p.width;
2846
2847 DPRINTK(2, "Using %d * %d, %d Khz, stride is %08x\n",
2848 temp_p.width, temp_p.height, temp_p.pixclock,
2849 temp_p.stride);
2850
2851 temp_p.base =
2852 pm3fb_Shiftbpp(l_fb_info, temp_p.depth,
2853 (var->yoffset * xres) + var->xoffset);
2854
2855 temp_p.video = 0;
2856
2857 if (var->sync & FB_SYNC_HOR_HIGH_ACT)
2858 temp_p.video |= PM3VideoControl_HSYNC_ACTIVE_HIGH;
2859 else
2860 temp_p.video |= PM3VideoControl_HSYNC_ACTIVE_LOW;
2861
2862 if (var->sync & FB_SYNC_VERT_HIGH_ACT)
2863 temp_p.video |= PM3VideoControl_VSYNC_ACTIVE_HIGH;
2864 else
2865 temp_p.video |= PM3VideoControl_VSYNC_ACTIVE_LOW;
2866
2867 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
2868 DPRINTK(1, "Interlaced mode not supported\n\n");
2869 return (-EINVAL);
2870 }
2871
2872 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE)
2873 temp_p.video |= PM3VideoControl_LINE_DOUBLE_ON;
2874 else
2875 temp_p.video |= PM3VideoControl_LINE_DOUBLE_OFF;
2876
2877 if (var->activate == FB_ACTIVATE_NOW)
2878 temp_p.video |= PM3VideoControl_ENABLE;
2879 else {
2880 temp_p.video |= PM3VideoControl_DISABLE;
2881 DPRINTK(2, "PM3Video disabled\n");
2882 }
2883
2884 switch (temp_p.depth) {
2885 case 8:
2886 temp_p.video |= PM3VideoControl_PIXELSIZE_8BIT;
2887 break;
2888 case 12:
2889 case 15:
2890 case 16:
2891 temp_p.video |= PM3VideoControl_PIXELSIZE_16BIT;
2892 break;
2893 case 32:
2894 temp_p.video |= PM3VideoControl_PIXELSIZE_32BIT;
2895 break;
2896 default:
2897 DPRINTK(1, "Unsupported depth\n");
2898 break;
2899 }
2900 }
2901 (*p) = temp_p;
2902
2903 #ifdef PM3FB_USE_ACCEL
2904 if (var->accel_flags & FB_ACCELF_TEXT)
2905 noaccel[l_fb_info->board_num] = 0;
2906 else
2907 noaccel[l_fb_info->board_num] = 1;
2908 #endif /* PM3FB_USE_ACCEL */
2909
2910 return (0);
2911 }
2912
2913 static void pm3fb_encode_depth(struct fb_var_screeninfo *var, long d)
2914 {
2915 switch (d) {
2916 case 8:
2917 var->red.length = var->green.length = var->blue.length = 8;
2918 var->red.offset = var->green.offset = var->blue.offset = 0;
2919 var->transp.offset = var->transp.length = 0;
2920 break;
2921
2922 case 12:
2923 var->red.offset = 8;
2924 var->red.length = 4;
2925 var->green.offset = 4;
2926 var->green.length = 4;
2927 var->blue.offset = 0;
2928 var->blue.length = 4;
2929 var->transp.offset = 12;
2930 var->transp.length = 4;
2931 break;
2932
2933 case 15:
2934 var->red.offset = 10;
2935 var->red.length = 5;
2936 var->green.offset = 5;
2937 var->green.length = 5;
2938 var->blue.offset = 0;
2939 var->blue.length = 5;
2940 var->transp.offset = 15;
2941 var->transp.length = 1;
2942 break;
2943
2944 case 16:
2945 var->red.offset = 11;
2946 var->red.length = 5;
2947 var->green.offset = 5;
2948 var->green.length = 6;
2949 var->blue.offset = 0;
2950 var->blue.length = 5;
2951 var->transp.offset = var->transp.length = 0;
2952 break;
2953
2954 case 32:
2955 var->transp.offset = 24;
2956 var->red.offset = 16;
2957 var->green.offset = 8;
2958 var->blue.offset = 0;
2959 var->red.length = var->green.length =
2960 var->blue.length = var->transp.length = 8;
2961 break;
2962
2963 default:
2964 DPRINTK(1, "Unsupported depth %ld\n", d);
2965 break;
2966 }
2967 }
2968
2969 static int pm3fb_encode_var(struct fb_var_screeninfo *var,
2970 const void *par, struct fb_info_gen *info)
2971 {
2972 struct pm3fb_par *p = (struct pm3fb_par *) par;
2973 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
2974
2975 u32 base;
2976
2977 DTRACE;
2978
2979 DASSERT((var != NULL), "fb_var_screeninfo* not NULL");
2980 DASSERT((p != NULL), "pm3fb_par* not NULL");
2981 DASSERT((info != NULL), "fb_info_gen* not NULL");
2982
2983 memset(var, 0, sizeof(struct fb_var_screeninfo));
2984
2985 #ifdef PM3FB_USE_ACCEL
2986 if (!(noaccel[l_fb_info->board_num]))
2987 var->accel_flags |= FB_ACCELF_TEXT;
2988 #endif /* PM3FB_USE_ACCEL */
2989
2990 var->xres_virtual = p->width;
2991 var->yres_virtual = p->height;
2992 var->xres = p->htotal - p->hbend;
2993 var->yres = p->vtotal - p->vbend;
2994
2995 DPRINTK(2, "xres = %d, yres : %d\n", var->xres, var->yres);
2996
2997 var->right_margin = p->hsstart;
2998 var->hsync_len = p->hsend - p->hsstart;
2999 var->left_margin = p->hbend - p->hsend;
3000 var->lower_margin = p->vsstart;
3001 var->vsync_len = p->vsend - p->vsstart;
3002 var->upper_margin = p->vbend - p->vsend;
3003 var->bits_per_pixel = depth2bpp(p->depth);
3004
3005 pm3fb_encode_depth(var, p->depth);
3006
3007 base = pm3fb_Unshiftbpp(l_fb_info, p->depth, p->base);
3008
3009 var->xoffset = base % var->xres;
3010 var->yoffset = base / var->xres;
3011
3012 var->height = var->width = -1;
3013
3014 var->pixclock = KHZ2PICOS(p->pixclock);
3015
3016 if ((p->video & PM3VideoControl_HSYNC_MASK) ==
3017 PM3VideoControl_HSYNC_ACTIVE_HIGH)
3018 var->sync |= FB_SYNC_HOR_HIGH_ACT;
3019 if ((p->video & PM3VideoControl_VSYNC_MASK) ==
3020 PM3VideoControl_VSYNC_ACTIVE_HIGH)
3021 var->sync |= FB_SYNC_VERT_HIGH_ACT;
3022 if (p->video & PM3VideoControl_LINE_DOUBLE_ON)
3023 var->vmode = FB_VMODE_DOUBLE;
3024
3025 return (0);
3026 }
3027
3028 static void pm3fb_get_par(void *par, struct fb_info_gen *info)
3029 {
3030 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3031
3032 DTRACE;
3033
3034 if (!current_par_valid[l_fb_info->board_num]) {
3035 if (l_fb_info->use_current)
3036 pm3fb_read_mode(l_fb_info, l_fb_info->current_par);
3037 else
3038 memcpy(l_fb_info->current_par,
3039 &(mode_base[0].user_mode),
3040 sizeof(struct pm3fb_par));
3041 current_par_valid[l_fb_info->board_num] = 1;
3042 }
3043 *((struct pm3fb_par *) par) = *(l_fb_info->current_par);
3044 }
3045
3046 static void pm3fb_set_par(const void *par, struct fb_info_gen *info)
3047 {
3048 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3049
3050 DTRACE;
3051
3052 *(l_fb_info->current_par) = *((struct pm3fb_par *) par);
3053 current_par_valid[l_fb_info->board_num] = 1;
3054
3055 pm3fb_write_mode(l_fb_info);
3056
3057 #ifdef PM3FB_USE_ACCEL
3058 pm3fb_init_engine(l_fb_info);
3059 #endif /* PM3FB_USE_ACCEL */
3060 }
3061
3062 static void pm3fb_set_color(struct pm3fb_info *l_fb_info,
3063 unsigned char regno, unsigned char r,
3064 unsigned char g, unsigned char b)
3065 {
3066 DTRACE;
3067
3068 PM3_SLOW_WRITE_REG(PM3RD_PaletteWriteAddress, regno);
3069 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, r);
3070 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, g);
3071 PM3_SLOW_WRITE_REG(PM3RD_PaletteData, b);
3072 }
3073
3074 static int pm3fb_getcolreg(unsigned regno, unsigned *red, unsigned *green,
3075 unsigned *blue, unsigned *transp,
3076 struct fb_info *info)
3077 {
3078 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3079
3080 DTRACE;
3081
3082 if (regno < 256) {
3083 *red =
3084 l_fb_info->palette[regno].red << 8 | l_fb_info->
3085 palette[regno].red;
3086 *green =
3087 l_fb_info->palette[regno].green << 8 | l_fb_info->
3088 palette[regno].green;
3089 *blue =
3090 l_fb_info->palette[regno].blue << 8 | l_fb_info->
3091 palette[regno].blue;
3092 *transp =
3093 l_fb_info->palette[regno].transp << 8 | l_fb_info->
3094 palette[regno].transp;
3095 }
3096 return (regno > 255);
3097 }
3098
3099 static int pm3fb_setcolreg(unsigned regno, unsigned red, unsigned green,
3100 unsigned blue, unsigned transp,
3101 struct fb_info *info)
3102 {
3103 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3104
3105 DTRACE;
3106
3107 if (regno < 16) {
3108 switch (l_fb_info->current_par->depth) {
3109 #ifdef FBCON_HAS_CFB8
3110 case 8:
3111 break;
3112 #endif
3113 #ifdef FBCON_HAS_CFB16
3114 case 12:
3115 l_fb_info->cmap.cmap12[regno] =
3116 (((u32) red & 0xf000) >> 4) |
3117 (((u32) green & 0xf000) >> 8) |
3118 (((u32) blue & 0xf000) >> 12);
3119 break;
3120
3121 case 15:
3122 l_fb_info->cmap.cmap15[regno] =
3123 (((u32) red & 0xf800) >> 1) |
3124 (((u32) green & 0xf800) >> 6) |
3125 (((u32) blue & 0xf800) >> 11);
3126 break;
3127
3128 case 16:
3129 l_fb_info->cmap.cmap16[regno] =
3130 ((u32) red & 0xf800) |
3131 (((u32) green & 0xfc00) >> 5) |
3132 (((u32) blue & 0xf800) >> 11);
3133 break;
3134 #endif
3135 #ifdef FBCON_HAS_CFB32
3136 case 32:
3137 l_fb_info->cmap.cmap32[regno] =
3138 (((u32) transp & 0xff00) << 16) |
3139 (((u32) red & 0xff00) << 8) |
3140 (((u32) green & 0xff00)) |
3141 (((u32) blue & 0xff00) >> 8);
3142 break;
3143 #endif
3144 default:
3145 DPRINTK(1, "bad depth %u\n",
3146 l_fb_info->current_par->depth);
3147 break;
3148 }
3149 }
3150 if (regno < 256) {
3151 l_fb_info->palette[regno].red = red >> 8;
3152 l_fb_info->palette[regno].green = green >> 8;
3153 l_fb_info->palette[regno].blue = blue >> 8;
3154 l_fb_info->palette[regno].transp = transp >> 8;
3155 if (l_fb_info->current_par->depth == 8)
3156 pm3fb_set_color(l_fb_info, regno, red >> 8,
3157 green >> 8, blue >> 8);
3158 }
3159 return (regno > 255);
3160 }
3161
3162 static int pm3fb_blank(int blank_mode, struct fb_info_gen *info)
3163 {
3164 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3165 u32 video;
3166
3167 DTRACE;
3168
3169 if (!current_par_valid[l_fb_info->board_num])
3170 return (1);
3171
3172 video = l_fb_info->current_par->video;
3173
3174 /*
3175 * Oxygen VX1 - it appears that setting PM3VideoControl and
3176 * then PM3RD_SyncControl to the same SYNC settings undoes
3177 * any net change - they seem to xor together. Only set the
3178 * sync options in PM3RD_SyncControl. --rmk
3179 */
3180 video &= ~(PM3VideoControl_HSYNC_MASK |
3181 PM3VideoControl_VSYNC_MASK);
3182 video |= PM3VideoControl_HSYNC_ACTIVE_HIGH |
3183 PM3VideoControl_VSYNC_ACTIVE_HIGH;
3184
3185 if (blank_mode > 0) {
3186 switch (blank_mode - 1) {
3187
3188 case VESA_NO_BLANKING: /* FIXME */
3189 video = video & ~(PM3VideoControl_ENABLE);
3190 break;
3191
3192 case VESA_HSYNC_SUSPEND:
3193 video = video & ~(PM3VideoControl_HSYNC_MASK |
3194 PM3VideoControl_BLANK_ACTIVE_LOW);
3195 break;
3196 case VESA_VSYNC_SUSPEND:
3197 video = video & ~(PM3VideoControl_VSYNC_MASK |
3198 PM3VideoControl_BLANK_ACTIVE_LOW);
3199 break;
3200 case VESA_POWERDOWN:
3201 video = video & ~(PM3VideoControl_HSYNC_MASK |
3202 PM3VideoControl_VSYNC_MASK |
3203 PM3VideoControl_BLANK_ACTIVE_LOW);
3204 break;
3205 default:
3206 DPRINTK(1, "Unsupported blanking %d\n",
3207 blank_mode);
3208 return (1);
3209 break;
3210 }
3211 }
3212
3213 PM3_SLOW_WRITE_REG(PM3VideoControl, video);
3214
3215 return (0);
3216 }
3217
3218 static void pm3fb_set_disp(const void *par, struct display *disp,
3219 struct fb_info_gen *info)
3220 {
3221 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3222 struct pm3fb_par *p = (struct pm3fb_par *) par;
3223 u32 flags;
3224
3225 DTRACE;
3226
3227 local_irq_save(flags);
3228 info->info.screen_base = l_fb_info->v_fb;
3229 switch (p->depth) {
3230 #ifdef FBCON_HAS_CFB8
3231 case 8:
3232 #ifdef PM3FB_USE_ACCEL
3233 if (!(noaccel[l_fb_info->board_num]))
3234 disp->dispsw = &pm3fb_cfb8;
3235 else
3236 #endif /* PM3FB_USE_ACCEL */
3237 disp->dispsw = &fbcon_cfb8;
3238 break;
3239 #endif
3240 #ifdef FBCON_HAS_CFB16
3241 case 12:
3242 #ifdef PM3FB_USE_ACCEL
3243 if (!(noaccel[l_fb_info->board_num]))
3244 disp->dispsw = &pm3fb_cfb16;
3245 else
3246 #endif /* PM3FB_USE_ACCEL */
3247 disp->dispsw = &fbcon_cfb16;
3248 disp->dispsw_data = l_fb_info->cmap.cmap12;
3249 break;
3250 case 15:
3251 #ifdef PM3FB_USE_ACCEL
3252 if (!(noaccel[l_fb_info->board_num]))
3253 disp->dispsw = &pm3fb_cfb16;
3254 else
3255 #endif /* PM3FB_USE_ACCEL */
3256 disp->dispsw = &fbcon_cfb16;
3257 disp->dispsw_data = l_fb_info->cmap.cmap15;
3258 break;
3259 case 16:
3260 #ifdef PM3FB_USE_ACCEL
3261 if (!(noaccel[l_fb_info->board_num]))
3262 disp->dispsw = &pm3fb_cfb16;
3263 else
3264 #endif /* PM3FB_USE_ACCEL */
3265 disp->dispsw = &fbcon_cfb16;
3266 disp->dispsw_data = l_fb_info->cmap.cmap16;
3267 break;
3268 #endif
3269 #ifdef FBCON_HAS_CFB32
3270 case 32:
3271 #ifdef PM3FB_USE_ACCEL
3272 if (!(noaccel[l_fb_info->board_num]))
3273 disp->dispsw = &pm3fb_cfb32;
3274 else
3275 #endif /* PM3FB_USE_ACCEL */
3276 disp->dispsw = &fbcon_cfb32;
3277 disp->dispsw_data = l_fb_info->cmap.cmap32;
3278 break;
3279 #endif /* FBCON_HAS_CFB32 */
3280 default:
3281 disp->dispsw = &fbcon_dummy;
3282 DPRINTK(1, "Invalid depth, using fbcon_dummy\n");
3283 break;
3284 }
3285 local_irq_restore(flags);
3286 }
3287
3288 /* */
3289 static void pm3fb_detect(void)
3290 {
3291 struct pci_dev *dev_array[PM3_MAX_BOARD];
3292 struct pci_dev *dev = NULL;
3293 struct pm3fb_info *l_fb_info = &(fb_info[0]);
3294 unsigned long i, j, done;
3295
3296 DTRACE;
3297
3298 for (i = 0; i < PM3_MAX_BOARD; i++) {
3299 dev_array[i] = NULL;
3300 fb_info[i].dev = NULL;
3301 }
3302
3303 dev =
3304 pci_find_device(PCI_VENDOR_ID_3DLABS,
3305 PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev);
3306
3307 for (i = 0; ((i < PM3_MAX_BOARD) && dev); i++) {
3308 dev_array[i] = dev;
3309 dev =
3310 pci_find_device(PCI_VENDOR_ID_3DLABS,
3311 PCI_DEVICE_ID_3DLABS_PERMEDIA3, dev);
3312 }
3313
3314 if (dev) { /* more than PM3_MAX_BOARD */
3315 printk(KERN_WARNING "pm3fb: Warning: more than %d boards found\n",
3316 PM3_MAX_BOARD);
3317 }
3318
3319 if (!dev_array[0]) { /* not a single board, abort */
3320 return;
3321 }
3322
3323 /* allocate user-defined boards */
3324 for (i = 0; i < PM3_MAX_BOARD; i++) {
3325 if ((bus[i] >= 0) && (slot[i] >= 0) && (func[i] >= 0)) {
3326 for (j = 0; j < PM3_MAX_BOARD; j++) {
3327 if ((dev_array[j] != NULL) &&
3328 (dev_array[j]->bus->number == bus[i])
3329 && (PCI_SLOT(dev_array[j]->devfn) ==
3330 slot[i])
3331 && (PCI_FUNC(dev_array[j]->devfn) ==
3332 func[i])) {
3333 fb_info[i].dev = dev_array[j];
3334 dev_array[j] = NULL;
3335 }
3336 }
3337 }
3338 }
3339 /* allocate remaining boards */
3340 for (i = 0; i < PM3_MAX_BOARD; i++) {
3341 if (fb_info[i].dev == NULL) {
3342 done = 0;
3343 for (j = 0; ((j < PM3_MAX_BOARD) && (!done)); j++) {
3344 if (dev_array[j] != NULL) {
3345 fb_info[i].dev = dev_array[j];
3346 dev_array[j] = NULL;
3347 done = 1;
3348 }
3349 }
3350 }
3351 }
3352
3353 /* at that point, all PCI Permedia3 are detected and allocated */
3354 /* now, initialize... or not */
3355 for (i = 0; i < PM3_MAX_BOARD; i++) {
3356 l_fb_info = &(fb_info[i]);
3357 if ((l_fb_info->dev) && (!disable[i])) { /* PCI device was found and not disabled by user */
3358 DPRINTK(2,
3359 "found @%lx Vendor %lx Device %lx ; base @ : %lx - %lx - %lx - %lx - %lx - %lx, irq %ld\n",
3360 (unsigned long) l_fb_info->dev,
3361 (unsigned long) l_fb_info->dev->vendor,
3362 (unsigned long) l_fb_info->dev->device,
3363 (unsigned long)
3364 pci_resource_start(l_fb_info->dev, 0),
3365 (unsigned long)
3366 pci_resource_start(l_fb_info->dev, 1),
3367 (unsigned long)
3368 pci_resource_start(l_fb_info->dev, 2),
3369 (unsigned long)
3370 pci_resource_start(l_fb_info->dev, 3),
3371 (unsigned long)
3372 pci_resource_start(l_fb_info->dev, 4),
3373 (unsigned long)
3374 pci_resource_start(l_fb_info->dev, 5),
3375 (unsigned long) l_fb_info->dev->irq);
3376
3377 l_fb_info->pIOBase =
3378 (unsigned char *)
3379 pci_resource_start(l_fb_info->dev, 0);
3380 #ifdef __BIG_ENDIAN
3381 l_fb_info->pIOBase += PM3_REGS_SIZE;
3382 #endif
3383 l_fb_info->vIOBase = (unsigned char *) -1;
3384 l_fb_info->p_fb =
3385 (unsigned char *)
3386 pci_resource_start(l_fb_info->dev, 1);
3387 l_fb_info->v_fb = (unsigned char *) -1;
3388
3389 if (!request_mem_region
3390 ((unsigned long)l_fb_info->p_fb, 64 * 1024 * 1024, /* request full aperture size */
3391 "pm3fb")) {
3392 printk
3393 (KERN_ERR "pm3fb: Error: couldn't request framebuffer memory, board #%ld\n",
3394 l_fb_info->board_num);
3395 continue;
3396 }
3397 if (!request_mem_region
3398 ((unsigned long)l_fb_info->pIOBase, PM3_REGS_SIZE,
3399 "pm3fb I/O regs")) {
3400 printk
3401 (KERN_ERR "pm3fb: Error: couldn't request IObase memory, board #%ld\n",
3402 l_fb_info->board_num);
3403 continue;
3404 }
3405 if (forcesize[l_fb_info->board_num])
3406 l_fb_info->fb_size = forcesize[l_fb_info->board_num];
3407
3408 l_fb_info->fb_size =
3409 pm3fb_size_memory(l_fb_info);
3410 if (l_fb_info->fb_size) {
3411 (void) pci_enable_device(l_fb_info->dev);
3412 pm3fb_common_init(l_fb_info);
3413 } else
3414 printk(KERN_ERR "pm3fb: memory problem, not enabling board #%ld\n", l_fb_info->board_num);
3415 }
3416 }
3417 }
3418
3419 static int pm3fb_pan_display(const struct fb_var_screeninfo *var,
3420 struct fb_info_gen *info)
3421 {
3422 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3423
3424 DTRACE;
3425
3426 if (!current_par_valid[l_fb_info->board_num])
3427 return -EINVAL;
3428
3429 l_fb_info->current_par->base = /* in 128 bits chunk - i.e. AFTER Shiftbpp */
3430 pm3fb_Shiftbpp(l_fb_info,
3431 l_fb_info->current_par->depth,
3432 (var->yoffset * l_fb_info->current_par->width) +
3433 var->xoffset);
3434 PM3_SLOW_WRITE_REG(PM3ScreenBase, l_fb_info->current_par->base);
3435 return 0;
3436 }
3437
3438 static int pm3fb_ioctl(struct fb_info *info, u_int cmd, u_long arg)
3439 {
3440 struct pm3fb_info *l_fb_info = (struct pm3fb_info *) info;
3441 u32 cm, i;
3442 #ifdef PM3FB_MASTER_DEBUG
3443 char cc[3];
3444 #endif /* PM3FB_MASTER_DEBUG */
3445
3446 switch(cmd)
3447 {
3448 #ifdef PM3FB_MASTER_DEBUG
3449 case PM3FBIO_CLEARMEMORY:
3450 if (copy_from_user(&cm, (void *)arg, sizeof(u32)))
3451 return(-EFAULT);
3452 pm3fb_clear_memory(l_fb_info, cm);
3453 return(0);
3454 break;
3455
3456 case PM3FBIO_CLEARCMAP:
3457 if (copy_from_user(cc, (void*)arg, 3 * sizeof(char)))
3458 return(-EFAULT);
3459 pm3fb_clear_colormap(l_fb_info, cc[0], cc[1], cc[2]);
3460 return(0);
3461 break;
3462 #endif /* PM3FB_MASTER_DEBUG */
3463
3464 case PM3FBIO_RESETCHIP:
3465 cm = 1;
3466 PM3_SLOW_WRITE_REG(PM3ResetStatus, 1);
3467 for (i = 0 ; (i < 10000) && cm ; i++)
3468 {
3469 PM3_DELAY(10);
3470 cm = PM3_READ_REG(PM3ResetStatus);
3471 }
3472 if (cm)
3473 {
3474 printk(KERN_ERR "pm3fb: chip reset failed with status 0x%x\n", cm);
3475 return(-EIO);
3476 }
3477 /* first thing first, reload memory timings */
3478 pm3fb_write_memory_timings(l_fb_info);
3479 #ifdef PM3FB_USE_ACCEL
3480 pm3fb_init_engine(l_fb_info);
3481 #endif /* PM3FB_USE_ACCEL */
3482 pm3fb_write_mode(l_fb_info);
3483 return(0);
3484 break;
3485
3486 default:
3487 DPRINTK(2, "unknown ioctl: %d (%x)\n", cmd, cmd);
3488 return(-EINVAL);
3489 }
3490 }
3491
3492 /* ****************************************** */
3493 /* ***** standard FB API init functions ***** */
3494 /* ****************************************** */
3495
3496 int __init pm3fb_setup(char *options)
3497 {
3498 long opsi = strlen(options);
3499
3500 DTRACE;
3501
3502 memcpy(g_options, options,
3503 ((opsi + 1) >
3504 PM3_OPTIONS_SIZE) ? PM3_OPTIONS_SIZE : (opsi + 1));
3505 g_options[PM3_OPTIONS_SIZE - 1] = 0;
3506
3507 return (0);
3508 }
3509
3510 int __init pm3fb_init(void)
3511 {
3512 DTRACE;
3513
3514 DPRINTK(2, "This is pm3fb.c, CVS version: $Header: /cvsroot/linux/drivers/video/pm3fb.c,v 1.1 2002/02/25 19:11:06 marcelo Exp $");
3515
3516 pm3fb_real_setup(g_options);
3517
3518 pm3fb_detect();
3519
3520 if (!fb_info[0].dev) { /* not even one board ??? */
3521 DPRINTK(1, "No PCI Permedia3 board detected\n");
3522 }
3523 return (0);
3524 }
3525
3526 /* ************************* */
3527 /* **** Module support ***** */
3528 /* ************************* */
3529
3530 #ifdef MODULE
3531 MODULE_AUTHOR("Romain Dolbeau");
3532 MODULE_DESCRIPTION("Permedia3 framebuffer device driver");
3533 static char *mode[PM3_MAX_BOARD];
3534 module_param_array(mode, charp, NULL, 0);
3535 MODULE_PARM_DESC(mode,"video mode");
3536 module_param_array(disable, short, NULL, 0);
3537 MODULE_PARM_DESC(disable,"disable board");
3538 static short off[PM3_MAX_BOARD];
3539 module_param_array(off, short, NULL, 0);
3540 MODULE_PARM_DESC(off,"disable board");
3541 static char *pciid[PM3_MAX_BOARD];
3542 module_param_array(pciid, charp, NULL, 0);
3543 MODULE_PARM_DESC(pciid,"board PCI Id");
3544 module_param_array(noaccel, short, NULL, 0);
3545 MODULE_PARM_DESC(noaccel,"disable accel");
3546 static char *font[PM3_MAX_BOARD];
3547 module_param_array(font, charp, NULL, 0);
3548 MODULE_PARM_DESC(font,"choose font");
3549 module_param(depth, short, NULL, 0);
3550 MODULE_PARM_DESC(depth,"boot-time depth");
3551 module_param(printtimings, short, NULL, 0);
3552 MODULE_PARM_DESC(printtimings, "print the memory timings of the card(s)");
3553 module_param(forcesize, short, NULL, 0);
3554 MODULE_PARM_DESC(forcesize, "force specified memory size");
3555 /*
3556 MODULE_SUPPORTED_DEVICE("Permedia3 PCI boards")
3557 MODULE_GENERIC_TABLE(gtype,name)
3558 MODULE_DEVICE_TABLE(type,name)
3559 */
3560
3561 void pm3fb_build_options(void)
3562 {
3563 int i;
3564 char ts[128];
3565
3566 strcpy(g_options, "pm3fb");
3567 for (i = 0; i < PM3_MAX_BOARD ; i++)
3568 {
3569 if (mode[i])
3570 {
3571 sprintf(ts, ",mode:%d:%s", i, mode[i]);
3572 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3573 }
3574 if (disable[i] || off[i])
3575 {
3576 sprintf(ts, ",disable:%d:", i);
3577 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3578 }
3579 if (pciid[i])
3580 {
3581 sprintf(ts, ",pciid:%d:%s", i, pciid[i]);
3582 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3583 }
3584 if (noaccel[i])
3585 {
3586 sprintf(ts, ",noaccel:%d:", i);
3587 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3588 }
3589 if (font[i])
3590 {
3591 sprintf(ts, ",font:%d:%s", i, font[i]);
3592 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3593 }
3594 if (depth[i])
3595 {
3596 sprintf(ts, ",depth:%d:%d", i, depth[i]);
3597 strncat(g_options, ts, PM3_OPTIONS_SIZE - strlen(g_options));
3598 }
3599 }
3600 g_options[PM3_OPTIONS_SIZE - 1] = '\0';
3601 DPRINTK(1, "pm3fb use options: %s\n", g_options);
3602 }
3603
3604 int init_module(void)
3605 {
3606 DTRACE;
3607
3608 pm3fb_build_options();
3609
3610 pm3fb_init();
3611
3612 return (0);
3613 }
3614
3615 void cleanup_module(void)
3616 {
3617 DTRACE;
3618 {
3619 unsigned long i;
3620 struct pm3fb_info *l_fb_info;
3621 for (i = 0; i < PM3_MAX_BOARD; i++) {
3622 l_fb_info = &(fb_info[i]);
3623 if ((l_fb_info->dev != NULL)
3624 && (!(disable[l_fb_info->board_num]))) {
3625 if (l_fb_info->vIOBase !=
3626 (unsigned char *) -1) {
3627 pm3fb_unmapIO(l_fb_info);
3628 release_mem_region(l_fb_info->p_fb,
3629 l_fb_info->
3630 fb_size);
3631 release_mem_region(l_fb_info->
3632 pIOBase,
3633 PM3_REGS_SIZE);
3634 }
3635 unregister_framebuffer(&l_fb_info->gen.
3636 info);
3637 }
3638 }
3639 }
3640 return;
3641 }
3642 #endif /* MODULE */
USB Experimental Work