2 * 7990.c -- LANCE ethernet IC generic routines.
3 * This is an attempt to separate out the bits of various ethernet
4 * drivers that are common because they all use the AMD 7990 LANCE
5 * (Local Area Network Controller for Ethernet) chip.
7 * Copyright (C) 05/1998 Peter Maydell <pmaydell@chiark.greenend.org.uk>
9 * Most of this stuff was obtained by looking at other LANCE drivers,
10 * in particular a2065.[ch]. The AMD C-LANCE datasheet was also helpful.
11 * NB: this was made easy by the fact that Jes Sorensen had cleaned up
12 * most of a2025 and sunlance with the aim of merging them, so the
13 * common code was pretty obvious.
15 #include <linux/crc32.h>
16 #include <linux/delay.h>
17 #include <linux/errno.h>
18 #include <linux/netdevice.h>
19 #include <linux/etherdevice.h>
20 #include <linux/init.h>
21 #include <linux/module.h>
22 #include <linux/kernel.h>
23 #include <linux/types.h>
24 #include <linux/fcntl.h>
25 #include <linux/interrupt.h>
26 #include <linux/ioport.h>
28 #include <linux/route.h>
29 #include <linux/slab.h>
30 #include <linux/string.h>
31 #include <linux/skbuff.h>
33 /* Used for the temporal inet entries and routing */
34 #include <linux/socket.h>
35 #include <linux/bitops.h>
37 #include <asm/system.h>
40 #include <asm/pgtable.h>
42 #include <asm/blinken.h>
47 #define WRITERAP(lp,x) out_be16(lp->base + LANCE_RAP, (x))
48 #define WRITERDP(lp,x) out_be16(lp->base + LANCE_RDP, (x))
49 #define READRDP(lp) in_be16(lp->base + LANCE_RDP)
51 #if defined(CONFIG_HPLANCE) || defined(CONFIG_HPLANCE_MODULE)
58 #if defined(CONFIG_MVME147_NET) || defined(CONFIG_MVME147_NET_MODULE)
60 /* Lossage Factor Nine, Mr Sulu. */
61 #define WRITERAP(lp,x) (lp->writerap(lp,x))
62 #define WRITERDP(lp,x) (lp->writerdp(lp,x))
63 #define READRDP(lp) (lp->readrdp(lp))
67 /* These inlines can be used if only CONFIG_HPLANCE is defined */
68 static inline void WRITERAP(struct lance_private
*lp
, __u16 value
)
71 out_be16(lp
->base
+ HPLANCE_REGOFF
+ LANCE_RAP
, value
);
72 } while ((in_8(lp
->base
+ HPLANCE_STATUS
) & LE_ACK
) == 0);
75 static inline void WRITERDP(struct lance_private
*lp
, __u16 value
)
78 out_be16(lp
->base
+ HPLANCE_REGOFF
+ LANCE_RDP
, value
);
79 } while ((in_8(lp
->base
+ HPLANCE_STATUS
) & LE_ACK
) == 0);
82 static inline __u16
READRDP(struct lance_private
*lp
)
86 value
= in_be16(lp
->base
+ HPLANCE_REGOFF
+ LANCE_RDP
);
87 } while ((in_8(lp
->base
+ HPLANCE_STATUS
) & LE_ACK
) == 0);
92 #endif /* CONFIG_HPLANCE || CONFIG_HPLANCE_MODULE */
94 /* debugging output macros, various flavours */
95 /* #define TEST_HITS */
97 #define PRINT_RINGS() \
100 for (t=0; t < RX_RING_SIZE; t++) { \
101 printk("R%d: @(%02X %04X) len %04X, mblen %04X, bits %02X\n",\
102 t, ib->brx_ring[t].rmd1_hadr, ib->brx_ring[t].rmd0,\
103 ib->brx_ring[t].length,\
104 ib->brx_ring[t].mblength, ib->brx_ring[t].rmd1_bits);\
106 for (t=0; t < TX_RING_SIZE; t++) { \
107 printk("T%d: @(%02X %04X) len %04X, misc %04X, bits %02X\n",\
108 t, ib->btx_ring[t].tmd1_hadr, ib->btx_ring[t].tmd0,\
109 ib->btx_ring[t].length,\
110 ib->btx_ring[t].misc, ib->btx_ring[t].tmd1_bits);\
114 #define PRINT_RINGS()
117 /* Load the CSR registers. The LANCE has to be STOPped when we do this! */
118 static void load_csrs (struct lance_private
*lp
)
120 volatile struct lance_init_block
*aib
= lp
->lance_init_block
;
123 leptr
= LANCE_ADDR (aib
);
125 WRITERAP(lp
, LE_CSR1
); /* load address of init block */
126 WRITERDP(lp
, leptr
& 0xFFFF);
127 WRITERAP(lp
, LE_CSR2
);
128 WRITERDP(lp
, leptr
>> 16);
129 WRITERAP(lp
, LE_CSR3
);
130 WRITERDP(lp
, lp
->busmaster_regval
); /* set byteswap/ALEctrl/byte ctrl */
132 /* Point back to csr0 */
133 WRITERAP(lp
, LE_CSR0
);
136 /* #define to 0 or 1 appropriately */
137 #define DEBUG_IRING 0
138 /* Set up the Lance Rx and Tx rings and the init block */
139 static void lance_init_ring (struct net_device
*dev
)
141 struct lance_private
*lp
= netdev_priv(dev
);
142 volatile struct lance_init_block
*ib
= lp
->init_block
;
143 volatile struct lance_init_block
*aib
; /* for LANCE_ADDR computations */
147 aib
= lp
->lance_init_block
;
149 lp
->rx_new
= lp
->tx_new
= 0;
150 lp
->rx_old
= lp
->tx_old
= 0;
152 ib
->mode
= LE_MO_PROM
; /* normal, enable Tx & Rx */
154 /* Copy the ethernet address to the lance init block
155 * Notice that we do a byteswap if we're big endian.
156 * [I think this is the right criterion; at least, sunlance,
157 * a2065 and atarilance do the byteswap and lance.c (PC) doesn't.
158 * However, the datasheet says that the BSWAP bit doesn't affect
159 * the init block, so surely it should be low byte first for
161 * We could define the ib->physaddr as three 16bit values and
162 * use (addr[1] << 8) | addr[0] & co, but this is more efficient.
165 ib
->phys_addr
[0] = dev
->dev_addr
[1];
166 ib
->phys_addr
[1] = dev
->dev_addr
[0];
167 ib
->phys_addr
[2] = dev
->dev_addr
[3];
168 ib
->phys_addr
[3] = dev
->dev_addr
[2];
169 ib
->phys_addr
[4] = dev
->dev_addr
[5];
170 ib
->phys_addr
[5] = dev
->dev_addr
[4];
173 ib
->phys_addr
[i
] = dev
->dev_addr
[i
];
177 printk ("TX rings:\n");
180 /* Setup the Tx ring entries */
181 for (i
= 0; i
< (1<<lp
->lance_log_tx_bufs
); i
++) {
182 leptr
= LANCE_ADDR(&aib
->tx_buf
[i
][0]);
183 ib
->btx_ring
[i
].tmd0
= leptr
;
184 ib
->btx_ring
[i
].tmd1_hadr
= leptr
>> 16;
185 ib
->btx_ring
[i
].tmd1_bits
= 0;
186 ib
->btx_ring
[i
].length
= 0xf000; /* The ones required by tmd2 */
187 ib
->btx_ring
[i
].misc
= 0;
189 printk ("%d: 0x%8.8x\n", i
, leptr
);
192 /* Setup the Rx ring entries */
194 printk ("RX rings:\n");
195 for (i
= 0; i
< (1<<lp
->lance_log_rx_bufs
); i
++) {
196 leptr
= LANCE_ADDR(&aib
->rx_buf
[i
][0]);
198 ib
->brx_ring
[i
].rmd0
= leptr
;
199 ib
->brx_ring
[i
].rmd1_hadr
= leptr
>> 16;
200 ib
->brx_ring
[i
].rmd1_bits
= LE_R1_OWN
;
201 /* 0xf000 == bits that must be one (reserved, presumably) */
202 ib
->brx_ring
[i
].length
= -RX_BUFF_SIZE
| 0xf000;
203 ib
->brx_ring
[i
].mblength
= 0;
205 printk ("%d: 0x%8.8x\n", i
, leptr
);
208 /* Setup the initialization block */
210 /* Setup rx descriptor pointer */
211 leptr
= LANCE_ADDR(&aib
->brx_ring
);
212 ib
->rx_len
= (lp
->lance_log_rx_bufs
<< 13) | (leptr
>> 16);
215 printk ("RX ptr: %8.8x\n", leptr
);
217 /* Setup tx descriptor pointer */
218 leptr
= LANCE_ADDR(&aib
->btx_ring
);
219 ib
->tx_len
= (lp
->lance_log_tx_bufs
<< 13) | (leptr
>> 16);
222 printk ("TX ptr: %8.8x\n", leptr
);
224 /* Clear the multicast filter */
230 /* LANCE must be STOPped before we do this, too... */
231 static int init_restart_lance (struct lance_private
*lp
)
235 WRITERAP(lp
, LE_CSR0
);
236 WRITERDP(lp
, LE_C0_INIT
);
238 /* Need a hook here for sunlance ledma stuff */
240 /* Wait for the lance to complete initialization */
241 for (i
= 0; (i
< 100) && !(READRDP(lp
) & (LE_C0_ERR
| LE_C0_IDON
)); i
++)
243 if ((i
== 100) || (READRDP(lp
) & LE_C0_ERR
)) {
244 printk ("LANCE unopened after %d ticks, csr0=%4.4x.\n", i
, READRDP(lp
));
248 /* Clear IDON by writing a "1", enable interrupts and start lance */
249 WRITERDP(lp
, LE_C0_IDON
);
250 WRITERDP(lp
, LE_C0_INEA
| LE_C0_STRT
);
255 static int lance_reset (struct net_device
*dev
)
257 struct lance_private
*lp
= netdev_priv(dev
);
261 WRITERAP(lp
, LE_CSR0
);
262 WRITERDP(lp
, LE_C0_STOP
);
265 lance_init_ring (dev
);
266 dev
->trans_start
= jiffies
;
267 status
= init_restart_lance (lp
);
269 printk ("Lance restart=%d\n", status
);
274 static int lance_rx (struct net_device
*dev
)
276 struct lance_private
*lp
= netdev_priv(dev
);
277 volatile struct lance_init_block
*ib
= lp
->init_block
;
278 volatile struct lance_rx_desc
*rd
;
280 int len
= 0; /* XXX shut up gcc warnings */
281 struct sk_buff
*skb
= 0; /* XXX shut up gcc warnings */
288 for (i
= 0; i
< RX_RING_SIZE
; i
++) {
291 ib
->brx_ring
[i
].rmd1_bits
& LE_R1_OWN
? "_" : "X");
294 ib
->brx_ring
[i
].rmd1_bits
& LE_R1_OWN
? "." : "1");
299 blinken_leds(0x40, 0);
301 WRITERDP(lp
, LE_C0_RINT
| LE_C0_INEA
); /* ack Rx int, reenable ints */
302 for (rd
= &ib
->brx_ring
[lp
->rx_new
]; /* For each Rx ring we own... */
303 !((bits
= rd
->rmd1_bits
) & LE_R1_OWN
);
304 rd
= &ib
->brx_ring
[lp
->rx_new
]) {
306 /* We got an incomplete frame? */
307 if ((bits
& LE_R1_POK
) != LE_R1_POK
) {
308 lp
->stats
.rx_over_errors
++;
309 lp
->stats
.rx_errors
++;
311 } else if (bits
& LE_R1_ERR
) {
312 /* Count only the end frame as a rx error,
315 if (bits
& LE_R1_BUF
) lp
->stats
.rx_fifo_errors
++;
316 if (bits
& LE_R1_CRC
) lp
->stats
.rx_crc_errors
++;
317 if (bits
& LE_R1_OFL
) lp
->stats
.rx_over_errors
++;
318 if (bits
& LE_R1_FRA
) lp
->stats
.rx_frame_errors
++;
319 if (bits
& LE_R1_EOP
) lp
->stats
.rx_errors
++;
321 len
= (rd
->mblength
& 0xfff) - 4;
322 skb
= dev_alloc_skb (len
+2);
325 printk ("%s: Memory squeeze, deferring packet.\n",
327 lp
->stats
.rx_dropped
++;
329 rd
->rmd1_bits
= LE_R1_OWN
;
330 lp
->rx_new
= (lp
->rx_new
+ 1) & lp
->rx_ring_mod_mask
;
335 skb_reserve (skb
, 2); /* 16 byte align */
336 skb_put (skb
, len
); /* make room */
337 eth_copy_and_sum(skb
,
338 (unsigned char *)&(ib
->rx_buf
[lp
->rx_new
][0]),
340 skb
->protocol
= eth_type_trans (skb
, dev
);
342 dev
->last_rx
= jiffies
;
343 lp
->stats
.rx_packets
++;
344 lp
->stats
.rx_bytes
+= len
;
347 /* Return the packet to the pool */
349 rd
->rmd1_bits
= LE_R1_OWN
;
350 lp
->rx_new
= (lp
->rx_new
+ 1) & lp
->rx_ring_mod_mask
;
355 static int lance_tx (struct net_device
*dev
)
357 struct lance_private
*lp
= netdev_priv(dev
);
358 volatile struct lance_init_block
*ib
= lp
->init_block
;
359 volatile struct lance_tx_desc
*td
;
364 blinken_leds(0x80, 0);
367 WRITERDP(lp
, LE_C0_TINT
| LE_C0_INEA
);
371 for (i
= j
; i
!= lp
->tx_new
; i
= j
) {
372 td
= &ib
->btx_ring
[i
];
374 /* If we hit a packet not owned by us, stop */
375 if (td
->tmd1_bits
& LE_T1_OWN
)
378 if (td
->tmd1_bits
& LE_T1_ERR
) {
381 lp
->stats
.tx_errors
++;
382 if (status
& LE_T3_RTY
) lp
->stats
.tx_aborted_errors
++;
383 if (status
& LE_T3_LCOL
) lp
->stats
.tx_window_errors
++;
385 if (status
& LE_T3_CLOS
) {
386 lp
->stats
.tx_carrier_errors
++;
387 if (lp
->auto_select
) {
388 lp
->tpe
= 1 - lp
->tpe
;
389 printk("%s: Carrier Lost, trying %s\n",
390 dev
->name
, lp
->tpe
?"TPE":"AUI");
392 WRITERAP(lp
, LE_CSR0
);
393 WRITERDP(lp
, LE_C0_STOP
);
394 lance_init_ring (dev
);
396 init_restart_lance (lp
);
401 /* buffer errors and underflows turn off the transmitter */
402 /* Restart the adapter */
403 if (status
& (LE_T3_BUF
|LE_T3_UFL
)) {
404 lp
->stats
.tx_fifo_errors
++;
406 printk ("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
409 WRITERAP(lp
, LE_CSR0
);
410 WRITERDP(lp
, LE_C0_STOP
);
411 lance_init_ring (dev
);
413 init_restart_lance (lp
);
416 } else if ((td
->tmd1_bits
& LE_T1_POK
) == LE_T1_POK
) {
418 * So we don't count the packet more than once.
420 td
->tmd1_bits
&= ~(LE_T1_POK
);
422 /* One collision before packet was sent. */
423 if (td
->tmd1_bits
& LE_T1_EONE
)
424 lp
->stats
.collisions
++;
426 /* More than one collision, be optimistic. */
427 if (td
->tmd1_bits
& LE_T1_EMORE
)
428 lp
->stats
.collisions
+= 2;
430 lp
->stats
.tx_packets
++;
433 j
= (j
+ 1) & lp
->tx_ring_mod_mask
;
436 WRITERDP(lp
, LE_C0_TINT
| LE_C0_INEA
);
441 lance_interrupt (int irq
, void *dev_id
)
443 struct net_device
*dev
= (struct net_device
*)dev_id
;
444 struct lance_private
*lp
= netdev_priv(dev
);
447 spin_lock (&lp
->devlock
);
449 WRITERAP(lp
, LE_CSR0
); /* LANCE Controller Status */
454 if (!(csr0
& LE_C0_INTR
)) { /* Check if any interrupt has */
455 spin_unlock (&lp
->devlock
);
456 return IRQ_NONE
; /* been generated by the Lance. */
459 /* Acknowledge all the interrupt sources ASAP */
460 WRITERDP(lp
, csr0
& ~(LE_C0_INEA
|LE_C0_TDMD
|LE_C0_STOP
|LE_C0_STRT
|LE_C0_INIT
));
462 if ((csr0
& LE_C0_ERR
)) {
463 /* Clear the error condition */
464 WRITERDP(lp
, LE_C0_BABL
|LE_C0_ERR
|LE_C0_MISS
|LE_C0_INEA
);
467 if (csr0
& LE_C0_RINT
)
470 if (csr0
& LE_C0_TINT
)
473 /* Log misc errors. */
474 if (csr0
& LE_C0_BABL
)
475 lp
->stats
.tx_errors
++; /* Tx babble. */
476 if (csr0
& LE_C0_MISS
)
477 lp
->stats
.rx_errors
++; /* Missed a Rx frame. */
478 if (csr0
& LE_C0_MERR
) {
479 printk("%s: Bus master arbitration failure, status %4.4x.\n",
481 /* Restart the chip. */
482 WRITERDP(lp
, LE_C0_STRT
);
485 if (lp
->tx_full
&& netif_queue_stopped(dev
) && (TX_BUFFS_AVAIL
>= 0)) {
487 netif_wake_queue (dev
);
490 WRITERAP(lp
, LE_CSR0
);
491 WRITERDP(lp
, LE_C0_BABL
|LE_C0_CERR
|LE_C0_MISS
|LE_C0_MERR
|LE_C0_IDON
|LE_C0_INEA
);
493 spin_unlock (&lp
->devlock
);
497 int lance_open (struct net_device
*dev
)
499 struct lance_private
*lp
= netdev_priv(dev
);
502 /* Install the Interrupt handler. Or we could shunt this out to specific drivers? */
503 if (request_irq(lp
->irq
, lance_interrupt
, SA_SHIRQ
, lp
->name
, dev
))
506 res
= lance_reset(dev
);
507 spin_lock_init(&lp
->devlock
);
508 netif_start_queue (dev
);
513 int lance_close (struct net_device
*dev
)
515 struct lance_private
*lp
= netdev_priv(dev
);
517 netif_stop_queue (dev
);
520 WRITERAP(lp
, LE_CSR0
);
521 WRITERDP(lp
, LE_C0_STOP
);
523 free_irq(lp
->irq
, dev
);
528 void lance_tx_timeout(struct net_device
*dev
)
530 printk("lance_tx_timeout\n");
532 dev
->trans_start
= jiffies
;
533 netif_wake_queue (dev
);
537 int lance_start_xmit (struct sk_buff
*skb
, struct net_device
*dev
)
539 struct lance_private
*lp
= netdev_priv(dev
);
540 volatile struct lance_init_block
*ib
= lp
->init_block
;
541 int entry
, skblen
, len
;
548 netif_stop_queue (dev
);
553 /* dump the packet */
557 for (i
= 0; i
< 64; i
++) {
560 printk ("%2.2x ", skb
->data
[i
]);
564 len
= (skblen
<= ETH_ZLEN
) ? ETH_ZLEN
: skblen
;
565 entry
= lp
->tx_new
& lp
->tx_ring_mod_mask
;
566 ib
->btx_ring
[entry
].length
= (-len
) | 0xf000;
567 ib
->btx_ring
[entry
].misc
= 0;
569 if (skb
->len
< ETH_ZLEN
)
570 memset((char *)&ib
->tx_buf
[entry
][0], 0, ETH_ZLEN
);
571 memcpy ((char *)&ib
->tx_buf
[entry
][0], skb
->data
, skblen
);
573 /* Now, give the packet to the lance */
574 ib
->btx_ring
[entry
].tmd1_bits
= (LE_T1_POK
|LE_T1_OWN
);
575 lp
->tx_new
= (lp
->tx_new
+1) & lp
->tx_ring_mod_mask
;
578 /* Kick the lance: transmit now */
579 WRITERDP(lp
, LE_C0_INEA
| LE_C0_TDMD
);
580 dev
->trans_start
= jiffies
;
583 spin_lock_irqsave (&lp
->devlock
, flags
);
585 netif_start_queue (dev
);
588 spin_unlock_irqrestore (&lp
->devlock
, flags
);
593 struct net_device_stats
*lance_get_stats (struct net_device
*dev
)
595 struct lance_private
*lp
= netdev_priv(dev
);
600 /* taken from the depca driver via a2065.c */
601 static void lance_load_multicast (struct net_device
*dev
)
603 struct lance_private
*lp
= netdev_priv(dev
);
604 volatile struct lance_init_block
*ib
= lp
->init_block
;
605 volatile u16
*mcast_table
= (u16
*)&ib
->filter
;
606 struct dev_mc_list
*dmi
=dev
->mc_list
;
611 /* set all multicast bits */
612 if (dev
->flags
& IFF_ALLMULTI
){
613 ib
->filter
[0] = 0xffffffff;
614 ib
->filter
[1] = 0xffffffff;
617 /* clear the multicast filter */
622 for (i
= 0; i
< dev
->mc_count
; i
++){
623 addrs
= dmi
->dmi_addr
;
626 /* multicast address? */
630 crc
= ether_crc_le(6, addrs
);
632 mcast_table
[crc
>> 4] |= 1 << (crc
& 0xf);
638 void lance_set_multicast (struct net_device
*dev
)
640 struct lance_private
*lp
= netdev_priv(dev
);
641 volatile struct lance_init_block
*ib
= lp
->init_block
;
644 stopped
= netif_queue_stopped(dev
);
646 netif_stop_queue (dev
);
648 while (lp
->tx_old
!= lp
->tx_new
)
651 WRITERAP(lp
, LE_CSR0
);
652 WRITERDP(lp
, LE_C0_STOP
);
653 lance_init_ring (dev
);
655 if (dev
->flags
& IFF_PROMISC
) {
656 ib
->mode
|= LE_MO_PROM
;
658 ib
->mode
&= ~LE_MO_PROM
;
659 lance_load_multicast (dev
);
662 init_restart_lance (lp
);
665 netif_start_queue (dev
);
668 #ifdef CONFIG_NET_POLL_CONTROLLER
669 void lance_poll(struct net_device
*dev
)
671 struct lance_private
*lp
= netdev_priv(dev
);
673 spin_lock (&lp
->devlock
);
674 WRITERAP(lp
, LE_CSR0
);
675 WRITERDP(lp
, LE_C0_STRT
);
676 spin_unlock (&lp
->devlock
);
677 lance_interrupt(dev
->irq
, dev
);
681 MODULE_LICENSE("GPL");