arch/x86_64/kernel/setup.c

   1 /*
   2  *  linux/arch/x86-64/kernel/setup.c
   3  *
   4  *  Copyright (C) 1995  Linus Torvalds
   5  *
   6  *  Nov 2001 Dave Jones <davej@suse.de>
   7  *  Forked from i386 setup code.
   8  *
   9  *  $Id$
  10  */
  11
  12 /*
  13  * This file handles the architecture-dependent parts of initialization
  14  */
  15
  16 #include <linux/errno.h>
  17 #include <linux/sched.h>
  18 #include <linux/kernel.h>
  19 #include <linux/mm.h>
  20 #include <linux/stddef.h>
  21 #include <linux/unistd.h>
  22 #include <linux/ptrace.h>
  23 #include <linux/slab.h>
  24 #include <linux/user.h>
  25 #include <linux/a.out.h>
  26 #include <linux/tty.h>
  27 #include <linux/ioport.h>
  28 #include <linux/delay.h>
  29 #include <linux/config.h>
  30 #include <linux/init.h>
  31 #include <linux/initrd.h>
  32 #include <linux/highmem.h>
  33 #include <linux/bootmem.h>
  34 #include <linux/module.h>
  35 #include <asm/processor.h>
  36 #include <linux/console.h>
  37 #include <linux/seq_file.h>
  38 #include <linux/crash_dump.h>
  39 #include <linux/root_dev.h>
  40 #include <linux/pci.h>
  41 #include <linux/acpi.h>
  42 #include <linux/kallsyms.h>
  43 #include <linux/edd.h>
  44 #include <linux/mmzone.h>
  45 #include <linux/kexec.h>
  46 #include <linux/cpufreq.h>
  47 #include <linux/dmi.h>
  48 #include <linux/dma-mapping.h>
  49 #include <linux/ctype.h>
  50
  51 #include <asm/mtrr.h>
  52 #include <asm/uaccess.h>
  53 #include <asm/system.h>
  54 #include <asm/io.h>
  55 #include <asm/smp.h>
  56 #include <asm/msr.h>
  57 #include <asm/desc.h>
  58 #include <video/edid.h>
  59 #include <asm/e820.h>
  60 #include <asm/dma.h>
  61 #include <asm/mpspec.h>
  62 #include <asm/mmu_context.h>
  63 #include <asm/bootsetup.h>
  64 #include <asm/proto.h>
  65 #include <asm/setup.h>
  66 #include <asm/mach_apic.h>
  67 #include <asm/numa.h>
  68 #include <asm/swiotlb.h>
  69 #include <asm/sections.h>
  70 #include <asm/gart-mapping.h>
  71 #include <asm/dmi.h>
  72
  73 /*
  74  * Machine setup..
  75  */
  76
  77 struct cpuinfo_x86 boot_cpu_data __read_mostly;
  78
  79 unsigned long mmu_cr4_features;
  80
  81 int acpi_disabled;
  82 EXPORT_SYMBOL(acpi_disabled);
  83 #ifdef  CONFIG_ACPI
  84 extern int __initdata acpi_ht;
  85 extern acpi_interrupt_flags     acpi_sci_flags;
  86 int __initdata acpi_force = 0;
  87 #endif
  88
  89 int acpi_numa __initdata;
  90
  91 /* Boot loader ID as an integer, for the benefit of proc_dointvec */
  92 int bootloader_type;
  93
  94 unsigned long saved_video_mode;
  95
  96 /*
  97  * Early DMI memory
  98  */
  99 int dmi_alloc_index;
 100 char dmi_alloc_data[DMI_MAX_DATA];
 101
 102 /*
 103  * Setup options
 104  */
 105 struct screen_info screen_info;
 106 struct sys_desc_table_struct {
 107         unsigned short length;
 108         unsigned char table[0];
 109 };
 110
 111 struct edid_info edid_info;
 112 struct e820map e820;
 113
 114 extern int root_mountflags;
 115
 116 char command_line[COMMAND_LINE_SIZE];
 117
 118 struct resource standard_io_resources[] = {
 119         { .name = "dma1", .start = 0x00, .end = 0x1f,
 120                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 121         { .name = "pic1", .start = 0x20, .end = 0x21,
 122                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 123         { .name = "timer0", .start = 0x40, .end = 0x43,
 124                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 125         { .name = "timer1", .start = 0x50, .end = 0x53,
 126                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 127         { .name = "keyboard", .start = 0x60, .end = 0x6f,
 128                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 129         { .name = "dma page reg", .start = 0x80, .end = 0x8f,
 130                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 131         { .name = "pic2", .start = 0xa0, .end = 0xa1,
 132                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 133         { .name = "dma2", .start = 0xc0, .end = 0xdf,
 134                 .flags = IORESOURCE_BUSY | IORESOURCE_IO },
 135         { .name = "fpu", .start = 0xf0, .end = 0xff,
 136                 .flags = IORESOURCE_BUSY | IORESOURCE_IO }
 137 };
 138
 139 #define STANDARD_IO_RESOURCES \
 140         (sizeof standard_io_resources / sizeof standard_io_resources[0])
 141
 142 #define IORESOURCE_RAM (IORESOURCE_BUSY | IORESOURCE_MEM)
 143
 144 struct resource data_resource = {
 145         .name = "Kernel data",
 146         .start = 0,
 147         .end = 0,
 148         .flags = IORESOURCE_RAM,
 149 };
 150 struct resource code_resource = {
 151         .name = "Kernel code",
 152         .start = 0,
 153         .end = 0,
 154         .flags = IORESOURCE_RAM,
 155 };
 156
 157 #define IORESOURCE_ROM (IORESOURCE_BUSY | IORESOURCE_READONLY | IORESOURCE_MEM)
 158
 159 static struct resource system_rom_resource = {
 160         .name = "System ROM",
 161         .start = 0xf0000,
 162         .end = 0xfffff,
 163         .flags = IORESOURCE_ROM,
 164 };
 165
 166 static struct resource extension_rom_resource = {
 167         .name = "Extension ROM",
 168         .start = 0xe0000,
 169         .end = 0xeffff,
 170         .flags = IORESOURCE_ROM,
 171 };
 172
 173 static struct resource adapter_rom_resources[] = {
 174         { .name = "Adapter ROM", .start = 0xc8000, .end = 0,
 175                 .flags = IORESOURCE_ROM },
 176         { .name = "Adapter ROM", .start = 0, .end = 0,
 177                 .flags = IORESOURCE_ROM },
 178         { .name = "Adapter ROM", .start = 0, .end = 0,
 179                 .flags = IORESOURCE_ROM },
 180         { .name = "Adapter ROM", .start = 0, .end = 0,
 181                 .flags = IORESOURCE_ROM },
 182         { .name = "Adapter ROM", .start = 0, .end = 0,
 183                 .flags = IORESOURCE_ROM },
 184         { .name = "Adapter ROM", .start = 0, .end = 0,
 185                 .flags = IORESOURCE_ROM }
 186 };
 187
 188 #define ADAPTER_ROM_RESOURCES \
 189         (sizeof adapter_rom_resources / sizeof adapter_rom_resources[0])
 190
 191 static struct resource video_rom_resource = {
 192         .name = "Video ROM",
 193         .start = 0xc0000,
 194         .end = 0xc7fff,
 195         .flags = IORESOURCE_ROM,
 196 };
 197
 198 static struct resource video_ram_resource = {
 199         .name = "Video RAM area",
 200         .start = 0xa0000,
 201         .end = 0xbffff,
 202         .flags = IORESOURCE_RAM,
 203 };
 204
 205 #define romsignature(x) (*(unsigned short *)(x) == 0xaa55)
 206
 207 static int __init romchecksum(unsigned char *rom, unsigned long length)
 208 {
 209         unsigned char *p, sum = 0;
 210
 211         for (p = rom; p < rom + length; p++)
 212                 sum += *p;
 213         return sum == 0;
 214 }
 215
 216 static void __init probe_roms(void)
 217 {
 218         unsigned long start, length, upper;
 219         unsigned char *rom;
 220         int           i;
 221
 222         /* video rom */
 223         upper = adapter_rom_resources[0].start;
 224         for (start = video_rom_resource.start; start < upper; start += 2048) {
 225                 rom = isa_bus_to_virt(start);
 226                 if (!romsignature(rom))
 227                         continue;
 228
 229                 video_rom_resource.start = start;
 230
 231                 /* 0 < length <= 0x7f * 512, historically */
 232                 length = rom[2] * 512;
 233
 234                 /* if checksum okay, trust length byte */
 235                 if (length && romchecksum(rom, length))
 236                         video_rom_resource.end = start + length - 1;
 237
 238                 request_resource(&iomem_resource, &video_rom_resource);
 239                 break;
 240                         }
 241
 242         start = (video_rom_resource.end + 1 + 2047) & ~2047UL;
 243         if (start < upper)
 244                 start = upper;
 245
 246         /* system rom */
 247         request_resource(&iomem_resource, &system_rom_resource);
 248         upper = system_rom_resource.start;
 249
 250         /* check for extension rom (ignore length byte!) */
 251         rom = isa_bus_to_virt(extension_rom_resource.start);
 252         if (romsignature(rom)) {
 253                 length = extension_rom_resource.end - extension_rom_resource.start + 1;
 254                 if (romchecksum(rom, length)) {
 255                         request_resource(&iomem_resource, &extension_rom_resource);
 256                         upper = extension_rom_resource.start;
 257                 }
 258         }
 259
 260         /* check for adapter roms on 2k boundaries */
 261         for (i = 0; i < ADAPTER_ROM_RESOURCES && start < upper; start += 2048) {
 262                 rom = isa_bus_to_virt(start);
 263                 if (!romsignature(rom))
 264                         continue;
 265
 266                 /* 0 < length <= 0x7f * 512, historically */
 267                 length = rom[2] * 512;
 268
 269                 /* but accept any length that fits if checksum okay */
 270                 if (!length || start + length > upper || !romchecksum(rom, length))
 271                         continue;
 272
 273                 adapter_rom_resources[i].start = start;
 274                 adapter_rom_resources[i].end = start + length - 1;
 275                 request_resource(&iomem_resource, &adapter_rom_resources[i]);
 276
 277                 start = adapter_rom_resources[i++].end & ~2047UL;
 278         }
 279 }
 280
 281 /* Check for full argument with no trailing characters */
 282 static int fullarg(char *p, char *arg)
 283 {
 284         int l = strlen(arg);
 285         return !memcmp(p, arg, l) && (p[l] == 0 || isspace(p[l]));
 286 }
 287
 288 static __init void parse_cmdline_early (char ** cmdline_p)
 289 {
 290         char c = ' ', *to = command_line, *from = COMMAND_LINE;
 291         int len = 0;
 292         int userdef = 0;
 293
 294         for (;;) {
 295                 if (c != ' ')
 296                         goto next_char;
 297
 298 #ifdef  CONFIG_SMP
 299                 /*
 300                  * If the BIOS enumerates physical processors before logical,
 301                  * maxcpus=N at enumeration-time can be used to disable HT.
 302                  */
 303                 else if (!memcmp(from, "maxcpus=", 8)) {
 304                         extern unsigned int maxcpus;
 305
 306                         maxcpus = simple_strtoul(from + 8, NULL, 0);
 307                 }
 308 #endif
 309 #ifdef CONFIG_ACPI
 310                 /* "acpi=off" disables both ACPI table parsing and interpreter init */
 311                 if (fullarg(from,"acpi=off"))
 312                         disable_acpi();
 313
 314                 if (fullarg(from, "acpi=force")) {
 315                         /* add later when we do DMI horrors: */
 316                         acpi_force = 1;
 317                         acpi_disabled = 0;
 318                 }
 319
 320                 /* acpi=ht just means: do ACPI MADT parsing
 321                    at bootup, but don't enable the full ACPI interpreter */
 322                 if (fullarg(from, "acpi=ht")) {
 323                         if (!acpi_force)
 324                                 disable_acpi();
 325                         acpi_ht = 1;
 326                 }
 327                 else if (fullarg(from, "pci=noacpi"))
 328                         acpi_disable_pci();
 329                 else if (fullarg(from, "acpi=noirq"))
 330                         acpi_noirq_set();
 331
 332                 else if (fullarg(from, "acpi_sci=edge"))
 333                         acpi_sci_flags.trigger =  1;
 334                 else if (fullarg(from, "acpi_sci=level"))
 335                         acpi_sci_flags.trigger = 3;
 336                 else if (fullarg(from, "acpi_sci=high"))
 337                         acpi_sci_flags.polarity = 1;
 338                 else if (fullarg(from, "acpi_sci=low"))
 339                         acpi_sci_flags.polarity = 3;
 340
 341                 /* acpi=strict disables out-of-spec workarounds */
 342                 else if (fullarg(from, "acpi=strict")) {
 343                         acpi_strict = 1;
 344                 }
 345 #ifdef CONFIG_X86_IO_APIC
 346                 else if (fullarg(from, "acpi_skip_timer_override"))
 347                         acpi_skip_timer_override = 1;
 348 #endif
 349 #endif
 350
 351                 if (fullarg(from, "disable_timer_pin_1"))
 352                         disable_timer_pin_1 = 1;
 353                 if (fullarg(from, "enable_timer_pin_1"))
 354                         disable_timer_pin_1 = -1;
 355
 356                 if (fullarg(from, "nolapic") || fullarg(from, "disableapic")) {
 357                         clear_bit(X86_FEATURE_APIC, boot_cpu_data.x86_capability);
 358                         disable_apic = 1;
 359                 }
 360
 361                 if (fullarg(from, "noapic"))
 362                         skip_ioapic_setup = 1;
 363
 364                 if (fullarg(from,"apic")) {
 365                         skip_ioapic_setup = 0;
 366                         ioapic_force = 1;
 367                 }
 368
 369                 if (!memcmp(from, "mem=", 4))
 370                         parse_memopt(from+4, &from);
 371
 372                 if (!memcmp(from, "memmap=", 7)) {
 373                         /* exactmap option is for used defined memory */
 374                         if (!memcmp(from+7, "exactmap", 8)) {
 375 #ifdef CONFIG_CRASH_DUMP
 376                                 /* If we are doing a crash dump, we
 377                                  * still need to know the real mem
 378                                  * size before original memory map is
 379                                  * reset.
 380                                  */
 381                                 saved_max_pfn = e820_end_of_ram();
 382 #endif
 383                                 from += 8+7;
 384                                 end_pfn_map = 0;
 385                                 e820.nr_map = 0;
 386                                 userdef = 1;
 387                         }
 388                         else {
 389                                 parse_memmapopt(from+7, &from);
 390                                 userdef = 1;
 391                         }
 392                 }
 393
 394 #ifdef CONFIG_NUMA
 395                 if (!memcmp(from, "numa=", 5))
 396                         numa_setup(from+5);
 397 #endif
 398
 399                 if (!memcmp(from,"iommu=",6)) {
 400                         iommu_setup(from+6);
 401                 }
 402
 403                 if (fullarg(from,"oops=panic"))
 404                         panic_on_oops = 1;
 405
 406                 if (!memcmp(from, "noexec=", 7))
 407                         nonx_setup(from + 7);
 408
 409 #ifdef CONFIG_KEXEC
 410                 /* crashkernel=size@addr specifies the location to reserve for
 411                  * a crash kernel.  By reserving this memory we guarantee
 412                  * that linux never set's it up as a DMA target.
 413                  * Useful for holding code to do something appropriate
 414                  * after a kernel panic.
 415                  */
 416                 else if (!memcmp(from, "crashkernel=", 12)) {
 417                         unsigned long size, base;
 418                         size = memparse(from+12, &from);
 419                         if (*from == '@') {
 420                                 base = memparse(from+1, &from);
 421                                 /* FIXME: Do I want a sanity check
 422                                  * to validate the memory range?
 423                                  */
 424                                 crashk_res.start = base;
 425                                 crashk_res.end   = base + size - 1;
 426                         }
 427                 }
 428 #endif
 429
 430 #ifdef CONFIG_PROC_VMCORE
 431                 /* elfcorehdr= specifies the location of elf core header
 432                  * stored by the crashed kernel. This option will be passed
 433                  * by kexec loader to the capture kernel.
 434                  */
 435                 else if(!memcmp(from, "elfcorehdr=", 11))
 436                         elfcorehdr_addr = memparse(from+11, &from);
 437 #endif
 438
 439 #ifdef CONFIG_HOTPLUG_CPU
 440                 else if (!memcmp(from, "additional_cpus=", 16))
 441                         setup_additional_cpus(from+16);
 442 #endif
 443
 444         next_char:
 445                 c = *(from++);
 446                 if (!c)
 447                         break;
 448                 if (COMMAND_LINE_SIZE <= ++len)
 449                         break;
 450                 *(to++) = c;
 451         }
 452         if (userdef) {
 453                 printk(KERN_INFO "user-defined physical RAM map:\n");
 454                 e820_print_map("user");
 455         }
 456         *to = '\0';
 457         *cmdline_p = command_line;
 458 }
 459
 460 #ifndef CONFIG_NUMA
 461 static void __init
 462 contig_initmem_init(unsigned long start_pfn, unsigned long end_pfn)
 463 {
 464         unsigned long bootmap_size, bootmap;
 465
 466         bootmap_size = bootmem_bootmap_pages(end_pfn)<<PAGE_SHIFT;
 467         bootmap = find_e820_area(0, end_pfn<<PAGE_SHIFT, bootmap_size);
 468         if (bootmap == -1L)
 469                 panic("Cannot find bootmem map of size %ld\n",bootmap_size);
 470         bootmap_size = init_bootmem(bootmap >> PAGE_SHIFT, end_pfn);
 471         e820_bootmem_free(NODE_DATA(0), 0, end_pfn << PAGE_SHIFT);
 472         reserve_bootmem(bootmap, bootmap_size);
 473 }
 474 #endif
 475
 476 /* Use inline assembly to define this because the nops are defined
 477    as inline assembly strings in the include files and we cannot
 478    get them easily into strings. */
 479 asm("\t.data\nk8nops: "
 480     K8_NOP1 K8_NOP2 K8_NOP3 K8_NOP4 K8_NOP5 K8_NOP6
 481     K8_NOP7 K8_NOP8);
 482
 483 extern unsigned char k8nops[];
 484 static unsigned char *k8_nops[ASM_NOP_MAX+1] = {
 485      NULL,
 486      k8nops,
 487      k8nops + 1,
 488      k8nops + 1 + 2,
 489      k8nops + 1 + 2 + 3,
 490      k8nops + 1 + 2 + 3 + 4,
 491      k8nops + 1 + 2 + 3 + 4 + 5,
 492      k8nops + 1 + 2 + 3 + 4 + 5 + 6,
 493      k8nops + 1 + 2 + 3 + 4 + 5 + 6 + 7,
 494 };
 495
 496 extern char __vsyscall_0;
 497
 498 /* Replace instructions with better alternatives for this CPU type.
 499
 500    This runs before SMP is initialized to avoid SMP problems with
 501    self modifying code. This implies that assymetric systems where
 502    APs have less capabilities than the boot processor are not handled.
 503    In this case boot with "noreplacement". */
 504 void apply_alternatives(void *start, void *end)
 505 {
 506         struct alt_instr *a;
 507         int diff, i, k;
 508         for (a = start; (void *)a < end; a++) {
 509                 u8 *instr;
 510
 511                 if (!boot_cpu_has(a->cpuid))
 512                         continue;
 513
 514                 BUG_ON(a->replacementlen > a->instrlen);
 515                 instr = a->instr;
 516                 /* vsyscall code is not mapped yet. resolve it manually. */
 517                 if (instr >= (u8 *)VSYSCALL_START && instr < (u8*)VSYSCALL_END)
 518                         instr = __va(instr - (u8*)VSYSCALL_START + (u8*)__pa_symbol(&__vsyscall_0));
 519                 __inline_memcpy(instr, a->replacement, a->replacementlen);
 520                 diff = a->instrlen - a->replacementlen;
 521
 522                 /* Pad the rest with nops */
 523                 for (i = a->replacementlen; diff > 0; diff -= k, i += k) {
 524                         k = diff;
 525                         if (k > ASM_NOP_MAX)
 526                                 k = ASM_NOP_MAX;
 527                         __inline_memcpy(instr + i, k8_nops[k], k);
 528                 }
 529         }
 530 }
 531
 532 static int no_replacement __initdata = 0;
 533
 534 void __init alternative_instructions(void)
 535 {
 536         extern struct alt_instr __alt_instructions[], __alt_instructions_end[];
 537         if (no_replacement)
 538                 return;
 539         apply_alternatives(__alt_instructions, __alt_instructions_end);
 540 }
 541
 542 static int __init noreplacement_setup(char *s)
 543 {
 544      no_replacement = 1;
 545      return 1;
 546 }
 547
 548 __setup("noreplacement", noreplacement_setup);
 549
 550 #if defined(CONFIG_EDD) || defined(CONFIG_EDD_MODULE)
 551 struct edd edd;
 552 #ifdef CONFIG_EDD_MODULE
 553 EXPORT_SYMBOL(edd);
 554 #endif
 555 /**
 556  * copy_edd() - Copy the BIOS EDD information
 557  *              from boot_params into a safe place.
 558  *
 559  */
 560 static inline void copy_edd(void)
 561 {
 562      memcpy(edd.mbr_signature, EDD_MBR_SIGNATURE, sizeof(edd.mbr_signature));
 563      memcpy(edd.edd_info, EDD_BUF, sizeof(edd.edd_info));
 564      edd.mbr_signature_nr = EDD_MBR_SIG_NR;
 565      edd.edd_info_nr = EDD_NR;
 566 }
 567 #else
 568 static inline void copy_edd(void)
 569 {
 570 }
 571 #endif
 572
 573 #define EBDA_ADDR_POINTER 0x40E
 574 static void __init reserve_ebda_region(void)
 575 {
 576         unsigned int addr;
 577         /**
 578          * there is a real-mode segmented pointer pointing to the
 579          * 4K EBDA area at 0x40E
 580          */
 581         addr = *(unsigned short *)phys_to_virt(EBDA_ADDR_POINTER);
 582         addr <<= 4;
 583         if (addr)
 584                 reserve_bootmem_generic(addr, PAGE_SIZE);
 585 }
 586
 587 void __init setup_arch(char **cmdline_p)
 588 {
 589         unsigned long kernel_end;
 590
 591         ROOT_DEV = old_decode_dev(ORIG_ROOT_DEV);
 592         screen_info = SCREEN_INFO;
 593         edid_info = EDID_INFO;
 594         saved_video_mode = SAVED_VIDEO_MODE;
 595         bootloader_type = LOADER_TYPE;
 596
 597 #ifdef CONFIG_BLK_DEV_RAM
 598         rd_image_start = RAMDISK_FLAGS & RAMDISK_IMAGE_START_MASK;
 599         rd_prompt = ((RAMDISK_FLAGS & RAMDISK_PROMPT_FLAG) != 0);
 600         rd_doload = ((RAMDISK_FLAGS & RAMDISK_LOAD_FLAG) != 0);
 601 #endif
 602         setup_memory_region();
 603         copy_edd();
 604
 605         if (!MOUNT_ROOT_RDONLY)
 606                 root_mountflags &= ~MS_RDONLY;
 607         init_mm.start_code = (unsigned long) &_text;
 608         init_mm.end_code = (unsigned long) &_etext;
 609         init_mm.end_data = (unsigned long) &_edata;
 610         init_mm.brk = (unsigned long) &_end;
 611
 612         code_resource.start = virt_to_phys(&_text);
 613         code_resource.end = virt_to_phys(&_etext)-1;
 614         data_resource.start = virt_to_phys(&_etext);
 615         data_resource.end = virt_to_phys(&_edata)-1;
 616
 617         parse_cmdline_early(cmdline_p);
 618
 619         early_identify_cpu(&boot_cpu_data);
 620
 621         /*
 622          * partially used pages are not usable - thus
 623          * we are rounding upwards:
 624          */
 625         end_pfn = e820_end_of_ram();
 626         num_physpages = end_pfn;                /* for pfn_valid */
 627
 628         check_efer();
 629
 630         init_memory_mapping(0, (end_pfn_map << PAGE_SHIFT));
 631
 632         dmi_scan_machine();
 633
 634         zap_low_mappings(0);
 635
 636 #ifdef CONFIG_ACPI
 637         /*
 638          * Initialize the ACPI boot-time table parser (gets the RSDP and SDT).
 639          * Call this early for SRAT node setup.
 640          */
 641         acpi_boot_table_init();
 642 #endif
 643
 644 #ifdef CONFIG_ACPI_NUMA
 645         /*
 646          * Parse SRAT to discover nodes.
 647          */
 648         acpi_numa_init();
 649 #endif
 650
 651 #ifdef CONFIG_NUMA
 652         numa_initmem_init(0, end_pfn);
 653 #else
 654         contig_initmem_init(0, end_pfn);
 655 #endif
 656
 657         /* Reserve direct mapping */
 658         reserve_bootmem_generic(table_start << PAGE_SHIFT,
 659                                 (table_end - table_start) << PAGE_SHIFT);
 660
 661         /* reserve kernel */
 662         kernel_end = round_up(__pa_symbol(&_end),PAGE_SIZE);
 663         reserve_bootmem_generic(HIGH_MEMORY, kernel_end - HIGH_MEMORY);
 664
 665         /*
 666          * reserve physical page 0 - it's a special BIOS page on many boxes,
 667          * enabling clean reboots, SMP operation, laptop functions.
 668          */
 669         reserve_bootmem_generic(0, PAGE_SIZE);
 670
 671         /* reserve ebda region */
 672         reserve_ebda_region();
 673
 674 #ifdef CONFIG_SMP
 675         /*
 676          * But first pinch a few for the stack/trampoline stuff
 677          * FIXME: Don't need the extra page at 4K, but need to fix
 678          * trampoline before removing it. (see the GDT stuff)
 679          */
 680         reserve_bootmem_generic(PAGE_SIZE, PAGE_SIZE);
 681
 682         /* Reserve SMP trampoline */
 683         reserve_bootmem_generic(SMP_TRAMPOLINE_BASE, PAGE_SIZE);
 684 #endif
 685
 686 #ifdef CONFIG_ACPI_SLEEP
 687        /*
 688         * Reserve low memory region for sleep support.
 689         */
 690        acpi_reserve_bootmem();
 691 #endif
 692 #ifdef CONFIG_X86_LOCAL_APIC
 693         /*
 694          * Find and reserve possible boot-time SMP configuration:
 695          */
 696         find_smp_config();
 697 #endif
 698 #ifdef CONFIG_BLK_DEV_INITRD
 699         if (LOADER_TYPE && INITRD_START) {
 700                 if (INITRD_START + INITRD_SIZE <= (end_pfn << PAGE_SHIFT)) {
 701                         reserve_bootmem_generic(INITRD_START, INITRD_SIZE);
 702                         initrd_start =
 703                                 INITRD_START ? INITRD_START + PAGE_OFFSET : 0;
 704                         initrd_end = initrd_start+INITRD_SIZE;
 705                 }
 706                 else {
 707                         printk(KERN_ERR "initrd extends beyond end of memory "
 708                             "(0x%08lx > 0x%08lx)\ndisabling initrd\n",
 709                             (unsigned long)(INITRD_START + INITRD_SIZE),
 710                             (unsigned long)(end_pfn << PAGE_SHIFT));
 711                         initrd_start = 0;
 712                 }
 713         }
 714 #endif
 715 #ifdef CONFIG_KEXEC
 716         if (crashk_res.start != crashk_res.end) {
 717                 reserve_bootmem(crashk_res.start,
 718                         crashk_res.end - crashk_res.start + 1);
 719         }
 720 #endif
 721
 722         paging_init();
 723
 724         check_ioapic();
 725
 726         /*
 727          * set this early, so we dont allocate cpu0
 728          * if MADT list doesnt list BSP first
 729          * mpparse.c/MP_processor_info() allocates logical cpu numbers.
 730          */
 731         cpu_set(0, cpu_present_map);
 732 #ifdef CONFIG_ACPI
 733         /*
 734          * Read APIC and some other early information from ACPI tables.
 735          */
 736         acpi_boot_init();
 737 #endif
 738
 739         init_cpu_to_node();
 740
 741 #ifdef CONFIG_X86_LOCAL_APIC
 742         /*
 743          * get boot-time SMP configuration:
 744          */
 745         if (smp_found_config)
 746                 get_smp_config();
 747         init_apic_mappings();
 748 #endif
 749
 750         /*
 751          * Request address space for all standard RAM and ROM resources
 752          * and also for regions reported as reserved by the e820.
 753          */
 754         probe_roms();
 755         e820_reserve_resources();
 756
 757         request_resource(&iomem_resource, &video_ram_resource);
 758
 759         {
 760         unsigned i;
 761         /* request I/O space for devices used on all i[345]86 PCs */
 762         for (i = 0; i < STANDARD_IO_RESOURCES; i++)
 763                 request_resource(&ioport_resource, &standard_io_resources[i]);
 764         }
 765
 766         e820_setup_gap();
 767
 768 #ifdef CONFIG_GART_IOMMU
 769         iommu_hole_init();
 770 #endif
 771
 772 #ifdef CONFIG_VT
 773 #if defined(CONFIG_VGA_CONSOLE)
 774         conswitchp = &vga_con;
 775 #elif defined(CONFIG_DUMMY_CONSOLE)
 776         conswitchp = &dummy_con;
 777 #endif
 778 #endif
 779 }
 780
 781 static int __cpuinit get_model_name(struct cpuinfo_x86 *c)
 782 {
 783         unsigned int *v;
 784
 785         if (c->extended_cpuid_level < 0x80000004)
 786                 return 0;
 787
 788         v = (unsigned int *) c->x86_model_id;
 789         cpuid(0x80000002, &v[0], &v[1], &v[2], &v[3]);
 790         cpuid(0x80000003, &v[4], &v[5], &v[6], &v[7]);
 791         cpuid(0x80000004, &v[8], &v[9], &v[10], &v[11]);
 792         c->x86_model_id[48] = 0;
 793         return 1;
 794 }
 795
 796
 797 static void __cpuinit display_cacheinfo(struct cpuinfo_x86 *c)
 798 {
 799         unsigned int n, dummy, eax, ebx, ecx, edx;
 800
 801         n = c->extended_cpuid_level;
 802
 803         if (n >= 0x80000005) {
 804                 cpuid(0x80000005, &dummy, &ebx, &ecx, &edx);
 805                 printk(KERN_INFO "CPU: L1 I Cache: %dK (%d bytes/line), D cache %dK (%d bytes/line)\n",
 806                         edx>>24, edx&0xFF, ecx>>24, ecx&0xFF);
 807                 c->x86_cache_size=(ecx>>24)+(edx>>24);
 808                 /* On K8 L1 TLB is inclusive, so don't count it */
 809                 c->x86_tlbsize = 0;
 810         }
 811
 812         if (n >= 0x80000006) {
 813                 cpuid(0x80000006, &dummy, &ebx, &ecx, &edx);
 814                 ecx = cpuid_ecx(0x80000006);
 815                 c->x86_cache_size = ecx >> 16;
 816                 c->x86_tlbsize += ((ebx >> 16) & 0xfff) + (ebx & 0xfff);
 817
 818                 printk(KERN_INFO "CPU: L2 Cache: %dK (%d bytes/line)\n",
 819                 c->x86_cache_size, ecx & 0xFF);
 820         }
 821
 822         if (n >= 0x80000007)
 823                 cpuid(0x80000007, &dummy, &dummy, &dummy, &c->x86_power);
 824         if (n >= 0x80000008) {
 825                 cpuid(0x80000008, &eax, &dummy, &dummy, &dummy);
 826                 c->x86_virt_bits = (eax >> 8) & 0xff;
 827                 c->x86_phys_bits = eax & 0xff;
 828         }
 829 }
 830
 831 #ifdef CONFIG_NUMA
 832 static int nearby_node(int apicid)
 833 {
 834         int i;
 835         for (i = apicid - 1; i >= 0; i--) {
 836                 int node = apicid_to_node[i];
 837                 if (node != NUMA_NO_NODE && node_online(node))
 838                         return node;
 839         }
 840         for (i = apicid + 1; i < MAX_LOCAL_APIC; i++) {
 841                 int node = apicid_to_node[i];
 842                 if (node != NUMA_NO_NODE && node_online(node))
 843                         return node;
 844         }
 845         return first_node(node_online_map); /* Shouldn't happen */
 846 }
 847 #endif
 848
 849 /*
 850  * On a AMD dual core setup the lower bits of the APIC id distingush the cores.
 851  * Assumes number of cores is a power of two.
 852  */
 853 static void __init amd_detect_cmp(struct cpuinfo_x86 *c)
 854 {
 855 #ifdef CONFIG_SMP
 856         int cpu = smp_processor_id();
 857         unsigned bits;
 858 #ifdef CONFIG_NUMA
 859         int node = 0;
 860         unsigned apicid = hard_smp_processor_id();
 861 #endif
 862
 863         bits = 0;
 864         while ((1 << bits) < c->x86_max_cores)
 865                 bits++;
 866
 867         /* Low order bits define the core id (index of core in socket) */
 868         cpu_core_id[cpu] = phys_proc_id[cpu] & ((1 << bits)-1);
 869         /* Convert the APIC ID into the socket ID */
 870         phys_proc_id[cpu] = phys_pkg_id(bits);
 871
 872 #ifdef CONFIG_NUMA
 873         node = phys_proc_id[cpu];
 874         if (apicid_to_node[apicid] != NUMA_NO_NODE)
 875                 node = apicid_to_node[apicid];
 876         if (!node_online(node)) {
 877                 /* Two possibilities here:
 878                    - The CPU is missing memory and no node was created.
 879                    In that case try picking one from a nearby CPU
 880                    - The APIC IDs differ from the HyperTransport node IDs
 881                    which the K8 northbridge parsing fills in.
 882                    Assume they are all increased by a constant offset,
 883                    but in the same order as the HT nodeids.
 884                    If that doesn't result in a usable node fall back to the
 885                    path for the previous case.  */
 886                 int ht_nodeid = apicid - (phys_proc_id[0] << bits);
 887                 if (ht_nodeid >= 0 &&
 888                     apicid_to_node[ht_nodeid] != NUMA_NO_NODE)
 889                         node = apicid_to_node[ht_nodeid];
 890                 /* Pick a nearby node */
 891                 if (!node_online(node))
 892                         node = nearby_node(apicid);
 893         }
 894         numa_set_node(cpu, node);
 895
 896         printk(KERN_INFO "CPU %d/%x(%d) -> Node %d -> Core %d\n",
 897                         cpu, apicid, c->x86_max_cores, node, cpu_core_id[cpu]);
 898 #endif
 899 #endif
 900 }
 901
 902 static int __init init_amd(struct cpuinfo_x86 *c)
 903 {
 904         int r;
 905         unsigned level;
 906
 907 #ifdef CONFIG_SMP
 908         unsigned long value;
 909
 910         /*
 911          * Disable TLB flush filter by setting HWCR.FFDIS on K8
 912          * bit 6 of msr C001_0015
 913          *
 914          * Errata 63 for SH-B3 steppings
 915          * Errata 122 for all steppings (F+ have it disabled by default)
 916          */
 917         if (c->x86 == 15) {
 918                 rdmsrl(MSR_K8_HWCR, value);
 919                 value |= 1 << 6;
 920                 wrmsrl(MSR_K8_HWCR, value);
 921         }
 922 #endif
 923
 924         /* Bit 31 in normal CPUID used for nonstandard 3DNow ID;
 925            3DNow is IDd by bit 31 in extended CPUID (1*32+31) anyway */
 926         clear_bit(0*32+31, &c->x86_capability);
 927
 928         /* On C+ stepping K8 rep microcode works well for copy/memset */
 929         level = cpuid_eax(1);
 930         if (c->x86 == 15 && ((level >= 0x0f48 && level < 0x0f50) || level >= 0x0f58))
 931                 set_bit(X86_FEATURE_REP_GOOD, &c->x86_capability);
 932
 933         /* Enable workaround for FXSAVE leak */
 934         if (c->x86 >= 6)
 935                 set_bit(X86_FEATURE_FXSAVE_LEAK, &c->x86_capability);
 936
 937         r = get_model_name(c);
 938         if (!r) {
 939                 switch (c->x86) {
 940                 case 15:
 941                         /* Should distinguish Models here, but this is only
 942                            a fallback anyways. */
 943                         strcpy(c->x86_model_id, "Hammer");
 944                         break;
 945                 }
 946         }
 947         display_cacheinfo(c);
 948
 949         /* c->x86_power is 8000_0007 edx. Bit 8 is constant TSC */
 950         if (c->x86_power & (1<<8))
 951                 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
 952
 953         if (c->extended_cpuid_level >= 0x80000008) {
 954                 c->x86_max_cores = (cpuid_ecx(0x80000008) & 0xff) + 1;
 955
 956                 amd_detect_cmp(c);
 957         }
 958
 959         return r;
 960 }
 961
 962 static void __cpuinit detect_ht(struct cpuinfo_x86 *c)
 963 {
 964 #ifdef CONFIG_SMP
 965         u32     eax, ebx, ecx, edx;
 966         int     index_msb, core_bits;
 967         int     cpu = smp_processor_id();
 968
 969         cpuid(1, &eax, &ebx, &ecx, &edx);
 970
 971
 972         if (!cpu_has(c, X86_FEATURE_HT) || cpu_has(c, X86_FEATURE_CMP_LEGACY))
 973                 return;
 974
 975         smp_num_siblings = (ebx & 0xff0000) >> 16;
 976
 977         if (smp_num_siblings == 1) {
 978                 printk(KERN_INFO  "CPU: Hyper-Threading is disabled\n");
 979         } else if (smp_num_siblings > 1 ) {
 980
 981                 if (smp_num_siblings > NR_CPUS) {
 982                         printk(KERN_WARNING "CPU: Unsupported number of the siblings %d", smp_num_siblings);
 983                         smp_num_siblings = 1;
 984                         return;
 985                 }
 986
 987                 index_msb = get_count_order(smp_num_siblings);
 988                 phys_proc_id[cpu] = phys_pkg_id(index_msb);
 989
 990                 printk(KERN_INFO  "CPU: Physical Processor ID: %d\n",
 991                        phys_proc_id[cpu]);
 992
 993                 smp_num_siblings = smp_num_siblings / c->x86_max_cores;
 994
 995                 index_msb = get_count_order(smp_num_siblings) ;
 996
 997                 core_bits = get_count_order(c->x86_max_cores);
 998
 999                 cpu_core_id[cpu] = phys_pkg_id(index_msb) &
1000                                                ((1 << core_bits) - 1);
1001
1002                 if (c->x86_max_cores > 1)
1003                         printk(KERN_INFO  "CPU: Processor Core ID: %d\n",
1004                                cpu_core_id[cpu]);
1005         }
1006 #endif
1007 }
1008
1009 /*
1010  * find out the number of processor cores on the die
1011  */
1012 static int __cpuinit intel_num_cpu_cores(struct cpuinfo_x86 *c)
1013 {
1014         unsigned int eax;
1015
1016         if (c->cpuid_level < 4)
1017                 return 1;
1018
1019         __asm__("cpuid"
1020                 : "=a" (eax)
1021                 : "0" (4), "c" (0)
1022                 : "bx", "dx");
1023
1024         if (eax & 0x1f)
1025                 return ((eax >> 26) + 1);
1026         else
1027                 return 1;
1028 }
1029
1030 static void srat_detect_node(void)
1031 {
1032 #ifdef CONFIG_NUMA
1033         unsigned node;
1034         int cpu = smp_processor_id();
1035
1036         /* Don't do the funky fallback heuristics the AMD version employs
1037            for now. */
1038         node = apicid_to_node[hard_smp_processor_id()];
1039         if (node == NUMA_NO_NODE)
1040                 node = 0;
1041         numa_set_node(cpu, node);
1042
1043         if (acpi_numa > 0)
1044                 printk(KERN_INFO "CPU %d -> Node %d\n", cpu, node);
1045 #endif
1046 }
1047
1048 static void __cpuinit init_intel(struct cpuinfo_x86 *c)
1049 {
1050         /* Cache sizes */
1051         unsigned n;
1052
1053         init_intel_cacheinfo(c);
1054         n = c->extended_cpuid_level;
1055         if (n >= 0x80000008) {
1056                 unsigned eax = cpuid_eax(0x80000008);
1057                 c->x86_virt_bits = (eax >> 8) & 0xff;
1058                 c->x86_phys_bits = eax & 0xff;
1059                 /* CPUID workaround for Intel 0F34 CPU */
1060                 if (c->x86_vendor == X86_VENDOR_INTEL &&
1061                     c->x86 == 0xF && c->x86_model == 0x3 &&
1062                     c->x86_mask == 0x4)
1063                         c->x86_phys_bits = 36;
1064         }
1065
1066         if (c->x86 == 15)
1067                 c->x86_cache_alignment = c->x86_clflush_size * 2;
1068         if ((c->x86 == 0xf && c->x86_model >= 0x03) ||
1069             (c->x86 == 0x6 && c->x86_model >= 0x0e))
1070                 set_bit(X86_FEATURE_CONSTANT_TSC, &c->x86_capability);
1071         set_bit(X86_FEATURE_SYNC_RDTSC, &c->x86_capability);
1072         c->x86_max_cores = intel_num_cpu_cores(c);
1073
1074         srat_detect_node();
1075 }
1076
1077 static void __cpuinit get_cpu_vendor(struct cpuinfo_x86 *c)
1078 {
1079         char *v = c->x86_vendor_id;
1080
1081         if (!strcmp(v, "AuthenticAMD"))
1082                 c->x86_vendor = X86_VENDOR_AMD;
1083         else if (!strcmp(v, "GenuineIntel"))
1084                 c->x86_vendor = X86_VENDOR_INTEL;
1085         else
1086                 c->x86_vendor = X86_VENDOR_UNKNOWN;
1087 }
1088
1089 struct cpu_model_info {
1090         int vendor;
1091         int family;
1092         char *model_names[16];
1093 };
1094
1095 /* Do some early cpuid on the boot CPU to get some parameter that are
1096    needed before check_bugs. Everything advanced is in identify_cpu
1097    below. */
1098 void __cpuinit early_identify_cpu(struct cpuinfo_x86 *c)
1099 {
1100         u32 tfms;
1101
1102         c->loops_per_jiffy = loops_per_jiffy;
1103         c->x86_cache_size = -1;
1104         c->x86_vendor = X86_VENDOR_UNKNOWN;
1105         c->x86_model = c->x86_mask = 0; /* So far unknown... */
1106         c->x86_vendor_id[0] = '\0'; /* Unset */
1107         c->x86_model_id[0] = '\0';  /* Unset */
1108         c->x86_clflush_size = 64;
1109         c->x86_cache_alignment = c->x86_clflush_size;
1110         c->x86_max_cores = 1;
1111         c->extended_cpuid_level = 0;
1112         memset(&c->x86_capability, 0, sizeof c->x86_capability);
1113
1114         /* Get vendor name */
1115         cpuid(0x00000000, (unsigned int *)&c->cpuid_level,
1116               (unsigned int *)&c->x86_vendor_id[0],
1117               (unsigned int *)&c->x86_vendor_id[8],
1118               (unsigned int *)&c->x86_vendor_id[4]);
1119
1120         get_cpu_vendor(c);
1121
1122         /* Initialize the standard set of capabilities */
1123         /* Note that the vendor-specific code below might override */
1124
1125         /* Intel-defined flags: level 0x00000001 */
1126         if (c->cpuid_level >= 0x00000001) {
1127                 __u32 misc;
1128                 cpuid(0x00000001, &tfms, &misc, &c->x86_capability[4],
1129                       &c->x86_capability[0]);
1130                 c->x86 = (tfms >> 8) & 0xf;
1131                 c->x86_model = (tfms >> 4) & 0xf;
1132                 c->x86_mask = tfms & 0xf;
1133                 if (c->x86 == 0xf)
1134                         c->x86 += (tfms >> 20) & 0xff;
1135                 if (c->x86 >= 0x6)
1136                         c->x86_model += ((tfms >> 16) & 0xF) << 4;
1137                 if (c->x86_capability[0] & (1<<19))
1138                         c->x86_clflush_size = ((misc >> 8) & 0xff) * 8;
1139         } else {
1140                 /* Have CPUID level 0 only - unheard of */
1141                 c->x86 = 4;
1142         }
1143
1144 #ifdef CONFIG_SMP
1145         phys_proc_id[smp_processor_id()] = (cpuid_ebx(1) >> 24) & 0xff;
1146 #endif
1147 }
1148
1149 /*
1150  * This does the hard work of actually picking apart the CPU stuff...
1151  */
1152 void __cpuinit identify_cpu(struct cpuinfo_x86 *c)
1153 {
1154         int i;
1155         u32 xlvl;
1156
1157         early_identify_cpu(c);
1158
1159         /* AMD-defined flags: level 0x80000001 */
1160         xlvl = cpuid_eax(0x80000000);
1161         c->extended_cpuid_level = xlvl;
1162         if ((xlvl & 0xffff0000) == 0x80000000) {
1163                 if (xlvl >= 0x80000001) {
1164                         c->x86_capability[1] = cpuid_edx(0x80000001);
1165                         c->x86_capability[6] = cpuid_ecx(0x80000001);
1166                 }
1167                 if (xlvl >= 0x80000004)
1168                         get_model_name(c); /* Default name */
1169         }
1170
1171         /* Transmeta-defined flags: level 0x80860001 */
1172         xlvl = cpuid_eax(0x80860000);
1173         if ((xlvl & 0xffff0000) == 0x80860000) {
1174                 /* Don't set x86_cpuid_level here for now to not confuse. */
1175                 if (xlvl >= 0x80860001)
1176                         c->x86_capability[2] = cpuid_edx(0x80860001);
1177         }
1178
1179         c->apicid = phys_pkg_id(0);
1180
1181         /*
1182          * Vendor-specific initialization.  In this section we
1183          * canonicalize the feature flags, meaning if there are
1184          * features a certain CPU supports which CPUID doesn't
1185          * tell us, CPUID claiming incorrect flags, or other bugs,
1186          * we handle them here.
1187          *
1188          * At the end of this section, c->x86_capability better
1189          * indicate the features this CPU genuinely supports!
1190          */
1191         switch (c->x86_vendor) {
1192         case X86_VENDOR_AMD:
1193                 init_amd(c);
1194                 break;
1195
1196         case X86_VENDOR_INTEL:
1197                 init_intel(c);
1198                 break;
1199
1200         case X86_VENDOR_UNKNOWN:
1201         default:
1202                 display_cacheinfo(c);
1203                 break;
1204         }
1205
1206         select_idle_routine(c);
1207         detect_ht(c);
1208
1209         /*
1210          * On SMP, boot_cpu_data holds the common feature set between
1211          * all CPUs; so make sure that we indicate which features are
1212          * common between the CPUs.  The first time this routine gets
1213          * executed, c == &boot_cpu_data.
1214          */
1215         if (c != &boot_cpu_data) {
1216                 /* AND the already accumulated flags with these */
1217                 for (i = 0 ; i < NCAPINTS ; i++)
1218                         boot_cpu_data.x86_capability[i] &= c->x86_capability[i];
1219         }
1220
1221 #ifdef CONFIG_X86_MCE
1222         mcheck_init(c);
1223 #endif
1224         if (c == &boot_cpu_data)
1225                 mtrr_bp_init();
1226         else
1227                 mtrr_ap_init();
1228 #ifdef CONFIG_NUMA
1229         numa_add_cpu(smp_processor_id());
1230 #endif
1231 }
1232
1233
1234 void __cpuinit print_cpu_info(struct cpuinfo_x86 *c)
1235 {
1236         if (c->x86_model_id[0])
1237                 printk("%s", c->x86_model_id);
1238
1239         if (c->x86_mask || c->cpuid_level >= 0)
1240                 printk(" stepping %02x\n", c->x86_mask);
1241         else
1242                 printk("\n");
1243 }
1244
1245 /*
1246  *      Get CPU information for use by the procfs.
1247  */
1248
1249 static int show_cpuinfo(struct seq_file *m, void *v)
1250 {
1251         struct cpuinfo_x86 *c = v;
1252
1253         /*
1254          * These flag bits must match the definitions in <asm/cpufeature.h>.
1255          * NULL means this bit is undefined or reserved; either way it doesn't
1256          * have meaning as far as Linux is concerned.  Note that it's important
1257          * to realize there is a difference between this table and CPUID -- if
1258          * applications want to get the raw CPUID data, they should access
1259          * /dev/cpu/<cpu_nr>/cpuid instead.
1260          */
1261         static char *x86_cap_flags[] = {
1262                 /* Intel-defined */
1263                 "fpu", "vme", "de", "pse", "tsc", "msr", "pae", "mce",
1264                 "cx8", "apic", NULL, "sep", "mtrr", "pge", "mca", "cmov",
1265                 "pat", "pse36", "pn", "clflush", NULL, "dts", "acpi", "mmx",
1266                 "fxsr", "sse", "sse2", "ss", "ht", "tm", "ia64", NULL,
1267
1268                 /* AMD-defined */
1269                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1270                 NULL, NULL, NULL, "syscall", NULL, NULL, NULL, NULL,
1271                 NULL, NULL, NULL, NULL, "nx", NULL, "mmxext", NULL,
1272                 NULL, "fxsr_opt", "rdtscp", NULL, NULL, "lm", "3dnowext", "3dnow",
1273
1274                 /* Transmeta-defined */
1275                 "recovery", "longrun", NULL, "lrti", NULL, NULL, NULL, NULL,
1276                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1277                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1278                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1279
1280                 /* Other (Linux-defined) */
1281                 "cxmmx", NULL, "cyrix_arr", "centaur_mcr", NULL,
1282                 "constant_tsc", NULL, NULL,
1283                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1284                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1285                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1286
1287                 /* Intel-defined (#2) */
1288                 "pni", NULL, NULL, "monitor", "ds_cpl", "vmx", "smx", "est",
1289                 "tm2", NULL, "cid", NULL, NULL, "cx16", "xtpr", NULL,
1290                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1291                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1292
1293                 /* VIA/Cyrix/Centaur-defined */
1294                 NULL, NULL, "rng", "rng_en", NULL, NULL, "ace", "ace_en",
1295                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1296                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1297                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1298
1299                 /* AMD-defined (#2) */
1300                 "lahf_lm", "cmp_legacy", "svm", NULL, "cr8_legacy", NULL, NULL, NULL,
1301                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1302                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1303                 NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL,
1304         };
1305         static char *x86_power_flags[] = {
1306                 "ts",   /* temperature sensor */
1307                 "fid",  /* frequency id control */
1308                 "vid",  /* voltage id control */
1309                 "ttp",  /* thermal trip */
1310                 "tm",
1311                 "stc",
1312                 NULL,
1313                 /* nothing */   /* constant_tsc - moved to flags */
1314         };
1315
1316
1317 #ifdef CONFIG_SMP
1318         if (!cpu_online(c-cpu_data))
1319                 return 0;
1320 #endif
1321
1322         seq_printf(m,"processor\t: %u\n"
1323                      "vendor_id\t: %s\n"
1324                      "cpu family\t: %d\n"
1325                      "model\t\t: %d\n"
1326                      "model name\t: %s\n",
1327                      (unsigned)(c-cpu_data),
1328                      c->x86_vendor_id[0] ? c->x86_vendor_id : "unknown",
1329                      c->x86,
1330                      (int)c->x86_model,
1331                      c->x86_model_id[0] ? c->x86_model_id : "unknown");
1332
1333         if (c->x86_mask || c->cpuid_level >= 0)
1334                 seq_printf(m, "stepping\t: %d\n", c->x86_mask);
1335         else
1336                 seq_printf(m, "stepping\t: unknown\n");
1337
1338         if (cpu_has(c,X86_FEATURE_TSC)) {
1339                 unsigned int freq = cpufreq_quick_get((unsigned)(c-cpu_data));
1340                 if (!freq)
1341                         freq = cpu_khz;
1342                 seq_printf(m, "cpu MHz\t\t: %u.%03u\n",
1343                              freq / 1000, (freq % 1000));
1344         }
1345
1346         /* Cache size */
1347         if (c->x86_cache_size >= 0)
1348                 seq_printf(m, "cache size\t: %d KB\n", c->x86_cache_size);
1349
1350 #ifdef CONFIG_SMP
1351         if (smp_num_siblings * c->x86_max_cores > 1) {
1352                 int cpu = c - cpu_data;
1353                 seq_printf(m, "physical id\t: %d\n", phys_proc_id[cpu]);
1354                 seq_printf(m, "siblings\t: %d\n", cpus_weight(cpu_core_map[cpu]));
1355                 seq_printf(m, "core id\t\t: %d\n", cpu_core_id[cpu]);
1356                 seq_printf(m, "cpu cores\t: %d\n", c->booted_cores);
1357         }
1358 #endif
1359
1360         seq_printf(m,
1361                 "fpu\t\t: yes\n"
1362                 "fpu_exception\t: yes\n"
1363                 "cpuid level\t: %d\n"
1364                 "wp\t\t: yes\n"
1365                 "flags\t\t:",
1366                    c->cpuid_level);
1367
1368         {
1369                 int i;
1370                 for ( i = 0 ; i < 32*NCAPINTS ; i++ )
1371                         if (cpu_has(c, i) && x86_cap_flags[i] != NULL)
1372                                 seq_printf(m, " %s", x86_cap_flags[i]);
1373         }
1374
1375         seq_printf(m, "\nbogomips\t: %lu.%02lu\n",
1376                    c->loops_per_jiffy/(500000/HZ),
1377                    (c->loops_per_jiffy/(5000/HZ)) % 100);
1378
1379         if (c->x86_tlbsize > 0)
1380                 seq_printf(m, "TLB size\t: %d 4K pages\n", c->x86_tlbsize);
1381         seq_printf(m, "clflush size\t: %d\n", c->x86_clflush_size);
1382         seq_printf(m, "cache_alignment\t: %d\n", c->x86_cache_alignment);
1383
1384         seq_printf(m, "address sizes\t: %u bits physical, %u bits virtual\n",
1385                    c->x86_phys_bits, c->x86_virt_bits);
1386
1387         seq_printf(m, "power management:");
1388         {
1389                 unsigned i;
1390                 for (i = 0; i < 32; i++)
1391                         if (c->x86_power & (1 << i)) {
1392                                 if (i < ARRAY_SIZE(x86_power_flags) &&
1393                                         x86_power_flags[i])
1394                                         seq_printf(m, "%s%s",
1395                                                 x86_power_flags[i][0]?" ":"",
1396                                                 x86_power_flags[i]);
1397                                 else
1398                                         seq_printf(m, " [%d]", i);
1399                         }
1400         }
1401
1402         seq_printf(m, "\n\n");
1403
1404         return 0;
1405 }
1406
1407 static void *c_start(struct seq_file *m, loff_t *pos)
1408 {
1409         return *pos < NR_CPUS ? cpu_data + *pos : NULL;
1410 }
1411
1412 static void *c_next(struct seq_file *m, void *v, loff_t *pos)
1413 {
1414         ++*pos;
1415         return c_start(m, pos);
1416 }
1417
1418 static void c_stop(struct seq_file *m, void *v)
1419 {
1420 }
1421
1422 struct seq_operations cpuinfo_op = {
1423         .start =c_start,
1424         .next = c_next,
1425         .stop = c_stop,
1426         .show = show_cpuinfo,
1427 };
1428
1429 #ifdef CONFIG_INPUT_PCSPKR
1430 #include <linux/platform_device.h>
1431 static __init int add_pcspkr(void)
1432 {
1433         struct platform_device *pd;
1434         int ret;
1435
1436         pd = platform_device_alloc("pcspkr", -1);
1437         if (!pd)
1438                 return -ENOMEM;
1439
1440         ret = platform_device_add(pd);
1441         if (ret)
1442                 platform_device_put(pd);
1443
1444         return ret;
1445 }
1446 device_initcall(add_pcspkr);
1447 #endif