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[SPARC64]: Add clocksource/clockevents support.
[usb.git] / arch / sparc64 / kernel / time.c
blob21e3b0b9d9ceb3f0e76af13200959bafd9682d61
1 /* $Id: time.c,v 1.42 2002/01/23 14:33:55 davem Exp $
2 * time.c: UltraSparc timer and TOD clock support.
3 *
4 * Copyright (C) 1997 David S. Miller (davem@caip.rutgers.edu)
5 * Copyright (C) 1998 Eddie C. Dost (ecd@skynet.be)
6 *
7 * Based largely on code which is:
8 *
9 * Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
10 */
11
12 #include <linux/errno.h>
13 #include <linux/module.h>
14 #include <linux/sched.h>
15 #include <linux/kernel.h>
16 #include <linux/param.h>
17 #include <linux/string.h>
18 #include <linux/mm.h>
19 #include <linux/interrupt.h>
20 #include <linux/time.h>
21 #include <linux/timex.h>
22 #include <linux/init.h>
23 #include <linux/ioport.h>
24 #include <linux/mc146818rtc.h>
25 #include <linux/delay.h>
26 #include <linux/profile.h>
27 #include <linux/bcd.h>
28 #include <linux/jiffies.h>
29 #include <linux/cpufreq.h>
30 #include <linux/percpu.h>
31 #include <linux/profile.h>
32 #include <linux/miscdevice.h>
33 #include <linux/rtc.h>
34 #include <linux/kernel_stat.h>
35 #include <linux/clockchips.h>
36 #include <linux/clocksource.h>
37
38 #include <asm/oplib.h>
39 #include <asm/mostek.h>
40 #include <asm/timer.h>
41 #include <asm/irq.h>
42 #include <asm/io.h>
43 #include <asm/prom.h>
44 #include <asm/of_device.h>
45 #include <asm/starfire.h>
46 #include <asm/smp.h>
47 #include <asm/sections.h>
48 #include <asm/cpudata.h>
49 #include <asm/uaccess.h>
50 #include <asm/prom.h>
51 #include <asm/irq_regs.h>
52
53 DEFINE_SPINLOCK(mostek_lock);
54 DEFINE_SPINLOCK(rtc_lock);
55 void __iomem *mstk48t02_regs = NULL;
56 #ifdef CONFIG_PCI
57 unsigned long ds1287_regs = 0UL;
58 #endif
59
60 static void __iomem *mstk48t08_regs;
61 static void __iomem *mstk48t59_regs;
62
63 static int set_rtc_mmss(unsigned long);
64
65 #define TICK_PRIV_BIT (1UL << 63)
66 #define TICKCMP_IRQ_BIT (1UL << 63)
67
68 #ifdef CONFIG_SMP
69 unsigned long profile_pc(struct pt_regs *regs)
70 {
71 unsigned long pc = instruction_pointer(regs);
72
73 if (in_lock_functions(pc))
74 return regs->u_regs[UREG_RETPC];
75 return pc;
76 }
77 EXPORT_SYMBOL(profile_pc);
78 #endif
79
80 static void tick_disable_protection(void)
81 {
82 /* Set things up so user can access tick register for profiling
83 * purposes. Also workaround BB_ERRATA_1 by doing a dummy
84 * read back of %tick after writing it.
85 */
86 __asm__ __volatile__(
87 " ba,pt %%xcc, 1f\n"
88 " nop\n"
89 " .align 64\n"
90 "1: rd %%tick, %%g2\n"
91 " add %%g2, 6, %%g2\n"
92 " andn %%g2, %0, %%g2\n"
93 " wrpr %%g2, 0, %%tick\n"
94 " rdpr %%tick, %%g0"
95 : /* no outputs */
96 : "r" (TICK_PRIV_BIT)
97 : "g2");
98 }
99
100 static void tick_disable_irq(void)
101 {
102 __asm__ __volatile__(
103 " ba,pt %%xcc, 1f\n"
104 " nop\n"
105 " .align 64\n"
106 "1: wr %0, 0x0, %%tick_cmpr\n"
107 " rd %%tick_cmpr, %%g0"
108 : /* no outputs */
109 : "r" (TICKCMP_IRQ_BIT));
110 }
111
112 static void tick_init_tick(void)
113 {
114 tick_disable_protection();
115 tick_disable_irq();
116 }
117
118 static unsigned long tick_get_tick(void)
119 {
120 unsigned long ret;
121
122 __asm__ __volatile__("rd %%tick, %0\n\t"
123 "mov %0, %0"
124 : "=r" (ret));
125
126 return ret & ~TICK_PRIV_BIT;
127 }
128
129 static int tick_add_compare(unsigned long adj)
130 {
131 unsigned long orig_tick, new_tick, new_compare;
132
133 __asm__ __volatile__("rd %%tick, %0"
134 : "=r" (orig_tick));
135
136 orig_tick &= ~TICKCMP_IRQ_BIT;
137
138 /* Workaround for Spitfire Errata (#54 I think??), I discovered
139 * this via Sun BugID 4008234, mentioned in Solaris-2.5.1 patch
140 * number 103640.
141 *
142 * On Blackbird writes to %tick_cmpr can fail, the
143 * workaround seems to be to execute the wr instruction
144 * at the start of an I-cache line, and perform a dummy
145 * read back from %tick_cmpr right after writing to it. -DaveM
146 */
147 __asm__ __volatile__("ba,pt %%xcc, 1f\n\t"
148 " add %1, %2, %0\n\t"
149 ".align 64\n"
150 "1:\n\t"
151 "wr %0, 0, %%tick_cmpr\n\t"
152 "rd %%tick_cmpr, %%g0\n\t"
153 : "=r" (new_compare)
154 : "r" (orig_tick), "r" (adj));
155
156 __asm__ __volatile__("rd %%tick, %0"
157 : "=r" (new_tick));
158 new_tick &= ~TICKCMP_IRQ_BIT;
159
160 return ((long)(new_tick - (orig_tick+adj))) > 0L;
161 }
162
163 static unsigned long tick_add_tick(unsigned long adj)
164 {
165 unsigned long new_tick;
166
167 /* Also need to handle Blackbird bug here too. */
168 __asm__ __volatile__("rd %%tick, %0\n\t"
169 "add %0, %1, %0\n\t"
170 "wrpr %0, 0, %%tick\n\t"
171 : "=&r" (new_tick)
172 : "r" (adj));
173
174 return new_tick;
175 }
176
177 static struct sparc64_tick_ops tick_operations __read_mostly = {
178 .name = "tick",
179 .init_tick = tick_init_tick,
180 .disable_irq = tick_disable_irq,
181 .get_tick = tick_get_tick,
182 .add_tick = tick_add_tick,
183 .add_compare = tick_add_compare,
184 .softint_mask = 1UL << 0,
185 };
186
187 struct sparc64_tick_ops *tick_ops __read_mostly = &tick_operations;
188
189 static void stick_disable_irq(void)
190 {
191 __asm__ __volatile__(
192 "wr %0, 0x0, %%asr25"
193 : /* no outputs */
194 : "r" (TICKCMP_IRQ_BIT));
195 }
196
197 static void stick_init_tick(void)
198 {
199 /* Writes to the %tick and %stick register are not
200 * allowed on sun4v. The Hypervisor controls that
201 * bit, per-strand.
202 */
203 if (tlb_type != hypervisor) {
204 tick_disable_protection();
205 tick_disable_irq();
206
207 /* Let the user get at STICK too. */
208 __asm__ __volatile__(
209 " rd %%asr24, %%g2\n"
210 " andn %%g2, %0, %%g2\n"
211 " wr %%g2, 0, %%asr24"
212 : /* no outputs */
213 : "r" (TICK_PRIV_BIT)
214 : "g1", "g2");
215 }
216
217 stick_disable_irq();
218 }
219
220 static unsigned long stick_get_tick(void)
221 {
222 unsigned long ret;
223
224 __asm__ __volatile__("rd %%asr24, %0"
225 : "=r" (ret));
226
227 return ret & ~TICK_PRIV_BIT;
228 }
229
230 static unsigned long stick_add_tick(unsigned long adj)
231 {
232 unsigned long new_tick;
233
234 __asm__ __volatile__("rd %%asr24, %0\n\t"
235 "add %0, %1, %0\n\t"
236 "wr %0, 0, %%asr24\n\t"
237 : "=&r" (new_tick)
238 : "r" (adj));
239
240 return new_tick;
241 }
242
243 static int stick_add_compare(unsigned long adj)
244 {
245 unsigned long orig_tick, new_tick;
246
247 __asm__ __volatile__("rd %%asr24, %0"
248 : "=r" (orig_tick));
249 orig_tick &= ~TICKCMP_IRQ_BIT;
250
251 __asm__ __volatile__("wr %0, 0, %%asr25"
252 : /* no outputs */
253 : "r" (orig_tick + adj));
254
255 __asm__ __volatile__("rd %%asr24, %0"
256 : "=r" (new_tick));
257 new_tick &= ~TICKCMP_IRQ_BIT;
258
259 return ((long)(new_tick - (orig_tick+adj))) > 0L;
260 }
261
262 static struct sparc64_tick_ops stick_operations __read_mostly = {
263 .name = "stick",
264 .init_tick = stick_init_tick,
265 .disable_irq = stick_disable_irq,
266 .get_tick = stick_get_tick,
267 .add_tick = stick_add_tick,
268 .add_compare = stick_add_compare,
269 .softint_mask = 1UL << 16,
270 };
271
272 /* On Hummingbird the STICK/STICK_CMPR register is implemented
273 * in I/O space. There are two 64-bit registers each, the
274 * first holds the low 32-bits of the value and the second holds
275 * the high 32-bits.
276 *
277 * Since STICK is constantly updating, we have to access it carefully.
278 *
279 * The sequence we use to read is:
280 * 1) read high
281 * 2) read low
282 * 3) read high again, if it rolled re-read both low and high again.
283 *
284 * Writing STICK safely is also tricky:
285 * 1) write low to zero
286 * 2) write high
287 * 3) write low
288 */
289 #define HBIRD_STICKCMP_ADDR 0x1fe0000f060UL
290 #define HBIRD_STICK_ADDR 0x1fe0000f070UL
291
292 static unsigned long __hbird_read_stick(void)
293 {
294 unsigned long ret, tmp1, tmp2, tmp3;
295 unsigned long addr = HBIRD_STICK_ADDR+8;
296
297 __asm__ __volatile__("ldxa [%1] %5, %2\n"
298 "1:\n\t"
299 "sub %1, 0x8, %1\n\t"
300 "ldxa [%1] %5, %3\n\t"
301 "add %1, 0x8, %1\n\t"
302 "ldxa [%1] %5, %4\n\t"
303 "cmp %4, %2\n\t"
304 "bne,a,pn %%xcc, 1b\n\t"
305 " mov %4, %2\n\t"
306 "sllx %4, 32, %4\n\t"
307 "or %3, %4, %0\n\t"
308 : "=&r" (ret), "=&r" (addr),
309 "=&r" (tmp1), "=&r" (tmp2), "=&r" (tmp3)
310 : "i" (ASI_PHYS_BYPASS_EC_E), "1" (addr));
311
312 return ret;
313 }
314
315 static void __hbird_write_stick(unsigned long val)
316 {
317 unsigned long low = (val & 0xffffffffUL);
318 unsigned long high = (val >> 32UL);
319 unsigned long addr = HBIRD_STICK_ADDR;
320
321 __asm__ __volatile__("stxa %%g0, [%0] %4\n\t"
322 "add %0, 0x8, %0\n\t"
323 "stxa %3, [%0] %4\n\t"
324 "sub %0, 0x8, %0\n\t"
325 "stxa %2, [%0] %4"
326 : "=&r" (addr)
327 : "0" (addr), "r" (low), "r" (high),
328 "i" (ASI_PHYS_BYPASS_EC_E));
329 }
330
331 static void __hbird_write_compare(unsigned long val)
332 {
333 unsigned long low = (val & 0xffffffffUL);
334 unsigned long high = (val >> 32UL);
335 unsigned long addr = HBIRD_STICKCMP_ADDR + 0x8UL;
336
337 __asm__ __volatile__("stxa %3, [%0] %4\n\t"
338 "sub %0, 0x8, %0\n\t"
339 "stxa %2, [%0] %4"
340 : "=&r" (addr)
341 : "0" (addr), "r" (low), "r" (high),
342 "i" (ASI_PHYS_BYPASS_EC_E));
343 }
344
345 static void hbtick_disable_irq(void)
346 {
347 __hbird_write_compare(TICKCMP_IRQ_BIT);
348 }
349
350 static void hbtick_init_tick(void)
351 {
352 tick_disable_protection();
353
354 /* XXX This seems to be necessary to 'jumpstart' Hummingbird
355 * XXX into actually sending STICK interrupts. I think because
356 * XXX of how we store %tick_cmpr in head.S this somehow resets the
357 * XXX {TICK + STICK} interrupt mux. -DaveM
358 */
359 __hbird_write_stick(__hbird_read_stick());
360
361 hbtick_disable_irq();
362 }
363
364 static unsigned long hbtick_get_tick(void)
365 {
366 return __hbird_read_stick() & ~TICK_PRIV_BIT;
367 }
368
369 static unsigned long hbtick_add_tick(unsigned long adj)
370 {
371 unsigned long val;
372
373 val = __hbird_read_stick() + adj;
374 __hbird_write_stick(val);
375
376 return val;
377 }
378
379 static int hbtick_add_compare(unsigned long adj)
380 {
381 unsigned long val = __hbird_read_stick();
382 unsigned long val2;
383
384 val &= ~TICKCMP_IRQ_BIT;
385 val += adj;
386 __hbird_write_compare(val);
387
388 val2 = __hbird_read_stick() & ~TICKCMP_IRQ_BIT;
389
390 return ((long)(val2 - val)) > 0L;
391 }
392
393 static struct sparc64_tick_ops hbtick_operations __read_mostly = {
394 .name = "hbtick",
395 .init_tick = hbtick_init_tick,
396 .disable_irq = hbtick_disable_irq,
397 .get_tick = hbtick_get_tick,
398 .add_tick = hbtick_add_tick,
399 .add_compare = hbtick_add_compare,
400 .softint_mask = 1UL << 0,
401 };
402
403 static unsigned long timer_ticks_per_nsec_quotient __read_mostly;
404
405 #define TICK_SIZE (tick_nsec / 1000)
406
407 #define USEC_AFTER 500000
408 #define USEC_BEFORE 500000
409
410 static void sync_cmos_clock(unsigned long dummy);
411
412 static DEFINE_TIMER(sync_cmos_timer, sync_cmos_clock, 0, 0);
413
414 static void sync_cmos_clock(unsigned long dummy)
415 {
416 struct timeval now, next;
417 int fail = 1;
418
419 /*
420 * If we have an externally synchronized Linux clock, then update
421 * CMOS clock accordingly every ~11 minutes. Set_rtc_mmss() has to be
422 * called as close as possible to 500 ms before the new second starts.
423 * This code is run on a timer. If the clock is set, that timer
424 * may not expire at the correct time. Thus, we adjust...
425 */
426 if (!ntp_synced())
427 /*
428 * Not synced, exit, do not restart a timer (if one is
429 * running, let it run out).
430 */
431 return;
432
433 do_gettimeofday(&now);
434 if (now.tv_usec >= USEC_AFTER - ((unsigned) TICK_SIZE) / 2 &&
435 now.tv_usec <= USEC_BEFORE + ((unsigned) TICK_SIZE) / 2)
436 fail = set_rtc_mmss(now.tv_sec);
437
438 next.tv_usec = USEC_AFTER - now.tv_usec;
439 if (next.tv_usec <= 0)
440 next.tv_usec += USEC_PER_SEC;
441
442 if (!fail)
443 next.tv_sec = 659;
444 else
445 next.tv_sec = 0;
446
447 if (next.tv_usec >= USEC_PER_SEC) {
448 next.tv_sec++;
449 next.tv_usec -= USEC_PER_SEC;
450 }
451 mod_timer(&sync_cmos_timer, jiffies + timeval_to_jiffies(&next));
452 }
453
454 void notify_arch_cmos_timer(void)
455 {
456 mod_timer(&sync_cmos_timer, jiffies + 1);
457 }
458
459 /* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
460 static void __init kick_start_clock(void)
461 {
462 void __iomem *regs = mstk48t02_regs;
463 u8 sec, tmp;
464 int i, count;
465
466 prom_printf("CLOCK: Clock was stopped. Kick start ");
467
468 spin_lock_irq(&mostek_lock);
469
470 /* Turn on the kick start bit to start the oscillator. */
471 tmp = mostek_read(regs + MOSTEK_CREG);
472 tmp |= MSTK_CREG_WRITE;
473 mostek_write(regs + MOSTEK_CREG, tmp);
474 tmp = mostek_read(regs + MOSTEK_SEC);
475 tmp &= ~MSTK_STOP;
476 mostek_write(regs + MOSTEK_SEC, tmp);
477 tmp = mostek_read(regs + MOSTEK_HOUR);
478 tmp |= MSTK_KICK_START;
479 mostek_write(regs + MOSTEK_HOUR, tmp);
480 tmp = mostek_read(regs + MOSTEK_CREG);
481 tmp &= ~MSTK_CREG_WRITE;
482 mostek_write(regs + MOSTEK_CREG, tmp);
483
484 spin_unlock_irq(&mostek_lock);
485
486 /* Delay to allow the clock oscillator to start. */
487 sec = MSTK_REG_SEC(regs);
488 for (i = 0; i < 3; i++) {
489 while (sec == MSTK_REG_SEC(regs))
490 for (count = 0; count < 100000; count++)
491 /* nothing */ ;
492 prom_printf(".");
493 sec = MSTK_REG_SEC(regs);
494 }
495 prom_printf("\n");
496
497 spin_lock_irq(&mostek_lock);
498
499 /* Turn off kick start and set a "valid" time and date. */
500 tmp = mostek_read(regs + MOSTEK_CREG);
501 tmp |= MSTK_CREG_WRITE;
502 mostek_write(regs + MOSTEK_CREG, tmp);
503 tmp = mostek_read(regs + MOSTEK_HOUR);
504 tmp &= ~MSTK_KICK_START;
505 mostek_write(regs + MOSTEK_HOUR, tmp);
506 MSTK_SET_REG_SEC(regs,0);
507 MSTK_SET_REG_MIN(regs,0);
508 MSTK_SET_REG_HOUR(regs,0);
509 MSTK_SET_REG_DOW(regs,5);
510 MSTK_SET_REG_DOM(regs,1);
511 MSTK_SET_REG_MONTH(regs,8);
512 MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
513 tmp = mostek_read(regs + MOSTEK_CREG);
514 tmp &= ~MSTK_CREG_WRITE;
515 mostek_write(regs + MOSTEK_CREG, tmp);
516
517 spin_unlock_irq(&mostek_lock);
518
519 /* Ensure the kick start bit is off. If it isn't, turn it off. */
520 while (mostek_read(regs + MOSTEK_HOUR) & MSTK_KICK_START) {
521 prom_printf("CLOCK: Kick start still on!\n");
522
523 spin_lock_irq(&mostek_lock);
524
525 tmp = mostek_read(regs + MOSTEK_CREG);
526 tmp |= MSTK_CREG_WRITE;
527 mostek_write(regs + MOSTEK_CREG, tmp);
528
529 tmp = mostek_read(regs + MOSTEK_HOUR);
530 tmp &= ~MSTK_KICK_START;
531 mostek_write(regs + MOSTEK_HOUR, tmp);
532
533 tmp = mostek_read(regs + MOSTEK_CREG);
534 tmp &= ~MSTK_CREG_WRITE;
535 mostek_write(regs + MOSTEK_CREG, tmp);
536
537 spin_unlock_irq(&mostek_lock);
538 }
539
540 prom_printf("CLOCK: Kick start procedure successful.\n");
541 }
542
543 /* Return nonzero if the clock chip battery is low. */
544 static int __init has_low_battery(void)
545 {
546 void __iomem *regs = mstk48t02_regs;
547 u8 data1, data2;
548
549 spin_lock_irq(&mostek_lock);
550
551 data1 = mostek_read(regs + MOSTEK_EEPROM); /* Read some data. */
552 mostek_write(regs + MOSTEK_EEPROM, ~data1); /* Write back the complement. */
553 data2 = mostek_read(regs + MOSTEK_EEPROM); /* Read back the complement. */
554 mostek_write(regs + MOSTEK_EEPROM, data1); /* Restore original value. */
555
556 spin_unlock_irq(&mostek_lock);
557
558 return (data1 == data2); /* Was the write blocked? */
559 }
560
561 /* Probe for the real time clock chip. */
562 static void __init set_system_time(void)
563 {
564 unsigned int year, mon, day, hour, min, sec;
565 void __iomem *mregs = mstk48t02_regs;
566 #ifdef CONFIG_PCI
567 unsigned long dregs = ds1287_regs;
568 #else
569 unsigned long dregs = 0UL;
570 #endif
571 u8 tmp;
572
573 if (!mregs && !dregs) {
574 prom_printf("Something wrong, clock regs not mapped yet.\n");
575 prom_halt();
576 }
577
578 if (mregs) {
579 spin_lock_irq(&mostek_lock);
580
581 /* Traditional Mostek chip. */
582 tmp = mostek_read(mregs + MOSTEK_CREG);
583 tmp |= MSTK_CREG_READ;
584 mostek_write(mregs + MOSTEK_CREG, tmp);
585
586 sec = MSTK_REG_SEC(mregs);
587 min = MSTK_REG_MIN(mregs);
588 hour = MSTK_REG_HOUR(mregs);
589 day = MSTK_REG_DOM(mregs);
590 mon = MSTK_REG_MONTH(mregs);
591 year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
592 } else {
593 /* Dallas 12887 RTC chip. */
594
595 do {
596 sec = CMOS_READ(RTC_SECONDS);
597 min = CMOS_READ(RTC_MINUTES);
598 hour = CMOS_READ(RTC_HOURS);
599 day = CMOS_READ(RTC_DAY_OF_MONTH);
600 mon = CMOS_READ(RTC_MONTH);
601 year = CMOS_READ(RTC_YEAR);
602 } while (sec != CMOS_READ(RTC_SECONDS));
603
604 if (!(CMOS_READ(RTC_CONTROL) & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
605 BCD_TO_BIN(sec);
606 BCD_TO_BIN(min);
607 BCD_TO_BIN(hour);
608 BCD_TO_BIN(day);
609 BCD_TO_BIN(mon);
610 BCD_TO_BIN(year);
611 }
612 if ((year += 1900) < 1970)
613 year += 100;
614 }
615
616 xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
617 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
618 set_normalized_timespec(&wall_to_monotonic,
619 -xtime.tv_sec, -xtime.tv_nsec);
620
621 if (mregs) {
622 tmp = mostek_read(mregs + MOSTEK_CREG);
623 tmp &= ~MSTK_CREG_READ;
624 mostek_write(mregs + MOSTEK_CREG, tmp);
625
626 spin_unlock_irq(&mostek_lock);
627 }
628 }
629
630 /* davem suggests we keep this within the 4M locked kernel image */
631 static u32 starfire_get_time(void)
632 {
633 static char obp_gettod[32];
634 static u32 unix_tod;
635
636 sprintf(obp_gettod, "h# %08x unix-gettod",
637 (unsigned int) (long) &unix_tod);
638 prom_feval(obp_gettod);
639
640 return unix_tod;
641 }
642
643 static int starfire_set_time(u32 val)
644 {
645 /* Do nothing, time is set using the service processor
646 * console on this platform.
647 */
648 return 0;
649 }
650
651 static u32 hypervisor_get_time(void)
652 {
653 register unsigned long func asm("%o5");
654 register unsigned long arg0 asm("%o0");
655 register unsigned long arg1 asm("%o1");
656 int retries = 10000;
657
658 retry:
659 func = HV_FAST_TOD_GET;
660 arg0 = 0;
661 arg1 = 0;
662 __asm__ __volatile__("ta %6"
663 : "=&r" (func), "=&r" (arg0), "=&r" (arg1)
664 : "0" (func), "1" (arg0), "2" (arg1),
665 "i" (HV_FAST_TRAP));
666 if (arg0 == HV_EOK)
667 return arg1;
668 if (arg0 == HV_EWOULDBLOCK) {
669 if (--retries > 0) {
670 udelay(100);
671 goto retry;
672 }
673 printk(KERN_WARNING "SUN4V: tod_get() timed out.\n");
674 return 0;
675 }
676 printk(KERN_WARNING "SUN4V: tod_get() not supported.\n");
677 return 0;
678 }
679
680 static int hypervisor_set_time(u32 secs)
681 {
682 register unsigned long func asm("%o5");
683 register unsigned long arg0 asm("%o0");
684 int retries = 10000;
685
686 retry:
687 func = HV_FAST_TOD_SET;
688 arg0 = secs;
689 __asm__ __volatile__("ta %4"
690 : "=&r" (func), "=&r" (arg0)
691 : "0" (func), "1" (arg0),
692 "i" (HV_FAST_TRAP));
693 if (arg0 == HV_EOK)
694 return 0;
695 if (arg0 == HV_EWOULDBLOCK) {
696 if (--retries > 0) {
697 udelay(100);
698 goto retry;
699 }
700 printk(KERN_WARNING "SUN4V: tod_set() timed out.\n");
701 return -EAGAIN;
702 }
703 printk(KERN_WARNING "SUN4V: tod_set() not supported.\n");
704 return -EOPNOTSUPP;
705 }
706
707 static int __init clock_model_matches(char *model)
708 {
709 if (strcmp(model, "mk48t02") &&
710 strcmp(model, "mk48t08") &&
711 strcmp(model, "mk48t59") &&
712 strcmp(model, "m5819") &&
713 strcmp(model, "m5819p") &&
714 strcmp(model, "m5823") &&
715 strcmp(model, "ds1287"))
716 return 0;
717
718 return 1;
719 }
720
721 static int __devinit clock_probe(struct of_device *op, const struct of_device_id *match)
722 {
723 struct device_node *dp = op->node;
724 char *model = of_get_property(dp, "model", NULL);
725 unsigned long size, flags;
726 void __iomem *regs;
727
728 if (!model || !clock_model_matches(model))
729 return -ENODEV;
730
731 /* On an Enterprise system there can be multiple mostek clocks.
732 * We should only match the one that is on the central FHC bus.
733 */
734 if (!strcmp(dp->parent->name, "fhc") &&
735 strcmp(dp->parent->parent->name, "central") != 0)
736 return -ENODEV;
737
738 size = (op->resource[0].end - op->resource[0].start) + 1;
739 regs = of_ioremap(&op->resource[0], 0, size, "clock");
740 if (!regs)
741 return -ENOMEM;
742
743 #ifdef CONFIG_PCI
744 if (!strcmp(model, "ds1287") ||
745 !strcmp(model, "m5819") ||
746 !strcmp(model, "m5819p") ||
747 !strcmp(model, "m5823")) {
748 ds1287_regs = (unsigned long) regs;
749 } else
750 #endif
751 if (model[5] == '0' && model[6] == '2') {
752 mstk48t02_regs = regs;
753 } else if(model[5] == '0' && model[6] == '8') {
754 mstk48t08_regs = regs;
755 mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
756 } else {
757 mstk48t59_regs = regs;
758 mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
759 }
760
761 printk(KERN_INFO "%s: Clock regs at %p\n", dp->full_name, regs);
762
763 local_irq_save(flags);
764
765 if (mstk48t02_regs != NULL) {
766 /* Report a low battery voltage condition. */
767 if (has_low_battery())
768 prom_printf("NVRAM: Low battery voltage!\n");
769
770 /* Kick start the clock if it is completely stopped. */
771 if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
772 kick_start_clock();
773 }
774
775 set_system_time();
776
777 local_irq_restore(flags);
778
779 return 0;
780 }
781
782 static struct of_device_id clock_match[] = {
783 {
784 .name = "eeprom",
785 },
786 {
787 .name = "rtc",
788 },
789 {},
790 };
791
792 static struct of_platform_driver clock_driver = {
793 .name = "clock",
794 .match_table = clock_match,
795 .probe = clock_probe,
796 };
797
798 static int __init clock_init(void)
799 {
800 if (this_is_starfire) {
801 xtime.tv_sec = starfire_get_time();
802 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
803 set_normalized_timespec(&wall_to_monotonic,
804 -xtime.tv_sec, -xtime.tv_nsec);
805 return 0;
806 }
807 if (tlb_type == hypervisor) {
808 xtime.tv_sec = hypervisor_get_time();
809 xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
810 set_normalized_timespec(&wall_to_monotonic,
811 -xtime.tv_sec, -xtime.tv_nsec);
812 return 0;
813 }
814
815 return of_register_driver(&clock_driver, &of_bus_type);
816 }
817
818 /* Must be after subsys_initcall() so that busses are probed. Must
819 * be before device_initcall() because things like the RTC driver
820 * need to see the clock registers.
821 */
822 fs_initcall(clock_init);
823
824 /* This is gets the master TICK_INT timer going. */
825 static unsigned long sparc64_init_timers(void)
826 {
827 struct device_node *dp;
828 struct property *prop;
829 unsigned long clock;
830 #ifdef CONFIG_SMP
831 extern void smp_tick_init(void);
832 #endif
833
834 dp = of_find_node_by_path("/");
835 if (tlb_type == spitfire) {
836 unsigned long ver, manuf, impl;
837
838 __asm__ __volatile__ ("rdpr %%ver, %0"
839 : "=&r" (ver));
840 manuf = ((ver >> 48) & 0xffff);
841 impl = ((ver >> 32) & 0xffff);
842 if (manuf == 0x17 && impl == 0x13) {
843 /* Hummingbird, aka Ultra-IIe */
844 tick_ops = &hbtick_operations;
845 prop = of_find_property(dp, "stick-frequency", NULL);
846 } else {
847 tick_ops = &tick_operations;
848 cpu_find_by_instance(0, &dp, NULL);
849 prop = of_find_property(dp, "clock-frequency", NULL);
850 }
851 } else {
852 tick_ops = &stick_operations;
853 prop = of_find_property(dp, "stick-frequency", NULL);
854 }
855 clock = *(unsigned int *) prop->value;
856
857 #ifdef CONFIG_SMP
858 smp_tick_init();
859 #endif
860
861 return clock;
862 }
863
864 struct freq_table {
865 unsigned long clock_tick_ref;
866 unsigned int ref_freq;
867 };
868 static DEFINE_PER_CPU(struct freq_table, sparc64_freq_table) = { 0, 0 };
869
870 unsigned long sparc64_get_clock_tick(unsigned int cpu)
871 {
872 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
873
874 if (ft->clock_tick_ref)
875 return ft->clock_tick_ref;
876 return cpu_data(cpu).clock_tick;
877 }
878
879 #ifdef CONFIG_CPU_FREQ
880
881 static int sparc64_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
882 void *data)
883 {
884 struct cpufreq_freqs *freq = data;
885 unsigned int cpu = freq->cpu;
886 struct freq_table *ft = &per_cpu(sparc64_freq_table, cpu);
887
888 if (!ft->ref_freq) {
889 ft->ref_freq = freq->old;
890 ft->clock_tick_ref = cpu_data(cpu).clock_tick;
891 }
892 if ((val == CPUFREQ_PRECHANGE && freq->old < freq->new) ||
893 (val == CPUFREQ_POSTCHANGE && freq->old > freq->new) ||
894 (val == CPUFREQ_RESUMECHANGE)) {
895 cpu_data(cpu).clock_tick =
896 cpufreq_scale(ft->clock_tick_ref,
897 ft->ref_freq,
898 freq->new);
899 }
900
901 return 0;
902 }
903
904 static struct notifier_block sparc64_cpufreq_notifier_block = {
905 .notifier_call = sparc64_cpufreq_notifier
906 };
907
908 #endif /* CONFIG_CPU_FREQ */
909
910 static int sparc64_next_event(unsigned long delta,
911 struct clock_event_device *evt)
912 {
913 return tick_ops->add_compare(delta);
914 }
915
916 static void sparc64_timer_setup(enum clock_event_mode mode,
917 struct clock_event_device *evt)
918 {
919 switch (mode) {
920 case CLOCK_EVT_MODE_ONESHOT:
921 break;
922
923 case CLOCK_EVT_MODE_SHUTDOWN:
924 tick_ops->disable_irq();
925 break;
926
927 case CLOCK_EVT_MODE_PERIODIC:
928 case CLOCK_EVT_MODE_UNUSED:
929 WARN_ON(1);
930 break;
931 };
932 }
933
934 static struct clock_event_device sparc64_clockevent = {
935 .features = CLOCK_EVT_FEAT_ONESHOT,
936 .set_mode = sparc64_timer_setup,
937 .set_next_event = sparc64_next_event,
938 .rating = 100,
939 .shift = 30,
940 .irq = -1,
941 };
942 static DEFINE_PER_CPU(struct clock_event_device, sparc64_events);
943
944 void timer_interrupt(int irq, struct pt_regs *regs)
945 {
946 struct pt_regs *old_regs = set_irq_regs(regs);
947 unsigned long tick_mask = tick_ops->softint_mask;
948 int cpu = smp_processor_id();
949 struct clock_event_device *evt = &per_cpu(sparc64_events, cpu);
950
951 clear_softint(tick_mask);
952
953 irq_enter();
954
955 kstat_this_cpu.irqs[0]++;
956
957 if (unlikely(!evt->event_handler)) {
958 printk(KERN_WARNING
959 "Spurious SPARC64 timer interrupt on cpu %d\n", cpu);
960 } else
961 evt->event_handler(evt);
962
963 irq_exit();
964
965 set_irq_regs(old_regs);
966 }
967
968 void __devinit setup_sparc64_timer(void)
969 {
970 struct clock_event_device *sevt;
971 unsigned long pstate;
972
973 /* Guarantee that the following sequences execute
974 * uninterrupted.
975 */
976 __asm__ __volatile__("rdpr %%pstate, %0\n\t"
977 "wrpr %0, %1, %%pstate"
978 : "=r" (pstate)
979 : "i" (PSTATE_IE));
980
981 tick_ops->init_tick();
982
983 /* Restore PSTATE_IE. */
984 __asm__ __volatile__("wrpr %0, 0x0, %%pstate"
985 : /* no outputs */
986 : "r" (pstate));
987
988 sevt = &__get_cpu_var(sparc64_events);
989
990 memcpy(sevt, &sparc64_clockevent, sizeof(*sevt));
991 sevt->cpumask = cpumask_of_cpu(smp_processor_id());
992
993 clockevents_register_device(sevt);
994 }
995
996 #define SPARC64_NSEC_PER_CYC_SHIFT 32UL
997
998 static struct clocksource clocksource_tick = {
999 .rating = 100,
1000 .mask = CLOCKSOURCE_MASK(64),
1001 .shift = 16,
1002 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
1003 };
1004
1005 static void __init setup_clockevent_multiplier(unsigned long hz)
1006 {
1007 unsigned long mult, shift = 32;
1008
1009 while (1) {
1010 mult = div_sc(hz, NSEC_PER_SEC, shift);
1011 if (mult && (mult >> 32UL) == 0UL)
1012 break;
1013
1014 shift--;
1015 }
1016
1017 sparc64_clockevent.shift = shift;
1018 sparc64_clockevent.mult = mult;
1019 }
1020
1021 void __init time_init(void)
1022 {
1023 unsigned long clock = sparc64_init_timers();
1024
1025 timer_ticks_per_nsec_quotient =
1026 clocksource_hz2mult(clock, SPARC64_NSEC_PER_CYC_SHIFT);
1027
1028 clocksource_tick.name = tick_ops->name;
1029 clocksource_tick.mult =
1030 clocksource_hz2mult(clock,
1031 clocksource_tick.shift);
1032 clocksource_tick.read = tick_ops->get_tick;
1033
1034 printk("clocksource: mult[%x] shift[%d]\n",
1035 clocksource_tick.mult, clocksource_tick.shift);
1036
1037 clocksource_register(&clocksource_tick);
1038
1039 sparc64_clockevent.name = tick_ops->name;
1040
1041 setup_clockevent_multiplier(clock);
1042
1043 sparc64_clockevent.max_delta_ns =
1044 clockevent_delta2ns(0x7fffffffffffffff, &sparc64_clockevent);
1045 sparc64_clockevent.min_delta_ns =
1046 clockevent_delta2ns(0xF, &sparc64_clockevent);
1047
1048 printk("clockevent: mult[%lx] shift[%d]\n",
1049 sparc64_clockevent.mult, sparc64_clockevent.shift);
1050
1051 setup_sparc64_timer();
1052
1053 #ifdef CONFIG_CPU_FREQ
1054 cpufreq_register_notifier(&sparc64_cpufreq_notifier_block,
1055 CPUFREQ_TRANSITION_NOTIFIER);
1056 #endif
1057 }
1058
1059 unsigned long long sched_clock(void)
1060 {
1061 unsigned long ticks = tick_ops->get_tick();
1062
1063 return (ticks * timer_ticks_per_nsec_quotient)
1064 >> SPARC64_NSEC_PER_CYC_SHIFT;
1065 }
1066
1067 static int set_rtc_mmss(unsigned long nowtime)
1068 {
1069 int real_seconds, real_minutes, chip_minutes;
1070 void __iomem *mregs = mstk48t02_regs;
1071 #ifdef CONFIG_PCI
1072 unsigned long dregs = ds1287_regs;
1073 #else
1074 unsigned long dregs = 0UL;
1075 #endif
1076 unsigned long flags;
1077 u8 tmp;
1078
1079 /*
1080 * Not having a register set can lead to trouble.
1081 * Also starfire doesn't have a tod clock.
1082 */
1083 if (!mregs && !dregs)
1084 return -1;
1085
1086 if (mregs) {
1087 spin_lock_irqsave(&mostek_lock, flags);
1088
1089 /* Read the current RTC minutes. */
1090 tmp = mostek_read(mregs + MOSTEK_CREG);
1091 tmp |= MSTK_CREG_READ;
1092 mostek_write(mregs + MOSTEK_CREG, tmp);
1093
1094 chip_minutes = MSTK_REG_MIN(mregs);
1095
1096 tmp = mostek_read(mregs + MOSTEK_CREG);
1097 tmp &= ~MSTK_CREG_READ;
1098 mostek_write(mregs + MOSTEK_CREG, tmp);
1099
1100 /*
1101 * since we're only adjusting minutes and seconds,
1102 * don't interfere with hour overflow. This avoids
1103 * messing with unknown time zones but requires your
1104 * RTC not to be off by more than 15 minutes
1105 */
1106 real_seconds = nowtime % 60;
1107 real_minutes = nowtime / 60;
1108 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1109 real_minutes += 30; /* correct for half hour time zone */
1110 real_minutes %= 60;
1111
1112 if (abs(real_minutes - chip_minutes) < 30) {
1113 tmp = mostek_read(mregs + MOSTEK_CREG);
1114 tmp |= MSTK_CREG_WRITE;
1115 mostek_write(mregs + MOSTEK_CREG, tmp);
1116
1117 MSTK_SET_REG_SEC(mregs,real_seconds);
1118 MSTK_SET_REG_MIN(mregs,real_minutes);
1119
1120 tmp = mostek_read(mregs + MOSTEK_CREG);
1121 tmp &= ~MSTK_CREG_WRITE;
1122 mostek_write(mregs + MOSTEK_CREG, tmp);
1123
1124 spin_unlock_irqrestore(&mostek_lock, flags);
1125
1126 return 0;
1127 } else {
1128 spin_unlock_irqrestore(&mostek_lock, flags);
1129
1130 return -1;
1131 }
1132 } else {
1133 int retval = 0;
1134 unsigned char save_control, save_freq_select;
1135
1136 /* Stolen from arch/i386/kernel/time.c, see there for
1137 * credits and descriptive comments.
1138 */
1139 spin_lock_irqsave(&rtc_lock, flags);
1140 save_control = CMOS_READ(RTC_CONTROL); /* tell the clock it's being set */
1141 CMOS_WRITE((save_control|RTC_SET), RTC_CONTROL);
1142
1143 save_freq_select = CMOS_READ(RTC_FREQ_SELECT); /* stop and reset prescaler */
1144 CMOS_WRITE((save_freq_select|RTC_DIV_RESET2), RTC_FREQ_SELECT);
1145
1146 chip_minutes = CMOS_READ(RTC_MINUTES);
1147 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD)
1148 BCD_TO_BIN(chip_minutes);
1149 real_seconds = nowtime % 60;
1150 real_minutes = nowtime / 60;
1151 if (((abs(real_minutes - chip_minutes) + 15)/30) & 1)
1152 real_minutes += 30;
1153 real_minutes %= 60;
1154
1155 if (abs(real_minutes - chip_minutes) < 30) {
1156 if (!(save_control & RTC_DM_BINARY) || RTC_ALWAYS_BCD) {
1157 BIN_TO_BCD(real_seconds);
1158 BIN_TO_BCD(real_minutes);
1159 }
1160 CMOS_WRITE(real_seconds,RTC_SECONDS);
1161 CMOS_WRITE(real_minutes,RTC_MINUTES);
1162 } else {
1163 printk(KERN_WARNING
1164 "set_rtc_mmss: can't update from %d to %d\n",
1165 chip_minutes, real_minutes);
1166 retval = -1;
1167 }
1168
1169 CMOS_WRITE(save_control, RTC_CONTROL);
1170 CMOS_WRITE(save_freq_select, RTC_FREQ_SELECT);
1171 spin_unlock_irqrestore(&rtc_lock, flags);
1172
1173 return retval;
1174 }
1175 }
1176
1177 #define RTC_IS_OPEN 0x01 /* means /dev/rtc is in use */
1178 static unsigned char mini_rtc_status; /* bitmapped status byte. */
1179
1180 /* months start at 0 now */
1181 static unsigned char days_in_mo[] =
1182 {31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31};
1183
1184 #define FEBRUARY 2
1185 #define STARTOFTIME 1970
1186 #define SECDAY 86400L
1187 #define SECYR (SECDAY * 365)
1188 #define leapyear(year) ((year) % 4 == 0 && \
1189 ((year) % 100 != 0 || (year) % 400 == 0))
1190 #define days_in_year(a) (leapyear(a) ? 366 : 365)
1191 #define days_in_month(a) (month_days[(a) - 1])
1192
1193 static int month_days[12] = {
1194 31, 28, 31, 30, 31, 30, 31, 31, 30, 31, 30, 31
1195 };
1196
1197 /*
1198 * This only works for the Gregorian calendar - i.e. after 1752 (in the UK)
1199 */
1200 static void GregorianDay(struct rtc_time * tm)
1201 {
1202 int leapsToDate;
1203 int lastYear;
1204 int day;
1205 int MonthOffset[] = { 0, 31, 59, 90, 120, 151, 181, 212, 243, 273, 304, 334 };
1206
1207 lastYear = tm->tm_year - 1;
1208
1209 /*
1210 * Number of leap corrections to apply up to end of last year
1211 */
1212 leapsToDate = lastYear / 4 - lastYear / 100 + lastYear / 400;
1213
1214 /*
1215 * This year is a leap year if it is divisible by 4 except when it is
1216 * divisible by 100 unless it is divisible by 400
1217 *
1218 * e.g. 1904 was a leap year, 1900 was not, 1996 is, and 2000 was
1219 */
1220 day = tm->tm_mon > 2 && leapyear(tm->tm_year);
1221
1222 day += lastYear*365 + leapsToDate + MonthOffset[tm->tm_mon-1] +
1223 tm->tm_mday;
1224
1225 tm->tm_wday = day % 7;
1226 }
1227
1228 static void to_tm(int tim, struct rtc_time *tm)
1229 {
1230 register int i;
1231 register long hms, day;
1232
1233 day = tim / SECDAY;
1234 hms = tim % SECDAY;
1235
1236 /* Hours, minutes, seconds are easy */
1237 tm->tm_hour = hms / 3600;
1238 tm->tm_min = (hms % 3600) / 60;
1239 tm->tm_sec = (hms % 3600) % 60;
1240
1241 /* Number of years in days */
1242 for (i = STARTOFTIME; day >= days_in_year(i); i++)
1243 day -= days_in_year(i);
1244 tm->tm_year = i;
1245
1246 /* Number of months in days left */
1247 if (leapyear(tm->tm_year))
1248 days_in_month(FEBRUARY) = 29;
1249 for (i = 1; day >= days_in_month(i); i++)
1250 day -= days_in_month(i);
1251 days_in_month(FEBRUARY) = 28;
1252 tm->tm_mon = i;
1253
1254 /* Days are what is left over (+1) from all that. */
1255 tm->tm_mday = day + 1;
1256
1257 /*
1258 * Determine the day of week
1259 */
1260 GregorianDay(tm);
1261 }
1262
1263 /* Both Starfire and SUN4V give us seconds since Jan 1st, 1970,
1264 * aka Unix time. So we have to convert to/from rtc_time.
1265 */
1266 static inline void mini_get_rtc_time(struct rtc_time *time)
1267 {
1268 unsigned long flags;
1269 u32 seconds;
1270
1271 spin_lock_irqsave(&rtc_lock, flags);
1272 seconds = 0;
1273 if (this_is_starfire)
1274 seconds = starfire_get_time();
1275 else if (tlb_type == hypervisor)
1276 seconds = hypervisor_get_time();
1277 spin_unlock_irqrestore(&rtc_lock, flags);
1278
1279 to_tm(seconds, time);
1280 time->tm_year -= 1900;
1281 time->tm_mon -= 1;
1282 }
1283
1284 static inline int mini_set_rtc_time(struct rtc_time *time)
1285 {
1286 u32 seconds = mktime(time->tm_year + 1900, time->tm_mon + 1,
1287 time->tm_mday, time->tm_hour,
1288 time->tm_min, time->tm_sec);
1289 unsigned long flags;
1290 int err;
1291
1292 spin_lock_irqsave(&rtc_lock, flags);
1293 err = -ENODEV;
1294 if (this_is_starfire)
1295 err = starfire_set_time(seconds);
1296 else if (tlb_type == hypervisor)
1297 err = hypervisor_set_time(seconds);
1298 spin_unlock_irqrestore(&rtc_lock, flags);
1299
1300 return err;
1301 }
1302
1303 static int mini_rtc_ioctl(struct inode *inode, struct file *file,
1304 unsigned int cmd, unsigned long arg)
1305 {
1306 struct rtc_time wtime;
1307 void __user *argp = (void __user *)arg;
1308
1309 switch (cmd) {
1310
1311 case RTC_PLL_GET:
1312 return -EINVAL;
1313
1314 case RTC_PLL_SET:
1315 return -EINVAL;
1316
1317 case RTC_UIE_OFF: /* disable ints from RTC updates. */
1318 return 0;
1319
1320 case RTC_UIE_ON: /* enable ints for RTC updates. */
1321 return -EINVAL;
1322
1323 case RTC_RD_TIME: /* Read the time/date from RTC */
1324 /* this doesn't get week-day, who cares */
1325 memset(&wtime, 0, sizeof(wtime));
1326 mini_get_rtc_time(&wtime);
1327
1328 return copy_to_user(argp, &wtime, sizeof(wtime)) ? -EFAULT : 0;
1329
1330 case RTC_SET_TIME: /* Set the RTC */
1331 {
1332 int year;
1333 unsigned char leap_yr;
1334
1335 if (!capable(CAP_SYS_TIME))
1336 return -EACCES;
1337
1338 if (copy_from_user(&wtime, argp, sizeof(wtime)))
1339 return -EFAULT;
1340
1341 year = wtime.tm_year + 1900;
1342 leap_yr = ((!(year % 4) && (year % 100)) ||
1343 !(year % 400));
1344
1345 if ((wtime.tm_mon < 0 || wtime.tm_mon > 11) || (wtime.tm_mday < 1))
1346 return -EINVAL;
1347
1348 if (wtime.tm_mday < 0 || wtime.tm_mday >
1349 (days_in_mo[wtime.tm_mon] + ((wtime.tm_mon == 1) && leap_yr)))
1350 return -EINVAL;
1351
1352 if (wtime.tm_hour < 0 || wtime.tm_hour >= 24 ||
1353 wtime.tm_min < 0 || wtime.tm_min >= 60 ||
1354 wtime.tm_sec < 0 || wtime.tm_sec >= 60)
1355 return -EINVAL;
1356
1357 return mini_set_rtc_time(&wtime);
1358 }
1359 }
1360
1361 return -EINVAL;
1362 }
1363
1364 static int mini_rtc_open(struct inode *inode, struct file *file)
1365 {
1366 if (mini_rtc_status & RTC_IS_OPEN)
1367 return -EBUSY;
1368
1369 mini_rtc_status |= RTC_IS_OPEN;
1370
1371 return 0;
1372 }
1373
1374 static int mini_rtc_release(struct inode *inode, struct file *file)
1375 {
1376 mini_rtc_status &= ~RTC_IS_OPEN;
1377 return 0;
1378 }
1379
1380
1381 static const struct file_operations mini_rtc_fops = {
1382 .owner = THIS_MODULE,
1383 .ioctl = mini_rtc_ioctl,
1384 .open = mini_rtc_open,
1385 .release = mini_rtc_release,
1386 };
1387
1388 static struct miscdevice rtc_mini_dev =
1389 {
1390 .minor = RTC_MINOR,
1391 .name = "rtc",
1392 .fops = &mini_rtc_fops,
1393 };
1394
1395 static int __init rtc_mini_init(void)
1396 {
1397 int retval;
1398
1399 if (tlb_type != hypervisor && !this_is_starfire)
1400 return -ENODEV;
1401
1402 printk(KERN_INFO "Mini RTC Driver\n");
1403
1404 retval = misc_register(&rtc_mini_dev);
1405 if (retval < 0)
1406 return retval;
1407
1408 return 0;
1409 }
1410
1411 static void __exit rtc_mini_exit(void)
1412 {
1413 misc_deregister(&rtc_mini_dev);
1414 }
1415
1416
1417 module_init(rtc_mini_init);
1418 module_exit(rtc_mini_exit);
USB Experimental Work