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drm: ioremap return value checks
[usb.git] / drivers / hwmon / w83627ehf.c
blobc51ae2e17758591236721d5b99be8ce2ffea888c
1 /*
2 w83627ehf - Driver for the hardware monitoring functionality of
3 the Winbond W83627EHF Super-I/O chip
4 Copyright (C) 2005 Jean Delvare <khali@linux-fr.org>
5 Copyright (C) 2006 Yuan Mu (Winbond),
6 Rudolf Marek <r.marek@assembler.cz>
7 David Hubbard <david.c.hubbard@gmail.com>
8
9 Shamelessly ripped from the w83627hf driver
10 Copyright (C) 2003 Mark Studebaker
11
12 Thanks to Leon Moonen, Steve Cliffe and Grant Coady for their help
13 in testing and debugging this driver.
14
15 This driver also supports the W83627EHG, which is the lead-free
16 version of the W83627EHF.
17
18 This program is free software; you can redistribute it and/or modify
19 it under the terms of the GNU General Public License as published by
20 the Free Software Foundation; either version 2 of the License, or
21 (at your option) any later version.
22
23 This program is distributed in the hope that it will be useful,
24 but WITHOUT ANY WARRANTY; without even the implied warranty of
25 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
26 GNU General Public License for more details.
27
28 You should have received a copy of the GNU General Public License
29 along with this program; if not, write to the Free Software
30 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
31
32
33 Supports the following chips:
34
35 Chip #vin #fan #pwm #temp chip IDs man ID
36 w83627ehf 10 5 4 3 0x8850 0x88 0x5ca3
37 0x8860 0xa1
38 w83627dhg 9 5 4 3 0xa020 0xc1 0x5ca3
39 */
40
41 #include <linux/module.h>
42 #include <linux/init.h>
43 #include <linux/slab.h>
44 #include <linux/jiffies.h>
45 #include <linux/platform_device.h>
46 #include <linux/hwmon.h>
47 #include <linux/hwmon-sysfs.h>
48 #include <linux/hwmon-vid.h>
49 #include <linux/err.h>
50 #include <linux/mutex.h>
51 #include <asm/io.h>
52 #include "lm75.h"
53
54 enum kinds { w83627ehf, w83627dhg };
55
56 /* used to set data->name = w83627ehf_device_names[data->sio_kind] */
57 static const char * w83627ehf_device_names[] = {
58 "w83627ehf",
59 "w83627dhg",
60 };
61
62 #define DRVNAME "w83627ehf"
63
64 /*
65 * Super-I/O constants and functions
66 */
67
68 #define W83627EHF_LD_HWM 0x0b
69
70 #define SIO_REG_LDSEL 0x07 /* Logical device select */
71 #define SIO_REG_DEVID 0x20 /* Device ID (2 bytes) */
72 #define SIO_REG_EN_VRM10 0x2C /* GPIO3, GPIO4 selection */
73 #define SIO_REG_ENABLE 0x30 /* Logical device enable */
74 #define SIO_REG_ADDR 0x60 /* Logical device address (2 bytes) */
75 #define SIO_REG_VID_CTRL 0xF0 /* VID control */
76 #define SIO_REG_VID_DATA 0xF1 /* VID data */
77
78 #define SIO_W83627EHF_ID 0x8850
79 #define SIO_W83627EHG_ID 0x8860
80 #define SIO_W83627DHG_ID 0xa020
81 #define SIO_ID_MASK 0xFFF0
82
83 static inline void
84 superio_outb(int ioreg, int reg, int val)
85 {
86 outb(reg, ioreg);
87 outb(val, ioreg + 1);
88 }
89
90 static inline int
91 superio_inb(int ioreg, int reg)
92 {
93 outb(reg, ioreg);
94 return inb(ioreg + 1);
95 }
96
97 static inline void
98 superio_select(int ioreg, int ld)
99 {
100 outb(SIO_REG_LDSEL, ioreg);
101 outb(ld, ioreg + 1);
102 }
103
104 static inline void
105 superio_enter(int ioreg)
106 {
107 outb(0x87, ioreg);
108 outb(0x87, ioreg);
109 }
110
111 static inline void
112 superio_exit(int ioreg)
113 {
114 outb(0x02, ioreg);
115 outb(0x02, ioreg + 1);
116 }
117
118 /*
119 * ISA constants
120 */
121
122 #define IOREGION_ALIGNMENT ~7
123 #define IOREGION_OFFSET 5
124 #define IOREGION_LENGTH 2
125 #define ADDR_REG_OFFSET 0
126 #define DATA_REG_OFFSET 1
127
128 #define W83627EHF_REG_BANK 0x4E
129 #define W83627EHF_REG_CONFIG 0x40
130
131 /* Not currently used:
132 * REG_MAN_ID has the value 0x5ca3 for all supported chips.
133 * REG_CHIP_ID == 0x88/0xa1/0xc1 depending on chip model.
134 * REG_MAN_ID is at port 0x4f
135 * REG_CHIP_ID is at port 0x58 */
136
137 static const u16 W83627EHF_REG_FAN[] = { 0x28, 0x29, 0x2a, 0x3f, 0x553 };
138 static const u16 W83627EHF_REG_FAN_MIN[] = { 0x3b, 0x3c, 0x3d, 0x3e, 0x55c };
139
140 /* The W83627EHF registers for nr=7,8,9 are in bank 5 */
141 #define W83627EHF_REG_IN_MAX(nr) ((nr < 7) ? (0x2b + (nr) * 2) : \
142 (0x554 + (((nr) - 7) * 2)))
143 #define W83627EHF_REG_IN_MIN(nr) ((nr < 7) ? (0x2c + (nr) * 2) : \
144 (0x555 + (((nr) - 7) * 2)))
145 #define W83627EHF_REG_IN(nr) ((nr < 7) ? (0x20 + (nr)) : \
146 (0x550 + (nr) - 7))
147
148 #define W83627EHF_REG_TEMP1 0x27
149 #define W83627EHF_REG_TEMP1_HYST 0x3a
150 #define W83627EHF_REG_TEMP1_OVER 0x39
151 static const u16 W83627EHF_REG_TEMP[] = { 0x150, 0x250 };
152 static const u16 W83627EHF_REG_TEMP_HYST[] = { 0x153, 0x253 };
153 static const u16 W83627EHF_REG_TEMP_OVER[] = { 0x155, 0x255 };
154 static const u16 W83627EHF_REG_TEMP_CONFIG[] = { 0x152, 0x252 };
155
156 /* Fan clock dividers are spread over the following five registers */
157 #define W83627EHF_REG_FANDIV1 0x47
158 #define W83627EHF_REG_FANDIV2 0x4B
159 #define W83627EHF_REG_VBAT 0x5D
160 #define W83627EHF_REG_DIODE 0x59
161 #define W83627EHF_REG_SMI_OVT 0x4C
162
163 #define W83627EHF_REG_ALARM1 0x459
164 #define W83627EHF_REG_ALARM2 0x45A
165 #define W83627EHF_REG_ALARM3 0x45B
166
167 /* SmartFan registers */
168 /* DC or PWM output fan configuration */
169 static const u8 W83627EHF_REG_PWM_ENABLE[] = {
170 0x04, /* SYS FAN0 output mode and PWM mode */
171 0x04, /* CPU FAN0 output mode and PWM mode */
172 0x12, /* AUX FAN mode */
173 0x62, /* CPU fan1 mode */
174 };
175
176 static const u8 W83627EHF_PWM_MODE_SHIFT[] = { 0, 1, 0, 6 };
177 static const u8 W83627EHF_PWM_ENABLE_SHIFT[] = { 2, 4, 1, 4 };
178
179 /* FAN Duty Cycle, be used to control */
180 static const u8 W83627EHF_REG_PWM[] = { 0x01, 0x03, 0x11, 0x61 };
181 static const u8 W83627EHF_REG_TARGET[] = { 0x05, 0x06, 0x13, 0x63 };
182 static const u8 W83627EHF_REG_TOLERANCE[] = { 0x07, 0x07, 0x14, 0x62 };
183
184
185 /* Advanced Fan control, some values are common for all fans */
186 static const u8 W83627EHF_REG_FAN_MIN_OUTPUT[] = { 0x08, 0x09, 0x15, 0x64 };
187 static const u8 W83627EHF_REG_FAN_STOP_TIME[] = { 0x0C, 0x0D, 0x17, 0x66 };
188
189 /*
190 * Conversions
191 */
192
193 /* 1 is PWM mode, output in ms */
194 static inline unsigned int step_time_from_reg(u8 reg, u8 mode)
195 {
196 return mode ? 100 * reg : 400 * reg;
197 }
198
199 static inline u8 step_time_to_reg(unsigned int msec, u8 mode)
200 {
201 return SENSORS_LIMIT((mode ? (msec + 50) / 100 :
202 (msec + 200) / 400), 1, 255);
203 }
204
205 static inline unsigned int
206 fan_from_reg(u8 reg, unsigned int div)
207 {
208 if (reg == 0 || reg == 255)
209 return 0;
210 return 1350000U / (reg * div);
211 }
212
213 static inline unsigned int
214 div_from_reg(u8 reg)
215 {
216 return 1 << reg;
217 }
218
219 static inline int
220 temp1_from_reg(s8 reg)
221 {
222 return reg * 1000;
223 }
224
225 static inline s8
226 temp1_to_reg(int temp, int min, int max)
227 {
228 if (temp <= min)
229 return min / 1000;
230 if (temp >= max)
231 return max / 1000;
232 if (temp < 0)
233 return (temp - 500) / 1000;
234 return (temp + 500) / 1000;
235 }
236
237 /* Some of analog inputs have internal scaling (2x), 8mV is ADC LSB */
238
239 static u8 scale_in[10] = { 8, 8, 16, 16, 8, 8, 8, 16, 16, 8 };
240
241 static inline long in_from_reg(u8 reg, u8 nr)
242 {
243 return reg * scale_in[nr];
244 }
245
246 static inline u8 in_to_reg(u32 val, u8 nr)
247 {
248 return SENSORS_LIMIT(((val + (scale_in[nr] / 2)) / scale_in[nr]), 0, 255);
249 }
250
251 /*
252 * Data structures and manipulation thereof
253 */
254
255 struct w83627ehf_data {
256 int addr; /* IO base of hw monitor block */
257 const char *name;
258
259 struct class_device *class_dev;
260 struct mutex lock;
261
262 struct mutex update_lock;
263 char valid; /* !=0 if following fields are valid */
264 unsigned long last_updated; /* In jiffies */
265
266 /* Register values */
267 u8 in_num; /* number of in inputs we have */
268 u8 in[10]; /* Register value */
269 u8 in_max[10]; /* Register value */
270 u8 in_min[10]; /* Register value */
271 u8 fan[5];
272 u8 fan_min[5];
273 u8 fan_div[5];
274 u8 has_fan; /* some fan inputs can be disabled */
275 u8 temp_type[3];
276 s8 temp1;
277 s8 temp1_max;
278 s8 temp1_max_hyst;
279 s16 temp[2];
280 s16 temp_max[2];
281 s16 temp_max_hyst[2];
282 u32 alarms;
283
284 u8 pwm_mode[4]; /* 0->DC variable voltage, 1->PWM variable duty cycle */
285 u8 pwm_enable[4]; /* 1->manual
286 2->thermal cruise (also called SmartFan I) */
287 u8 pwm[4];
288 u8 target_temp[4];
289 u8 tolerance[4];
290
291 u8 fan_min_output[4]; /* minimum fan speed */
292 u8 fan_stop_time[4];
293
294 u8 vid;
295 u8 vrm;
296 };
297
298 struct w83627ehf_sio_data {
299 int sioreg;
300 enum kinds kind;
301 };
302
303 static inline int is_word_sized(u16 reg)
304 {
305 return (((reg & 0xff00) == 0x100
306 || (reg & 0xff00) == 0x200)
307 && ((reg & 0x00ff) == 0x50
308 || (reg & 0x00ff) == 0x53
309 || (reg & 0x00ff) == 0x55));
310 }
311
312 /* We assume that the default bank is 0, thus the following two functions do
313 nothing for registers which live in bank 0. For others, they respectively
314 set the bank register to the correct value (before the register is
315 accessed), and back to 0 (afterwards). */
316 static inline void w83627ehf_set_bank(struct w83627ehf_data *data, u16 reg)
317 {
318 if (reg & 0xff00) {
319 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
320 outb_p(reg >> 8, data->addr + DATA_REG_OFFSET);
321 }
322 }
323
324 static inline void w83627ehf_reset_bank(struct w83627ehf_data *data, u16 reg)
325 {
326 if (reg & 0xff00) {
327 outb_p(W83627EHF_REG_BANK, data->addr + ADDR_REG_OFFSET);
328 outb_p(0, data->addr + DATA_REG_OFFSET);
329 }
330 }
331
332 static u16 w83627ehf_read_value(struct w83627ehf_data *data, u16 reg)
333 {
334 int res, word_sized = is_word_sized(reg);
335
336 mutex_lock(&data->lock);
337
338 w83627ehf_set_bank(data, reg);
339 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
340 res = inb_p(data->addr + DATA_REG_OFFSET);
341 if (word_sized) {
342 outb_p((reg & 0xff) + 1,
343 data->addr + ADDR_REG_OFFSET);
344 res = (res << 8) + inb_p(data->addr + DATA_REG_OFFSET);
345 }
346 w83627ehf_reset_bank(data, reg);
347
348 mutex_unlock(&data->lock);
349
350 return res;
351 }
352
353 static int w83627ehf_write_value(struct w83627ehf_data *data, u16 reg, u16 value)
354 {
355 int word_sized = is_word_sized(reg);
356
357 mutex_lock(&data->lock);
358
359 w83627ehf_set_bank(data, reg);
360 outb_p(reg & 0xff, data->addr + ADDR_REG_OFFSET);
361 if (word_sized) {
362 outb_p(value >> 8, data->addr + DATA_REG_OFFSET);
363 outb_p((reg & 0xff) + 1,
364 data->addr + ADDR_REG_OFFSET);
365 }
366 outb_p(value & 0xff, data->addr + DATA_REG_OFFSET);
367 w83627ehf_reset_bank(data, reg);
368
369 mutex_unlock(&data->lock);
370 return 0;
371 }
372
373 /* This function assumes that the caller holds data->update_lock */
374 static void w83627ehf_write_fan_div(struct w83627ehf_data *data, int nr)
375 {
376 u8 reg;
377
378 switch (nr) {
379 case 0:
380 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0xcf)
381 | ((data->fan_div[0] & 0x03) << 4);
382 /* fan5 input control bit is write only, compute the value */
383 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
384 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
385 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xdf)
386 | ((data->fan_div[0] & 0x04) << 3);
387 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
388 break;
389 case 1:
390 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV1) & 0x3f)
391 | ((data->fan_div[1] & 0x03) << 6);
392 /* fan5 input control bit is write only, compute the value */
393 reg |= (data->has_fan & (1 << 4)) ? 1 : 0;
394 w83627ehf_write_value(data, W83627EHF_REG_FANDIV1, reg);
395 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0xbf)
396 | ((data->fan_div[1] & 0x04) << 4);
397 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
398 break;
399 case 2:
400 reg = (w83627ehf_read_value(data, W83627EHF_REG_FANDIV2) & 0x3f)
401 | ((data->fan_div[2] & 0x03) << 6);
402 w83627ehf_write_value(data, W83627EHF_REG_FANDIV2, reg);
403 reg = (w83627ehf_read_value(data, W83627EHF_REG_VBAT) & 0x7f)
404 | ((data->fan_div[2] & 0x04) << 5);
405 w83627ehf_write_value(data, W83627EHF_REG_VBAT, reg);
406 break;
407 case 3:
408 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0xfc)
409 | (data->fan_div[3] & 0x03);
410 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
411 reg = (w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT) & 0x7f)
412 | ((data->fan_div[3] & 0x04) << 5);
413 w83627ehf_write_value(data, W83627EHF_REG_SMI_OVT, reg);
414 break;
415 case 4:
416 reg = (w83627ehf_read_value(data, W83627EHF_REG_DIODE) & 0x73)
417 | ((data->fan_div[4] & 0x03) << 2)
418 | ((data->fan_div[4] & 0x04) << 5);
419 w83627ehf_write_value(data, W83627EHF_REG_DIODE, reg);
420 break;
421 }
422 }
423
424 static struct w83627ehf_data *w83627ehf_update_device(struct device *dev)
425 {
426 struct w83627ehf_data *data = dev_get_drvdata(dev);
427 int pwmcfg = 0, tolerance = 0; /* shut up the compiler */
428 int i;
429
430 mutex_lock(&data->update_lock);
431
432 if (time_after(jiffies, data->last_updated + HZ + HZ/2)
433 || !data->valid) {
434 /* Fan clock dividers */
435 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
436 data->fan_div[0] = (i >> 4) & 0x03;
437 data->fan_div[1] = (i >> 6) & 0x03;
438 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV2);
439 data->fan_div[2] = (i >> 6) & 0x03;
440 i = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
441 data->fan_div[0] |= (i >> 3) & 0x04;
442 data->fan_div[1] |= (i >> 4) & 0x04;
443 data->fan_div[2] |= (i >> 5) & 0x04;
444 if (data->has_fan & ((1 << 3) | (1 << 4))) {
445 i = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
446 data->fan_div[3] = i & 0x03;
447 data->fan_div[4] = ((i >> 2) & 0x03)
448 | ((i >> 5) & 0x04);
449 }
450 if (data->has_fan & (1 << 3)) {
451 i = w83627ehf_read_value(data, W83627EHF_REG_SMI_OVT);
452 data->fan_div[3] |= (i >> 5) & 0x04;
453 }
454
455 /* Measured voltages and limits */
456 for (i = 0; i < data->in_num; i++) {
457 data->in[i] = w83627ehf_read_value(data,
458 W83627EHF_REG_IN(i));
459 data->in_min[i] = w83627ehf_read_value(data,
460 W83627EHF_REG_IN_MIN(i));
461 data->in_max[i] = w83627ehf_read_value(data,
462 W83627EHF_REG_IN_MAX(i));
463 }
464
465 /* Measured fan speeds and limits */
466 for (i = 0; i < 5; i++) {
467 if (!(data->has_fan & (1 << i)))
468 continue;
469
470 data->fan[i] = w83627ehf_read_value(data,
471 W83627EHF_REG_FAN[i]);
472 data->fan_min[i] = w83627ehf_read_value(data,
473 W83627EHF_REG_FAN_MIN[i]);
474
475 /* If we failed to measure the fan speed and clock
476 divider can be increased, let's try that for next
477 time */
478 if (data->fan[i] == 0xff
479 && data->fan_div[i] < 0x07) {
480 dev_dbg(dev, "Increasing fan%d "
481 "clock divider from %u to %u\n",
482 i + 1, div_from_reg(data->fan_div[i]),
483 div_from_reg(data->fan_div[i] + 1));
484 data->fan_div[i]++;
485 w83627ehf_write_fan_div(data, i);
486 /* Preserve min limit if possible */
487 if (data->fan_min[i] >= 2
488 && data->fan_min[i] != 255)
489 w83627ehf_write_value(data,
490 W83627EHF_REG_FAN_MIN[i],
491 (data->fan_min[i] /= 2));
492 }
493 }
494
495 for (i = 0; i < 4; i++) {
496 /* pwmcfg, tolarance mapped for i=0, i=1 to same reg */
497 if (i != 1) {
498 pwmcfg = w83627ehf_read_value(data,
499 W83627EHF_REG_PWM_ENABLE[i]);
500 tolerance = w83627ehf_read_value(data,
501 W83627EHF_REG_TOLERANCE[i]);
502 }
503 data->pwm_mode[i] =
504 ((pwmcfg >> W83627EHF_PWM_MODE_SHIFT[i]) & 1)
505 ? 0 : 1;
506 data->pwm_enable[i] =
507 ((pwmcfg >> W83627EHF_PWM_ENABLE_SHIFT[i])
508 & 3) + 1;
509 data->pwm[i] = w83627ehf_read_value(data,
510 W83627EHF_REG_PWM[i]);
511 data->fan_min_output[i] = w83627ehf_read_value(data,
512 W83627EHF_REG_FAN_MIN_OUTPUT[i]);
513 data->fan_stop_time[i] = w83627ehf_read_value(data,
514 W83627EHF_REG_FAN_STOP_TIME[i]);
515 data->target_temp[i] =
516 w83627ehf_read_value(data,
517 W83627EHF_REG_TARGET[i]) &
518 (data->pwm_mode[i] == 1 ? 0x7f : 0xff);
519 data->tolerance[i] = (tolerance >> (i == 1 ? 4 : 0))
520 & 0x0f;
521 }
522
523 /* Measured temperatures and limits */
524 data->temp1 = w83627ehf_read_value(data,
525 W83627EHF_REG_TEMP1);
526 data->temp1_max = w83627ehf_read_value(data,
527 W83627EHF_REG_TEMP1_OVER);
528 data->temp1_max_hyst = w83627ehf_read_value(data,
529 W83627EHF_REG_TEMP1_HYST);
530 for (i = 0; i < 2; i++) {
531 data->temp[i] = w83627ehf_read_value(data,
532 W83627EHF_REG_TEMP[i]);
533 data->temp_max[i] = w83627ehf_read_value(data,
534 W83627EHF_REG_TEMP_OVER[i]);
535 data->temp_max_hyst[i] = w83627ehf_read_value(data,
536 W83627EHF_REG_TEMP_HYST[i]);
537 }
538
539 data->alarms = w83627ehf_read_value(data,
540 W83627EHF_REG_ALARM1) |
541 (w83627ehf_read_value(data,
542 W83627EHF_REG_ALARM2) << 8) |
543 (w83627ehf_read_value(data,
544 W83627EHF_REG_ALARM3) << 16);
545
546 data->last_updated = jiffies;
547 data->valid = 1;
548 }
549
550 mutex_unlock(&data->update_lock);
551 return data;
552 }
553
554 /*
555 * Sysfs callback functions
556 */
557 #define show_in_reg(reg) \
558 static ssize_t \
559 show_##reg(struct device *dev, struct device_attribute *attr, \
560 char *buf) \
561 { \
562 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
563 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
564 int nr = sensor_attr->index; \
565 return sprintf(buf, "%ld\n", in_from_reg(data->reg[nr], nr)); \
566 }
567 show_in_reg(in)
568 show_in_reg(in_min)
569 show_in_reg(in_max)
570
571 #define store_in_reg(REG, reg) \
572 static ssize_t \
573 store_in_##reg (struct device *dev, struct device_attribute *attr, \
574 const char *buf, size_t count) \
575 { \
576 struct w83627ehf_data *data = dev_get_drvdata(dev); \
577 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
578 int nr = sensor_attr->index; \
579 u32 val = simple_strtoul(buf, NULL, 10); \
580 \
581 mutex_lock(&data->update_lock); \
582 data->in_##reg[nr] = in_to_reg(val, nr); \
583 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(nr), \
584 data->in_##reg[nr]); \
585 mutex_unlock(&data->update_lock); \
586 return count; \
587 }
588
589 store_in_reg(MIN, min)
590 store_in_reg(MAX, max)
591
592 static ssize_t show_alarm(struct device *dev, struct device_attribute *attr, char *buf)
593 {
594 struct w83627ehf_data *data = w83627ehf_update_device(dev);
595 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
596 int nr = sensor_attr->index;
597 return sprintf(buf, "%u\n", (data->alarms >> nr) & 0x01);
598 }
599
600 static struct sensor_device_attribute sda_in_input[] = {
601 SENSOR_ATTR(in0_input, S_IRUGO, show_in, NULL, 0),
602 SENSOR_ATTR(in1_input, S_IRUGO, show_in, NULL, 1),
603 SENSOR_ATTR(in2_input, S_IRUGO, show_in, NULL, 2),
604 SENSOR_ATTR(in3_input, S_IRUGO, show_in, NULL, 3),
605 SENSOR_ATTR(in4_input, S_IRUGO, show_in, NULL, 4),
606 SENSOR_ATTR(in5_input, S_IRUGO, show_in, NULL, 5),
607 SENSOR_ATTR(in6_input, S_IRUGO, show_in, NULL, 6),
608 SENSOR_ATTR(in7_input, S_IRUGO, show_in, NULL, 7),
609 SENSOR_ATTR(in8_input, S_IRUGO, show_in, NULL, 8),
610 SENSOR_ATTR(in9_input, S_IRUGO, show_in, NULL, 9),
611 };
612
613 static struct sensor_device_attribute sda_in_alarm[] = {
614 SENSOR_ATTR(in0_alarm, S_IRUGO, show_alarm, NULL, 0),
615 SENSOR_ATTR(in1_alarm, S_IRUGO, show_alarm, NULL, 1),
616 SENSOR_ATTR(in2_alarm, S_IRUGO, show_alarm, NULL, 2),
617 SENSOR_ATTR(in3_alarm, S_IRUGO, show_alarm, NULL, 3),
618 SENSOR_ATTR(in4_alarm, S_IRUGO, show_alarm, NULL, 8),
619 SENSOR_ATTR(in5_alarm, S_IRUGO, show_alarm, NULL, 21),
620 SENSOR_ATTR(in6_alarm, S_IRUGO, show_alarm, NULL, 20),
621 SENSOR_ATTR(in7_alarm, S_IRUGO, show_alarm, NULL, 16),
622 SENSOR_ATTR(in8_alarm, S_IRUGO, show_alarm, NULL, 17),
623 SENSOR_ATTR(in9_alarm, S_IRUGO, show_alarm, NULL, 19),
624 };
625
626 static struct sensor_device_attribute sda_in_min[] = {
627 SENSOR_ATTR(in0_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 0),
628 SENSOR_ATTR(in1_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 1),
629 SENSOR_ATTR(in2_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 2),
630 SENSOR_ATTR(in3_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 3),
631 SENSOR_ATTR(in4_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 4),
632 SENSOR_ATTR(in5_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 5),
633 SENSOR_ATTR(in6_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 6),
634 SENSOR_ATTR(in7_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 7),
635 SENSOR_ATTR(in8_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 8),
636 SENSOR_ATTR(in9_min, S_IWUSR | S_IRUGO, show_in_min, store_in_min, 9),
637 };
638
639 static struct sensor_device_attribute sda_in_max[] = {
640 SENSOR_ATTR(in0_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 0),
641 SENSOR_ATTR(in1_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 1),
642 SENSOR_ATTR(in2_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 2),
643 SENSOR_ATTR(in3_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 3),
644 SENSOR_ATTR(in4_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 4),
645 SENSOR_ATTR(in5_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 5),
646 SENSOR_ATTR(in6_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 6),
647 SENSOR_ATTR(in7_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 7),
648 SENSOR_ATTR(in8_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 8),
649 SENSOR_ATTR(in9_max, S_IWUSR | S_IRUGO, show_in_max, store_in_max, 9),
650 };
651
652 #define show_fan_reg(reg) \
653 static ssize_t \
654 show_##reg(struct device *dev, struct device_attribute *attr, \
655 char *buf) \
656 { \
657 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
658 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
659 int nr = sensor_attr->index; \
660 return sprintf(buf, "%d\n", \
661 fan_from_reg(data->reg[nr], \
662 div_from_reg(data->fan_div[nr]))); \
663 }
664 show_fan_reg(fan);
665 show_fan_reg(fan_min);
666
667 static ssize_t
668 show_fan_div(struct device *dev, struct device_attribute *attr,
669 char *buf)
670 {
671 struct w83627ehf_data *data = w83627ehf_update_device(dev);
672 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
673 int nr = sensor_attr->index;
674 return sprintf(buf, "%u\n", div_from_reg(data->fan_div[nr]));
675 }
676
677 static ssize_t
678 store_fan_min(struct device *dev, struct device_attribute *attr,
679 const char *buf, size_t count)
680 {
681 struct w83627ehf_data *data = dev_get_drvdata(dev);
682 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
683 int nr = sensor_attr->index;
684 unsigned int val = simple_strtoul(buf, NULL, 10);
685 unsigned int reg;
686 u8 new_div;
687
688 mutex_lock(&data->update_lock);
689 if (!val) {
690 /* No min limit, alarm disabled */
691 data->fan_min[nr] = 255;
692 new_div = data->fan_div[nr]; /* No change */
693 dev_info(dev, "fan%u low limit and alarm disabled\n", nr + 1);
694 } else if ((reg = 1350000U / val) >= 128 * 255) {
695 /* Speed below this value cannot possibly be represented,
696 even with the highest divider (128) */
697 data->fan_min[nr] = 254;
698 new_div = 7; /* 128 == (1 << 7) */
699 dev_warn(dev, "fan%u low limit %u below minimum %u, set to "
700 "minimum\n", nr + 1, val, fan_from_reg(254, 128));
701 } else if (!reg) {
702 /* Speed above this value cannot possibly be represented,
703 even with the lowest divider (1) */
704 data->fan_min[nr] = 1;
705 new_div = 0; /* 1 == (1 << 0) */
706 dev_warn(dev, "fan%u low limit %u above maximum %u, set to "
707 "maximum\n", nr + 1, val, fan_from_reg(1, 1));
708 } else {
709 /* Automatically pick the best divider, i.e. the one such
710 that the min limit will correspond to a register value
711 in the 96..192 range */
712 new_div = 0;
713 while (reg > 192 && new_div < 7) {
714 reg >>= 1;
715 new_div++;
716 }
717 data->fan_min[nr] = reg;
718 }
719
720 /* Write both the fan clock divider (if it changed) and the new
721 fan min (unconditionally) */
722 if (new_div != data->fan_div[nr]) {
723 /* Preserve the fan speed reading */
724 if (data->fan[nr] != 0xff) {
725 if (new_div > data->fan_div[nr])
726 data->fan[nr] >>= new_div - data->fan_div[nr];
727 else if (data->fan[nr] & 0x80)
728 data->fan[nr] = 0xff;
729 else
730 data->fan[nr] <<= data->fan_div[nr] - new_div;
731 }
732
733 dev_dbg(dev, "fan%u clock divider changed from %u to %u\n",
734 nr + 1, div_from_reg(data->fan_div[nr]),
735 div_from_reg(new_div));
736 data->fan_div[nr] = new_div;
737 w83627ehf_write_fan_div(data, nr);
738 /* Give the chip time to sample a new speed value */
739 data->last_updated = jiffies;
740 }
741 w83627ehf_write_value(data, W83627EHF_REG_FAN_MIN[nr],
742 data->fan_min[nr]);
743 mutex_unlock(&data->update_lock);
744
745 return count;
746 }
747
748 static struct sensor_device_attribute sda_fan_input[] = {
749 SENSOR_ATTR(fan1_input, S_IRUGO, show_fan, NULL, 0),
750 SENSOR_ATTR(fan2_input, S_IRUGO, show_fan, NULL, 1),
751 SENSOR_ATTR(fan3_input, S_IRUGO, show_fan, NULL, 2),
752 SENSOR_ATTR(fan4_input, S_IRUGO, show_fan, NULL, 3),
753 SENSOR_ATTR(fan5_input, S_IRUGO, show_fan, NULL, 4),
754 };
755
756 static struct sensor_device_attribute sda_fan_alarm[] = {
757 SENSOR_ATTR(fan1_alarm, S_IRUGO, show_alarm, NULL, 6),
758 SENSOR_ATTR(fan2_alarm, S_IRUGO, show_alarm, NULL, 7),
759 SENSOR_ATTR(fan3_alarm, S_IRUGO, show_alarm, NULL, 11),
760 SENSOR_ATTR(fan4_alarm, S_IRUGO, show_alarm, NULL, 10),
761 SENSOR_ATTR(fan5_alarm, S_IRUGO, show_alarm, NULL, 23),
762 };
763
764 static struct sensor_device_attribute sda_fan_min[] = {
765 SENSOR_ATTR(fan1_min, S_IWUSR | S_IRUGO, show_fan_min,
766 store_fan_min, 0),
767 SENSOR_ATTR(fan2_min, S_IWUSR | S_IRUGO, show_fan_min,
768 store_fan_min, 1),
769 SENSOR_ATTR(fan3_min, S_IWUSR | S_IRUGO, show_fan_min,
770 store_fan_min, 2),
771 SENSOR_ATTR(fan4_min, S_IWUSR | S_IRUGO, show_fan_min,
772 store_fan_min, 3),
773 SENSOR_ATTR(fan5_min, S_IWUSR | S_IRUGO, show_fan_min,
774 store_fan_min, 4),
775 };
776
777 static struct sensor_device_attribute sda_fan_div[] = {
778 SENSOR_ATTR(fan1_div, S_IRUGO, show_fan_div, NULL, 0),
779 SENSOR_ATTR(fan2_div, S_IRUGO, show_fan_div, NULL, 1),
780 SENSOR_ATTR(fan3_div, S_IRUGO, show_fan_div, NULL, 2),
781 SENSOR_ATTR(fan4_div, S_IRUGO, show_fan_div, NULL, 3),
782 SENSOR_ATTR(fan5_div, S_IRUGO, show_fan_div, NULL, 4),
783 };
784
785 #define show_temp1_reg(reg) \
786 static ssize_t \
787 show_##reg(struct device *dev, struct device_attribute *attr, \
788 char *buf) \
789 { \
790 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
791 return sprintf(buf, "%d\n", temp1_from_reg(data->reg)); \
792 }
793 show_temp1_reg(temp1);
794 show_temp1_reg(temp1_max);
795 show_temp1_reg(temp1_max_hyst);
796
797 #define store_temp1_reg(REG, reg) \
798 static ssize_t \
799 store_temp1_##reg(struct device *dev, struct device_attribute *attr, \
800 const char *buf, size_t count) \
801 { \
802 struct w83627ehf_data *data = dev_get_drvdata(dev); \
803 u32 val = simple_strtoul(buf, NULL, 10); \
804 \
805 mutex_lock(&data->update_lock); \
806 data->temp1_##reg = temp1_to_reg(val, -128000, 127000); \
807 w83627ehf_write_value(data, W83627EHF_REG_TEMP1_##REG, \
808 data->temp1_##reg); \
809 mutex_unlock(&data->update_lock); \
810 return count; \
811 }
812 store_temp1_reg(OVER, max);
813 store_temp1_reg(HYST, max_hyst);
814
815 #define show_temp_reg(reg) \
816 static ssize_t \
817 show_##reg(struct device *dev, struct device_attribute *attr, \
818 char *buf) \
819 { \
820 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
821 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
822 int nr = sensor_attr->index; \
823 return sprintf(buf, "%d\n", \
824 LM75_TEMP_FROM_REG(data->reg[nr])); \
825 }
826 show_temp_reg(temp);
827 show_temp_reg(temp_max);
828 show_temp_reg(temp_max_hyst);
829
830 #define store_temp_reg(REG, reg) \
831 static ssize_t \
832 store_##reg(struct device *dev, struct device_attribute *attr, \
833 const char *buf, size_t count) \
834 { \
835 struct w83627ehf_data *data = dev_get_drvdata(dev); \
836 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
837 int nr = sensor_attr->index; \
838 u32 val = simple_strtoul(buf, NULL, 10); \
839 \
840 mutex_lock(&data->update_lock); \
841 data->reg[nr] = LM75_TEMP_TO_REG(val); \
842 w83627ehf_write_value(data, W83627EHF_REG_TEMP_##REG[nr], \
843 data->reg[nr]); \
844 mutex_unlock(&data->update_lock); \
845 return count; \
846 }
847 store_temp_reg(OVER, temp_max);
848 store_temp_reg(HYST, temp_max_hyst);
849
850 static ssize_t
851 show_temp_type(struct device *dev, struct device_attribute *attr, char *buf)
852 {
853 struct w83627ehf_data *data = w83627ehf_update_device(dev);
854 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
855 int nr = sensor_attr->index;
856 return sprintf(buf, "%d\n", (int)data->temp_type[nr]);
857 }
858
859 static struct sensor_device_attribute sda_temp[] = {
860 SENSOR_ATTR(temp1_input, S_IRUGO, show_temp1, NULL, 0),
861 SENSOR_ATTR(temp2_input, S_IRUGO, show_temp, NULL, 0),
862 SENSOR_ATTR(temp3_input, S_IRUGO, show_temp, NULL, 1),
863 SENSOR_ATTR(temp1_max, S_IRUGO | S_IWUSR, show_temp1_max,
864 store_temp1_max, 0),
865 SENSOR_ATTR(temp2_max, S_IRUGO | S_IWUSR, show_temp_max,
866 store_temp_max, 0),
867 SENSOR_ATTR(temp3_max, S_IRUGO | S_IWUSR, show_temp_max,
868 store_temp_max, 1),
869 SENSOR_ATTR(temp1_max_hyst, S_IRUGO | S_IWUSR, show_temp1_max_hyst,
870 store_temp1_max_hyst, 0),
871 SENSOR_ATTR(temp2_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
872 store_temp_max_hyst, 0),
873 SENSOR_ATTR(temp3_max_hyst, S_IRUGO | S_IWUSR, show_temp_max_hyst,
874 store_temp_max_hyst, 1),
875 SENSOR_ATTR(temp1_alarm, S_IRUGO, show_alarm, NULL, 4),
876 SENSOR_ATTR(temp2_alarm, S_IRUGO, show_alarm, NULL, 5),
877 SENSOR_ATTR(temp3_alarm, S_IRUGO, show_alarm, NULL, 13),
878 SENSOR_ATTR(temp1_type, S_IRUGO, show_temp_type, NULL, 0),
879 SENSOR_ATTR(temp2_type, S_IRUGO, show_temp_type, NULL, 1),
880 SENSOR_ATTR(temp3_type, S_IRUGO, show_temp_type, NULL, 2),
881 };
882
883 #define show_pwm_reg(reg) \
884 static ssize_t show_##reg (struct device *dev, struct device_attribute *attr, \
885 char *buf) \
886 { \
887 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
888 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
889 int nr = sensor_attr->index; \
890 return sprintf(buf, "%d\n", data->reg[nr]); \
891 }
892
893 show_pwm_reg(pwm_mode)
894 show_pwm_reg(pwm_enable)
895 show_pwm_reg(pwm)
896
897 static ssize_t
898 store_pwm_mode(struct device *dev, struct device_attribute *attr,
899 const char *buf, size_t count)
900 {
901 struct w83627ehf_data *data = dev_get_drvdata(dev);
902 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
903 int nr = sensor_attr->index;
904 u32 val = simple_strtoul(buf, NULL, 10);
905 u16 reg;
906
907 if (val > 1)
908 return -EINVAL;
909 mutex_lock(&data->update_lock);
910 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
911 data->pwm_mode[nr] = val;
912 reg &= ~(1 << W83627EHF_PWM_MODE_SHIFT[nr]);
913 if (!val)
914 reg |= 1 << W83627EHF_PWM_MODE_SHIFT[nr];
915 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
916 mutex_unlock(&data->update_lock);
917 return count;
918 }
919
920 static ssize_t
921 store_pwm(struct device *dev, struct device_attribute *attr,
922 const char *buf, size_t count)
923 {
924 struct w83627ehf_data *data = dev_get_drvdata(dev);
925 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
926 int nr = sensor_attr->index;
927 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 0, 255);
928
929 mutex_lock(&data->update_lock);
930 data->pwm[nr] = val;
931 w83627ehf_write_value(data, W83627EHF_REG_PWM[nr], val);
932 mutex_unlock(&data->update_lock);
933 return count;
934 }
935
936 static ssize_t
937 store_pwm_enable(struct device *dev, struct device_attribute *attr,
938 const char *buf, size_t count)
939 {
940 struct w83627ehf_data *data = dev_get_drvdata(dev);
941 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
942 int nr = sensor_attr->index;
943 u32 val = simple_strtoul(buf, NULL, 10);
944 u16 reg;
945
946 if (!val || (val > 2)) /* only modes 1 and 2 are supported */
947 return -EINVAL;
948 mutex_lock(&data->update_lock);
949 reg = w83627ehf_read_value(data, W83627EHF_REG_PWM_ENABLE[nr]);
950 data->pwm_enable[nr] = val;
951 reg &= ~(0x03 << W83627EHF_PWM_ENABLE_SHIFT[nr]);
952 reg |= (val - 1) << W83627EHF_PWM_ENABLE_SHIFT[nr];
953 w83627ehf_write_value(data, W83627EHF_REG_PWM_ENABLE[nr], reg);
954 mutex_unlock(&data->update_lock);
955 return count;
956 }
957
958
959 #define show_tol_temp(reg) \
960 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
961 char *buf) \
962 { \
963 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
964 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
965 int nr = sensor_attr->index; \
966 return sprintf(buf, "%d\n", temp1_from_reg(data->reg[nr])); \
967 }
968
969 show_tol_temp(tolerance)
970 show_tol_temp(target_temp)
971
972 static ssize_t
973 store_target_temp(struct device *dev, struct device_attribute *attr,
974 const char *buf, size_t count)
975 {
976 struct w83627ehf_data *data = dev_get_drvdata(dev);
977 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
978 int nr = sensor_attr->index;
979 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 127000);
980
981 mutex_lock(&data->update_lock);
982 data->target_temp[nr] = val;
983 w83627ehf_write_value(data, W83627EHF_REG_TARGET[nr], val);
984 mutex_unlock(&data->update_lock);
985 return count;
986 }
987
988 static ssize_t
989 store_tolerance(struct device *dev, struct device_attribute *attr,
990 const char *buf, size_t count)
991 {
992 struct w83627ehf_data *data = dev_get_drvdata(dev);
993 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr);
994 int nr = sensor_attr->index;
995 u16 reg;
996 /* Limit the temp to 0C - 15C */
997 u8 val = temp1_to_reg(simple_strtoul(buf, NULL, 10), 0, 15000);
998
999 mutex_lock(&data->update_lock);
1000 reg = w83627ehf_read_value(data, W83627EHF_REG_TOLERANCE[nr]);
1001 data->tolerance[nr] = val;
1002 if (nr == 1)
1003 reg = (reg & 0x0f) | (val << 4);
1004 else
1005 reg = (reg & 0xf0) | val;
1006 w83627ehf_write_value(data, W83627EHF_REG_TOLERANCE[nr], reg);
1007 mutex_unlock(&data->update_lock);
1008 return count;
1009 }
1010
1011 static struct sensor_device_attribute sda_pwm[] = {
1012 SENSOR_ATTR(pwm1, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 0),
1013 SENSOR_ATTR(pwm2, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 1),
1014 SENSOR_ATTR(pwm3, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 2),
1015 SENSOR_ATTR(pwm4, S_IWUSR | S_IRUGO, show_pwm, store_pwm, 3),
1016 };
1017
1018 static struct sensor_device_attribute sda_pwm_mode[] = {
1019 SENSOR_ATTR(pwm1_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1020 store_pwm_mode, 0),
1021 SENSOR_ATTR(pwm2_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1022 store_pwm_mode, 1),
1023 SENSOR_ATTR(pwm3_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1024 store_pwm_mode, 2),
1025 SENSOR_ATTR(pwm4_mode, S_IWUSR | S_IRUGO, show_pwm_mode,
1026 store_pwm_mode, 3),
1027 };
1028
1029 static struct sensor_device_attribute sda_pwm_enable[] = {
1030 SENSOR_ATTR(pwm1_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1031 store_pwm_enable, 0),
1032 SENSOR_ATTR(pwm2_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1033 store_pwm_enable, 1),
1034 SENSOR_ATTR(pwm3_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1035 store_pwm_enable, 2),
1036 SENSOR_ATTR(pwm4_enable, S_IWUSR | S_IRUGO, show_pwm_enable,
1037 store_pwm_enable, 3),
1038 };
1039
1040 static struct sensor_device_attribute sda_target_temp[] = {
1041 SENSOR_ATTR(pwm1_target, S_IWUSR | S_IRUGO, show_target_temp,
1042 store_target_temp, 0),
1043 SENSOR_ATTR(pwm2_target, S_IWUSR | S_IRUGO, show_target_temp,
1044 store_target_temp, 1),
1045 SENSOR_ATTR(pwm3_target, S_IWUSR | S_IRUGO, show_target_temp,
1046 store_target_temp, 2),
1047 SENSOR_ATTR(pwm4_target, S_IWUSR | S_IRUGO, show_target_temp,
1048 store_target_temp, 3),
1049 };
1050
1051 static struct sensor_device_attribute sda_tolerance[] = {
1052 SENSOR_ATTR(pwm1_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1053 store_tolerance, 0),
1054 SENSOR_ATTR(pwm2_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1055 store_tolerance, 1),
1056 SENSOR_ATTR(pwm3_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1057 store_tolerance, 2),
1058 SENSOR_ATTR(pwm4_tolerance, S_IWUSR | S_IRUGO, show_tolerance,
1059 store_tolerance, 3),
1060 };
1061
1062 /* Smart Fan registers */
1063
1064 #define fan_functions(reg, REG) \
1065 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1066 char *buf) \
1067 { \
1068 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1069 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1070 int nr = sensor_attr->index; \
1071 return sprintf(buf, "%d\n", data->reg[nr]); \
1072 }\
1073 static ssize_t \
1074 store_##reg(struct device *dev, struct device_attribute *attr, \
1075 const char *buf, size_t count) \
1076 {\
1077 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1078 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1079 int nr = sensor_attr->index; \
1080 u32 val = SENSORS_LIMIT(simple_strtoul(buf, NULL, 10), 1, 255); \
1081 mutex_lock(&data->update_lock); \
1082 data->reg[nr] = val; \
1083 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1084 mutex_unlock(&data->update_lock); \
1085 return count; \
1086 }
1087
1088 fan_functions(fan_min_output, FAN_MIN_OUTPUT)
1089
1090 #define fan_time_functions(reg, REG) \
1091 static ssize_t show_##reg(struct device *dev, struct device_attribute *attr, \
1092 char *buf) \
1093 { \
1094 struct w83627ehf_data *data = w83627ehf_update_device(dev); \
1095 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1096 int nr = sensor_attr->index; \
1097 return sprintf(buf, "%d\n", \
1098 step_time_from_reg(data->reg[nr], data->pwm_mode[nr])); \
1099 } \
1100 \
1101 static ssize_t \
1102 store_##reg(struct device *dev, struct device_attribute *attr, \
1103 const char *buf, size_t count) \
1104 { \
1105 struct w83627ehf_data *data = dev_get_drvdata(dev); \
1106 struct sensor_device_attribute *sensor_attr = to_sensor_dev_attr(attr); \
1107 int nr = sensor_attr->index; \
1108 u8 val = step_time_to_reg(simple_strtoul(buf, NULL, 10), \
1109 data->pwm_mode[nr]); \
1110 mutex_lock(&data->update_lock); \
1111 data->reg[nr] = val; \
1112 w83627ehf_write_value(data, W83627EHF_REG_##REG[nr], val); \
1113 mutex_unlock(&data->update_lock); \
1114 return count; \
1115 } \
1116
1117 fan_time_functions(fan_stop_time, FAN_STOP_TIME)
1118
1119 static ssize_t show_name(struct device *dev, struct device_attribute *attr,
1120 char *buf)
1121 {
1122 struct w83627ehf_data *data = dev_get_drvdata(dev);
1123
1124 return sprintf(buf, "%s\n", data->name);
1125 }
1126 static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
1127
1128 static struct sensor_device_attribute sda_sf3_arrays_fan4[] = {
1129 SENSOR_ATTR(pwm4_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1130 store_fan_stop_time, 3),
1131 SENSOR_ATTR(pwm4_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1132 store_fan_min_output, 3),
1133 };
1134
1135 static struct sensor_device_attribute sda_sf3_arrays[] = {
1136 SENSOR_ATTR(pwm1_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1137 store_fan_stop_time, 0),
1138 SENSOR_ATTR(pwm2_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1139 store_fan_stop_time, 1),
1140 SENSOR_ATTR(pwm3_stop_time, S_IWUSR | S_IRUGO, show_fan_stop_time,
1141 store_fan_stop_time, 2),
1142 SENSOR_ATTR(pwm1_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1143 store_fan_min_output, 0),
1144 SENSOR_ATTR(pwm2_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1145 store_fan_min_output, 1),
1146 SENSOR_ATTR(pwm3_min_output, S_IWUSR | S_IRUGO, show_fan_min_output,
1147 store_fan_min_output, 2),
1148 };
1149
1150 static ssize_t
1151 show_vid(struct device *dev, struct device_attribute *attr, char *buf)
1152 {
1153 struct w83627ehf_data *data = dev_get_drvdata(dev);
1154 return sprintf(buf, "%d\n", vid_from_reg(data->vid, data->vrm));
1155 }
1156 static DEVICE_ATTR(cpu0_vid, S_IRUGO, show_vid, NULL);
1157
1158 /*
1159 * Driver and device management
1160 */
1161
1162 static void w83627ehf_device_remove_files(struct device *dev)
1163 {
1164 /* some entries in the following arrays may not have been used in
1165 * device_create_file(), but device_remove_file() will ignore them */
1166 int i;
1167 struct w83627ehf_data *data = dev_get_drvdata(dev);
1168
1169 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1170 device_remove_file(dev, &sda_sf3_arrays[i].dev_attr);
1171 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++)
1172 device_remove_file(dev, &sda_sf3_arrays_fan4[i].dev_attr);
1173 for (i = 0; i < data->in_num; i++) {
1174 device_remove_file(dev, &sda_in_input[i].dev_attr);
1175 device_remove_file(dev, &sda_in_alarm[i].dev_attr);
1176 device_remove_file(dev, &sda_in_min[i].dev_attr);
1177 device_remove_file(dev, &sda_in_max[i].dev_attr);
1178 }
1179 for (i = 0; i < 5; i++) {
1180 device_remove_file(dev, &sda_fan_input[i].dev_attr);
1181 device_remove_file(dev, &sda_fan_alarm[i].dev_attr);
1182 device_remove_file(dev, &sda_fan_div[i].dev_attr);
1183 device_remove_file(dev, &sda_fan_min[i].dev_attr);
1184 }
1185 for (i = 0; i < 4; i++) {
1186 device_remove_file(dev, &sda_pwm[i].dev_attr);
1187 device_remove_file(dev, &sda_pwm_mode[i].dev_attr);
1188 device_remove_file(dev, &sda_pwm_enable[i].dev_attr);
1189 device_remove_file(dev, &sda_target_temp[i].dev_attr);
1190 device_remove_file(dev, &sda_tolerance[i].dev_attr);
1191 }
1192 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1193 device_remove_file(dev, &sda_temp[i].dev_attr);
1194
1195 device_remove_file(dev, &dev_attr_name);
1196 if (data->vid != 0x3f)
1197 device_remove_file(dev, &dev_attr_cpu0_vid);
1198 }
1199
1200 /* Get the monitoring functions started */
1201 static inline void __devinit w83627ehf_init_device(struct w83627ehf_data *data)
1202 {
1203 int i;
1204 u8 tmp, diode;
1205
1206 /* Start monitoring is needed */
1207 tmp = w83627ehf_read_value(data, W83627EHF_REG_CONFIG);
1208 if (!(tmp & 0x01))
1209 w83627ehf_write_value(data, W83627EHF_REG_CONFIG,
1210 tmp | 0x01);
1211
1212 /* Enable temp2 and temp3 if needed */
1213 for (i = 0; i < 2; i++) {
1214 tmp = w83627ehf_read_value(data,
1215 W83627EHF_REG_TEMP_CONFIG[i]);
1216 if (tmp & 0x01)
1217 w83627ehf_write_value(data,
1218 W83627EHF_REG_TEMP_CONFIG[i],
1219 tmp & 0xfe);
1220 }
1221
1222 /* Enable VBAT monitoring if needed */
1223 tmp = w83627ehf_read_value(data, W83627EHF_REG_VBAT);
1224 if (!(tmp & 0x01))
1225 w83627ehf_write_value(data, W83627EHF_REG_VBAT, tmp | 0x01);
1226
1227 /* Get thermal sensor types */
1228 diode = w83627ehf_read_value(data, W83627EHF_REG_DIODE);
1229 for (i = 0; i < 3; i++) {
1230 if ((tmp & (0x02 << i)))
1231 data->temp_type[i] = (diode & (0x10 << i)) ? 1 : 2;
1232 else
1233 data->temp_type[i] = 4; /* thermistor */
1234 }
1235 }
1236
1237 static int __devinit w83627ehf_probe(struct platform_device *pdev)
1238 {
1239 struct device *dev = &pdev->dev;
1240 struct w83627ehf_sio_data *sio_data = dev->platform_data;
1241 struct w83627ehf_data *data;
1242 struct resource *res;
1243 u8 fan4pin, fan5pin, en_vrm10;
1244 int i, err = 0;
1245
1246 res = platform_get_resource(pdev, IORESOURCE_IO, 0);
1247 if (!request_region(res->start, IOREGION_LENGTH, DRVNAME)) {
1248 err = -EBUSY;
1249 dev_err(dev, "Failed to request region 0x%lx-0x%lx\n",
1250 (unsigned long)res->start,
1251 (unsigned long)res->start + IOREGION_LENGTH - 1);
1252 goto exit;
1253 }
1254
1255 if (!(data = kzalloc(sizeof(struct w83627ehf_data), GFP_KERNEL))) {
1256 err = -ENOMEM;
1257 goto exit_release;
1258 }
1259
1260 data->addr = res->start;
1261 mutex_init(&data->lock);
1262 mutex_init(&data->update_lock);
1263 data->name = w83627ehf_device_names[sio_data->kind];
1264 platform_set_drvdata(pdev, data);
1265
1266 /* 627EHG and 627EHF have 10 voltage inputs; DHG has 9 */
1267 data->in_num = (sio_data->kind == w83627dhg) ? 9 : 10;
1268
1269 /* Initialize the chip */
1270 w83627ehf_init_device(data);
1271
1272 data->vrm = vid_which_vrm();
1273 superio_enter(sio_data->sioreg);
1274 /* Set VID input sensibility if needed. In theory the BIOS should
1275 have set it, but in practice it's not always the case. */
1276 en_vrm10 = superio_inb(sio_data->sioreg, SIO_REG_EN_VRM10);
1277 if ((en_vrm10 & 0x08) && data->vrm != 100) {
1278 dev_warn(dev, "Setting VID input voltage to TTL\n");
1279 superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
1280 en_vrm10 & ~0x08);
1281 } else if (!(en_vrm10 & 0x08) && data->vrm == 100) {
1282 dev_warn(dev, "Setting VID input voltage to VRM10\n");
1283 superio_outb(sio_data->sioreg, SIO_REG_EN_VRM10,
1284 en_vrm10 | 0x08);
1285 }
1286 /* Read VID value */
1287 superio_select(sio_data->sioreg, W83627EHF_LD_HWM);
1288 if (superio_inb(sio_data->sioreg, SIO_REG_VID_CTRL) & 0x80)
1289 data->vid = superio_inb(sio_data->sioreg, SIO_REG_VID_DATA) & 0x3f;
1290 else {
1291 dev_info(dev, "VID pins in output mode, CPU VID not "
1292 "available\n");
1293 data->vid = 0x3f;
1294 }
1295
1296 /* fan4 and fan5 share some pins with the GPIO and serial flash */
1297
1298 fan5pin = superio_inb(sio_data->sioreg, 0x24) & 0x2;
1299 fan4pin = superio_inb(sio_data->sioreg, 0x29) & 0x6;
1300 superio_exit(sio_data->sioreg);
1301
1302 /* It looks like fan4 and fan5 pins can be alternatively used
1303 as fan on/off switches, but fan5 control is write only :/
1304 We assume that if the serial interface is disabled, designers
1305 connected fan5 as input unless they are emitting log 1, which
1306 is not the default. */
1307
1308 data->has_fan = 0x07; /* fan1, fan2 and fan3 */
1309 i = w83627ehf_read_value(data, W83627EHF_REG_FANDIV1);
1310 if ((i & (1 << 2)) && (!fan4pin))
1311 data->has_fan |= (1 << 3);
1312 if (!(i & (1 << 1)) && (!fan5pin))
1313 data->has_fan |= (1 << 4);
1314
1315 /* Register sysfs hooks */
1316 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays); i++)
1317 if ((err = device_create_file(dev,
1318 &sda_sf3_arrays[i].dev_attr)))
1319 goto exit_remove;
1320
1321 /* if fan4 is enabled create the sf3 files for it */
1322 if (data->has_fan & (1 << 3))
1323 for (i = 0; i < ARRAY_SIZE(sda_sf3_arrays_fan4); i++) {
1324 if ((err = device_create_file(dev,
1325 &sda_sf3_arrays_fan4[i].dev_attr)))
1326 goto exit_remove;
1327 }
1328
1329 for (i = 0; i < data->in_num; i++)
1330 if ((err = device_create_file(dev, &sda_in_input[i].dev_attr))
1331 || (err = device_create_file(dev,
1332 &sda_in_alarm[i].dev_attr))
1333 || (err = device_create_file(dev,
1334 &sda_in_min[i].dev_attr))
1335 || (err = device_create_file(dev,
1336 &sda_in_max[i].dev_attr)))
1337 goto exit_remove;
1338
1339 for (i = 0; i < 5; i++) {
1340 if (data->has_fan & (1 << i)) {
1341 if ((err = device_create_file(dev,
1342 &sda_fan_input[i].dev_attr))
1343 || (err = device_create_file(dev,
1344 &sda_fan_alarm[i].dev_attr))
1345 || (err = device_create_file(dev,
1346 &sda_fan_div[i].dev_attr))
1347 || (err = device_create_file(dev,
1348 &sda_fan_min[i].dev_attr)))
1349 goto exit_remove;
1350 if (i < 4 && /* w83627ehf only has 4 pwm */
1351 ((err = device_create_file(dev,
1352 &sda_pwm[i].dev_attr))
1353 || (err = device_create_file(dev,
1354 &sda_pwm_mode[i].dev_attr))
1355 || (err = device_create_file(dev,
1356 &sda_pwm_enable[i].dev_attr))
1357 || (err = device_create_file(dev,
1358 &sda_target_temp[i].dev_attr))
1359 || (err = device_create_file(dev,
1360 &sda_tolerance[i].dev_attr))))
1361 goto exit_remove;
1362 }
1363 }
1364
1365 for (i = 0; i < ARRAY_SIZE(sda_temp); i++)
1366 if ((err = device_create_file(dev, &sda_temp[i].dev_attr)))
1367 goto exit_remove;
1368
1369 err = device_create_file(dev, &dev_attr_name);
1370 if (err)
1371 goto exit_remove;
1372
1373 if (data->vid != 0x3f) {
1374 err = device_create_file(dev, &dev_attr_cpu0_vid);
1375 if (err)
1376 goto exit_remove;
1377 }
1378
1379 data->class_dev = hwmon_device_register(dev);
1380 if (IS_ERR(data->class_dev)) {
1381 err = PTR_ERR(data->class_dev);
1382 goto exit_remove;
1383 }
1384
1385 return 0;
1386
1387 exit_remove:
1388 w83627ehf_device_remove_files(dev);
1389 kfree(data);
1390 platform_set_drvdata(pdev, NULL);
1391 exit_release:
1392 release_region(res->start, IOREGION_LENGTH);
1393 exit:
1394 return err;
1395 }
1396
1397 static int __devexit w83627ehf_remove(struct platform_device *pdev)
1398 {
1399 struct w83627ehf_data *data = platform_get_drvdata(pdev);
1400
1401 hwmon_device_unregister(data->class_dev);
1402 w83627ehf_device_remove_files(&pdev->dev);
1403 release_region(data->addr, IOREGION_LENGTH);
1404 platform_set_drvdata(pdev, NULL);
1405 kfree(data);
1406
1407 return 0;
1408 }
1409
1410 static struct platform_driver w83627ehf_driver = {
1411 .driver = {
1412 .owner = THIS_MODULE,
1413 .name = DRVNAME,
1414 },
1415 .probe = w83627ehf_probe,
1416 .remove = __devexit_p(w83627ehf_remove),
1417 };
1418
1419 /* w83627ehf_find() looks for a '627 in the Super-I/O config space */
1420 static int __init w83627ehf_find(int sioaddr, unsigned short *addr,
1421 struct w83627ehf_sio_data *sio_data)
1422 {
1423 static const char __initdata sio_name_W83627EHF[] = "W83627EHF";
1424 static const char __initdata sio_name_W83627EHG[] = "W83627EHG";
1425 static const char __initdata sio_name_W83627DHG[] = "W83627DHG";
1426
1427 u16 val;
1428 const char *sio_name;
1429
1430 superio_enter(sioaddr);
1431
1432 val = (superio_inb(sioaddr, SIO_REG_DEVID) << 8)
1433 | superio_inb(sioaddr, SIO_REG_DEVID + 1);
1434 switch (val & SIO_ID_MASK) {
1435 case SIO_W83627EHF_ID:
1436 sio_data->kind = w83627ehf;
1437 sio_name = sio_name_W83627EHF;
1438 break;
1439 case SIO_W83627EHG_ID:
1440 sio_data->kind = w83627ehf;
1441 sio_name = sio_name_W83627EHG;
1442 break;
1443 case SIO_W83627DHG_ID:
1444 sio_data->kind = w83627dhg;
1445 sio_name = sio_name_W83627DHG;
1446 break;
1447 default:
1448 if (val != 0xffff)
1449 pr_debug(DRVNAME ": unsupported chip ID: 0x%04x\n",
1450 val);
1451 superio_exit(sioaddr);
1452 return -ENODEV;
1453 }
1454
1455 /* We have a known chip, find the HWM I/O address */
1456 superio_select(sioaddr, W83627EHF_LD_HWM);
1457 val = (superio_inb(sioaddr, SIO_REG_ADDR) << 8)
1458 | superio_inb(sioaddr, SIO_REG_ADDR + 1);
1459 *addr = val & IOREGION_ALIGNMENT;
1460 if (*addr == 0) {
1461 printk(KERN_ERR DRVNAME ": Refusing to enable a Super-I/O "
1462 "device with a base I/O port 0.\n");
1463 superio_exit(sioaddr);
1464 return -ENODEV;
1465 }
1466
1467 /* Activate logical device if needed */
1468 val = superio_inb(sioaddr, SIO_REG_ENABLE);
1469 if (!(val & 0x01)) {
1470 printk(KERN_WARNING DRVNAME ": Forcibly enabling Super-I/O. "
1471 "Sensor is probably unusable.\n");
1472 superio_outb(sioaddr, SIO_REG_ENABLE, val | 0x01);
1473 }
1474
1475 superio_exit(sioaddr);
1476 pr_info(DRVNAME ": Found %s chip at %#x\n", sio_name, *addr);
1477 sio_data->sioreg = sioaddr;
1478
1479 return 0;
1480 }
1481
1482 /* when Super-I/O functions move to a separate file, the Super-I/O
1483 * bus will manage the lifetime of the device and this module will only keep
1484 * track of the w83627ehf driver. But since we platform_device_alloc(), we
1485 * must keep track of the device */
1486 static struct platform_device *pdev;
1487
1488 static int __init sensors_w83627ehf_init(void)
1489 {
1490 int err;
1491 unsigned short address;
1492 struct resource res;
1493 struct w83627ehf_sio_data sio_data;
1494
1495 /* initialize sio_data->kind and sio_data->sioreg.
1496 *
1497 * when Super-I/O functions move to a separate file, the Super-I/O
1498 * driver will probe 0x2e and 0x4e and auto-detect the presence of a
1499 * w83627ehf hardware monitor, and call probe() */
1500 if (w83627ehf_find(0x2e, &address, &sio_data) &&
1501 w83627ehf_find(0x4e, &address, &sio_data))
1502 return -ENODEV;
1503
1504 err = platform_driver_register(&w83627ehf_driver);
1505 if (err)
1506 goto exit;
1507
1508 if (!(pdev = platform_device_alloc(DRVNAME, address))) {
1509 err = -ENOMEM;
1510 printk(KERN_ERR DRVNAME ": Device allocation failed\n");
1511 goto exit_unregister;
1512 }
1513
1514 err = platform_device_add_data(pdev, &sio_data,
1515 sizeof(struct w83627ehf_sio_data));
1516 if (err) {
1517 printk(KERN_ERR DRVNAME ": Platform data allocation failed\n");
1518 goto exit_device_put;
1519 }
1520
1521 memset(&res, 0, sizeof(res));
1522 res.name = DRVNAME;
1523 res.start = address + IOREGION_OFFSET;
1524 res.end = address + IOREGION_OFFSET + IOREGION_LENGTH - 1;
1525 res.flags = IORESOURCE_IO;
1526 err = platform_device_add_resources(pdev, &res, 1);
1527 if (err) {
1528 printk(KERN_ERR DRVNAME ": Device resource addition failed "
1529 "(%d)\n", err);
1530 goto exit_device_put;
1531 }
1532
1533 /* platform_device_add calls probe() */
1534 err = platform_device_add(pdev);
1535 if (err) {
1536 printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n",
1537 err);
1538 goto exit_device_put;
1539 }
1540
1541 return 0;
1542
1543 exit_device_put:
1544 platform_device_put(pdev);
1545 exit_unregister:
1546 platform_driver_unregister(&w83627ehf_driver);
1547 exit:
1548 return err;
1549 }
1550
1551 static void __exit sensors_w83627ehf_exit(void)
1552 {
1553 platform_device_unregister(pdev);
1554 platform_driver_unregister(&w83627ehf_driver);
1555 }
1556
1557 MODULE_AUTHOR("Jean Delvare <khali@linux-fr.org>");
1558 MODULE_DESCRIPTION("W83627EHF driver");
1559 MODULE_LICENSE("GPL");
1560
1561 module_init(sensors_w83627ehf_init);
1562 module_exit(sensors_w83627ehf_exit);
USB Experimental Work