9815 Want basic AHCI enclosure services
[unleashed.git] / usr / src / uts / sun4u / opl / sys / drmach.h
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1 /*
2 * CDDL HEADER START
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
19 * CDDL HEADER END
22 * Copyright 2008 Sun Microsystems, Inc. All rights reserved.
23 * Use is subject to license terms.
26 #ifndef _SYS_DRMACH_H_
27 #define _SYS_DRMACH_H_
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
33 #ifndef _ASM
34 #include <sys/types.h>
35 #include <sys/memlist.h>
36 #include <sys/processor.h>
37 #include <sys/cpuvar.h>
38 #include <sys/sbd_ioctl.h>
39 #include <sys/sysevent.h>
40 #include <sys/ddi.h>
41 #include <sys/sunddi.h>
42 #include <sys/sunndi.h>
43 #include <sys/ddi_impldefs.h>
44 #include <sys/pte.h>
45 #include <sys/opl.h>
46 #endif
49 #define MAX_BOARDS plat_max_boards()
50 #define MAX_CPU_UNITS_PER_BOARD plat_max_cpu_units_per_board()
51 #define MAX_MEM_UNITS_PER_BOARD plat_max_mem_units_per_board()
52 #define MAX_IO_UNITS_PER_BOARD plat_max_io_units_per_board()
53 #define MAX_CMP_UNITS_PER_BOARD plat_max_cmp_units_per_board()
55 * DR uses MAX_CORES_PER_CMP as number of virtual CPU within a CMP
57 #define MAX_CORES_PER_CMP OPL_MAX_CPU_PER_CMP
60 /* returned with drmach_board_find_devices callback */
61 #define DRMACH_DEVTYPE_CPU "cpu"
62 #define DRMACH_DEVTYPE_MEM "memory"
63 #define DRMACH_DEVTYPE_PCI "pci"
65 #define FMEM_LOOP_START 1
66 #define FMEM_LOOP_COPY_READY 2
67 #define FMEM_LOOP_COPY_DONE 3
68 #define FMEM_LOOP_FMEM_READY 4
69 #define FMEM_LOOP_RENAME_DONE 5
70 #define FMEM_LOOP_DONE 6
71 #define FMEM_LOOP_EXIT 7
73 #define SCF_CMD_BUSY 0x8000
74 #define SCF_STATUS_READY 0x8000
75 #define SCF_STATUS_SHUTDOWN 0x4000
76 #define SCF_STATUS_POFF 0x2000
77 #define SCF_STATUS_EVENT 0x1000
78 #define SCF_STATUS_TIMER_ADJUST 0x0800
79 #define SCF_STATUS_ALIVE 0x0400
80 #define SCF_STATUS_MODE_CHANGED 0x0200
81 #define SCF_STATUS_CMD_U_PARITY 0x0100
82 #define SCF_STATUS_CMD_RTN_CODE 0x00f0
83 #define SCF_STATUS_MODE_SWITCH 0x000c
84 #define SCF_STATUS_CMD_COMPLETE 0x0002
85 #define SCF_STATUS_CMD_L_PARITY 0x0001
86 #define SCF_STATUS_EX_ONLINE 0x20000000
88 #define SCF_RETRY_CNT 15
91 * dynamic memory blocks cannot be added back to phys_install
92 * safely if the alignment is smaller than the largest
93 * physical page size the OS supports. The VM subsystem
94 * will try to coalesce smaller pages together and
95 * it assumes that the page structures are contiguous.
96 * That assumption does not hold so we have to work around it.
97 * On OPL, the largest page size is 256MB so we can just
98 * add such memory block back. For everything else,
99 * we round them up to 4MB boundaries and make sure
100 * they are disjoint from phys_install.
103 #define MH_MPSS_ALIGNMENT (256 * 1024 * 1024)
104 #define MH_MIN_ALIGNMENT (4 * 1024 * 1024)
105 #define rounddown(x, y) ((x) & ~(y - 1))
107 #define SCF_SB_INFO_OFFSET 0x80020
108 #define SCF_SB_INFO_BUSY 0x40
110 #ifndef _ASM
113 * OPL platform specific routines currently only defined
114 * in opl.c and referenced by DR.
117 typedef void *drmachid_t;
120 * There are several requirements to do copy rename:
121 * 1 There should be no subroutine calls/TLBmiss
122 * once the copying has begun.
123 * 2 There should be no external memory access by the CPU
124 * during the memory rename programming.
126 * All data and instruction pages used in the copy rename
127 * procedure are kept in locked pages to satisfy 1 and 2.
128 * However that is not enough. To satisfy 2, we must keep
129 * all the data and instructions in the 2 assembly routines
130 * drmach_fmem_loop_script and drmach_fmem_exec_script
131 * in the same contiguous page. They are packed into
132 * the 2nd 8K page of the buffer as shown in the diagram
133 * below.
135 * Note that it is important to keep the "critical"
136 * data in one 8K page to avoid any cache line
137 * contention. The assembly routines read all the
138 * critical data into the cache so that there is no
139 * external memory access during FMEM operation.
141 * layout of the FMEM buffers:
142 * They are all locked in TLB and the critical data
143 * used in drmach_fmem_xxx assembly code are all
144 * packed in the second page.
146 * 1st 8k page
147 * +--------------------------------+
148 * |drmach_copy_rename_program_t |
149 * +--------------------------------+
150 * |drmach_copy_rename_data_t |
151 * | |
152 * +--------------------------------+
154 * 2nd 8k page
155 * +--------------------------------+
156 * |drmach_copy_rename_critical_t |
157 * | |
158 * +--------------------------------+
159 * |run (drmach_copy_rename_prog__relocatable)
160 * |(roundup boundary to 1K) |
161 * +--------------------------------+
162 * | fmem_script |
163 * |(roundup boundary to 1K) |
164 * +--------------------------------+
165 * |loop_script |
166 * | |
167 * +--------------------------------+
168 * |at least 1K NOP/0's |
169 * | |
170 * +--------------------------------+
172 * 3rd 8k page
173 * +--------------------------------+
174 * |memlist_buffer (free_mlist) |
175 * | |
176 * +--------------------------------+
178 * 4th 8k page - drmach_cr_stat_t.
182 typedef struct {
183 int16_t scf_command;
184 int8_t scf_rsv1[2];
185 int16_t scf_status;
186 int8_t scf_rsv2[2];
187 int8_t scf_version;
188 int8_t scf_rsv3[3];
189 int8_t scf_rsv4[4];
190 uint8_t scf_tdata[16];
191 uint8_t scf_rdata[16];
192 int8_t scf_rsv5[36];
193 int32_t scf_status_ex;
194 } drmach_scf_regs_t;
197 typedef struct {
198 volatile uint_t stat;
199 volatile uint_t error;
200 int op;
201 #define OPL_FMEM_SCF_START 0x1
202 #define OPL_FMEM_MC_SUSPEND 0x2
203 } drmach_fmem_mbox_t;
205 typedef struct {
206 uint64_t scf_reg_base;
207 uint8_t scf_td[16];
208 uint64_t save_log[8];
209 uint64_t save_local[8];
210 uint64_t pstate;
211 uint64_t delay;
212 int (*run)(void *arg, int cpuid);
213 int (*fmem)(void *arg, size_t sz);
214 int (*loop)(void *arg1, size_t sz, void *arg2);
215 void (*loop_rtn)(void *arg);
216 uint64_t inst_loop_ret;
217 int fmem_issued;
218 volatile uchar_t stat[NCPU];
219 } drmach_copy_rename_critical_t;
221 typedef struct {
222 uint64_t s_copybasepa;
223 uint64_t t_copybasepa;
224 drmachid_t s_mem;
225 drmachid_t t_mem;
226 cpuset_t cpu_ready_set;
227 cpuset_t cpu_slave_set;
228 cpuset_t cpu_copy_set;
229 processorid_t cpuid;
230 drmach_fmem_mbox_t fmem_status;
231 volatile ushort_t error[NCPU];
232 struct memlist *c_ml;
233 struct memlist *cpu_ml[NCPU];
234 void (*mc_resume)(void);
235 int (*scf_fmem_end)(void);
236 int (*scf_fmem_cancel)(void);
237 uint64_t (*scf_get_base_addr)(void);
238 uint64_t copy_delay;
239 uint64_t stick_freq;
240 uint64_t copy_wait_time;
241 processorid_t slowest_cpuid;
242 int copy_rename_count;
243 } drmach_copy_rename_data_t;
245 typedef struct {
246 uint64_t nbytes[NCPU];
247 } drmach_cr_stat_t;
249 typedef struct drmach_copy_rename_program {
250 drmach_copy_rename_critical_t *critical;
251 struct drmach_copy_rename_program *locked_prog;
252 struct drmach_copy_rename_program *prog;
253 drmach_copy_rename_data_t *data;
254 caddr_t memlist_buffer;
255 struct memlist *free_mlist;
256 drmach_cr_stat_t *stat;
257 } drmach_copy_rename_program_t;
259 #define DRMACH_FMEM_LOCKED_PAGES 4
260 #define DRMACH_FMEM_DATA_PAGE 0
261 #define DRMACH_FMEM_CRITICAL_PAGE 1
262 #define DRMACH_FMEM_MLIST_PAGE 2
263 #define DRMACH_FMEM_STAT_PAGE 3
265 typedef struct {
266 boolean_t assigned;
267 boolean_t powered;
268 boolean_t configured;
269 boolean_t busy;
270 boolean_t empty;
271 sbd_cond_t cond;
272 char type[MAXNAMELEN];
273 char info[MAXPATHLEN]; /* TODO: what size? */
274 } drmach_status_t;
276 typedef struct {
277 int size;
278 char *copts;
279 } drmach_opts_t;
281 typedef struct {
282 uint64_t mi_basepa;
283 uint64_t mi_size;
284 uint64_t mi_slice_size;
285 uint64_t mi_alignment_mask;
286 } drmach_mem_info_t;
288 extern sbd_error_t *drmach_mem_get_info(drmachid_t, drmach_mem_info_t *);
289 extern int drmach_board_is_floating(drmachid_t);
291 extern sbd_error_t *drmach_copy_rename_init(
292 drmachid_t dst_id,
293 drmachid_t src_id, struct memlist *src_copy_ml,
294 drmachid_t *pgm_id);
295 extern sbd_error_t *drmach_copy_rename_fini(drmachid_t id);
296 extern void drmach_copy_rename(drmachid_t id);
298 extern sbd_error_t *drmach_pre_op(int cmd, drmachid_t id,
299 drmach_opts_t *opts);
300 extern sbd_error_t *drmach_post_op(int cmd, drmachid_t id,
301 drmach_opts_t *opts);
303 extern sbd_error_t *drmach_board_assign(int bnum, drmachid_t *id);
304 extern sbd_error_t *drmach_board_connect(drmachid_t id,
305 drmach_opts_t *opts);
306 extern sbd_error_t *drmach_board_deprobe(drmachid_t id);
307 extern sbd_error_t *drmach_board_disconnect(drmachid_t id,
308 drmach_opts_t *opts);
309 extern sbd_error_t *drmach_board_find_devices(drmachid_t id, void *a,
310 sbd_error_t *(*found)(void *a, const char *, int, drmachid_t));
311 extern int drmach_board_lookup(int bnum, drmachid_t *id);
312 extern sbd_error_t *drmach_passthru(drmachid_t id,
313 drmach_opts_t *opts);
315 extern sbd_error_t *drmach_board_name(int bnum, char *buf, int buflen);
317 extern sbd_error_t *drmach_board_poweroff(drmachid_t id);
318 extern sbd_error_t *drmach_board_poweron(drmachid_t id);
319 extern sbd_error_t *drmach_board_test(drmachid_t id, drmach_opts_t *opts,
320 int force);
322 extern sbd_error_t *drmach_board_unassign(drmachid_t id);
324 extern sbd_error_t *drmach_configure(drmachid_t id, int flags);
326 extern sbd_error_t *drmach_cpu_disconnect(drmachid_t id);
327 extern sbd_error_t *drmach_cpu_get_id(drmachid_t id, processorid_t *cpuid);
328 extern sbd_error_t *drmach_cpu_get_impl(drmachid_t id, int *ip);
329 extern void drmach_cpu_flush_ecache_sync(void);
331 extern sbd_error_t *drmach_get_dip(drmachid_t id, dev_info_t **dip);
333 extern sbd_error_t *drmach_io_is_attached(drmachid_t id, int *yes);
334 extern sbd_error_t *drmach_io_post_attach(drmachid_t id);
335 extern sbd_error_t *drmach_io_post_release(drmachid_t id);
336 extern sbd_error_t *drmach_io_pre_release(drmachid_t id);
337 extern sbd_error_t *drmach_io_unrelease(drmachid_t id);
339 extern sbd_error_t *drmach_mem_add_span(drmachid_t id,
340 uint64_t basepa, uint64_t size);
341 extern sbd_error_t *drmach_mem_del_span(drmachid_t id,
342 uint64_t basepa, uint64_t size);
343 extern sbd_error_t *drmach_mem_disable(drmachid_t id);
344 extern sbd_error_t *drmach_mem_enable(drmachid_t id);
345 extern sbd_error_t *drmach_mem_get_base_physaddr(drmachid_t id,
346 uint64_t *pa);
347 extern sbd_error_t *drmach_mem_get_memlist(drmachid_t id,
348 struct memlist **ml);
349 extern sbd_error_t *drmach_mem_get_slice_size(drmachid_t, uint64_t *);
351 extern sbd_error_t *drmach_release(drmachid_t id);
352 extern sbd_error_t *drmach_status(drmachid_t id, drmach_status_t *stat);
353 extern sbd_error_t *drmach_unconfigure(drmachid_t id, int flags);
354 extern int drmach_log_sysevent(int board, char *hint, int flag,
355 int verbose);
357 extern int drmach_verify_sr(dev_info_t *dip, int sflag);
358 extern void drmach_suspend_last();
359 extern void drmach_resume_first();
361 #endif
363 #ifdef __cplusplus
365 #endif
367 #endif /* _SYS_DRMACH_H_ */