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PSARC 2009/639 audio_engine_playahead/qlen
[unleashed.git] / usr / src / uts / common / io / audio / drv / audiovia97 / audiovia97.c
blob814d4bbd18d934c53faef48bb5ee6227a4f50530
1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
21
22 /*
23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
25 */
26
27 /*
28 * Purpose: Driver for the VIA VT82C686A AC97 audio controller
29 */
30 /*
31 *
32 * Copyright (C) 4Front Technologies 1996-2009.
33 */
34
35 #include <sys/types.h>
36 #include <sys/modctl.h>
37 #include <sys/kmem.h>
38 #include <sys/conf.h>
39 #include <sys/ddi.h>
40 #include <sys/sunddi.h>
41 #include <sys/pci.h>
42 #include <sys/note.h>
43 #include <sys/audio/audio_driver.h>
44 #include <sys/audio/ac97.h>
45
46 #include "audiovia97.h"
47
48 static struct ddi_device_acc_attr dev_attr = {
49 DDI_DEVICE_ATTR_V0,
50 DDI_STRUCTURE_LE_ACC,
51 DDI_STRICTORDER_ACC
52 };
53
54 static struct ddi_device_acc_attr buf_attr = {
55 DDI_DEVICE_ATTR_V0,
56 DDI_NEVERSWAP_ACC,
57 DDI_STRICTORDER_ACC
58 };
59
60 static ddi_dma_attr_t dma_attr_sgd = {
61 DMA_ATTR_V0, /* version number */
62 0x00000000, /* low DMA address range */
63 0xffffffff, /* high DMA address range */
64 0x0000ffff, /* DMA counter register */
65 8, /* DMA address alignment */
66 0x3c, /* DMA burstsizes */
67 8, /* min effective DMA size */
68 0xffffffff, /* max DMA xfer size */
69 0x00000fff, /* segment boundary */
70 1, /* s/g length */
71 8, /* granularity of device */
72 0 /* Bus specific DMA flags */
73 };
74
75 static ddi_dma_attr_t dma_attr_buf = {
76 DMA_ATTR_V0, /* version number */
77 0x00000000, /* low DMA address range */
78 0xffffffff, /* high DMA address range */
79 0xfffffffe, /* DMA counter register */
80 4, /* DMA address alignment */
81 0x3c, /* DMA burstsizes */
82 4, /* min effective DMA size */
83 0xffffffff, /* max DMA xfer size */
84 0xffffffff, /* segment boundary */
85 1, /* s/g length */
86 4, /* granularity of device */
87 0 /* Bus specific DMA flags */
88 };
89
90 static int via97_attach(dev_info_t *);
91 static int via97_resume(dev_info_t *);
92 static int via97_detach(via97_devc_t *);
93 static int via97_suspend(via97_devc_t *);
94
95 static int via97_open(void *, int, unsigned *, unsigned *, caddr_t *);
96 static void via97_close(void *);
97 static int via97_start(void *);
98 static void via97_stop(void *);
99 static int via97_format(void *);
100 static int via97_channels(void *);
101 static int via97_rate(void *);
102 static uint64_t via97_count(void *);
103 static void via97_sync(void *, unsigned);
104
105 static uint16_t via97_read_ac97(void *, uint8_t);
106 static void via97_write_ac97(void *, uint8_t, uint16_t);
107 static int via97_alloc_port(via97_devc_t *, int);
108 static void via97_start_port(via97_portc_t *);
109 static void via97_stop_port(via97_portc_t *);
110 static void via97_update_port(via97_portc_t *);
111 static void via97_reset_port(via97_portc_t *);
112 static void via97_destroy(via97_devc_t *);
113 static int via97_setup_intrs(via97_devc_t *);
114 static void via97_hwinit(via97_devc_t *);
115 static uint_t via97_intr(caddr_t, caddr_t);
116
117 static audio_engine_ops_t via97_engine_ops = {
118 AUDIO_ENGINE_VERSION,
119 via97_open,
120 via97_close,
121 via97_start,
122 via97_stop,
123 via97_count,
124 via97_format,
125 via97_channels,
126 via97_rate,
127 via97_sync,
128 NULL,
129 NULL,
130 NULL
131 };
132
133 static uint16_t
134 via97_read_ac97(void *arg, uint8_t index)
135 {
136 via97_devc_t *devc = arg;
137 int tmp, addr, i;
138
139 /* Index has only 7 bits */
140 if (index > 0x7F)
141 return (0xffff);
142
143 mutex_enter(&devc->low_mutex);
144 addr = (index << 16) + CODEC_RD;
145 OUTL(devc, devc->base + AC97CODEC, addr);
146 drv_usecwait(100);
147
148 /* Check AC CODEC access time out */
149 for (i = 0; i < CODEC_TIMEOUT_COUNT; i++) {
150 /* if send command over, break */
151 if (INL(devc, devc->base + AC97CODEC) & STA_VALID)
152 break;
153 drv_usecwait(50);
154 }
155 if (i == CODEC_TIMEOUT_COUNT) {
156 mutex_exit(&devc->low_mutex);
157 return (0xffff);
158 }
159
160 /* Check if Index still ours? If yes, return data, else return FAIL */
161 tmp = INL(devc, devc->base + AC97CODEC);
162 OUTB(devc, devc->base + AC97CODEC + 3, 0x02);
163 if (((tmp & CODEC_INDEX) >> 16) == index) {
164 mutex_exit(&devc->low_mutex);
165 return ((int)tmp & CODEC_DATA);
166 }
167 mutex_exit(&devc->low_mutex);
168 return (0xffff);
169 }
170
171 static void
172 via97_write_ac97(void *arg, uint8_t index, uint16_t data)
173 {
174 via97_devc_t *devc = arg;
175 int value = 0;
176 unsigned int i = 0;
177
178 mutex_enter(&devc->low_mutex);
179 value = (index << 16) + data;
180 OUTL(devc, devc->base + AC97CODEC, value);
181 drv_usecwait(100);
182
183 /* Check AC CODEC access time out */
184 for (i = 0; i < CODEC_TIMEOUT_COUNT; i++) {
185 /* if send command over, break */
186 if (!(INL(devc, devc->base + AC97CODEC) & IN_CMD))
187 break;
188 drv_usecwait(50);
189 }
190 mutex_exit(&devc->low_mutex);
191 }
192
193 static uint_t
194 via97_recintr(via97_devc_t *devc)
195 {
196 int status;
197
198 status = INB(devc, devc->base + 0x10);
199
200 if (!(status & 0x01)) /* No interrupt */
201 return (B_FALSE);
202
203 audio_engine_produce(devc->portc[VIA97_REC_SGD_NUM]->engine);
204
205 OUTB(devc, devc->base + 0x10, status | 0x01); /* Ack */
206 return (B_TRUE);
207 }
208
209 static uint_t
210 via97_playintr(via97_devc_t *devc)
211 {
212 int status;
213
214 status = INB(devc, devc->base + 0x00);
215
216 if (!(status & 0x01)) /* No interrupt */
217 return (B_FALSE);
218
219 audio_engine_consume(devc->portc[VIA97_PLAY_SGD_NUM]->engine);
220
221 OUTB(devc, devc->base + 0x00, status | 0x01); /* Ack */
222 return (B_TRUE);
223 }
224
225 static uint_t
226 via97_intr(caddr_t argp, caddr_t nocare)
227 {
228 via97_devc_t *devc = (void *)argp;
229
230 _NOTE(ARGUNUSED(nocare));
231
232 if (devc->suspended) {
233 return (DDI_INTR_UNCLAIMED);
234 }
235
236 if (!via97_recintr(devc) && !via97_playintr(devc)) {
237 return (DDI_INTR_UNCLAIMED);
238 }
239
240 if (devc->ksp) {
241 VIA97_KIOP(devc)->intrs[KSTAT_INTR_HARD]++;
242 }
243
244 return (DDI_INTR_CLAIMED);
245 }
246
247 /*
248 * Audio routines
249 */
250
251 int
252 via97_open(void *arg, int flag,
253 unsigned *fragfrp, unsigned *nfragsp, caddr_t *bufp)
254 {
255 via97_portc_t *portc = arg;
256 via97_devc_t *devc = portc->devc;
257
258 _NOTE(ARGUNUSED(flag));
259
260 portc->started = B_FALSE;
261 portc->count = 0;
262 *fragfrp = portc->fragfr;
263 *nfragsp = VIA97_NUM_SGD;
264 *bufp = portc->buf_kaddr;
265
266 mutex_enter(&devc->mutex);
267 via97_reset_port(portc);
268 mutex_exit(&devc->mutex);
269
270 return (0);
271 }
272
273 void
274 via97_close(void *arg)
275 {
276 via97_portc_t *portc = arg;
277 via97_devc_t *devc = portc->devc;
278
279 mutex_enter(&devc->mutex);
280 via97_stop_port(portc);
281 portc->started = B_FALSE;
282 mutex_exit(&devc->mutex);
283 }
284
285 int
286 via97_start(void *arg)
287 {
288 via97_portc_t *portc = arg;
289 via97_devc_t *devc = portc->devc;
290
291 mutex_enter(&devc->mutex);
292 if (!portc->started) {
293 via97_start_port(portc);
294 portc->started = B_TRUE;
295 }
296 mutex_exit(&devc->mutex);
297 return (0);
298 }
299
300 void
301 via97_stop(void *arg)
302 {
303 via97_portc_t *portc = arg;
304 via97_devc_t *devc = portc->devc;
305
306 mutex_enter(&devc->mutex);
307 if (portc->started) {
308 via97_stop_port(portc);
309 portc->started = B_FALSE;
310 }
311 mutex_exit(&devc->mutex);
312 }
313
314 int
315 via97_format(void *arg)
316 {
317 _NOTE(ARGUNUSED(arg));
318
319 return (AUDIO_FORMAT_S16_LE);
320 }
321
322 int
323 via97_channels(void *arg)
324 {
325 _NOTE(ARGUNUSED(arg));
326
327 return (2);
328 }
329
330 int
331 via97_rate(void *arg)
332 {
333 _NOTE(ARGUNUSED(arg));
334
335 return (48000);
336 }
337
338 void
339 via97_sync(void *arg, unsigned nframes)
340 {
341 via97_portc_t *portc = arg;
342 _NOTE(ARGUNUSED(nframes));
343
344 (void) ddi_dma_sync(portc->buf_dmah, 0, 0, portc->syncdir);
345 }
346
347 uint64_t
348 via97_count(void *arg)
349 {
350 via97_portc_t *portc = arg;
351 via97_devc_t *devc = portc->devc;
352 uint64_t val;
353
354 mutex_enter(&devc->mutex);
355 via97_update_port(portc);
356 /*
357 * The residual is in bytes. We have to convert to frames,
358 * and then subtract it from the fragment size to get the
359 * number of frames processed. Note that we have 16 bit
360 * stereo frames.
361 */
362 val = portc->count +
363 (portc->fragfr - (portc->resid / (2 * 2)));
364 mutex_exit(&devc->mutex);
365
366 return (val);
367 }
368
369
370 /* private implementation bits */
371
372 void
373 via97_start_port(via97_portc_t *portc)
374 {
375 via97_devc_t *devc = portc->devc;
376
377 ASSERT(mutex_owned(&devc->mutex));
378
379 if (devc->suspended)
380 return;
381 OUTB(devc, portc->base + 0x01, 0x80); /* Start */
382 }
383
384 void
385 via97_stop_port(via97_portc_t *portc)
386 {
387 via97_devc_t *devc = portc->devc;
388
389 if (devc->suspended)
390 return;
391
392 OUTB(devc, portc->base + 0x01, 0x40); /* Stop */
393 }
394
395 void
396 via97_update_port(via97_portc_t *portc)
397 {
398 /*
399 * Unfortunately the controller seems to raise interrupt about 32 bytes before
400 * the DMA pointer moves to a new fragment. This means that the bytes value
401 * returned will be bogus during few samples before
402 * the pointer wraps back to the beginning of buffer.
403 */
404 via97_devc_t *devc = portc->devc;
405 uint32_t frag, resid;
406 uint32_t n;
407
408 ASSERT(mutex_owned(&devc->mutex));
409 if (devc->suspended) {
410 portc->cur_frag = 0;
411 portc->resid = portc->fragsz;
412 n = 0;
413 } else {
414 resid = INL(devc, portc->base + 0x0c) & 0xffffff;
415 resid = portc->fragsz - resid;
416
417 frag =
418 ((INL(devc, portc->base + 0x04) - portc->sgd_paddr) / 8) -
419 1;
420
421 portc->resid = resid;
422
423 if (frag >= portc->cur_frag) {
424 n = frag - portc->cur_frag;
425 } else {
426 n = frag + VIA97_NUM_SGD - portc->cur_frag;
427 }
428 portc->count += (n * portc->fragfr);
429 portc->cur_frag = frag;
430 }
431 }
432
433 void
434 via97_reset_port(via97_portc_t *portc)
435 {
436 via97_devc_t *devc = portc->devc;
437
438 portc->cur_frag = 0;
439 portc->resid = portc->fragsz;
440
441 if (devc->suspended)
442 return;
443
444 OUTB(devc, portc->base + 0x01, 0x40); /* Stop */
445 OUTL(devc, portc->base + 4, portc->sgd_paddr);
446 /* Set autostart at EOL, interrupt on FLAG, stereo, 16 bits */
447 OUTB(devc, portc->base + 0x02,
448 0x81 | /* Set autostart at EOL, interrupt on FLAG */
449 0x20 | /* 16 bits */
450 0x10); /* Stereo */
451 }
452
453 int
454 via97_alloc_port(via97_devc_t *devc, int num)
455 {
456 via97_portc_t *portc;
457 size_t len;
458 ddi_dma_cookie_t cookie;
459 uint_t count;
460 int dir;
461 char *prop;
462 unsigned caps;
463 audio_dev_t *adev;
464 uint32_t *desc;
465 uint32_t paddr;
466
467 adev = devc->adev;
468 portc = kmem_zalloc(sizeof (*portc), KM_SLEEP);
469 devc->portc[num] = portc;
470 portc->devc = devc;
471 portc->started = B_FALSE;
472 portc->base = devc->base + num * 0x10;
473
474 switch (num) {
475 case VIA97_REC_SGD_NUM:
476 prop = "record-interrupts";
477 portc->syncdir = DDI_DMA_SYNC_FORKERNEL;
478 caps = ENGINE_INPUT_CAP;
479 dir = DDI_DMA_READ;
480 break;
481 case VIA97_PLAY_SGD_NUM:
482 prop = "play-interrupts";
483 portc->syncdir = DDI_DMA_SYNC_FORDEV;
484 caps = ENGINE_OUTPUT_CAP;
485 dir = DDI_DMA_WRITE;
486 break;
487 default:
488 return (DDI_FAILURE);
489 }
490
491 /* figure out fragment configuration */
492 portc->intrs = ddi_prop_get_int(DDI_DEV_T_ANY, devc->dip,
493 DDI_PROP_DONTPASS, prop, VIA97_INTRS);
494
495 /* make sure the values are good */
496 if (portc->intrs < VIA97_MIN_INTRS) {
497 audio_dev_warn(adev, "%s too low, %d, reset to %d",
498 prop, portc->intrs, VIA97_INTRS);
499 portc->intrs = VIA97_INTRS;
500 } else if (portc->intrs > VIA97_MAX_INTRS) {
501 audio_dev_warn(adev, "%s too high, %d, reset to %d",
502 prop, portc->intrs, VIA97_INTRS);
503 portc->intrs = VIA97_INTRS;
504 }
505
506 portc->fragfr = 48000 / portc->intrs;
507 portc->fragsz = portc->fragfr * 2 * 2; /* 16 bit stereo frames */
508 portc->buf_size = portc->fragsz * VIA97_NUM_SGD;
509
510 /* first allocate up space for SGD list */
511 if (ddi_dma_alloc_handle(devc->dip, &dma_attr_sgd,
512 DDI_DMA_SLEEP, NULL, &portc->sgd_dmah) != DDI_SUCCESS) {
513 audio_dev_warn(adev, "failed to allocate SGD handle");
514 return (DDI_FAILURE);
515 }
516
517 if (ddi_dma_mem_alloc(portc->sgd_dmah,
518 VIA97_NUM_SGD * 2 *sizeof (uint32_t), &dev_attr,
519 DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL, &portc->sgd_kaddr,
520 &len, &portc->sgd_acch) != DDI_SUCCESS) {
521 audio_dev_warn(adev, "failed to allocate SGD memory");
522 return (DDI_FAILURE);
523 }
524
525 if (ddi_dma_addr_bind_handle(portc->sgd_dmah, NULL,
526 portc->sgd_kaddr, len, DDI_DMA_CONSISTENT | DDI_DMA_WRITE,
527 DDI_DMA_SLEEP, NULL, &cookie, &count) != DDI_SUCCESS) {
528 audio_dev_warn(adev, "failed binding SGD DMA handle");
529 return (DDI_FAILURE);
530 }
531 portc->sgd_paddr = cookie.dmac_address;
532
533 /* now buffers */
534 if (ddi_dma_alloc_handle(devc->dip, &dma_attr_buf, DDI_DMA_SLEEP, NULL,
535 &portc->buf_dmah) != DDI_SUCCESS) {
536 audio_dev_warn(adev, "failed to allocate BUF handle");
537 return (DDI_FAILURE);
538 }
539
540 if (ddi_dma_mem_alloc(portc->buf_dmah, portc->buf_size,
541 &buf_attr, DDI_DMA_CONSISTENT, DDI_DMA_SLEEP, NULL,
542 &portc->buf_kaddr, &len, &portc->buf_acch) != DDI_SUCCESS) {
543 audio_dev_warn(adev, "failed to allocate BUF memory");
544 return (DDI_FAILURE);
545 }
546
547 if (ddi_dma_addr_bind_handle(portc->buf_dmah, NULL, portc->buf_kaddr,
548 len, DDI_DMA_CONSISTENT | dir, DDI_DMA_SLEEP, NULL, &cookie,
549 &count) != DDI_SUCCESS) {
550 audio_dev_warn(adev, "failed binding BUF DMA handle");
551 return (DDI_FAILURE);
552 }
553 portc->buf_paddr = cookie.dmac_address;
554
555 /* now wire descriptors up */
556 desc = (void *)portc->sgd_kaddr;
557 paddr = portc->buf_paddr;
558 for (int i = 0; i < VIA97_NUM_SGD; i++) {
559 uint32_t flags;
560
561 flags = 0x40000000 | portc->fragsz;
562
563 if (i == (VIA97_NUM_SGD - 1)) {
564 flags |= 0x80000000; /* EOL */
565 }
566
567 ddi_put32(portc->sgd_acch, desc++, paddr);
568 ddi_put32(portc->sgd_acch, desc++, flags);
569 paddr += portc->fragsz;
570 }
571
572 OUTL(devc, portc->base + 4, portc->sgd_paddr);
573 (void) ddi_dma_sync(portc->sgd_dmah, 0, 0, DDI_DMA_SYNC_FORDEV);
574
575 portc->engine = audio_engine_alloc(&via97_engine_ops, caps);
576 if (portc->engine == NULL) {
577 audio_dev_warn(adev, "audio_engine_alloc failed");
578 return (DDI_FAILURE);
579 }
580
581 audio_engine_set_private(portc->engine, portc);
582 audio_dev_add_engine(adev, portc->engine);
583
584 return (DDI_SUCCESS);
585 }
586
587 int
588 via97_setup_intrs(via97_devc_t *devc)
589 {
590 uint_t ipri;
591 int actual;
592 int rv;
593 ddi_intr_handle_t ih[1];
594
595 rv = ddi_intr_alloc(devc->dip, ih, DDI_INTR_TYPE_FIXED,
596 0, 1, &actual, DDI_INTR_ALLOC_STRICT);
597 if ((rv != DDI_SUCCESS) || (actual != 1)) {
598 audio_dev_warn(devc->adev,
599 "Can't alloc interrupt handle (rv %d actual %d)",
600 rv, actual);
601 return (DDI_FAILURE);
602 }
603
604 if (ddi_intr_get_pri(ih[0], &ipri) != DDI_SUCCESS) {
605 audio_dev_warn(devc->adev, "Can't get interrupt priority");
606 (void) ddi_intr_free(ih[0]);
607 return (DDI_FAILURE);
608 }
609
610 if (ddi_intr_add_handler(ih[0], via97_intr, devc, NULL) !=
611 DDI_SUCCESS) {
612 audio_dev_warn(devc->adev, "Can't add interrupt handler");
613 (void) ddi_intr_free(ih[0]);
614 return (DDI_FAILURE);
615 }
616
617 devc->ih = ih[0];
618 mutex_init(&devc->mutex, NULL, MUTEX_DRIVER, DDI_INTR_PRI(ipri));
619 mutex_init(&devc->low_mutex, NULL, MUTEX_DRIVER, DDI_INTR_PRI(ipri));
620 return (DDI_SUCCESS);
621 }
622
623 void
624 via97_destroy(via97_devc_t *devc)
625 {
626 if (devc->ih != NULL) {
627 (void) ddi_intr_disable(devc->ih);
628 (void) ddi_intr_remove_handler(devc->ih);
629 (void) ddi_intr_free(devc->ih);
630 mutex_destroy(&devc->mutex);
631 mutex_destroy(&devc->low_mutex);
632 }
633
634 if (devc->ksp) {
635 kstat_delete(devc->ksp);
636 }
637
638 for (int i = 0; i < VIA97_NUM_PORTC; i++) {
639 via97_portc_t *portc = devc->portc[i];
640 if (!portc)
641 continue;
642 if (portc->engine) {
643 audio_dev_remove_engine(devc->adev, portc->engine);
644 audio_engine_free(portc->engine);
645 }
646 if (portc->sgd_paddr) {
647 (void) ddi_dma_unbind_handle(portc->sgd_dmah);
648 }
649 if (portc->sgd_acch) {
650 ddi_dma_mem_free(&portc->sgd_acch);
651 }
652 if (portc->sgd_dmah) {
653 ddi_dma_free_handle(&portc->sgd_dmah);
654 }
655 if (portc->buf_paddr) {
656 (void) ddi_dma_unbind_handle(portc->buf_dmah);
657 }
658 if (portc->buf_acch) {
659 ddi_dma_mem_free(&portc->buf_acch);
660 }
661 if (portc->buf_dmah) {
662 ddi_dma_free_handle(&portc->buf_dmah);
663 }
664 kmem_free(portc, sizeof (*portc));
665 }
666
667 if (devc->ac97 != NULL) {
668 ac97_free(devc->ac97);
669 }
670 if (devc->adev != NULL) {
671 audio_dev_free(devc->adev);
672 }
673 if (devc->regsh != NULL) {
674 ddi_regs_map_free(&devc->regsh);
675 }
676 if (devc->pcih != NULL) {
677 pci_config_teardown(&devc->pcih);
678 }
679 kmem_free(devc, sizeof (*devc));
680 }
681
682 void
683 via97_hwinit(via97_devc_t *devc)
684 {
685 ddi_acc_handle_t pcih = devc->pcih;
686 uint32_t tmp;
687
688 /* Enable codec, etc */
689
690 pci_config_put8(pcih, 0x41, 0xc0);
691 drv_usecwait(10);
692 tmp = pci_config_get8(pcih, 0x41);
693 pci_config_put8(pcih, 0x41, tmp | 0x0c);
694 drv_usecwait(10);
695
696 /* disable game port/MIDI */
697 pci_config_put8(pcih, 0x42, 0x00);
698 /* disable FM io */
699 pci_config_put8(pcih, 0x48, 0x00);
700
701 /* Enable interrupt on FLAG and on EOL */
702 tmp = INB(devc, devc->base + 0x22);
703 OUTB(devc, devc->base + 0x22, tmp | 0x83);
704 }
705
706 int
707 via97_attach(dev_info_t *dip)
708 {
709 uint16_t pci_command, vendor, device;
710 via97_devc_t *devc;
711 ddi_acc_handle_t pcih;
712
713 devc = kmem_zalloc(sizeof (*devc), KM_SLEEP);
714 devc->dip = dip;
715 ddi_set_driver_private(dip, devc);
716
717 if ((devc->adev = audio_dev_alloc(dip, 0)) == NULL) {
718 cmn_err(CE_WARN, "audio_dev_alloc failed");
719 goto error;
720 }
721
722 if (pci_config_setup(dip, &pcih) != DDI_SUCCESS) {
723 audio_dev_warn(devc->adev, "pci_config_setup failed");
724 goto error;
725 }
726 devc->pcih = pcih;
727
728 vendor = pci_config_get16(pcih, PCI_CONF_VENID);
729 device = pci_config_get16(pcih, PCI_CONF_DEVID);
730 if (vendor != VIA_VENDOR_ID ||
731 device != VIA_82C686) {
732 audio_dev_warn(devc->adev, "Hardware not recognized "
733 "(vendor=%x, dev=%x)", vendor, device);
734 goto error;
735 }
736
737 pci_command = pci_config_get16(pcih, PCI_CONF_COMM);
738 pci_command |= PCI_COMM_ME | PCI_COMM_IO;
739 pci_config_put16(pcih, PCI_CONF_COMM, pci_command);
740
741 if ((ddi_regs_map_setup(dip, 1, &devc->base, 0, 0, &dev_attr,
742 &devc->regsh)) != DDI_SUCCESS) {
743 audio_dev_warn(devc->adev, "failed to map registers");
744 goto error;
745 }
746
747 audio_dev_set_description(devc->adev, "VIA 82C686 Audio");
748
749 via97_hwinit(devc);
750
751 if ((via97_alloc_port(devc, VIA97_PLAY_SGD_NUM) != DDI_SUCCESS) ||
752 (via97_alloc_port(devc, VIA97_REC_SGD_NUM) != DDI_SUCCESS)) {
753 goto error;
754 }
755
756 if (via97_setup_intrs(devc) != DDI_SUCCESS) {
757 goto error;
758 }
759
760 devc->ac97 = ac97_alloc(dip, via97_read_ac97, via97_write_ac97, devc);
761 if (devc->ac97 == NULL) {
762 audio_dev_warn(devc->adev, "failed to allocate ac97 handle");
763 goto error;
764 }
765
766 if (ac97_init(devc->ac97, devc->adev) != DDI_SUCCESS) {
767 audio_dev_warn(devc->adev, "failed to init ac97");
768 goto error;
769 }
770
771 /* set up kernel statistics */
772 if ((devc->ksp = kstat_create(VIA97_NAME, ddi_get_instance(dip),
773 VIA97_NAME, "controller", KSTAT_TYPE_INTR, 1,
774 KSTAT_FLAG_PERSISTENT)) != NULL) {
775 kstat_install(devc->ksp);
776 }
777
778 if (audio_dev_register(devc->adev) != DDI_SUCCESS) {
779 audio_dev_warn(devc->adev, "unable to register with framework");
780 goto error;
781 }
782
783 (void) ddi_intr_enable(devc->ih);
784 ddi_report_dev(dip);
785
786 return (DDI_SUCCESS);
787
788 error:
789 via97_destroy(devc);
790 return (DDI_FAILURE);
791 }
792
793 int
794 via97_resume(dev_info_t *dip)
795 {
796 via97_devc_t *devc;
797
798 devc = ddi_get_driver_private(dip);
799
800 via97_hwinit(devc);
801
802 /* allow ac97 operations again */
803 ac97_resume(devc->ac97);
804
805 mutex_enter(&devc->mutex);
806 devc->suspended = B_FALSE;
807 for (int i = 0; i < VIA97_NUM_PORTC; i++) {
808
809 via97_portc_t *portc = devc->portc[i];
810
811 if (portc->engine != NULL)
812 audio_engine_reset(portc->engine);
813
814 /* reset the port */
815 via97_reset_port(portc);
816
817 if (portc->started) {
818 via97_start_port(portc);
819 } else {
820 via97_stop_port(portc);
821 }
822 }
823 mutex_exit(&devc->mutex);
824 return (DDI_SUCCESS);
825 }
826
827 int
828 via97_detach(via97_devc_t *devc)
829 {
830 if (audio_dev_unregister(devc->adev) != DDI_SUCCESS)
831 return (DDI_FAILURE);
832
833 via97_destroy(devc);
834 return (DDI_SUCCESS);
835 }
836
837 int
838 via97_suspend(via97_devc_t *devc)
839 {
840 ac97_suspend(devc->ac97);
841
842 mutex_enter(&devc->mutex);
843 for (int i = 0; i < VIA97_NUM_PORTC; i++) {
844
845 via97_portc_t *portc = devc->portc[i];
846 via97_stop_port(portc);
847 }
848 devc->suspended = B_TRUE;
849 mutex_exit(&devc->mutex);
850 return (DDI_SUCCESS);
851 }
852
853 static int via97_ddi_attach(dev_info_t *, ddi_attach_cmd_t);
854 static int via97_ddi_detach(dev_info_t *, ddi_detach_cmd_t);
855 static int via97_ddi_quiesce(dev_info_t *);
856
857 static struct dev_ops via97_dev_ops = {
858 DEVO_REV, /* rev */
859 0, /* refcnt */
860 NULL, /* getinfo */
861 nulldev, /* identify */
862 nulldev, /* probe */
863 via97_ddi_attach, /* attach */
864 via97_ddi_detach, /* detach */
865 nodev, /* reset */
866 NULL, /* cb_ops */
867 NULL, /* bus_ops */
868 NULL, /* power */
869 via97_ddi_quiesce, /* quiesce */
870 };
871
872 static struct modldrv via97_modldrv = {
873 &mod_driverops, /* drv_modops */
874 "Via 82C686 Audio", /* linkinfo */
875 &via97_dev_ops, /* dev_ops */
876 };
877
878 static struct modlinkage modlinkage = {
879 MODREV_1,
880 { &via97_modldrv, NULL }
881 };
882
883 int
884 _init(void)
885 {
886 int rv;
887
888 audio_init_ops(&via97_dev_ops, VIA97_NAME);
889 if ((rv = mod_install(&modlinkage)) != 0) {
890 audio_fini_ops(&via97_dev_ops);
891 }
892 return (rv);
893 }
894
895 int
896 _fini(void)
897 {
898 int rv;
899
900 if ((rv = mod_remove(&modlinkage)) == 0) {
901 audio_fini_ops(&via97_dev_ops);
902 }
903 return (rv);
904 }
905
906 int
907 _info(struct modinfo *modinfop)
908 {
909 return (mod_info(&modlinkage, modinfop));
910 }
911
912 int
913 via97_ddi_attach(dev_info_t *dip, ddi_attach_cmd_t cmd)
914 {
915 switch (cmd) {
916 case DDI_ATTACH:
917 return (via97_attach(dip));
918
919 case DDI_RESUME:
920 return (via97_resume(dip));
921
922 default:
923 return (DDI_FAILURE);
924 }
925 }
926
927 int
928 via97_ddi_detach(dev_info_t *dip, ddi_detach_cmd_t cmd)
929 {
930 via97_devc_t *devc;
931
932 devc = ddi_get_driver_private(dip);
933
934 switch (cmd) {
935 case DDI_DETACH:
936 return (via97_detach(devc));
937
938 case DDI_SUSPEND:
939 return (via97_suspend(devc));
940
941 default:
942 return (DDI_FAILURE);
943 }
944 }
945
946 int
947 via97_ddi_quiesce(dev_info_t *dip)
948 {
949 via97_devc_t *devc;
950
951 devc = ddi_get_driver_private(dip);
952
953 for (int i = 0; i < VIA97_NUM_PORTC; i++) {
954
955 via97_portc_t *portc = devc->portc[i];
956 via97_stop_port(portc);
957 }
958
959 /*
960 * Turn off the hardware
961 */
962 OUTB(devc, devc->base + 0x01, 0x40);
963 OUTB(devc, devc->base + 0x11, 0x40);
964 OUTB(devc, devc->base + 0x02, 0);
965 OUTB(devc, devc->base + 0x12, 0);
966 OUTL(devc, devc->base + 0x04, 0);
967 OUTL(devc, devc->base + 0x14, 0);
968 OUTL(devc, devc->base + 0x22, 0);
969 return (DDI_SUCCESS);
970 }
Unleashed OS