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[unleashed.git] / include / sys / pghw.h
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1 /*
2 * CDDL HEADER START
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
19 * CDDL HEADER END
23 * Copyright (c) 2010, Oracle and/or its affiliates. All rights reserved.
26 #ifndef _PGHW_H
27 #define _PGHW_H
29 #ifdef __cplusplus
30 extern "C" {
31 #endif
33 #if (defined(_KERNEL) || defined(_KMEMUSER))
34 #include <sys/cpuvar.h>
35 #include <sys/group.h>
36 #include <sys/processor.h>
37 #include <sys/bitmap.h>
38 #include <sys/atomic.h>
39 #include <sys/types.h>
40 #include <sys/kstat.h>
41 #include <sys/pg.h>
44 * Hardware that may be shared by a group of processors
46 typedef enum pghw_type {
47 PGHW_START,
48 PGHW_IPIPE, /* Instruction Pipeline */
49 PGHW_CACHE, /* Cache (generally last level) */
50 PGHW_FPU, /* Floating Point Unit / Pipeline */
51 PGHW_MPIPE, /* Pipe to Memory */
52 PGHW_CHIP, /* Socket */
53 PGHW_MEMORY,
54 PGHW_POW_ACTIVE, /* Active Power Management Domain */
55 PGHW_POW_IDLE, /* Idle Power Management Domain */
56 PGHW_NUM_COMPONENTS
57 } pghw_type_t;
60 * See comments in usr/src/uts/i86pc/os/cpuid.c
61 * for description of processor nodes
63 * From sharing point of view processor nodes are
64 * very similar to memory pipes, hence the #define below.
66 #define PGHW_PROCNODE PGHW_MPIPE
69 * Returns true if the hardware is a type of power management domain
71 #define PGHW_IS_PM_DOMAIN(hw) \
72 (hw == PGHW_POW_ACTIVE || hw == PGHW_POW_IDLE)
75 * Anonymous instance id
77 #define PGHW_INSTANCE_ANON ((id_t)0xdecafbad)
80 * Max length of PGHW kstat strings
82 #define PGHW_KSTAT_STR_LEN_MAX 32
86 * Platform specific handle
88 typedef uintptr_t pghw_handle_t;
91 * Representation of PG hardware utilization NOTE: All the sums listed below are
92 * the sums of running total of each item for each CPU in the PG (eg.
93 * sum(utilization) is sum of running total utilization of each CPU in PG)
95 typedef struct pghw_util {
96 uint64_t pghw_util; /* sum(utilization) */
97 uint64_t pghw_rate; /* Last observed utilization rate */
98 uint64_t pghw_rate_max; /* Max observed rate (in units/sec) */
99 hrtime_t pghw_time_stamp; /* Timestamp of last snapshot */
101 * sum(time utilization counters on)
103 hrtime_t pghw_time_running;
105 * sum(time utilization counters off)
107 hrtime_t pghw_time_stopped;
108 } pghw_util_t;
112 * Processor Group (physical sharing relationship)
114 typedef struct pghw {
115 pg_t pghw_pg; /* processor group */
116 pghw_type_t pghw_hw; /* HW sharing relationship */
117 id_t pghw_instance; /* sharing instance identifier */
118 pghw_handle_t pghw_handle; /* hw specific opaque handle */
119 kstat_t *pghw_kstat; /* physical kstats exported */
120 kstat_t *pghw_cu_kstat; /* for capacity and utilization */
122 * pghw_generation should be updated by superclasses whenever PG changes
123 * significanly (e.g. new CPUs join or leave PG).
125 uint_t pghw_generation; /* generation number */
128 * The following fields are used by PGHW cu kstats
130 char *pghw_cpulist; /* list of CPUs */
131 size_t pghw_cpulist_len; /* length of the list */
133 * Generation number at kstat update time
135 uint_t pghw_kstat_gen;
136 pghw_util_t pghw_stats; /* Utilization data */
137 } pghw_t;
140 * IDs associating a CPU with various physical hardware
142 typedef struct cpu_physid {
143 id_t cpu_chipid; /* CPU's physical processor */
144 id_t cpu_coreid; /* CPU's physical core */
145 id_t cpu_cacheid; /* CPU's cache id */
146 } cpu_physid_t;
149 * Physical PG initialization / CPU service hooks
151 extern void pghw_init(pghw_t *, cpu_t *, pghw_type_t);
152 extern void pghw_fini(pghw_t *);
153 extern void pghw_cpu_add(pghw_t *, cpu_t *);
154 extern pghw_t *pghw_place_cpu(cpu_t *, pghw_type_t);
155 extern void pghw_cmt_fini(pghw_t *);
158 * Physical ID cache creation / destruction
160 extern void pghw_physid_create(cpu_t *);
161 extern void pghw_physid_destroy(cpu_t *);
164 * CPU / PG hardware related seach operations
166 extern pghw_t *pghw_find_pg(cpu_t *, pghw_type_t);
167 extern pghw_t *pghw_find_by_instance(id_t, pghw_type_t);
168 extern group_t *pghw_set_lookup(pghw_type_t);
170 /* Hardware sharing relationship platform interfaces */
171 extern int pg_plat_hw_shared(cpu_t *, pghw_type_t);
172 extern int pg_plat_cpus_share(cpu_t *, cpu_t *, pghw_type_t);
173 extern id_t pg_plat_hw_instance_id(cpu_t *, pghw_type_t);
174 extern pghw_type_t pg_plat_hw_rank(pghw_type_t, pghw_type_t);
177 * String representation of the hardware type
179 extern char *pghw_type_string(pghw_type_t);
182 * What comprises a "core" may vary across processor implementations,
183 * and so the term itself is somewhat unstable. For this reason, there
184 * is no PGHW_CORE type, but we provide an interface here to allow platforms
185 * to express cpu <=> core mappings.
187 extern id_t pg_plat_get_core_id(cpu_t *);
189 #endif /* !_KERNEL && !_KMEMUSER */
191 #ifdef __cplusplus
193 #endif
195 #endif /* _PGHW_H */