| blob | e7974fb5388206a5646cd5734509862933d4df29 |
1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
22 /*
23 * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
24 * Copyright 2012 Nexenta Systems, Inc. All rights reserved.
25 */
27 /*
28 * Copyright (c) 2000 to 2010, LSI Corporation.
29 * All rights reserved.
30 *
31 * Redistribution and use in source and binary forms of all code within
32 * this file that is exclusively owned by LSI, with or without
33 * modification, is permitted provided that, in addition to the CDDL 1.0
34 * License requirements, the following conditions are met:
35 *
36 * Neither the name of the author nor the names of its contributors may be
37 * used to endorse or promote products derived from this software without
38 * specific prior written permission.
39 *
40 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
41 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
42 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
43 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
44 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
45 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
46 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
47 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
48 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
49 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
50 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
51 * DAMAGE.
52 */
54 /*
55 * mptsas - This is a driver based on LSI Logic's MPT2.0 interface.
56 *
57 */
59 #if defined(lint) || defined(DEBUG)
60 #define MPTSAS_DEBUG
61 #endif
63 /*
64 * standard header files.
65 */
66 #include <sys/note.h>
67 #include <sys/scsi/scsi.h>
68 #include <sys/pci.h>
69 #include <sys/file.h>
70 #include <sys/cpuvar.h>
71 #include <sys/policy.h>
72 #include <sys/sysevent.h>
73 #include <sys/sysevent/eventdefs.h>
74 #include <sys/sysevent/dr.h>
75 #include <sys/sata/sata_defs.h>
76 #include <sys/scsi/generic/sas.h>
77 #include <sys/scsi/impl/scsi_sas.h>
79 #pragma pack(1)
80 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_type.h>
81 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2.h>
82 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_cnfg.h>
83 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_init.h>
84 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_ioc.h>
85 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_sas.h>
86 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_tool.h>
87 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_raid.h>
88 #pragma pack()
90 /*
91 * private header files.
92 *
93 */
94 #include <sys/scsi/impl/scsi_reset_notify.h>
95 #include <sys/scsi/adapters/mpt_sas/mptsas_var.h>
96 #include <sys/scsi/adapters/mpt_sas/mptsas_ioctl.h>
97 #include <sys/scsi/adapters/mpt_sas/mptsas_smhba.h>
99 #include <sys/raidioctl.h>
103 /*
104 * FMA header files
105 */
106 #include <sys/ddifm.h>
107 #include <sys/fm/protocol.h>
108 #include <sys/fm/util.h>
109 #include <sys/fm/io/ddi.h>
111 /*
112 * For anyone who would modify the code in mptsas_driver, it must be awared
113 * that from snv_145 where CR6910752(mpt_sas driver performance can be
114 * improved) is integrated, the per_instance mutex m_mutex is not hold
115 * in the key IO code path, including mptsas_scsi_start(), mptsas_intr()
116 * and all of the recursive functions called in them, so don't
117 * make it for granted that all operations are sync/exclude correctly. Before
118 * doing any modification in key code path, and even other code path such as
119 * DR, watchsubr, ioctl, passthrough etc, make sure the elements modified have
120 * no releationship to elements shown in the fastpath
121 * (function mptsas_handle_io_fastpath()) in ISR and its recursive functions.
122 * otherwise, you have to use the new introduced mutex to protect them.
123 * As to how to do correctly, refer to the comments in mptsas_intr().
124 */
126 /*
127 * autoconfiguration data and routines.
128 */
133 /*
134 * cb_ops function
135 */
138 #ifdef __sparc
144 /*
145 * Resource initilaization for hardware
146 */
169 /*
170 * SCSA function prototypes
171 */
198 /*
199 * SMP functions
200 */
203 /*
204 * internal function prototypes.
205 */
243 pMpi2ReplyDescriptorsUnion_t reply_desc_union);
246 pMpi2ReplyDescriptorsUnion_t reply_desc);
248 pMpi2ReplyDescriptorsUnion_t reply_desc);
333 /*
334 * helper functions
335 */
371 mptsas_phymask_t phymask);
376 /*
377 * Enumeration / DR functions
378 */
412 uint_t flags);
428 mptsas_phymask_t key2);
430 mptsas_phymask_t key2);
438 mptsas_phymask_t phymask);
444 /*
445 * Power management functions
446 */
450 /*
451 * MPT MSI tunable:
452 *
453 * By default MSI is enabled on all supported platforms.
454 */
463 /*
464 * FMA Prototypes
465 */
472 /*
473 * This device is created by the SCSI pseudo nexus driver (SCSI vHCI). It is
474 * under this device that the paths to a physical device are created when
475 * MPxIO is used.
476 */
479 /*
480 * Tunable timeout value for Inquiry VPD page 0x83
481 * By default the value is 30 seconds.
482 */
485 /*
486 * This is used to allocate memory for message frame storage, not for
487 * data I/O DMA. All message frames must be stored in the first 4G of
488 * physical memory.
489 */
490 ddi_dma_attr_t mptsas_dma_attrs = {
503 };
505 /*
506 * This is used for data I/O DMA memory allocation. (full 64-bit DMA
507 * physical addresses are supported.)
508 */
509 ddi_dma_attr_t mptsas_dma_attrs64 = {
521 DDI_DMA_RELAXED_ORDERING /* flags, enable relaxed ordering */
522 };
524 ddi_device_acc_attr_t mptsas_dev_attr = {
525 DDI_DEVICE_ATTR_V1,
526 DDI_STRUCTURE_LE_ACC,
527 DDI_STRICTORDER_ACC,
528 DDI_DEFAULT_ACC
529 };
549 nodev /* awrite */
550 };
560 #ifdef __sparc
561 mptsas_reset,
562 #else
568 #ifdef __sparc
569 ddi_quiesce_not_needed
570 #else
571 mptsas_quiesce /* quiesce */
573 };
582 };
586 };
595 /*
596 * Local static data
597 */
598 #if defined(MPTSAS_DEBUG)
617 /*
618 * warlock directives
619 */
621 mptsas_cmd NcrTableIndirect buf scsi_cdb scsi_status))
627 /*
628 * SM - HBA statics
629 */
632 #ifdef MPTSAS_DEBUG
634 #endif
636 /*
637 * Notes:
638 * - scsi_hba_init(9F) initializes SCSI HBA modules
639 * - must call scsi_hba_fini(9F) if modload() fails
640 */
641 int
643 {
645 /* CONSTCOND */
651 MPTSAS_INITIAL_SOFT_SPACE);
654 }
659 }
671 }
674 }
676 /*
677 * Notes:
678 * - scsi_hba_fini(9F) uninitializes SCSI HBA modules
679 */
680 int
682 {
684 /* CONSTCOND */
695 }
697 }
699 /*
700 * The loadable-module _info(9E) entry point
701 */
702 int
704 {
705 /* CONSTCOND */
710 }
713 static int
715 {
738 /* CONSTCOND */
746 /*
747 * If this a scsi-iport node, nothing to do here.
748 */
753 }
758 NULL) {
762 }
770 NULL) {
774 }
776 /*
777 * Overwrite parent's tran_hba_private to iport's tran vector
778 */
783 /*
784 * Get SAS address for initiator port according dev_handle
785 */
790 DDI_PROP_SUCCESS) {
792 MPTSAS_VIRTUAL_PORT);
796 }
798 }
807 }
808 }
815 }
821 else
824 /*
825 * Update PHY info for smhba
826 */
832 }
839 numphys++;
840 }
841 }
849 DDI_PROP_SUCCESS) {
855 }
858 DDI_PROP_SUCCESS) {
861 }
865 DDI_PROP_SUCCESS) {
870 }
874 DDI_PROP_SUCCESS) {
879 }
882 DDI_PROP_SUCCESS) {
884 MPTSAS_VIRTUAL_PORT);
888 }
901 attached_devhdl);
904 }
913 }
914 }
919 attached_sas_wwn);
922 DDI_PROP_SUCCESS) {
926 }
928 /* Create kstats for each phy on this iport */
932 /*
933 * register sas hba iport with mdi (MPxIO/vhci)
934 */
938 }
940 }
942 /*
943 * Notes:
944 * Set up all device state and allocate data structures,
945 * mutexes, condition variables, etc. for device operation.
946 * Add interrupts needed.
947 * Return DDI_SUCCESS if device is ready, else return DDI_FAILURE.
948 */
949 static int
951 {
968 /* CONSTCOND */
973 }
987 }
989 /*
990 * Reset hardware and softc to "no outstanding commands"
991 * Note that a check condition can result on first command
992 * to a target.
993 */
996 /*
997 * raise power.
998 */
1006 /*
1007 * The pm_raise_power() call above failed,
1008 * and that can only occur if we were unable
1009 * to reset the hardware. This is probably
1010 * due to unhealty hardware, and because
1011 * important filesystems(such as the root
1012 * filesystem) could be on the attached disks,
1013 * it would not be a good idea to continue,
1014 * as we won't be entirely certain we are
1015 * writing correct data. So we panic() here
1016 * to not only prevent possible data corruption,
1017 * but to give developers or end users a hope
1018 * of identifying and correcting any problems.
1019 */
1022 }
1023 }
1027 /*
1028 * Reinitialize ioc
1029 */
1035 }
1037 }
1038 /*
1039 * mptsas_update_driver_data needs interrupts so enable them
1040 * first.
1041 */
1045 /* start requests, if possible */
1050 /*
1051 * Restart watch thread
1052 */
1056 mptsas_tick);
1058 }
1061 /* report idle status to pm framework */
1064 }
1071 }
1075 /*
1076 * Allocate softc information.
1077 */
1082 }
1090 }
1092 /* Indicate that we are 'sizeof (scsi_*(9S))' clean. */
1098 /* Make a per-instance copy of the structures */
1104 /*
1105 * Initialize FMA
1106 */
1118 }
1120 /*
1121 * Setup configuration space
1122 */
1126 }
1127 config_setup++;
1133 }
1134 map_setup++;
1136 /*
1137 * A taskq is created for dealing with the event handler
1138 */
1143 }
1144 event_taskq_create++;
1146 /*
1147 * A taskq is created for dealing with dr events
1148 */
1155 }
1156 dr_taskq_create++;
1181 MPTSAS_DONEQ_THREAD_ACTIVE;
1191 }
1193 doneq_thread_create++;
1194 }
1196 /* Initialize mutex used in interrupt handler */
1206 }
1213 mutex_init_done++;
1215 /*
1216 * Disable hardware interrupt since we're not ready to
1217 * handle it yet.
1218 */
1222 intr_added++;
1225 /*
1226 * Initialize power management component
1227 */
1234 }
1235 }
1237 /*
1238 * Initialize chip using Message Unit Reset, if allowed
1239 */
1245 }
1247 /*
1248 * Fill in the phy_info structure and get the base WWID
1249 */
1254 }
1260 }
1266 }
1270 /*
1271 * Register the iport for multiple port HBA
1272 */
1275 /*
1276 * initialize SCSI HBA transport structure
1277 */
1280 hba_attach_setup++;
1284 smp_attach_setup++;
1293 "scsi_reset_delay of 0 is not recommended,"
1296 }
1298 /*
1299 * Initialize the wait and done FIFO queue
1300 */
1304 /*
1305 * ioc cmd queue initialize
1306 */
1312 /*
1313 * enable event notification
1314 */
1319 }
1322 /*
1323 * Initialize PHY info for smhba
1324 */
1329 }
1331 /* Check all dma handles allocated in attach */
1343 }
1345 /* Check all acc handles allocated in attach */
1360 }
1362 /*
1363 * After this point, we are not going to fail the attach.
1364 */
1365 /*
1366 * used for mptsas_watch
1367 */
1380 }
1383 /* Print message of HBA present */
1386 /* report idle status to pm framework */
1389 }
1393 fail:
1407 }
1409 /* deallocate in reverse order */
1414 }
1417 }
1425 }
1428 }
1439 }
1443 }
1447 }
1454 }
1457 }
1460 }
1468 }
1474 }
1478 }
1481 }
1488 }
1490 }
1492 static int
1494 {
1500 }
1508 }
1515 }
1517 /*
1518 * Cancel timeout threads for this mpt
1519 */
1526 }
1534 }
1540 /*
1541 * Cancel watch threads if all mpts suspended
1542 */
1547 }
1552 timeout_id_t tid;
1561 }
1568 }
1569 }
1574 /*
1575 * If this mpt is not in full power(PM_LEVEL_D0), just return.
1576 */
1581 }
1583 /* Disable HBA interrupts in hardware */
1585 /*
1586 * Send RAID action system shutdown to sync IR
1587 */
1592 /* drain the taskq */
1597 }
1599 #ifdef __sparc
1600 /*ARGSUSED*/
1601 static int
1603 {
1607 /*
1608 * If this call is for iport, just return.
1609 */
1619 /*
1620 * Send RAID action system shutdown to sync IR. Disable HBA
1621 * interrupts in hardware first.
1622 */
1627 }
1629 /*
1630 * quiesce(9E) entry point.
1631 *
1632 * This function is called when the system is single-threaded at high
1633 * PIL with preemption disabled. Therefore, this function must not be
1634 * blocked.
1635 *
1636 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
1637 * DDI_FAILURE indicates an error condition and should almost never happen.
1638 */
1639 static int
1641 {
1645 /*
1646 * If this call is for iport, just return.
1647 */
1657 /* Disable HBA interrupts in hardware */
1659 /* Send RAID action system shutdonw to sync IR */
1663 }
1666 /*
1667 * detach(9E). Remove all device allocations and system resources;
1668 * disable device interrupts.
1669 * Return DDI_SUCCESS if done; DDI_FAILURE if there's a problem.
1670 */
1671 static int
1673 {
1674 /* CONSTCOND */
1687 }
1688 /* NOTREACHED */
1689 }
1691 static int
1693 {
1710 }
1711 /*
1712 * Still have pathinfo child, should not detach mpt driver
1713 */
1716 /*
1717 * MPxIO enabled for the iport
1718 */
1724 }
1730 }
1734 }
1739 }
1741 /* Make sure power level is D0 before accessing registers */
1746 DDI_SUCCESS) {
1752 }
1753 }
1754 }
1756 /*
1757 * Send RAID action system shutdown to sync IR. After action, send a
1758 * Message Unit Reset. Since after that DMA resource will be freed,
1759 * set ioc to READY state will avoid HBA initiated DMA operation.
1760 */
1780 }
1784 }
1788 }
1795 }
1801 /*
1802 * Cancel timeout threads for this mpt
1803 */
1811 }
1819 }
1823 /*
1824 * last mpt? ... if active, CANCEL watch threads.
1825 */
1828 timeout_id_t tid;
1829 /*
1830 * Clear mptsas_timeouts_enable so that the watch thread
1831 * gets restarted on DDI_ATTACH
1832 */
1840 }
1847 }
1848 }
1851 /*
1852 * Delete Phy stats
1853 */
1856 /*
1857 * Delete nt_active.
1858 */
1865 /* deallocate everything that was allocated in mptsas_attach */
1871 /* Lower the power informing PM Framework */
1875 "!mptsas%d: Lower power request failed "
1878 }
1885 }
1905 }
1907 static void
1909 {
1916 }
1919 }
1921 static void
1923 {
1925 /*
1926 * Remove device instance from the global linked list
1927 */
1936 }
1937 }
1940 }
1941 }
1945 }
1947 }
1949 static int
1951 {
1952 ddi_dma_attr_t task_dma_attrs;
1958 /* allocate Task Management ddi_dma resources */
1963 }
1967 }
1969 static void
1971 {
1974 }
1976 static int
1978 {
1982 /* Allocate a transport structure */
1984 SCSI_HBA_CANSLEEP);
2021 /*
2022 * All children of the HBA are iports. We need tran was cloned.
2023 * So we pass the flags to SCSA. SCSI_HBA_TRAN_CLONE will be
2024 * inherited to iport's tran vector.
2025 */
2034 }
2036 }
2038 static void
2040 {
2045 }
2046 }
2048 static void
2050 {
2053 /*
2054 * initial value of mask is 0
2055 */
2076 }
2077 }
2083 }
2084 }
2089 /*
2090 * register a iport
2091 */
2094 }
2096 /*
2097 * register a virtual port for RAID volume always
2098 */
2101 }
2103 static int
2105 {
2115 }
2116 /*
2117 * Initialize smp hash table
2118 */
2123 }
2125 static void
2127 {
2132 }
2134 }
2136 static int
2138 {
2142 /*
2143 * create kmem cache for packets
2144 */
2154 }
2156 /*
2157 * create kmem cache for extra SGL frames if SGL cannot
2158 * be accomodated into main request frame.
2159 */
2169 }
2172 }
2174 static void
2176 {
2177 /* deallocate in reverse order */
2181 }
2185 }
2186 }
2188 static int
2190 {
2191 #ifndef __lock_lint
2193 #endif
2205 }
2209 /*
2210 * If the device is busy, don't lower its power level
2211 */
2215 }
2220 /*
2221 * Wait up to 30 seconds for IOC to come out of reset.
2222 */
2228 }
2230 }
2231 /*
2232 * If IOC is not in operational state, try to hard reset it.
2233 */
2235 MPI2_IOC_STATE_OPERATIONAL) {
2242 }
2243 }
2257 }
2260 }
2262 /*
2263 * Initialize configuration space and figure out which
2264 * chip and revison of the chip the mpt driver is using.
2265 */
2266 static int
2268 {
2278 }
2280 /*
2281 * This is a workaround for a XMITS ASIC bug which does not
2282 * drive the CBE upper bits.
2283 */
2285 PCI_STAT_PERROR) {
2287 PCI_STAT_PERROR);
2288 }
2292 /*
2293 * Get the chip device id:
2294 */
2297 /*
2298 * Save the revision.
2299 */
2302 /*
2303 * Save the SubSystem Vendor and Device IDs
2304 */
2308 /*
2309 * Set the latency timer to 0x40 as specified by the upa -> pci
2310 * bridge chip design team. This may be done by the sparc pci
2311 * bus nexus driver, but the driver should make sure the latency
2312 * timer is correct for performance reasons.
2313 */
2315 MPTSAS_LATENCY_TIMER);
2319 }
2321 static void
2323 {
2328 }
2329 }
2331 static void
2333 {
2334 ushort_t cmdreg;
2336 /*
2337 * Set the command register to the needed values.
2338 */
2344 }
2346 static void
2348 {
2349 ushort_t cmdreg;
2351 /*
2352 * Clear the master enable bit in the PCI command register.
2353 * This prevents any bus mastering activity like DMA.
2354 */
2358 }
2360 int
2362 {
2363 ddi_dma_attr_t attrs;
2374 }
2377 }
2379 void
2381 {
2385 }
2387 int
2389 {
2390 ddi_dma_attr_t attrs;
2391 ddi_dma_handle_t dma_handle;
2392 caddr_t memp;
2393 ddi_acc_handle_t accessp;
2405 }
2413 }
2418 }
2420 static int
2422 {
2423 ddi_dma_attr_t frame_dma_attrs;
2424 caddr_t memp;
2425 ddi_dma_cookie_t cookie;
2428 /*
2429 * re-alloc when it has already alloced
2430 */
2434 /*
2435 * The size of the request frame pool is:
2436 * Number of Request Frames * Request Frame Size
2437 */
2440 /*
2441 * set the DMA attributes. System Request Message Frames must be
2442 * aligned on a 16-byte boundry.
2443 */
2448 /*
2449 * allocate the request frame pool.
2450 */
2455 }
2457 /*
2458 * Store the request frame memory address. This chip uses this
2459 * address to dma to and from the driver's frame. The second
2460 * address is the address mpt uses to fill in the frame.
2461 */
2465 /*
2466 * Clear the request frame pool.
2467 */
2471 }
2473 static int
2475 {
2476 ddi_dma_attr_t frame_dma_attrs;
2477 caddr_t memp;
2478 ddi_dma_cookie_t cookie;
2481 /*
2482 * re-alloc when it has already alloced
2483 */
2487 /*
2488 * The size of the reply frame pool is:
2489 * Number of Reply Frames * Reply Frame Size
2490 */
2493 /*
2494 * set the DMA attributes. System Reply Message Frames must be
2495 * aligned on a 4-byte boundry. This is the default.
2496 */
2500 /*
2501 * allocate the reply frame pool
2502 */
2507 }
2509 /*
2510 * Store the reply frame memory address. This chip uses this
2511 * address to dma to and from the driver's frame. The second
2512 * address is the address mpt uses to process the frame.
2513 */
2517 /*
2518 * Clear the reply frame pool.
2519 */
2523 }
2525 static int
2527 {
2528 ddi_dma_attr_t frame_dma_attrs;
2529 caddr_t memp;
2530 ddi_dma_cookie_t cookie;
2533 /*
2534 * re-alloc when it has already alloced
2535 */
2539 /*
2540 * The reply free queue size is:
2541 * Reply Free Queue Depth * 4
2542 * The "4" is the size of one 32 bit address (low part of 64-bit
2543 * address)
2544 */
2547 /*
2548 * set the DMA attributes The Reply Free Queue must be aligned on a
2549 * 16-byte boundry.
2550 */
2555 /*
2556 * allocate the reply free queue
2557 */
2562 }
2564 /*
2565 * Store the reply free queue memory address. This chip uses this
2566 * address to read from the reply free queue. The second address
2567 * is the address mpt uses to manage the queue.
2568 */
2572 /*
2573 * Clear the reply free queue memory.
2574 */
2578 }
2580 static int
2582 {
2583 ddi_dma_attr_t frame_dma_attrs;
2584 caddr_t memp;
2585 ddi_dma_cookie_t cookie;
2588 /*
2589 * re-alloc when it has already alloced
2590 */
2594 /*
2595 * The reply descriptor post queue size is:
2596 * Reply Descriptor Post Queue Depth * 8
2597 * The "8" is the size of each descriptor (8 bytes or 64 bits).
2598 */
2601 /*
2602 * set the DMA attributes. The Reply Descriptor Post Queue must be
2603 * aligned on a 16-byte boundry.
2604 */
2609 /*
2610 * allocate the reply post queue
2611 */
2616 }
2618 /*
2619 * Store the reply descriptor post queue memory address. This chip
2620 * uses this address to write to the reply descriptor post queue. The
2621 * second address is the address mpt uses to manage the queue.
2622 */
2626 /*
2627 * Clear the reply post queue memory.
2628 */
2632 }
2634 static void
2636 {
2641 }
2644 }
2646 static int
2648 {
2654 }
2656 }
2658 }
2660 static void
2662 {
2667 }
2668 }
2670 static void
2672 {
2675 }
2677 static void
2679 {
2682 /*
2683 * Free up any allocated memory
2684 */
2700 }
2701 }
2703 static int
2705 {
2711 /* Get the target num */
2717 /*
2718 * Stick in the address of form "pPHY,LUN"
2719 */
2724 /*
2725 * Stick in the address of the form "wWWN,LUN"
2726 */
2731 }
2737 }
2739 }
2741 /*
2742 * tran_tgt_init(9E) - target device instance initialization
2743 */
2744 static int
2747 {
2748 #ifndef __lock_lint
2750 #endif
2752 /*
2753 * At this point, the scsi_device structure already exists
2754 * and has been initialized.
2755 *
2756 * Use this function to allocate target-private data structures,
2757 * if needed by this HBA. Add revised flow-control and queue
2758 * properties for child here, if desired and if you can tell they
2759 * support tagged queueing by now.
2760 */
2780 }
2781 /*
2782 * phymask is 0 means the virtual port for RAID
2783 */
2788 /*
2789 * Very bad news if this occurs. Somehow scsi_vhci has
2790 * lost the pathinfo node for this target.
2791 */
2793 }
2796 DDI_PROP_SUCCESS) {
2799 }
2805 }
2807 }
2813 DDI_PROP_SUCCESS) {
2816 }
2820 }
2821 }
2829 sas_wwn);
2831 }
2834 KM_SLEEP);
2838 }
2842 }
2847 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
2859 /*
2860 * According SCSI/ATA Translation -2 (SAT-2) revision 01a
2861 * chapter 12.4.2 VPD page 89h includes 512 bytes ATA IDENTIFY
2862 * DEVICE data or ATA IDENTIFY PACKET DEVICE data.
2863 */
2871 }
2876 }
2885 /*
2886 * split model into into vid/pid
2887 */
2893 /*
2894 * terminate vid, establish pid
2895 */
2898 /*
2899 * vid will stay "ATA ", the rule is same
2900 * as sata framework implementation.
2901 */
2903 /*
2904 * model is all pid
2905 */
2907 }
2909 /*
2910 * override SCSA "inquiry-*" properties
2911 */
2923 }
2926 }
2929 }
2930 /*
2931 * tran_tgt_free(9E) - target device instance deallocation
2932 */
2933 static void
2936 {
2937 #ifndef __lock_lint
2939 #endif
2946 }
2947 }
2949 /*
2950 * scsi_pkt handling
2951 *
2952 * Visible to the external world via the transport structure.
2953 */
2955 /*
2956 * Notes:
2957 * - transport the command to the addressed SCSI target/lun device
2958 * - normal operation is to schedule the command to be transported,
2959 * and return TRAN_ACCEPT if this is successful.
2960 * - if NO_INTR, tran_start must poll device for command completion
2961 */
2962 static int
2964 {
2965 #ifndef __lock_lint
2967 #endif
2978 /*
2979 * prepare the pkt before taking mutex.
2980 */
2984 }
2986 /*
2987 * Send the command to target/lun, however your HBA requires it.
2988 * If busy, return TRAN_BUSY; if there's some other formatting error
2989 * in the packet, return TRAN_BADPKT; otherwise, fall through to the
2990 * return of TRAN_ACCEPT.
2991 *
2992 * Remember that access to shared resources, including the mptsas_t
2993 * data structure and the HBA hardware registers, must be protected
2994 * with mutexes, here and everywhere.
2995 *
2996 * Also remember that at interrupt time, you'll get an argument
2997 * to the interrupt handler which is a pointer to your mptsas_t
2998 * structure; you'll have to remember which commands are outstanding
2999 * and which scsi_pkt is the currently-running command so the
3000 * interrupt handler can refer to the pkt to set completion
3001 * status, call the target driver back through pkt_comp, etc.
3002 */
3007 /*
3008 * commands should be allowed to retry by
3009 * returning TRAN_BUSY to stall the I/O's
3010 * which come from scsi_vhci since the device/
3011 * path is in unstable state now.
3012 */
3016 /*
3017 * The device is offline, just fail the
3018 * command by returning TRAN_FATAL_ERROR.
3019 */
3022 }
3023 }
3028 }
3030 static int
3032 {
3043 }
3044 }
3046 /*
3047 * reset the throttle if we were draining
3048 */
3055 }
3057 /*
3058 * If device handle has already been invalidated, just
3059 * fail the command. In theory, command from scsi_vhci
3060 * client is impossible send down command with invalid
3061 * devhdl since devhdl is set after path offline, target
3062 * driver is not suppose to select a offlined path.
3063 */
3069 /*
3070 * If HBA is being reset, the DevHandles are being
3071 * re-initialized, which means that they could be invalid
3072 * even if the target is still attached. Check if being reset
3073 * and if DevHandle is being re-initialized. If this is the
3074 * case, return BUSY so the I/O can be retried later.
3075 */
3078 STAT_BUS_RESET);
3087 }
3088 }
3098 }
3099 }
3101 /*
3102 * The first case is the normal case. mpt gets a command from the
3103 * target driver and starts it.
3104 * Since SMID 0 is reserved and the TM slot is reserved, the actual max
3105 * commands is m_max_requests - 2.
3106 */
3120 }
3122 /*
3123 * Add this pkt to the work queue
3124 */
3132 /*
3133 * Only flush the doneq if this is not a TM
3134 * cmd. For TM cmds the flushing of the
3135 * doneq will be done in those routines.
3136 */
3139 }
3140 }
3142 }
3144 }
3146 int
3148 {
3157 /*
3158 * Account for reserved TM request slot and reserved SMID of 0.
3159 */
3164 qpair_retry:
3187 list_next =
3192 list_prev =
3212 else
3214 }
3220 }
3224 /*
3225 * Make sure SMID is not using reserved value of 0
3226 * and the TM request slot.
3227 */
3235 /*
3236 * only increment per target ncmds if this is not a
3237 * command that has no target associated with it (i.e. a
3238 * event acknoledgment)
3239 */
3244 }
3247 /*
3248 * If initial timout is less than or equal to one tick, bump
3249 * the timeout by a tick so that command doesn't timeout before
3250 * its allotted time.
3251 */
3254 }
3256 }
3258 /*
3259 * prepare the pkt:
3260 * the pkt may have been resubmitted or just reused so
3261 * initialize some fields and do some checks.
3262 */
3263 static int
3265 {
3270 /*
3271 * Reinitialize some fields that need it; the packet may
3272 * have been resubmitted
3273 */
3281 /*
3282 * zero status byte.
3283 */
3289 /*
3290 * consistent packets need to be sync'ed first
3291 * (only for data going out)
3292 */
3296 DDI_DMA_SYNC_FORDEV);
3297 }
3298 }
3305 }
3307 /*
3308 * tran_init_pkt(9E) - allocate scsi_pkt(9S) for command
3309 *
3310 * One of three possibilities:
3311 * - allocate scsi_pkt
3312 * - allocate scsi_pkt and DMA resources
3313 * - allocate DMA resources to an already-allocated pkt
3314 */
3319 {
3323 #ifndef __sparc
3324 uint_t oldcookiec;
3334 tran_tgt_private;
3338 }
3347 #ifdef MPTSAS_TEST_EXTRN_ALLOC
3349 #endif
3355 /*
3356 * Allocate the new packet.
3357 */
3359 ddi_dma_handle_t save_dma_handle;
3360 ddi_dma_handle_t save_arq_dma_handle;
3362 ddi_dma_cookie_t save_arqcookie;
3363 #ifdef __sparc
3374 #ifdef __sparc
3382 #ifdef __sparc
3398 }
3404 /*
3405 * if extern alloc fails, all will be
3406 * deallocated, including cmd
3407 */
3410 }
3412 /*
3413 * if extern allocation fails, it will
3414 * deallocate the new pkt as well
3415 */
3417 }
3418 }
3424 }
3427 #ifndef __sparc
3428 /* grab cmd->cmd_cookiec here as oldcookiec */
3433 /*
3434 * If the dma was broken up into PARTIAL transfers cmd_nwin will be
3435 * greater than 0 and we'll need to grab the next dma window
3436 */
3437 /*
3438 * SLM-not doing extra command frame right now; may add later
3439 */
3443 /*
3444 * Make sure we havn't gone past the the total number
3445 * of windows
3446 */
3449 }
3454 }
3456 }
3461 }
3463 /*
3464 * DMA resource allocation. This version assumes your
3465 * HBA has some sort of bus-mastering or onboard DMA capability, with a
3466 * scatter-gather list of length MPTSAS_MAX_DMA_SEGS, as given in the
3467 * ddi_dma_attr_t structure and passed to scsi_impl_dmaget.
3468 */
3475 /*
3476 * Set up DMA memory and position to the next DMA segment.
3477 */
3486 }
3490 }
3494 }
3496 /*
3497 * workaround for byte hole issue on psycho and
3498 * schizo pre 2.1
3499 */
3504 }
3530 }
3534 }
3536 }
3538 get_dma_cookies:
3548 }
3550 }
3552 /*
3553 * Allocate extra SGL buffer if needed.
3554 */
3558 DDI_FAILURE) {
3564 }
3566 }
3567 }
3569 /*
3570 * Always use scatter-gather transfer
3571 * Use the loop below to store physical addresses of
3572 * DMA segments, from the DMA cookies, into your HBA's
3573 * scatter-gather list.
3574 * We need to ensure we have enough kmem alloc'd
3575 * for the sg entries since we are no longer using an
3576 * array inside mptsas_cmd_t.
3577 *
3578 * We check cmd->cmd_cookiec against oldcookiec so
3579 * the scatter-gather list is correctly allocated
3580 */
3581 #ifndef __sparc
3585 oldcookiec);
3587 }
3588 }
3596 "unable to kmem_alloc enough memory "
3598 /*
3599 * if we have an ENOMEM condition we need to behave
3600 * the same way as the rest of this routine
3601 */
3606 }
3608 }
3609 }
3615 /*
3616 * store the first segment into the S/G list
3617 */
3624 /*
3625 * dmacount counts the size of the dma for this window
3626 * (if partial dma is being used). totaldmacount
3627 * keeps track of the total amount of dma we have
3628 * transferred for all the windows (needed to calculate
3629 * the resid value below).
3630 */
3634 /*
3635 * We already stored the first DMA scatter gather segment,
3636 * start at 1 if we need to store more.
3637 */
3639 /*
3640 * Get next DMA cookie
3641 */
3644 dmap++;
3649 /*
3650 * store the segment parms into the S/G list
3651 */
3657 }
3659 /*
3660 * If this was partially allocated we set the resid
3661 * the amount of data NOT transferred in this window
3662 * If there is only one window, the resid will be 0
3663 */
3666 }
3668 }
3670 /*
3671 * tran_destroy_pkt(9E) - scsi_pkt(9s) deallocation
3672 *
3673 * Notes:
3674 * - also frees DMA resources if allocated
3675 * - implicit DMA synchonization
3676 */
3677 static void
3679 {
3689 }
3690 #ifndef __sparc
3694 }
3705 }
3706 }
3708 /*
3709 * kmem cache constructor and destructor:
3710 * When constructing, we bzero the cmd and allocate the dma handle
3711 * When destructing, just free the dma handle
3712 */
3713 static int
3715 {
3719 uint_t cookiec;
3720 ddi_dma_attr_t arq_dma_attr;
3731 /*
3732 * allocate a dma handle
3733 */
3738 }
3746 }
3748 /*
3749 * allocate a arq handle
3750 */
3760 }
3772 }
3773 /*
3774 * In sparc, the sgl length in most of the cases would be 1, so we
3775 * pre-allocate it in cache. On x86, the max number would be 256,
3776 * pre-allocate a maximum would waste a lot of memory especially
3777 * when many cmds are put onto waitq.
3778 */
3779 #ifdef __sparc
3785 }
3787 static void
3789 {
3790 #ifndef __lock_lint
3792 #endif
3801 }
3805 }
3809 }
3810 #ifdef __sparc
3814 }
3816 }
3818 static int
3820 {
3823 ddi_dma_attr_t frame_dma_attr;
3825 ddi_dma_cookie_t cookie;
3826 uint_t ncookie;
3839 }
3851 }
3862 }
3864 /*
3865 * Store the SGL memory address. This chip uses this
3866 * address to dma to and from the driver. The second
3867 * address is the address mpt uses to fill in the SGL.
3868 */
3872 }
3874 static void
3876 {
3877 #ifndef __lock_lint
3879 #endif
3889 }
3891 }
3893 /*
3894 * allocate and deallocate external pkt space (ie. not part of mptsas_cmd)
3895 * for non-standard length cdb, pkt_private, status areas
3896 * if allocation fails, then deallocate all external space and the pkt
3897 */
3898 /* ARGSUSED */
3899 static int
3902 {
3908 ddi_dma_attr_t ext_arq_dma_attr;
3909 uint_t cookiec;
3922 }
3925 }
3929 }
3932 }
3936 }
3940 /* allocate sense data buf for DMA */
3956 }
3957 /*
3958 * allocate a extern arq handle and bind the buf
3959 */
3966 }
3974 }
3976 }
3978 fail:
3981 }
3983 /*
3984 * deallocate external pkt space and deallocate the pkt
3985 */
3986 static void
3988 {
3995 /* NOTREACHED */
3996 }
3999 }
4004 }
4008 }
4011 }
4014 }
4017 }
4019 /*
4020 * tran_sync_pkt(9E) - explicit DMA synchronization
4021 */
4022 /*ARGSUSED*/
4023 static void
4025 {
4035 }
4036 }
4038 /*
4039 * tran_dmafree(9E) - deallocate DMA resources allocated for command
4040 */
4041 /*ARGSUSED*/
4042 static void
4044 {
4054 }
4059 }
4062 }
4064 static void
4066 {
4070 DDI_DMA_SYNC_FORCPU);
4071 }
4073 }
4075 static void
4078 {
4079 uint_t cookiec;
4082 pMpi2SGESimple64_t sge;
4083 pMpi2SGEChain64_t sgechain;
4086 /*
4087 * Save the number of entries in the DMA
4088 * Scatter/Gather list
4089 */
4094 /*
4095 * Set read/write bit in control.
4096 */
4101 }
4105 /*
4106 * We have 2 cases here. First where we can fit all the
4107 * SG elements into the main frame, and the case
4108 * where we can't.
4109 * If we have more cookies than we can attach to a frame
4110 * we will need to use a chain element to point
4111 * a location of memory where the rest of the S/G
4112 * elements reside.
4113 */
4127 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4128 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
4129 MPI2_SGE_FLAGS_SHIFT);
4131 /*
4132 * If this is the last cookie, we set the flags
4133 * to indicate so
4134 */
4136 flags |=
4138 | MPI2_SGE_FLAGS_END_OF_BUFFER
4140 MPI2_SGE_FLAGS_SHIFT);
4141 }
4144 MPI2_SGE_FLAGS_SHIFT);
4147 MPI2_SGE_FLAGS_SHIFT);
4148 }
4150 dmap++;
4151 sge++;
4152 }
4154 /*
4155 * Hereby we start to deal with multiple frames.
4156 * The process is as follows:
4157 * 1. Determine how many frames are needed for SGL element
4158 * storage; Note that all frames are stored in contiguous
4159 * memory space and in 64-bit DMA mode each element is
4160 * 3 double-words (12 bytes) long.
4161 * 2. Fill up the main frame. We need to do this separately
4162 * since it contains the SCSI IO request header and needs
4163 * dedicated processing. Note that the last 4 double-words
4164 * of the SCSI IO header is for SGL element storage
4165 * (MPI2_SGE_IO_UNION).
4166 * 3. Fill the chain element in the main frame, so the DMA
4167 * engine can use the following frames.
4168 * 4. Enter a loop to fill the remaining frames. Note that the
4169 * last frame contains no chain element. The remaining
4170 * frames go into the mpt SGL buffer allocated on the fly,
4171 * not immediately following the main message frame, as in
4172 * Gen1.
4173 * Some restrictions:
4174 * 1. For 64-bit DMA, the simple element and chain element
4175 * are both of 3 double-words (12 bytes) in size, even
4176 * though all frames are stored in the first 4G of mem
4177 * range and the higher 32-bits of the address are always 0.
4178 * 2. On some controllers (like the 1064/1068), a frame can
4179 * hold SGL elements with the last 1 or 2 double-words
4180 * (4 or 8 bytes) un-used. On these controllers, we should
4181 * recognize that there's not enough room for another SGL
4182 * element and move the sge pointer to the next frame.
4183 */
4190 /*
4191 * Sgemax is the number of SGE's that will fit
4192 * each extra frame and frames is total
4193 * number of frames we'll need. 1 sge entry per
4194 * frame is reseverd for the chain element thus the -1 below.
4195 */
4200 /*
4201 * A little check to see if we need to round up the number
4202 * of frames we need
4203 */
4209 }
4213 /*
4214 * First fill in the main frame
4215 */
4224 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4225 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
4226 MPI2_SGE_FLAGS_SHIFT);
4228 /*
4229 * If this is the last SGE of this frame
4230 * we set the end of list flag
4231 */
4235 MPI2_SGE_FLAGS_SHIFT);
4236 }
4238 flags |=
4240 MPI2_SGE_FLAGS_SHIFT);
4242 flags |=
4244 MPI2_SGE_FLAGS_SHIFT);
4245 }
4247 dmap++;
4248 sge++;
4249 }
4251 /*
4252 * Fill in the chain element in the main frame.
4253 * About calculation on ChainOffset:
4254 * 1. Struct msg_scsi_io_request has 4 double-words (16 bytes)
4255 * in the end reserved for SGL element storage
4256 * (MPI2_SGE_IO_UNION); we should count it in our
4257 * calculation. See its definition in the header file.
4258 * 2. Constant j is the counter of the current SGL element
4259 * that will be processed, and (j - 1) is the number of
4260 * SGL elements that have been processed (stored in the
4261 * main frame).
4262 * 3. ChainOffset value should be in units of double-words (4
4263 * bytes) so the last value should be divided by 4.
4264 */
4271 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4272 MPI2_SGE_FLAGS_64_BIT_ADDRESSING);
4275 /*
4276 * The size of the next frame is the accurate size of space
4277 * (in bytes) used to store the SGL elements. j is the counter
4278 * of SGL elements. (j - 1) is the number of SGL elements that
4279 * have been processed (stored in frames).
4280 */
4288 }
4295 /* SGL is allocated in the first 4G mem range */
4298 /*
4299 * If there are more than 2 frames left we have to
4300 * fill in the next chain offset to the location of
4301 * the chain element in the next frame.
4302 * sgemax is the number of simple elements in an extra
4303 * frame. Note that the value NextChainOffset should be
4304 * in double-words (4 bytes).
4305 */
4311 }
4313 /*
4314 * Jump to next frame;
4315 * Starting here, chain buffers go into the per command SGL.
4316 * This buffer is allocated when chain buffers are needed.
4317 */
4321 /*
4322 * Start filling in frames with SGE's. If we
4323 * reach the end of frame and still have SGE's
4324 * to fill we need to add a chain element and
4325 * use another frame. j will be our counter
4326 * for what cookie we are at and i will be
4327 * the total cookiec. k is the current frame
4328 */
4332 /*
4333 * If we have reached the end of frame
4334 * and we have more SGE's to fill in
4335 * we have to fill the final entry
4336 * with a chain element and then
4337 * continue to the next frame
4338 */
4341 j--;
4342 chainflags = (
4343 MPI2_SGE_FLAGS_CHAIN_ELEMENT |
4344 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4345 MPI2_SGE_FLAGS_64_BIT_ADDRESSING);
4348 /*
4349 * k is the frame counter and (k + 1)
4350 * is the number of the next frame.
4351 * Note that frames are in contiguous
4352 * memory space.
4353 */
4361 /*
4362 * If there are more than 2 frames left
4363 * we have to next chain offset to
4364 * the location of the chain element
4365 * in the next frame and fill in the
4366 * length of the next chain
4367 */
4380 /*
4381 * This is the last frame. Set
4382 * the NextChainOffset to 0 and
4383 * Length is the total size of
4384 * all remaining simple elements
4385 */
4393 }
4395 /* Jump to the next frame */
4401 }
4414 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
4415 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4416 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
4417 MPI2_SGE_FLAGS_SHIFT);
4419 /*
4420 * If we are at the end of the frame and
4421 * there is another frame to fill in
4422 * we set the last simple element as last
4423 * element
4424 */
4428 MPI2_SGE_FLAGS_SHIFT);
4429 }
4431 /*
4432 * If this is the final cookie we
4433 * indicate it by setting the flags
4434 */
4438 MPI2_SGE_FLAGS_END_OF_BUFFER |
4439 MPI2_SGE_FLAGS_END_OF_LIST) <<
4440 MPI2_SGE_FLAGS_SHIFT);
4441 }
4443 flags |=
4445 MPI2_SGE_FLAGS_SHIFT);
4447 flags |=
4449 MPI2_SGE_FLAGS_SHIFT);
4450 }
4453 dmap++;
4454 sge++;
4455 }
4456 }
4458 /*
4459 * Sync DMA with the chain buffers that were just created
4460 */
4462 }
4463 }
4465 /*
4466 * Interrupt handling
4467 * Utility routine. Poll for status of a command sent to HBA
4468 * without interrupts (a FLAG_NOINTR command).
4469 */
4470 int
4472 {
4477 /*
4478 * In order to avoid using m_mutex in ISR(a new separate mutex
4479 * m_intr_mutex is introduced) and keep the same lock logic,
4480 * the m_intr_mutex should be used to protect the getting and
4481 * setting of the ReplyDescriptorIndex.
4482 *
4483 * Since the m_intr_mutex would be released during processing the poll
4484 * cmd, so we should set the poll flag earlier here to make sure the
4485 * polled cmd be handled in this thread/context. A side effect is other
4486 * cmds during the period between the flag set and reset are also
4487 * handled in this thread and not the ISR. Since the poll cmd is not
4488 * so common, so the performance degradation in this case is not a big
4489 * issue.
4490 */
4497 }
4499 /*
4500 * Wait, using drv_usecwait(), long enough for the command to
4501 * reasonably return from the target if the target isn't
4502 * "dead". A polled command may well be sent from scsi_poll, and
4503 * there are retries built in to scsi_poll if the transport
4504 * accepted the packet (TRAN_ACCEPT). scsi_poll waits 1 second
4505 * and retries the transport up to scsi_poll_busycnt times
4506 * (currently 60) if
4507 * 1. pkt_reason is CMD_INCOMPLETE and pkt_state is 0, or
4508 * 2. pkt_reason is CMD_CMPLT and *pkt_scbp has STATUS_BUSY
4509 *
4510 * limit the waiting to avoid a hang in the event that the
4511 * cmd never gets started but we are still receiving interrupts
4512 */
4518 }
4519 }
4527 /*
4528 * this isn't supposed to happen, the hba must be wedged
4529 * Mark this cmd as a timeout.
4530 */
4542 /* find and remove it from the waitq */
4545 }
4547 }
4551 }
4553 /*
4554 * Used for polling cmds and TM function
4555 */
4556 static int
4558 {
4560 pMpi2ReplyDescriptorsUnion_t reply_desc_union;
4561 Mpi2ReplyDescriptorsUnion_t reply_desc_union_v;
4568 /*
4569 * Get the current interrupt mask and disable interrupts. When
4570 * re-enabling ints, set mask to saved value.
4571 */
4575 /*
4576 * Keep polling for at least (polltime * 1000) seconds
4577 */
4581 DDI_DMA_SYNC_FORCPU);
4593 }
4604 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
4611 }
4612 /*
4613 * Clear the reply descriptor for re-use and increment
4614 * index.
4615 */
4620 DDI_DMA_SYNC_FORDEV);
4624 }
4626 /*
4627 * Update the global reply index
4628 */
4633 /*
4634 * The reply is valid, process it according to its
4635 * type.
4636 */
4640 /*
4641 * Re-enable interrupts and quit.
4642 */
4644 int_mask);
4647 }
4649 /*
4650 * Clear polling flag, re-enable interrupts and quit.
4651 */
4654 }
4656 /*
4657 * For fastpath, the m_intr_mutex should be held from the begining to the end,
4658 * so we only treat those cmds that need not release m_intr_mutex(even just for
4659 * a moment) as candidate for fast processing. otherwise, we don't handle them
4660 * and just return, then in ISR, those cmds would be handled later with m_mutex
4661 * held and m_intr_mutex not held.
4662 */
4663 static int
4666 {
4671 /*
4672 * This is a success reply so just complete the IO. First, do a sanity
4673 * check on the SMID. The final slot is used for TM requests, which
4674 * would not come into this reply handler.
4675 */
4678 SMID);
4681 }
4685 /*
4686 * print warning and return if the slot is empty
4687 */
4692 }
4696 STATE_GOT_STATUS);
4699 }
4702 /*
4703 * If the cmd is a IOC, or a passthrough, then we don't process it in
4704 * fastpath, and later it would be handled by mptsas_process_intr()
4705 * with m_mutex protected.
4706 */
4711 }
4714 /*
4715 * The target returned QFULL or busy, do not add tihs
4716 * pkt to the doneq since the hba will retry
4717 * this cmd.
4718 *
4719 * The pkt has already been resubmitted in
4720 * mptsas_handle_qfull() or in mptsas_check_scsi_io_error().
4721 * Remove this cmd_flag here.
4722 */
4726 }
4728 /*
4729 * In fastpath, the cmd should only be a context reply, so just check
4730 * the post queue of the reply descriptor and the dmahandle of the cmd
4731 * is enough. No sense data in this case and no need to check the dma
4732 * handle where sense data dma info is saved, the dma handle of the
4733 * reply frame, and the dma handle of the reply free queue.
4734 * For the dma handle of the request queue. Check fma here since we
4735 * are sure the request must have already been sent/DMAed correctly.
4736 * otherwise checking in mptsas_scsi_start() is not correct since
4737 * at that time the dma may not start.
4738 */
4740 DDI_SUCCESS) ||
4742 DDI_SUCCESS)) {
4744 DDI_SERVICE_UNAFFECTED);
4747 }
4753 }
4756 DDI_SUCCESS) ||
4758 DDI_SUCCESS)))) {
4762 }
4765 }
4767 static void
4769 pMpi2ReplyDescriptorsUnion_t reply_desc)
4770 {
4771 pMpi2SCSIIOSuccessReplyDescriptor_t scsi_io_success;
4780 /*
4781 * This is a success reply so just complete the IO. First, do a sanity
4782 * check on the SMID. The final slot is used for TM requests, which
4783 * would not come into this reply handler.
4784 */
4787 SMID);
4790 }
4794 /*
4795 * print warning and return if the slot is empty
4796 */
4801 }
4805 STATE_GOT_STATUS);
4808 }
4817 }
4820 /*
4821 * The target returned QFULL or busy, do not add tihs
4822 * pkt to the doneq since the hba will retry
4823 * this cmd.
4824 *
4825 * The pkt has already been resubmitted in
4826 * mptsas_handle_qfull() or in mptsas_check_scsi_io_error().
4827 * Remove this cmd_flag here.
4828 */
4832 }
4833 }
4835 static void
4837 pMpi2ReplyDescriptorsUnion_t reply_desc)
4838 {
4839 pMpi2AddressReplyDescriptor_t address_reply;
4840 pMPI2DefaultReply_t reply;
4856 /*
4857 * If reply frame is not in the proper range we should ignore this
4858 * message and exit the interrupt handler.
4859 */
4869 }
4872 DDI_DMA_SYNC_FORCPU);
4877 /*
4878 * don't get slot information and command for events since these values
4879 * don't exist
4880 */
4883 /*
4884 * This could be a TM reply, which use the last allocated SMID,
4885 * so allow for that.
4886 */
4891 DDI_SERVICE_UNAFFECTED);
4893 }
4897 /*
4898 * print warning and return if the slot is empty
4899 */
4904 }
4916 }
4918 }
4919 /*
4920 * Depending on the function, we need to handle
4921 * the reply frame (and cmd) differently.
4922 */
4930 cmd);
4943 /*
4944 * Record the event if its type is enabled in
4945 * this mpt instance by ioctl.
4946 */
4949 /*
4950 * Handle time critical events
4951 * NOT_RESPONDING/ADDED only now
4952 */
4954 /*
4955 * Would not return main process,
4956 * just let taskq resolve ack action
4957 * and ack would be sent in taskq thread
4958 */
4960 }
4965 /*
4966 * Return the reply frame to the free queue.
4967 */
4972 DDI_DMA_SYNC_FORDEV);
4975 }
4979 }
4982 /*
4983 * If SMID is 0, this implies that the reply is due to a
4984 * release function with a status that the buffer has been
4985 * released. Set the buffer flags accordingly.
4986 */
4993 pBuffer =
4998 }
5000 /*
5001 * Normal handling of diag post reply with SMID.
5002 */
5005 /*
5006 * print warning and return if the slot is empty
5007 */
5012 }
5016 }
5021 }
5023 /*
5024 * Return the reply frame to the free queue.
5025 */
5028 reply_addr);
5030 DDI_DMA_SYNC_FORDEV);
5033 }
5041 /*
5042 * The target returned QFULL or busy, do not add tihs
5043 * pkt to the doneq since the hba will retry
5044 * this cmd.
5045 *
5046 * The pkt has already been resubmitted in
5047 * mptsas_handle_qfull() or in mptsas_check_scsi_io_error().
5048 * Remove this cmd_flag here.
5049 */
5053 }
5054 }
5056 static void
5059 {
5074 }
5091 scsi_state);
5092 }
5101 /*
5102 * if loginfo PL_LOGINFO_CODE_IO_DEVICE_MISSING_DELAY_RETRY
5103 * 0x31170000 comes, that means the device missing delay
5104 * is in progressing, the command need retry later.
5105 */
5108 }
5112 MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE)) {
5118 DRAIN_THROTTLE);
5119 }
5122 }
5130 }
5131 }
5144 }
5147 }
5159 /*
5160 * Set proper status for pkt if autosense was valid
5161 */
5165 }
5167 /*
5168 * ASC=0x47 is parity error
5169 * ASC=0x48 is initiator detected error received
5170 */
5175 }
5177 /*
5178 * ASC/ASCQ=0x3F/0x0E means report_luns data changed
5179 * ASC/ASCQ=0x25/0x00 means invalid lun
5180 */
5191 KM_NOSLEEP);
5194 "resource for handle SAS dynamic"
5197 }
5206 mptsas_handle_dr,
5210 "for handle SAS dynamic reconfigure"
5212 }
5213 }
5223 }
5246 }
5265 /*
5266 * set throttles to drain
5267 */
5277 }
5279 /*
5280 * retry command
5281 */
5296 }
5313 }
5314 }
5316 static void
5319 {
5337 }
5350 /*
5351 * Check for invalid DevHandle of 0 in case application
5352 * sends bad command. DevHandle of 0 could cause problems.
5353 */
5359 task_type);
5360 }
5364 task_type);
5367 }
5368 }
5370 static void
5372 {
5383 }
5388 }
5392 }
5394 }
5400 }
5402 /*
5403 * mpt interrupt handler.
5404 */
5405 static uint_t
5407 {
5409 pMpi2ReplyDescriptorsUnion_t reply_desc_union;
5417 /*
5418 * 1.
5419 * To avoid using m_mutex in the ISR(ISR referes not only mptsas_intr,
5420 * but all of the recursive called functions in it. the same below),
5421 * separate mutexs are introduced to protect the elements shown in ISR.
5422 * 3 type of mutex are involved here:
5423 * a)per instance mutex m_intr_mutex.
5424 * b)per target mutex m_tgt_intr_mutex.
5425 * c)mutex that protect the free slot.
5426 *
5427 * a)per instance mutex m_intr_mutex:
5428 * used to protect m_options, m_power, m_waitq, etc that would be
5429 * checked/modified in ISR; protect the getting and setting the reply
5430 * descriptor index; protect the m_slots[];
5431 *
5432 * b)per target mutex m_tgt_intr_mutex:
5433 * used to protect per target element which has relationship to ISR.
5434 * contention for the new per target mutex is just as high as it in
5435 * sd(7d) driver.
5436 *
5437 * c)mutexs that protect the free slots:
5438 * those mutexs are introduced to minimize the mutex contentions
5439 * between the IO request threads where free slots are allocated
5440 * for sending cmds and ISR where slots holding outstanding cmds
5441 * are returned to the free pool.
5442 * the idea is like this:
5443 * 1) Partition all of the free slot into NCPU groups. For example,
5444 * In system where we have 15 slots, and 4 CPU, then slot s1,s5,s9,s13
5445 * are marked belonging to CPU1, s2,s6,s10,s14 to CPU2, s3,s7,s11,s15
5446 * to CPU3, and s4,s8,s12 to CPU4.
5447 * 2) In each of the group, an alloc/release queue pair is created,
5448 * and both the allocq and the releaseq have a dedicated mutex.
5449 * 3) When init, all of the slots in a CPU group are inserted into the
5450 * allocq of its CPU's pair.
5451 * 4) When doing IO,
5452 * mptsas_scsi_start()
5453 * {
5454 * cpuid = the cpu NO of the cpu where this thread is running on
5455 * retry:
5456 * mutex_enter(&allocq[cpuid]);
5457 * if (get free slot = success) {
5458 * remove the slot from the allocq
5459 * mutex_exit(&allocq[cpuid]);
5460 * return(success);
5461 * } else { // exchange allocq and releaseq and try again
5462 * mutex_enter(&releq[cpuid]);
5463 * exchange the allocq and releaseq of this pair;
5464 * mutex_exit(&releq[cpuid]);
5465 * if (try to get free slot again = success) {
5466 * remove the slot from the allocq
5467 * mutex_exit(&allocq[cpuid]);
5468 * return(success);
5469 * } else {
5470 * MOD(cpuid)++;
5471 * goto retry;
5472 * if (all CPU groups tried)
5473 * mutex_exit(&allocq[cpuid]);
5474 * return(failure);
5475 * }
5476 * }
5477 * }
5478 * ISR()
5479 * {
5480 * cpuid = the CPU group id where the slot sending the
5481 * cmd belongs;
5482 * mutex_enter(&releq[cpuid]);
5483 * remove the slot from the releaseq
5484 * mutex_exit(&releq[cpuid]);
5485 * }
5486 * This way, only when the queue pair doing exchange have mutex
5487 * contentions.
5488 *
5489 * For mutex m_intr_mutex and m_tgt_intr_mutex, there are 2 scenarios:
5490 *
5491 * a)If the elements are only checked but not modified in the ISR, then
5492 * only the places where those elements are modifed(outside of ISR)
5493 * need to be protected by the new introduced mutex.
5494 * For example, data A is only read/checked in ISR, then we need do
5495 * like this:
5496 * In ISR:
5497 * {
5498 * mutex_enter(&new_mutex);
5499 * read(A);
5500 * mutex_exit(&new_mutex);
5501 * //the new_mutex here is either the m_tgt_intr_mutex or
5502 * //the m_intr_mutex.
5503 * }
5504 * In non-ISR
5505 * {
5506 * mutex_enter(&m_mutex); //the stock driver already did this
5507 * mutex_enter(&new_mutex);
5508 * write(A);
5509 * mutex_exit(&new_mutex);
5510 * mutex_exit(&m_mutex); //the stock driver already did this
5511 *
5512 * read(A);
5513 * // read(A) in non-ISR is not required to be protected by new
5514 * // mutex since 'A' has already been protected by m_mutex
5515 * // outside of the ISR
5516 * }
5517 *
5518 * Those fields in mptsas_target_t/ptgt which are only read in ISR
5519 * fall into this catergory. So they, together with the fields which
5520 * are never read in ISR, are not necessary to be protected by
5521 * m_tgt_intr_mutex, don't bother.
5522 * checking of m_waitq also falls into this catergory. so all of the
5523 * place outside of ISR where the m_waitq is modified, such as in
5524 * mptsas_waitq_add(), mptsas_waitq_delete(), mptsas_waitq_rm(),
5525 * m_intr_mutex should be used.
5526 *
5527 * b)If the elements are modified in the ISR, then each place where
5528 * those elements are referred(outside of ISR) need to be protected
5529 * by the new introduced mutex. Of course, if those elements only
5530 * appear in the non-key code path, that is, they don't affect
5531 * performance, then the m_mutex can still be used as before.
5532 * For example, data B is modified in key code path in ISR, and data C
5533 * is modified in non-key code path in ISR, then we can do like this:
5534 * In ISR:
5535 * {
5536 * mutex_enter(&new_mutex);
5537 * wirte(B);
5538 * mutex_exit(&new_mutex);
5539 * if (seldom happen) {
5540 * mutex_enter(&m_mutex);
5541 * write(C);
5542 * mutex_exit(&m_mutex);
5543 * }
5544 * //the new_mutex here is either the m_tgt_intr_mutex or
5545 * //the m_intr_mutex.
5546 * }
5547 * In non-ISR
5548 * {
5549 * mutex_enter(&new_mutex);
5550 * write(B);
5551 * mutex_exit(&new_mutex);
5552 *
5553 * mutex_enter(&new_mutex);
5554 * read(B);
5555 * mutex_exit(&new_mutex);
5556 * // both write(B) and read(B) in non-ISR is required to be
5557 * // protected by new mutex outside of the ISR
5558 *
5559 * mutex_enter(&m_mutex); //the stock driver already did this
5560 * read(C);
5561 * write(C);
5562 * mutex_exit(&m_mutex); //the stock driver already did this
5563 * // both write(C) and read(C) in non-ISR have been already
5564 * // been protected by m_mutex outside of the ISR
5565 * }
5566 *
5567 * For example, ptgt->m_t_ncmds fall into 'B' of this catergory, and
5568 * elements shown in address reply, restart_hba, passthrough, IOC
5569 * fall into 'C' of this catergory.
5570 *
5571 * In any case where mutexs are nested, make sure in the following
5572 * order:
5573 * m_mutex -> m_intr_mutex -> m_tgt_intr_mutex
5574 * m_intr_mutex -> m_tgt_intr_mutex
5575 * m_mutex -> m_intr_mutex
5576 * m_mutex -> m_tgt_intr_mutex
5577 *
5578 * 2.
5579 * Make sure at any time, getting the ReplyDescriptor by m_post_index
5580 * and setting m_post_index to the ReplyDescriptorIndex register are
5581 * atomic. Since m_mutex is not used for this purpose in ISR, the new
5582 * mutex m_intr_mutex must play this role. So mptsas_poll(), where this
5583 * kind of getting/setting is also performed, must use m_intr_mutex.
5584 * Note, since context reply in ISR/process_intr is the only code path
5585 * which affect performance, a fast path is introduced to only handle
5586 * the read/write IO having context reply. For other IOs such as
5587 * passthrough and IOC with context reply and all address reply, we
5588 * use the as-is process_intr() to handle them. In order to keep the
5589 * same semantics in process_intr(), make sure any new mutex is not held
5590 * before enterring it.
5591 */
5595 /*
5596 * If interrupts are shared by two channels then check whether this
5597 * interrupt is genuinely for this channel by making sure first the
5598 * chip is in high power state.
5599 */
5604 }
5606 /*
5607 * If polling, interrupt was triggered by some shared interrupt because
5608 * IOC interrupts are disabled during polling, so polling routine will
5609 * handle any replies. Considering this, if polling is happening,
5610 * return with interrupt unclaimed.
5611 */
5616 }
5618 /*
5619 * Read the istat register.
5620 */
5622 /*
5623 * read fifo until empty.
5624 */
5625 #ifndef __lock_lint
5627 #endif
5630 DDI_DMA_SYNC_FORCPU);
5639 }
5641 /*
5642 * The reply is valid, process it according to its
5643 * type. Also, set a flag for updating the reply index
5644 * after they've all been processed.
5645 */
5653 MPI2_RPY_DESCRIPT_FLAGS_SCSI_IO_SUCCESS) {
5657 TRUE) {
5659 SMID;
5660 i++;
5661 }
5663 MPI2_RPY_DESCRIPT_FLAGS_ADDRESS_REPLY) {
5667 ReplyFrameAddress);
5671 i++;
5672 }
5673 /*
5674 * Clear the reply descriptor for re-use and increment
5675 * index.
5676 */
5681 DDI_DMA_SYNC_FORDEV);
5683 /*
5684 * Increment post index and roll over if needed.
5685 */
5688 }
5691 }
5693 /*
5694 * Update the global reply index if at least one reply was
5695 * processed.
5696 */
5701 /*
5702 * For fma, only check the PIO is required and enough
5703 * here. Those cases where fastpath is not hit, the
5704 * mptsas_fma_check() check all of the types of
5705 * fma. That is not necessary and sometimes not
5706 * correct. fma check should only be done after
5707 * the PIO and/or dma is performed.
5708 */
5710 DDI_SUCCESS)) {
5712 DDI_SERVICE_UNAFFECTED);
5713 }
5715 }
5719 }
5723 /*
5724 * Since most of the cmds(read and write IO with success return.)
5725 * have already been processed in fast path in which the m_mutex
5726 * is not held, handling here the address reply and other context reply
5727 * such as passthrough and IOC cmd with m_mutex held should be a big
5728 * issue for performance.
5729 * If holding m_mutex to process these cmds was still an obvious issue,
5730 * we can process them in a taskq.
5731 */
5736 }
5738 /*
5739 * If no helper threads are created, process the doneq in ISR. If
5740 * helpers are created, use the doneq length as a metric to measure the
5741 * load on the interrupt CPU. If it is long enough, which indicates the
5742 * load is heavy, then we deliver the IO completions to the helpers.
5743 * This measurement has some limitations, although it is simple and
5744 * straightforward and works well for most of the cases at present.
5745 */
5758 }
5759 }
5761 /*
5762 * If there are queued cmd, start them now.
5763 */
5771 }
5774 }
5776 /*
5777 * In ISR, the successfully completed read and write IO are processed in a
5778 * fast path. This function is only used to handle non-fastpath IO, including
5779 * all of the address reply, and the context reply for IOC cmd, passthrough,
5780 * etc.
5781 * This function is also used to process polled cmd.
5782 */
5783 static void
5785 pMpi2ReplyDescriptorsUnion_t reply_desc_union)
5786 {
5789 /*
5790 * The reply is valid, process it according to its
5791 * type. Also, set a flag for updated the reply index
5792 * after they've all been processed.
5793 */
5802 }
5803 }
5805 /*
5806 * handle qfull condition
5807 */
5808 static void
5810 {
5815 /*
5816 * We have exhausted the retries on QFULL, or,
5817 * the target driver has indicated that it
5818 * wants to handle QFULL itself by setting
5819 * qfull-retries capability to 0. In either case
5820 * we want the target driver's QFULL handling
5821 * to kick in. We do this by having pkt_reason
5822 * as CMD_CMPLT and pkt_scbp as STATUS_QFULL.
5823 */
5832 }
5843 /*
5844 * when target gives queue full status with no commands
5845 * outstanding (m_t_ncmds == 0), throttle is set to 0
5846 * (HOLD_THROTTLE), and the queue full handling start
5847 * (see psarc/1994/313); if there are commands outstanding,
5848 * throttle is set to (m_t_ncmds - 2)
5849 */
5852 /*
5853 * By setting throttle to QFULL_THROTTLE, we
5854 * avoid submitting new commands and in
5855 * mptsas_restart_cmd find out slots which need
5856 * their throttles to be cleared.
5857 */
5863 }
5864 }
5866 }
5867 }
5869 mptsas_phymask_t
5871 {
5879 /*
5880 * If physport is 0xFF, this is a RAID volume. Use phymask of 0.
5881 */
5884 }
5892 }
5893 }
5897 }
5899 /*
5900 * mpt free device handle after device gone, by use of passthrough
5901 */
5902 static int
5904 {
5905 Mpi2SasIoUnitControlRequest_t req;
5906 Mpi2SasIoUnitControlReply_t rep;
5911 /*
5912 * Need to compose a SAS IO Unit Control request message
5913 * and call mptsas_do_passthru() function
5914 */
5928 }
5930 /* do passthrough success, check the ioc status */
5935 }
5938 }
5940 static void
5942 {
5973 }
5974 }
5980 }
5981 }
5986 /*
5987 * register a iport, if the port has already been existed
5988 * SCSA will do nothing and just return.
5989 */
5992 }
5995 }
5997 /*
5998 * mptsas_handle_dr is a task handler for DR, the DR action includes:
5999 * 1. Directly attched Device Added/Removed.
6000 * 2. Expander Device Added/Removed.
6001 * 3. Indirectly Attached Device Added/Expander.
6002 * 4. LUNs of a existing device status change.
6003 * 5. RAID volume created/deleted.
6004 * 6. Member of RAID volume is released because of RAID deletion.
6005 * 7. Physical disks are removed because of RAID creation.
6006 */
6007 static void
6017 uint_t event;
6034 /*
6035 * Direct attached or expander attached device added
6036 * into system or a Phys Disk that is being unhidden.
6037 */
6039 }
6042 /*
6043 * New expander added into system, it must be the head
6044 * of topo_change_list_t
6045 */
6051 }
6052 /*
6053 * All cases port_update == 1 may cause initiator port form change
6054 */
6057 /*
6058 * mpt->m_port_chng flag indicates some PHYs of initiator
6059 * port have changed to online. So when expander added or
6060 * directly attached device online event come, we force to
6061 * update port information by issueing SAS IO Unit Page and
6062 * update PHYMASKs.
6063 */
6067 }
6076 MPTSAS_DR_EVENT_OFFLINE_SMP)) {
6077 /*
6078 * For all offline events, phymask is known
6079 */
6082 }
6085 }
6089 }
6092 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED) &&
6094 /*
6095 * There is no any field in IR_CONFIG_CHANGE
6096 * event indicate physport/phynum, let's get
6097 * parent after SAS Device Page0 request.
6098 */
6100 }
6104 /*
6105 * If the direct attached device added or a
6106 * phys disk is being unhidden, argument
6107 * physport actually is PHY#, so we have to get
6108 * phymask according PHY#.
6109 */
6111 }
6113 /*
6114 * Translate physport to phymask so that we can search
6115 * parent dip.
6116 */
6118 physport);
6121 find_parent:
6123 /*
6124 * For RAID topology change node, write the iport name
6125 * as v0.
6126 */
6130 /*
6131 * phymask can bo 0 if the drive has been
6132 * pulled by the time an add event is
6133 * processed. If phymask is 0, just skip this
6134 * event and continue.
6135 */
6147 }
6149 }
6151 phy_mask_name);
6156 }
6158 }
6160 handle_topo_change:
6174 /*
6175 * If direct attached device associated, make sure
6176 * reset the parent before start the next one. But
6177 * all devices associated with expander shares the
6178 * parent. Also, reset parent if this is for RAID.
6179 */
6181 }
6182 }
6183 out:
6185 }
6187 static void
6190 {
6211 {
6216 /*
6217 * Get latest RAID info.
6218 */
6226 }
6229 /*
6230 * If a Phys Disk was deleted, RAID info needs to be
6231 * updated to reflect the new topology.
6232 */
6235 /*
6236 * Get sas device page 0 by DevHandle to make sure if
6237 * SSP/SATA end device exist.
6238 */
6240 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
6247 "mptsas_handle_topo_change: target %d is "
6252 "mptsas_handle_topo_change: could not "
6254 }
6255 /*
6256 * If rval is DEV_INFO_PHYS_DISK than there is nothing
6257 * else to do, just leave.
6258 */
6261 }
6262 }
6274 phy_mask_name);
6281 }
6282 }
6290 /*
6291 * hold nexus for bus configure
6292 */
6296 /*
6297 * release nexus for bus configure
6298 */
6302 /*
6303 * Add parent's props for SMHBA support
6304 */
6311 parent,
6312 SCSI_ADDR_PROP_ATTACHED_PORT,
6313 attached_wwnstr)
6316 parent,
6317 SCSI_ADDR_PROP_ATTACHED_PORT);
6321 }
6324 DDI_PROP_SUCCESS) {
6330 }
6332 /*
6333 * Update PHY info for smhba
6334 */
6341 }
6348 DDI_PROP_SUCCESS) {
6352 "mptsas virtual-port"
6355 }
6356 }
6357 }
6364 }
6366 {
6382 }
6387 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED)) {
6388 /*
6389 * Get latest RAID info if RAID volume status changes
6390 * or Phys Disk status changes
6391 */
6393 }
6394 /*
6395 * Abort all outstanding command on the device
6396 */
6402 rval));
6403 }
6418 /*
6419 * Clear parent's props for SMHBA support
6420 */
6426 DDI_PROP_SUCCESS) {
6428 SCSI_ADDR_PROP_ATTACHED_PORT);
6432 }
6435 DDI_PROP_SUCCESS) {
6437 MPTSAS_NUM_PHYS);
6441 }
6444 DDI_PROP_SUCCESS) {
6446 MPTSAS_VIRTUAL_PORT);
6450 }
6451 }
6457 }
6463 /*
6464 * clean DR_INTRANSITION flag to allow I/O down to
6465 * PHCI driver since failover finished.
6466 * Invalidate the devhdl
6467 */
6473 }
6475 /*
6476 * Send SAS IO Unit Control to free the dev handle
6477 */
6484 rval));
6485 }
6488 }
6490 {
6492 /*
6493 * If this is the remove handle event, do a reset first.
6494 */
6501 }
6502 }
6504 /*
6505 * Send SAS IO Unit Control to free the dev handle
6506 */
6510 rval));
6512 }
6514 {
6515 mptsas_smp_t smp;
6528 }
6533 }
6542 }
6544 {
6552 /*
6553 * The mptsas_smp_t data is released only if the dip is offlined
6554 * successfully.
6555 */
6564 DEVINFO_DIRECT_ATTACHED) {
6567 DDI_PROP_SUCCESS) {
6569 MPTSAS_VIRTUAL_PORT);
6573 }
6574 /*
6575 * Check whether the smp connected to the iport,
6576 */
6579 DDI_PROP_SUCCESS) {
6581 MPTSAS_NUM_PHYS);
6585 }
6586 /*
6587 * Clear parent's attached-port props
6588 */
6592 DDI_PROP_SUCCESS) {
6594 SCSI_ADDR_PROP_ATTACHED_PORT);
6598 }
6599 }
6609 }
6614 }
6617 }
6618 }
6620 /*
6621 * Record the event if its type is enabled in mpt instance by ioctl.
6622 */
6623 static void
6625 {
6627 pMpi2EventNotificationReply_t eventreply;
6643 /*
6644 * Generate a system event to let anyone who cares know that a
6645 * LOG_ENTRY_ADDED event has occurred. This is sent no matter what the
6646 * event mask is set to.
6647 */
6650 }
6652 /*
6653 * Record the event only if it is not masked. Determine which dword
6654 * and bit of event mask to test.
6655 */
6667 /*
6668 * Limit data to size in m_event entry
6669 */
6672 }
6677 }
6679 /*
6680 * check for index wrap-around
6681 */
6684 }
6687 /*
6688 * Set flag to send the event.
6689 */
6691 }
6692 }
6694 /*
6695 * Generate a system event if flag is set to let anyone who cares know
6696 * that an event has occurred.
6697 */
6701 }
6702 }
6704 #define SMP_RESET_IN_PROGRESS MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS
6705 /*
6706 * handle sync events from ioc in interrupt
6707 * return value:
6708 * DDI_SUCCESS: The event is handled by this func
6709 * DDI_FAILURE: Event is not handled
6710 */
6711 static int
6713 {
6715 pMpi2EventNotificationReply_t eventreply;
6718 uint_t iocstatus;
6734 "!mptsas_handle_event_sync: IOCStatus=0x%x, "
6740 "mptsas_handle_event_sync: IOCStatus=0x%x, "
6744 }
6745 }
6747 /*
6748 * figure out what kind of event we got and handle accordingly
6749 */
6752 {
6753 pMpi2EventDataSasTopologyChangeList_t sas_topo_change_list;
6796 /*
6797 * New expander device added
6798 */
6802 KM_SLEEP);
6814 }
6820 expd_handle);
6826 KM_SLEEP);
6838 }
6848 }
6851 }
6862 /*
6863 * Filter out processing of Phy Vacant Status unless
6864 * the reason code is "Not Responding". Process all
6865 * other combinations of Phy Status and Reason Codes.
6866 */
6868 MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT) &&
6870 MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING)) {
6872 }
6878 {
6885 MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK) >>
6886 MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT;
6919 }
6920 /*
6921 * New target device added into the system.
6922 * Set association flag according to if an
6923 * expander is used or not.
6924 */
6925 exp_flag =
6926 MPTSAS_TOPO_FLAG_EXPANDER_ATTACHED_DEVICE;
6928 MPTSAS_TOPO_FLAG_EXPANDER_ASSOCIATED) {
6930 }
6933 KM_SLEEP);
6936 MPTSAS_DR_EVENT_RECONFIG_TARGET;
6938 /*
6939 * Per MPI 2, if expander dev handle
6940 * is 0, it's a directly attached
6941 * device. So driver use PHY to decide
6942 * which iport is associated
6943 */
6946 }
6956 }
6958 }
6960 {
6964 /*
6965 * Set association flag according to if an
6966 * expander is used or not.
6967 */
6968 exp_flag =
6969 MPTSAS_TOPO_FLAG_EXPANDER_ATTACHED_DEVICE;
6971 MPTSAS_TOPO_FLAG_EXPANDER_ASSOCIATED) {
6973 }
6974 /*
6975 * Target device is removed from the system
6976 * Before the device is really offline from
6977 * from system.
6978 */
6980 dev_handle);
6981 /*
6982 * If ptgt is NULL here, it means that the
6983 * DevHandle is not in the hash table. This is
6984 * reasonable sometimes. For example, if a
6985 * disk was pulled, then added, then pulled
6986 * again, the disk will not have been put into
6987 * the hash table because the add event will
6988 * have an invalid phymask. BUT, this does not
6989 * mean that the DevHandle is invalid. The
6990 * controller will still have a valid DevHandle
6991 * that must be removed. To do this, use the
6992 * MPTSAS_TOPO_FLAG_REMOVE_HANDLE event.
6993 */
6997 KM_SLEEP);
7001 MPTSAS_TOPO_FLAG_REMOVE_HANDLE;
7007 topo_node;
7011 }
7013 }
7015 /*
7016 * Update DR flag immediately avoid I/O failure
7017 * before failover finish. Pay attention to the
7018 * mutex protect, we need grab the per target
7019 * mutex during set m_dr_flag because the
7020 * m_mutex would not be held all the time in
7021 * mptsas_scsi_start().
7022 */
7029 KM_SLEEP);
7033 MPTSAS_DR_EVENT_OFFLINE_TARGET;
7042 }
7044 }
7049 MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK) >>
7050 MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT;
7057 ESC_SAS_PHY_EVENT,
7058 SAS_PHY_REMOVE,
7061 negotiated_link_rate
7068 ESC_SAS_PHY_EVENT,
7069 SAS_PHY_OFFLINE,
7086 }
7088 ESC_SAS_PHY_EVENT,
7089 SAS_PHY_ONLINE,
7098 }
7100 ESC_SAS_PHY_EVENT,
7101 SAS_PHY_ONLINE,
7110 }
7112 ESC_SAS_PHY_EVENT,
7113 SAS_PHY_ONLINE,
7120 }
7123 MPI2_EVENT_SAS_TOPO_LR_PREV_MASK) >>
7124 MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT;
7155 }
7163 "target not responding, delaying "
7166 }
7169 prev));
7170 }
7172 /*
7173 * Launch DR taskq to handle topology change
7174 */
7180 }
7181 }
7183 }
7185 {
7216 {
7222 KM_SLEEP);
7226 MPTSAS_DR_EVENT_RECONFIG_TARGET;
7230 MPTSAS_TOPO_FLAG_RAID_ASSOCIATED;
7237 }
7239 }
7242 {
7246 volhandle);
7250 /*
7251 * Clear any flags related to volume
7252 */
7255 /*
7256 * Update DR flag immediately avoid I/O failure
7257 */
7264 KM_SLEEP);
7268 MPTSAS_DR_EVENT_OFFLINE_TARGET;
7271 MPTSAS_TOPO_FLAG_RAID_ASSOCIATED;
7278 }
7280 }
7283 {
7285 diskhandle);
7289 /*
7290 * Update DR flag immediately avoid I/O failure
7291 */
7298 KM_SLEEP);
7302 MPTSAS_DR_EVENT_OFFLINE_TARGET;
7305 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED;
7312 }
7314 }
7317 {
7318 /*
7319 * The physical drive is released by a IR
7320 * volume. But we cannot get the the physport
7321 * or phynum from the event data, so we only
7322 * can get the physport/phynum after SAS
7323 * Device Page0 request for the devhdl.
7324 */
7327 KM_SLEEP);
7331 MPTSAS_DR_EVENT_RECONFIG_TARGET;
7334 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED;
7342 }
7344 }
7347 }
7348 }
7351 /*
7352 * Launch DR taskq to handle topology change
7353 */
7359 }
7360 }
7362 }
7365 }
7368 }
7370 /*
7371 * handle events from ioc
7372 */
7373 static void
7375 {
7377 pMpi2EventNotificationReply_t eventreply;
7382 uint_t iocstatus;
7398 "!mptsas_handle_event: IOCStatus=0x%x, "
7404 "mptsas_handle_event: IOCStatus=0x%x, "
7408 }
7409 }
7411 /*
7412 * figure out what kind of event we got and handle accordingly
7413 */
7421 iocloginfo));
7430 {
7435 sasdiscovery =
7456 }
7462 }
7467 {
7468 pMpi2EventDataTaskSetFull_t taskfull;
7476 }
7478 {
7479 /*
7480 * SAS TOPOLOGY CHANGE LIST Event has already been handled
7481 * in mptsas_handle_event_sync() of interrupt context
7482 */
7484 }
7486 {
7487 pMpi2EventDataSasEnclDevStatusChange_t encstatus;
7505 }
7510 }
7512 /*
7513 * MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE is handled by
7514 * mptsas_handle_event_sync,in here just send ack message.
7515 */
7517 {
7518 pMpi2EventDataSasDeviceStatusChange_t statuschange;
7537 wwn));
7589 }
7591 }
7593 {
7594 /*
7595 * IR TOPOLOGY CHANGE LIST Event has already been handled
7596 * in mpt_handle_event_sync() of interrupt context
7597 */
7599 }
7601 {
7629 rc);
7630 }
7636 }
7638 {
7639 pMpi2EventDataSasBroadcastPrimitive_t sas_broadcast;
7654 ESC_SAS_HBA_PORT_BROADCAST,
7655 SAS_PORT_BROADCAST_CHANGE,
7660 ESC_SAS_HBA_PORT_BROADCAST,
7661 SAS_PORT_BROADCAST_SES,
7666 ESC_SAS_HBA_PORT_BROADCAST,
7667 SAS_PORT_BROADCAST_D01_4,
7672 ESC_SAS_HBA_PORT_BROADCAST,
7673 SAS_PORT_BROADCAST_D04_7,
7678 ESC_SAS_HBA_PORT_BROADCAST,
7679 SAS_PORT_BROADCAST_D16_7,
7684 ESC_SAS_HBA_PORT_BROADCAST,
7685 SAS_PORT_BROADCAST_D29_7,
7690 ESC_SAS_HBA_PORT_BROADCAST,
7691 SAS_PORT_BROADCAST_D24_0,
7696 ESC_SAS_HBA_PORT_BROADCAST,
7697 SAS_PORT_BROADCAST_D27_4,
7705 }
7710 }
7712 {
7728 /*
7729 * Get latest RAID info and then find the DevHandle for this
7730 * event in the configuration. If the DevHandle is not found
7731 * just exit the event.
7732 */
7741 }
7742 }
7743 }
7746 }
7750 {
7753 state;
7757 ", auto-config of hot-swap drives is %s"
7758 ", write caching is %s"
7761 MPI2_RAIDVOL0_SETTING_AUTO_CONFIG_HSWAP_DISABLE
7763 i == MPI2_RAIDVOL0_SETTING_UNCHANGED
7765 i == MPI2_RAIDVOL0_SETTING_DISABLE_WRITE_CACHING
7767 i == MPI2_RAIDVOL0_SETTING_ENABLE_WRITE_CACHING
7772 }
7774 {
7780 state == MPI2_RAID_VOL_STATE_OPTIMAL
7782 state == MPI2_RAID_VOL_STATE_DEGRADED
7784 state == MPI2_RAID_VOL_STATE_ONLINE
7786 state == MPI2_RAID_VOL_STATE_INITIALIZING
7788 state == MPI2_RAID_VOL_STATE_FAILED
7790 state == MPI2_RAID_VOL_STATE_MISSING
7794 }
7796 {
7802 vol,
7803 state & MPI2_RAIDVOL0_STATUS_FLAG_ENABLED
7805 state & MPI2_RAIDVOL0_STATUS_FLAG_QUIESCED
7807 state & MPI2_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE
7809 state &
7810 MPI2_RAIDVOL0_STATUS_FLAG_BAD_BLOCK_TABLE_FULL
7812 state &
7813 MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
7815 state & MPI2_RAIDVOL0_STATUS_FLAG_BACKGROUND_INIT
7817 state &
7818 MPI2_RAIDVOL0_STATUS_FLAG_CAPACITY_EXPANSION
7820 state &
7821 MPI2_RAIDVOL0_STATUS_FLAG_CONSISTENCY_CHECK
7823 state & MPI2_RAIDVOL0_STATUS_FLAG_DATA_SCRUB
7826 }
7829 }
7831 }
7833 {
7859 " PhysDiskNum %d with DevHandle 0x%x in slot %d "
7860 "for enclosure with handle 0x%x is now in hot "
7869 " PhysDiskNum %d with DevHandle 0x%x in slot %d "
7870 "for enclosure with handle 0x%x is now "
7872 enchandle,
7873 status & MPI2_PHYSDISK0_STATUS_FLAG_INACTIVE_VOLUME
7875 status & MPI2_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
7877 status & MPI2_PHYSDISK0_STATUS_FLAG_QUIESCED
7879 status &
7880 MPI2_PHYSDISK0_STATUS_FLAG_WRITE_CACHE_ENABLED
7882 status & MPI2_PHYSDISK0_STATUS_FLAG_OCE_TARGET
7888 " PhysDiskNum %d with DevHandle 0x%x in slot %d "
7891 state == MPI2_RAID_PD_STATE_OPTIMAL
7893 state == MPI2_RAID_PD_STATE_REBUILDING
7895 state == MPI2_RAID_PD_STATE_DEGRADED
7897 state == MPI2_RAID_PD_STATE_HOT_SPARE
7899 state == MPI2_RAID_PD_STATE_ONLINE
7901 state == MPI2_RAID_PD_STATE_OFFLINE
7903 state == MPI2_RAID_PD_STATE_NOT_COMPATIBLE
7905 state == MPI2_RAID_PD_STATE_NOT_CONFIGURED
7909 }
7911 }
7916 }
7918 /*
7919 * Return the reply frame to the free queue.
7920 */
7924 DDI_DMA_SYNC_FORDEV);
7927 }
7931 }
7933 /*
7934 * invoked from timeout() to restart qfull cmds with throttle == 0
7935 */
7936 static void
7938 {
7947 MPTSAS_HASH_FIRST);
7953 MAX_THROTTLE);
7954 }
7955 }
7960 }
7963 }
7965 /*
7966 * mptsas_remove_cmd0 is similar to mptsas_remove_cmd except that it is called
7967 * where m_intr_mutex has already been held.
7968 */
7969 void
7971 {
7974 /*
7975 * With new fine-grained lock mechanism, the outstanding cmd is only
7976 * linked to m_active before the dma is triggerred(MPTSAS_START_CMD)
7977 * to send it. that is, mptsas_save_cmd() doesn't link the outstanding
7978 * cmd now. So when mptsas_remove_cmd is called, a mptsas_save_cmd must
7979 * have been called, but the cmd may have not been linked.
7980 * For mptsas_remove_cmd0, the cmd must have been linked.
7981 * In order to keep the same semantic, we link the cmd to the
7982 * outstanding cmd list.
7983 */
7989 }
7993 {
8003 /*
8004 * Task Management cmds are removed in their own routines. Also,
8005 * we don't want to modify timeout based on TM cmds.
8006 */
8009 }
8017 /*
8018 * remove the cmd.
8019 */
8033 /*
8034 * only decrement per target ncmds if command
8035 * has a target associated with it.
8036 */
8040 /*
8041 * reset throttle if we just ran an untagged command
8042 * to a tagged target
8043 */
8047 }
8049 }
8051 /*
8052 * This is all we need to do for ioc commands.
8053 * The ioc cmds would never be handled in fastpath in ISR, so we make
8054 * sure the mptsas_return_to_pool() would always be called with
8055 * m_mutex protected.
8056 */
8061 }
8063 /*
8064 * Figure out what to set tag Q timeout for...
8065 *
8066 * Optimize: If we have duplicate's of same timeout
8067 * we're using, then we'll use it again until we run
8068 * out of duplicates. This should be the normal case
8069 * for block and raw I/O.
8070 * If no duplicates, we have to scan through tag que and
8071 * find the longest timeout value and use it. This is
8072 * going to take a while...
8073 * Add 1 to m_n_slots to account for TM request.
8074 */
8082 ushort_t i;
8083 /*
8084 * This crude check assumes we don't do
8085 * this too often which seems reasonable
8086 * for block and raw I/O.
8087 */
8097 }
8098 }
8103 }
8104 }
8105 }
8110 }
8112 /*
8113 * start a fresh request from the top of the device queue.
8114 */
8115 static void
8117 {
8125 /*
8126 * If there is a reset delay, don't start any cmds. Otherwise, start
8127 * as many cmds as possible.
8128 * Since SMID 0 is reserved and the TM slot is reserved, the actual max
8129 * commands is m_max_requests - 2.
8130 */
8137 /*
8138 * passthru command get slot need
8139 * set CFLAG_PREPARED.
8140 */
8144 }
8147 }
8150 /*
8151 * Send the config page request and delete it
8152 * from the waitq.
8153 */
8157 }
8160 }
8163 /*
8164 * Send the FW Diag request and delete if from
8165 * the waitq.
8166 */
8170 }
8173 }
8182 }
8190 }
8192 }
8195 }
8196 out:
8198 }
8199 }
8201 /*
8202 * mpt tag type lookup
8203 */
8207 /*
8208 * mptsas_start_cmd0 is similar to mptsas_start_cmd, except that, it is called
8209 * without ANY mutex protected, while, mptsas_start_cmd is called with m_mutex
8210 * protected.
8211 *
8212 * the relevant field in ptgt should be protected by m_tgt_intr_mutex in both
8213 * functions.
8214 *
8215 * before the cmds are linked on the slot for monitor as outstanding cmds, they
8216 * are accessed as slab objects, so slab framework ensures the exclusive access,
8217 * and no other mutex is requireed. Linking for monitor and the trigger of dma
8218 * must be done exclusively.
8219 */
8220 static int
8222 {
8226 caddr_t mem;
8227 pMpi2SCSIIORequest_t io_request;
8236 /*
8237 * Set SMID and increment index. Rollover to 1 instead of 0 if index
8238 * is at the max. 0 is an invalid SMID, so we call the first index 1.
8239 */
8242 /*
8243 * It is possible for back to back device reset to
8244 * happen before the reset delay has expired. That's
8245 * ok, just let the device reset go out on the bus.
8246 */
8249 }
8251 /*
8252 * if a non-tagged cmd is submitted to an active tagged target
8253 * then drain before submitting this cmd; SCSI-2 allows RQSENSE
8254 * to be untagged
8255 */
8267 }
8276 }
8279 }
8282 /*
8283 * Set correct tag bits.
8284 */
8300 }
8304 }
8306 }
8310 }
8319 MPI2_FUNCTION_SCSI_IO_REQUEST);
8326 /*
8327 * setup the Scatter/Gather DMA list for this request
8328 */
8334 MPI2_SGE_FLAGS_END_OF_BUFFER |
8335 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
8337 }
8339 /*
8340 * save ARQ information
8341 */
8350 }
8359 /*
8360 * Build request descriptor and write it to the request desc post reg.
8361 */
8370 /*
8371 * Start timeout.
8372 */
8374 #ifdef MPTSAS_TEST
8375 /*
8376 * Temporarily set timebase = 0; needed for
8377 * timeout torture test.
8378 */
8381 }
8382 #endif
8394 }
8395 #ifdef MPTSAS_TEST
8396 /*
8397 * Set back to a number higher than
8398 * mptsas_scsi_watchdog_tick
8399 * so timeouts will happen in mptsas_watchsubr
8400 */
8403 }
8404 #endif
8411 }
8413 }
8415 static int
8417 {
8421 caddr_t mem;
8422 pMpi2SCSIIORequest_t io_request;
8431 /*
8432 * Set SMID and increment index. Rollover to 1 instead of 0 if index
8433 * is at the max. 0 is an invalid SMID, so we call the first index 1.
8434 */
8437 /*
8438 * It is possible for back to back device reset to
8439 * happen before the reset delay has expired. That's
8440 * ok, just let the device reset go out on the bus.
8441 */
8444 }
8446 /*
8447 * if a non-tagged cmd is submitted to an active tagged target
8448 * then drain before submitting this cmd; SCSI-2 allows RQSENSE
8449 * to be untagged
8450 */
8462 }
8469 }
8472 }
8475 /*
8476 * Set correct tag bits.
8477 */
8493 }
8497 }
8499 }
8503 }
8512 MPI2_FUNCTION_SCSI_IO_REQUEST);
8519 /*
8520 * setup the Scatter/Gather DMA list for this request
8521 */
8527 MPI2_SGE_FLAGS_END_OF_BUFFER |
8528 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
8530 }
8532 /*
8533 * save ARQ information
8534 */
8543 }
8552 /*
8553 * Build request descriptor and write it to the request desc post reg.
8554 */
8561 /*
8562 * Start timeout.
8563 */
8565 #ifdef MPTSAS_TEST
8566 /*
8567 * Temporarily set timebase = 0; needed for
8568 * timeout torture test.
8569 */
8572 }
8573 #endif
8585 }
8586 #ifdef MPTSAS_TEST
8587 /*
8588 * Set back to a number higher than
8589 * mptsas_scsi_watchdog_tick
8590 * so timeouts will happen in mptsas_watchsubr
8591 */
8594 }
8595 #endif
8602 }
8604 }
8606 /*
8607 * Select a helper thread to handle current doneq
8608 */
8609 static void
8611 {
8618 /*
8619 * If the completed command on help thread[i] less than
8620 * doneq_thread_threshold, then pick the thread[i]. Otherwise
8621 * pick a thread which has least completed command.
8622 */
8629 }
8633 }
8635 }
8640 }
8642 /*
8643 * move the current global doneq to the doneq of thread[t]
8644 */
8645 static void
8647 {
8656 }
8662 }
8664 }
8666 void
8668 {
8671 /* Check all acc and dma handles */
8673 DDI_SUCCESS) ||
8675 DDI_SUCCESS) ||
8677 DDI_SUCCESS) ||
8679 DDI_SUCCESS) ||
8681 DDI_SUCCESS) ||
8683 DDI_SUCCESS) ||
8685 DDI_SUCCESS)) {
8687 DDI_SERVICE_UNAFFECTED);
8689 DDI_FME_VER0);
8692 }
8694 DDI_SUCCESS) ||
8696 DDI_SUCCESS) ||
8698 DDI_SUCCESS) ||
8700 DDI_SUCCESS) ||
8702 DDI_SUCCESS)) {
8704 DDI_SERVICE_UNAFFECTED);
8707 }
8713 }
8716 DDI_SUCCESS) ||
8718 DDI_SUCCESS)))) {
8722 }
8728 }
8734 }
8735 }
8737 /*
8738 * mptsas_doneq_add0 is similar to mptsas_doneq_add except that it is called
8739 * where m_intr_mutex has already been held.
8740 */
8743 {
8753 /*
8754 * only add scsi pkts that have completion routines to
8755 * the doneq. no intr cmds do not have callbacks.
8756 */
8761 }
8762 }
8764 /*
8765 * These routines manipulate the queue of commands that
8766 * are waiting for their completion routines to be called.
8767 * The queue is usually in FIFO order but on an MP system
8768 * it's possible for the completion routines to get out
8769 * of order. If that's a problem you need to add a global
8770 * mutex around the code that calls the completion routine
8771 * in the interrupt handler.
8772 */
8773 static void
8775 {
8783 }
8787 {
8791 /* pop one off the done queue */
8793 /* if the queue is now empty fix the tail pointer */
8797 }
8800 }
8802 }
8804 static void
8806 {
8820 /*
8821 * ONLY in ISR, is it called without m_mutex held, otherwise,
8822 * it is always called with m_mutex held.
8823 */
8826 /*
8827 * run the completion routines of all the
8828 * completed commands
8829 */
8833 /* run this command's completion routine */
8838 }
8843 }
8845 }
8847 /*
8848 * These routines manipulate the target's queue of pending requests
8849 */
8850 void
8852 {
8862 }
8869 }
8870 }
8874 {
8889 }
8890 }
8892 }
8894 /*
8895 * remove specified cmd from the middle of the wait queue.
8896 */
8897 static void
8899 {
8908 }
8921 }
8933 }
8935 }
8937 }
8939 /*
8940 * device and bus reset handling
8941 *
8942 * Notes:
8943 * - RESET_ALL: reset the controller
8944 * - RESET_TARGET: reset the target specified in scsi_address
8945 */
8946 static int
8948 {
8958 }
8960 level));
8963 /*
8964 * if we are not in panic set up a reset delay for this target
8965 */
8970 }
8974 /*
8975 * The transport layer expect to only see TRUE and
8976 * FALSE. Therefore, we will adjust the return value
8977 * if mptsas_do_scsi_reset returns FAILED.
8978 */
8982 }
8984 static int
8986 {
8995 devhdl);
8996 }
8998 /*
8999 * Issue a Target Reset message to the target specified but not to a
9000 * disk making up a raid volume. Just look through the RAID config
9001 * Phys Disk list of DevHandles. If the target's DevHandle is in this
9002 * list, then don't reset this target.
9003 */
9009 }
9010 }
9011 }
9018 }
9020 static int
9023 {
9030 }
9032 static int
9034 {
9046 }
9047 }
9049 static int
9051 {
9053 }
9055 void
9057 {
9061 /*
9062 * if the bus is draining/quiesced, no changes to the throttles
9063 * are allowed. Not allowing change of throttles during draining
9064 * limits error recovery but will reduce draining time
9065 *
9066 * all throttles should have been set to HOLD_THROTTLE
9067 */
9070 }
9076 }
9077 }
9079 /*
9080 * Clean up from a device reset.
9081 * For the case of target reset, this function clears the waitq of all
9082 * commands for a particular target. For the case of abort task set, this
9083 * function clears the waitq of all commonds for a particular target/lun.
9084 */
9085 static void
9087 {
9091 uchar_t reason;
9092 uint_t stat;
9096 /*
9097 * Make sure the I/O Controller has flushed all cmds
9098 * that are associated with this target for a target reset
9099 * and target/lun for abort task set.
9100 * Account for TM requests, which use the last SMID.
9101 */
9106 }
9114 tasktype));
9119 }
9124 /*FALLTHROUGH*/
9130 tasktype));
9134 stat);
9136 }
9140 }
9141 }
9144 /*
9145 * Flush the waitq of this target's cmds
9146 */
9161 }
9163 }
9168 /*FALLTHROUGH*/
9177 }
9179 }
9183 tasktype);
9185 }
9186 }
9188 /*
9189 * Clean up hba state, abort all outstanding command and commands in waitq
9190 * reset timeout of all targets.
9191 */
9192 static void
9194 {
9201 /*
9202 * The I/O Controller should have already sent back
9203 * all commands via the scsi I/O reply frame. Make
9204 * sure all commands have been flushed.
9205 * Account for TM request, which use the last SMID.
9206 */
9211 }
9214 /*
9215 * Need to make sure to tell everyone that might be
9216 * waiting on this command that it's going to fail. If
9217 * we get here, this command will never timeout because
9218 * the active command table is going to be re-allocated,
9219 * so there will be nothing to check against a time out.
9220 * Instead, mark the command as failed due to reset.
9221 */
9223 STAT_BUS_RESET);
9231 }
9233 }
9236 slot));
9242 }
9245 /*
9246 * Flush the waitq.
9247 */
9259 }
9260 }
9261 }
9263 /*
9264 * set pkt_reason and OR in pkt_statistics flag
9265 */
9266 static void
9268 uint_t stat)
9269 {
9270 #ifndef __lock_lint
9272 #endif
9280 }
9282 }
9283 }
9285 static void
9287 {
9296 }
9298 }
9300 static void
9302 {
9307 MPTSAS_HASH_FIRST);
9316 }
9319 }
9321 /*
9322 * mptsas_watch_reset_delay(_subr) is invoked by timeout() and checks every
9323 * mpt instance for active reset delays
9324 */
9325 static void
9327 {
9328 #ifndef __lock_lint
9330 #endif
9344 }
9348 }
9353 }
9354 }
9356 static int
9358 {
9368 MPTSAS_HASH_FIRST);
9373 MPTSAS_WATCH_RESET_DELAY_TICK;
9377 MAX_THROTTLE);
9378 restart++;
9381 }
9382 }
9387 }
9391 }
9393 }
9395 #ifdef MPTSAS_TEST
9396 static void
9398 {
9404 }
9407 }
9408 }
9409 }
9410 #endif
9412 /*
9413 * abort handling:
9414 *
9415 * Notes:
9416 * - if pkt is not NULL, abort just that command
9417 * - if pkt is NULL, abort all outstanding commands for target
9418 */
9419 static int
9421 {
9428 tran_tgt_private;
9439 }
9441 static int
9443 {
9450 /*
9451 * Abort the command pkt on the target/lun in ap. If pkt is
9452 * NULL, abort all outstanding commands on that target/lun.
9453 * If you can abort them, return 1, else return 0.
9454 * Each packet that's aborted should be sent back to the target
9455 * driver through the callback routine, with pkt_reason set to
9456 * CMD_ABORTED.
9457 *
9458 * abort cmd pkt on HBA hardware; clean out of outstanding
9459 * command lists, etc.
9460 */
9462 /* abort the specified packet */
9470 STAT_ABORTED);
9474 }
9476 /*
9477 * Have mpt firmware abort this command
9478 */
9486 /*
9487 * The transport layer expects only TRUE and FALSE.
9488 * Therefore, if mptsas_ioc_task_management returns
9489 * FAILED we will return FALSE.
9490 */
9494 }
9496 }
9498 /*
9499 * If pkt is NULL then abort task set
9500 */
9504 /*
9505 * The transport layer expects only TRUE and FALSE.
9506 * Therefore, if mptsas_ioc_task_management returns
9507 * FAILED we will return FALSE.
9508 */
9512 #ifdef MPTSAS_TEST
9515 }
9516 #endif
9518 done:
9521 }
9523 /*
9524 * capability handling:
9525 * (*tran_getcap). Get the capability named, and return its value.
9526 */
9527 static int
9529 {
9542 }
9582 MPI2_IOCFACTS_CAPABILITY_TLR)
9584 else
9590 }
9596 }
9598 /*
9599 * (*tran_setcap). Set the capability named to the value given.
9600 */
9601 static int
9603 {
9614 }
9621 }
9631 /*
9632 * None of these are settable via
9633 * the capability interface.
9634 */
9637 /*
9638 * We cannot turn off arq so return false if asked to
9639 */
9644 }
9668 }
9671 }
9673 /*
9674 * Utility routine for mptsas_ifsetcap/ifgetcap
9675 */
9676 /*ARGSUSED*/
9677 static int
9679 {
9687 }
9689 static int
9691 {
9701 }
9708 }
9709 /*
9710 * Since SMID 0 is reserved and the TM slot is reserved, the
9711 * number of slots that can be used at any one time is
9712 * m_max_requests - 2.
9713 */
9726 }
9728 }
9734 }
9755 }
9758 /*
9759 * An array of Mpi2ReplyDescriptorsUnion_t is defined here.
9760 * We are trying to eliminate the m_mutex in the context
9761 * reply code path in the ISR. Since the read of the
9762 * ReplyDescriptor and update/write of the ReplyIndex must
9763 * be atomic (since the poll thread may also update them at
9764 * the same time) so we first read out of the ReplyDescriptor
9765 * into this array and update the ReplyIndex register with a
9766 * separate mutex m_intr_mutex protected, and then release the
9767 * mutex and process all of them. the length of the array is
9768 * defined as max as 128(128*64=8k), which is
9769 * assumed as the maxmium depth of the interrupt coalese.
9770 */
9783 }
9789 }
9791 static void
9793 {
9808 }
9815 }
9822 }
9825 }
9837 }
9839 /*
9840 * Error logging, printing, and debug print routines.
9841 */
9844 /*PRINTFLIKE3*/
9845 void
9847 {
9855 }
9867 }
9870 }
9872 #ifdef MPTSAS_DEBUG
9873 /*PRINTFLIKE1*/
9874 void
9876 {
9886 #ifdef PROM_PRINTF
9888 #else
9890 #endif
9892 }
9893 #endif
9895 /*
9896 * timeout handling
9897 */
9898 static void
9900 {
9901 #ifndef __lock_lint
9903 #endif
9915 /* Skip device if not powered on */
9923 }
9924 }
9926 /*
9927 * Check if controller is in a FAULT state. If so, reset it.
9928 */
9938 }
9939 }
9941 /*
9942 * For now, always call mptsas_watchsubr.
9943 */
9949 }
9952 }
9959 }
9961 static void
9963 {
9970 #ifdef MPTSAS_TEST
9972 mptsas_test_untagged++;
9973 }
9974 #endif
9976 /*
9977 * Check for commands stuck in active slot
9978 * Account for TM requests, which use the last SMID.
9979 */
9985 mptsas_scsi_watchdog_tick;
9987 /*
9988 * There seems to be a command stuck
9989 * in the active slot. Drain throttle.
9990 */
9994 DRAIN_THROTTLE);
9996 }
9997 }
10002 mptsas_scsi_watchdog_tick;
10004 /*
10005 * passthrough command timeout
10006 */
10008 CFLAG_TIMEOUT);
10012 }
10013 }
10014 }
10015 }
10019 MPTSAS_HASH_FIRST);
10021 /*
10022 * In order to avoid using m_mutex in the key code path in ISR,
10023 * separate mutexs are introduced to protect those elements
10024 * shown in ISR.
10025 */
10028 /*
10029 * If we were draining due to a qfull condition,
10030 * go back to full throttle.
10031 */
10037 }
10043 mptsas_scsi_watchdog_tick) {
10045 mptsas_scsi_watchdog_tick;
10050 }
10060 }
10063 mptsas_scsi_watchdog_tick) {
10066 DRAIN_THROTTLE);
10067 }
10068 }
10072 }
10073 }
10075 /*
10076 * timeout recovery
10077 */
10078 static void
10080 {
10086 /*
10087 * If the current target is not the target passed in,
10088 * try to reset that target.
10089 */
10094 }
10095 }
10097 /*
10098 * Device / Hotplug control
10099 */
10100 static int
10102 {
10111 }
10113 static int
10115 {
10124 }
10126 static int
10128 {
10134 /* Set all the throttles to zero */
10136 MPTSAS_HASH_FIRST);
10144 }
10146 /* If there are any outstanding commands in the queue */
10154 /*
10155 * Quiesce has been interrupted
10156 */
10167 }
10175 }
10179 /* Bus has been quiesced */
10185 }
10186 }
10188 /* Bus was not busy - QUIESCED */
10192 }
10194 static int
10196 {
10203 MPTSAS_HASH_FIRST);
10211 }
10215 }
10217 static void
10219 {
10229 /*
10230 * The throttle may have been reset because
10231 * of a SCSI bus reset
10232 */
10242 }
10249 /* Command queue has been drained */
10251 }
10252 }
10254 }
10256 /*ARGSUSED*/
10257 static void
10259 {
10270 }
10278 }
10280 static void
10282 {
10283 caddr_t memp;
10284 pMPI2RequestHeader_t request_hdrp;
10289 ddi_dma_cookie_t data_cookie;
10290 ddi_dma_cookie_t dataout_cookie;
10308 /*
10309 * Store the passthrough message in memory location
10310 * corresponding to our slot number
10311 */
10318 }
10321 pMpi2SGESimple64_t sgep;
10325 request_size);
10330 MPI2_SGE_FLAGS_END_OF_BUFFER |
10331 MPI2_SGE_FLAGS_HOST_TO_IOC |
10332 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
10333 MPI2_SGE_FLAGS_SHIFT);
10341 sgep++;
10342 }
10345 MPI2_SGE_FLAGS_LAST_ELEMENT |
10346 MPI2_SGE_FLAGS_END_OF_BUFFER |
10347 MPI2_SGE_FLAGS_END_OF_LIST |
10348 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
10349 MPI2_SGE_FLAGS_SHIFT);
10352 MPI2_SGE_FLAGS_SHIFT);
10355 MPI2_SGE_FLAGS_SHIFT);
10356 }
10358 sge_flags);
10364 }
10369 pMpi2SCSIIORequest_t scsi_io_req;
10372 /*
10373 * Put SGE for data and data_out buffer at the end of
10374 * scsi_io_request message header.(64 bytes in total)
10375 * Following above SGEs, the residual space will be
10376 * used by sense data.
10377 */
10388 /*
10389 * Set SGLOffset0 value
10390 */
10394 /*
10395 * Setup descriptor info. RAID passthrough must use the
10396 * default request descriptor which is already set, so if this
10397 * is a SCSI IO request, change the descriptor to SCSI IO.
10398 */
10403 }
10404 }
10406 /*
10407 * We must wait till the message has been completed before
10408 * beginning the next message so we wait for this one to
10409 * finish.
10410 */
10419 }
10420 }
10424 static int
10429 {
10430 mptsas_pt_request_t pt;
10431 mptsas_dma_alloc_state_t data_dma_state;
10432 mptsas_dma_alloc_state_t dataout_dma_state;
10433 caddr_t memp;
10437 pMPI2RequestHeader_t request_hdrp;
10438 pMPI2RequestHeader_t request_msg;
10439 pMPI2DefaultReply_t reply_msg;
10440 Mpi2SCSIIOReply_t rep_msg;
10452 /*
10453 * copy in the request buffer since it could be used by
10454 * another thread when the pt request into waitq
10455 */
10461 }
10466 pMpi2SCSITaskManagementRequest_t task;
10471 mode);
10476 }
10478 }
10487 }
10499 }
10500 }
10502 }
10503 }
10512 }
10523 }
10524 }
10526 }
10532 }
10549 /*
10550 * Form a blank cmd/pkt to store the acknowledgement message
10551 */
10560 /*
10561 * Save the command in a slot
10562 */
10564 /*
10565 * Once passthru command get slot, set cmd_flags
10566 * CFLAG_PREPARED.
10567 */
10572 }
10576 }
10582 }
10589 }
10592 /*
10593 * cmd_rfm is zero means the command reply is a CONTEXT
10594 * reply and no PCI Write to post the free reply SMFA
10595 * because no reply message frame is used.
10596 * cmd_rfm is non-zero means the reply is a ADDRESS
10597 * reply and reply message frame is used.
10598 */
10601 DDI_DMA_SYNC_FORCPU);
10605 }
10612 }
10617 }
10623 }
10635 }
10639 mode)) {
10645 }
10646 }
10655 }
10656 }
10657 }
10662 DDI_DMA_SYNC_FORCPU);
10666 mode)) {
10672 }
10673 }
10674 }
10675 }
10677 out:
10678 /*
10679 * Put the reply frame back on the free queue, increment the free
10680 * index, and write the new index to the free index register. But only
10681 * if this reply is an ADDRESS reply.
10682 */
10688 DDI_DMA_SYNC_FORDEV);
10691 }
10694 }
10698 }
10703 DDI_SUCCESS) {
10705 DDI_SERVICE_UNAFFECTED);
10707 }
10709 }
10712 DDI_SUCCESS) {
10714 DDI_SERVICE_UNAFFECTED);
10716 }
10718 }
10722 }
10723 }
10728 }
10730 static int
10732 {
10733 /*
10734 * If timeout is 0, set timeout to default of 60 seconds.
10735 */
10738 }
10751 }
10752 /*
10753 * Send passthru request messages
10754 */
10765 }
10766 }
10768 static uint8_t
10770 {
10776 }
10777 }
10780 }
10782 static void
10784 {
10785 pMpi2DiagBufferPostRequest_t pDiag_post_msg;
10786 pMpi2DiagReleaseRequest_t pDiag_release_msg;
10793 /*
10794 * Form the diag message depending on the post or release function.
10795 */
10812 i++) {
10816 }
10835 }
10837 /*
10838 * Send the message
10839 */
10841 DDI_DMA_SYNC_FORDEV);
10843 MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
10848 DDI_SUCCESS) ||
10850 DDI_SUCCESS)) {
10852 }
10853 }
10855 static int
10858 {
10859 mptsas_diag_request_t diag;
10863 pMpi2DiagBufferPostReply_t reply;
10867 /*
10868 * If buffer is not enabled, just leave.
10869 */
10874 }
10876 /*
10877 * Clear some flags initially.
10878 */
10883 /*
10884 * Get a cmd buffer from the cmd buffer pool
10885 */
10890 }
10901 /*
10902 * Form a blank cmd/pkt to store the acknowledgement message
10903 */
10910 /*
10911 * Save the command in a slot
10912 */
10914 /*
10915 * Once passthru command get slot, set cmd_flags
10916 * CFLAG_PREPARED.
10917 */
10922 }
10926 }
10932 }
10934 /*
10935 * cmd_rfm points to the reply message if a reply was given. Check the
10936 * IOCStatus to make sure everything went OK with the FW diag request
10937 * and set buffer flags.
10938 */
10942 DDI_DMA_SYNC_FORCPU);
10946 /*
10947 * Get the reply message data
10948 */
10956 /*
10957 * If post failed quit.
10958 */
10965 }
10967 /*
10968 * Post was successful.
10969 */
10974 }
10976 out:
10977 /*
10978 * Put the reply frame back on the free queue, increment the free
10979 * index, and write the new index to the free index register. But only
10980 * if this reply is an ADDRESS reply.
10981 */
10987 DDI_DMA_SYNC_FORDEV);
10990 }
10993 }
10997 }
11000 }
11003 }
11005 static int
11009 {
11010 mptsas_diag_request_t diag;
11014 pMpi2DiagReleaseReply_t reply;
11018 /*
11019 * If buffer is not enabled, just leave.
11020 */
11027 }
11029 /*
11030 * Clear some flags initially.
11031 */
11036 /*
11037 * Get a cmd buffer from the cmd buffer pool
11038 */
11044 }
11055 /*
11056 * Form a blank cmd/pkt to store the acknowledgement message
11057 */
11064 /*
11065 * Save the command in a slot
11066 */
11068 /*
11069 * Once passthru command get slot, set cmd_flags
11070 * CFLAG_PREPARED.
11071 */
11076 }
11080 }
11086 }
11088 /*
11089 * cmd_rfm points to the reply message if a reply was given. Check the
11090 * IOCStatus to make sure everything went OK with the FW diag request
11091 * and set buffer flags.
11092 */
11096 DDI_DMA_SYNC_FORCPU);
11100 /*
11101 * Get the reply message data
11102 */
11108 /*
11109 * If release failed quit.
11110 */
11116 iocloginfo));
11118 }
11120 /*
11121 * Release was successful.
11122 */
11126 /*
11127 * If this was for an UNREGISTER diag type command, clear the
11128 * unique ID.
11129 */
11132 }
11133 }
11135 out:
11136 /*
11137 * Put the reply frame back on the free queue, increment the free
11138 * index, and write the new index to the free index register. But only
11139 * if this reply is an ADDRESS reply.
11140 */
11146 DDI_DMA_SYNC_FORDEV);
11149 }
11152 }
11156 }
11159 }
11162 }
11164 static int
11167 {
11181 /*
11182 * Check for valid buffer type
11183 */
11187 }
11189 /*
11190 * Get the current buffer and look up the unique ID. The unique ID
11191 * should not be found. If it is, the ID is already in use.
11192 */
11198 }
11200 /*
11201 * The buffer's unique ID should not be registered yet, and the given
11202 * unique ID cannot be 0.
11203 */
11208 }
11210 /*
11211 * If this buffer is already posted as immediate, just change owner.
11212 */
11218 }
11220 /*
11221 * Post a new buffer after checking if it's enabled. The DMA buffer
11222 * that is allocated will be contiguous (sgl_len = 1).
11223 */
11227 }
11235 }
11237 /*
11238 * Copy the given info to the diag buffer and post the buffer.
11239 */
11244 i++) {
11247 }
11248 }
11254 DDI_SUCCESS) {
11259 }
11261 /*
11262 * In case there was a failure, free the DMA buffer.
11263 */
11266 }
11269 }
11271 static int
11274 {
11284 /*
11285 * Get the current buffer and look up the unique ID. The unique ID
11286 * should be there.
11287 */
11292 }
11296 /*
11297 * Try to release the buffer from FW before freeing it. If release
11298 * fails, don't free the DMA buffer in case FW tries to access it
11299 * later. If buffer is not owned by firmware, can't release it.
11300 */
11306 }
11308 /*
11309 * At this point, return the current status no matter what happens with
11310 * the DMA buffer.
11311 */
11315 DDI_SUCCESS) {
11319 DDI_SERVICE_UNAFFECTED);
11320 }
11322 }
11325 }
11327 static int
11330 {
11339 /*
11340 * If ID is valid, query on ID.
11341 * If ID is invalid, query on buffer type.
11342 */
11348 }
11354 }
11355 }
11357 /*
11358 * Fill query structure with the diag buffer info.
11359 */
11365 i++) {
11368 }
11369 }
11376 /*
11377 * Set/Clear application flags
11378 */
11383 }
11386 MPTSAS_FW_DIAG_FLAG_BUFFER_VALID;
11390 }
11393 MPTSAS_FW_DIAG_FLAG_FW_BUFFER_ACCESS;
11397 }
11400 }
11402 static int
11406 {
11416 /*
11417 * Get the current buffer and look up the unique ID. The unique ID
11418 * should be there.
11419 */
11424 }
11428 /*
11429 * Make sure requested read is within limits
11430 */
11435 }
11437 /*
11438 * Copy the requested data from DMA to the diag_read_buffer. The DMA
11439 * buffer that was allocated is one contiguous buffer.
11440 */
11444 DDI_DMA_SYNC_FORCPU);
11449 }
11450 }
11453 /*
11454 * Set or clear the Force Release flag.
11455 */
11460 }
11462 /*
11463 * If buffer is to be reregistered, make sure it's not already owned by
11464 * firmware first.
11465 */
11470 return_code);
11471 }
11472 }
11475 }
11477 static int
11480 {
11490 /*
11491 * Get the current buffer and look up the unique ID. The unique ID
11492 * should be there.
11493 */
11498 }
11502 /*
11503 * If buffer is not owned by firmware, it's already been released.
11504 */
11508 }
11510 /*
11511 * Release the buffer.
11512 */
11514 MPTSAS_FW_DIAG_TYPE_RELEASE);
11516 }
11518 static int
11521 {
11522 mptsas_fw_diag_register_t diag_register;
11523 mptsas_fw_diag_unregister_t diag_unregister;
11524 mptsas_fw_diag_query_t diag_query;
11525 mptsas_diag_read_buffer_t diag_read_buffer;
11526 mptsas_fw_diag_release_t diag_release;
11539 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
11542 }
11546 }
11548 return_code);
11554 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
11557 }
11561 }
11563 return_code);
11569 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
11572 }
11576 }
11578 return_code);
11583 }
11584 }
11591 }
11597 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
11600 }
11604 ioctl_mode);
11610 }
11611 }
11617 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
11620 }
11624 }
11626 return_code);
11633 }
11639 }
11642 }
11644 static int
11646 {
11648 mptsas_diag_action_t driver_data;
11652 /*
11653 * Copy the user data to a driver data buffer.
11654 */
11657 /*
11658 * Send diag action request if Action is valid
11659 */
11668 mode);
11677 }
11680 }
11683 }
11686 }
11689 }
11691 /*
11692 * This routine handles the "event query" ioctl.
11693 */
11694 static int
11697 {
11699 mptsas_event_query_t driverdata;
11707 }
11715 }
11718 }
11720 /*
11721 * This routine handles the "event enable" ioctl.
11722 */
11723 static int
11726 {
11728 mptsas_event_enable_t driverdata;
11735 }
11742 }
11744 }
11746 /*
11747 * This routine handles the "event report" ioctl.
11748 */
11749 static int
11752 {
11754 mptsas_event_report_t driverdata;
11776 }
11780 }
11781 }
11785 }
11788 }
11792 }
11794 static void
11796 {
11798 uint_t reglen;
11800 /*
11801 * Lookup the 'reg' property and extract the other data
11802 */
11805 DDI_PROP_SUCCESS) {
11806 /*
11807 * Extract the PCI data from the 'reg' property first DWORD.
11808 * The entry looks like the following:
11809 * First DWORD:
11810 * Bits 0 - 7 8-bit Register number
11811 * Bits 8 - 10 3-bit Function number
11812 * Bits 11 - 15 5-bit Device number
11813 * Bits 16 - 23 8-bit Bus number
11814 * Bits 24 - 25 2-bit Address Space type identifier
11815 *
11816 */
11825 /*
11826 * If we can't determine the PCI data then we fill in FF's for
11827 * the data to indicate this.
11828 */
11832 }
11834 /*
11835 * Saved in the mpt->m_fwversion
11836 */
11838 }
11840 static void
11842 {
11854 }
11856 static void
11858 {
11860 uint_t reglen;
11862 /*
11863 * Lookup the 'reg' property and extract the other data
11864 */
11867 DDI_PROP_SUCCESS) {
11868 /*
11869 * Extract the PCI data from the 'reg' property first DWORD.
11870 * The entry looks like the following:
11871 * First DWORD:
11872 * Bits 8 - 10 3-bit Function number
11873 * Bits 11 - 15 5-bit Device number
11874 * Bits 16 - 23 8-bit Bus number
11875 */
11881 /*
11882 * If we can't determine the PCI info then we fill in FF's for
11883 * the data to indicate this.
11884 */
11888 }
11890 /*
11891 * Now get the interrupt vector and the pci header. The vector can
11892 * only be 0 right now. The header is the first 256 bytes of config
11893 * space.
11894 */
11898 i);
11899 }
11900 }
11902 static int
11904 {
11906 mptsas_reg_access_t driverdata;
11911 /*
11912 * IO access is not supported.
11913 */
11931 }
11944 }
11947 }
11951 }
11953 static int
11956 {
11959 mptsas_update_flash_t flashdata;
11960 mptsas_pass_thru_t passthru_data;
11961 mptsas_adapter_data_t adapter_data;
11962 mptsas_pci_info_t pci_info;
11976 }
11980 /*
11981 * Called from iport node, get the states
11982 */
11987 }
11989 }
11990 /* Make sure power level is D0 before accessing registers */
11997 DDI_SUCCESS) {
11999 "mptsas%d: mptsas_ioctl: Raise power "
12003 }
12006 }
12009 }
12015 }
12016 /*
12017 * The following code control the OK2RM LED, it doesn't affect
12018 * the ioctl return status.
12019 */
12023 NDI_SUCCESS) {
12025 }
12033 }
12039 }
12041 #ifdef MPTSAS_GET_LED
12042 /*
12043 * The get led status can't get a valid/reasonable
12044 * state, so ignore the get led status, and write the
12045 * required value directly
12046 */
12048 DDI_SUCCESS) {
12052 }
12055 #endif
12057 slotstatus |=
12058 MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE;
12060 slotstatus &=
12062 }
12064 DDI_SUCCESS) {
12067 }
12070 }
12072 }
12079 }
12086 }
12088 /*
12089 * Reset the chip to start using the new
12090 * firmware. Reset if failed also.
12091 */
12095 }
12099 /*
12100 * The user has requested to pass through a command to
12101 * be executed by the MPT firmware. Call our routine
12102 * which does this. Only allow one passthru IOCTL at
12103 * one time. Other threads will block on
12104 * m_passthru_mutex, which is of adaptive variant.
12105 */
12110 }
12119 /*
12120 * The user has requested to read adapter data. Call
12121 * our routine which does this.
12122 */
12128 }
12142 }
12146 }
12149 /*
12150 * The user has requested to read pci info. Call
12151 * our routine which does this.
12152 */
12160 }
12169 }
12173 /*
12174 * The user has done a diag buffer action. Call our
12175 * routine which does this. Only allow one diag action
12176 * at one time.
12177 */
12182 }
12190 /*
12191 * The user has done an event query. Call our routine
12192 * which does this.
12193 */
12198 /*
12199 * The user has done an event enable. Call our routine
12200 * which does this.
12201 */
12206 /*
12207 * The user has done an event report. Call our routine
12208 * which does this.
12209 */
12214 /*
12215 * The user has requested register access. Call our
12216 * routine which does this.
12217 */
12223 rval);
12225 }
12227 out:
12231 }
12233 int
12235 {
12241 /*
12242 * Set a flag telling I/O path that we're processing a reset. This is
12243 * needed because after the reset is complete, the hash table still
12244 * needs to be rebuilt. If I/Os are started before the hash table is
12245 * rebuilt, I/O errors will occur. This flag allows I/Os to be marked
12246 * so that they can be retried.
12247 */
12250 /*
12251 * Set all throttles to HOLD
12252 */
12254 MPTSAS_HASH_FIRST);
12262 }
12264 /*
12265 * Disable interrupts
12266 */
12269 /*
12270 * Abort all commands: outstanding commands, commands in waitq
12271 */
12274 /*
12275 * Reinitialize the chip.
12276 */
12279 }
12281 /*
12282 * Enable interrupts again
12283 */
12286 /*
12287 * If mptsas_init_chip was successful, update the driver data.
12288 */
12291 }
12293 /*
12294 * Reset the throttles
12295 */
12297 MPTSAS_HASH_FIRST);
12305 }
12313 }
12315 /*
12316 * Clear the reset flag so that I/Os can continue.
12317 */
12321 }
12323 static int
12325 {
12326 ddi_dma_cookie_t cookie;
12330 /*
12331 * Check to see if the firmware image is valid
12332 */
12334 MPI2_DIAG_FLASH_BAD_SIG) {
12337 }
12339 /*
12340 * Reset the chip
12341 */
12346 }
12350 }
12351 /*
12352 * Setup configuration space
12353 */
12358 }
12360 /*
12361 * IOC facts can change after a diag reset so all buffers that are
12362 * based on these numbers must be de-allocated and re-allocated. Get
12363 * new IOC facts each time chip is initialized.
12364 */
12368 }
12372 }
12373 /*
12374 * Allocate request message frames, reply free queue, reply descriptor
12375 * post queue, and reply message frames using latest IOC facts.
12376 */
12380 }
12384 }
12388 }
12392 }
12394 mur:
12395 /*
12396 * Re-Initialize ioc to operational state
12397 */
12401 }
12405 /*
12406 * Initialize reply post index. Reply free index is initialized after
12407 * the next loop.
12408 */
12411 /*
12412 * Initialize the Reply Free Queue with the physical addresses of our
12413 * reply frames.
12414 */
12421 }
12423 DDI_DMA_SYNC_FORDEV);
12425 /*
12426 * Initialize the reply free index to one past the last frame on the
12427 * queue. This will signify that the queue is empty to start with.
12428 */
12432 /*
12433 * Initialize the reply post queue to 0xFFFFFFFF,0xFFFFFFFF's.
12434 */
12439 }
12441 DDI_DMA_SYNC_FORDEV);
12443 /*
12444 * Enable ports
12445 */
12449 }
12451 /*
12452 * enable events
12453 */
12456 }
12458 /*
12459 * We need checks in attach and these.
12460 * chip_init is called in mult. places
12461 */
12464 DDI_SUCCESS) ||
12466 DDI_SUCCESS) ||
12468 DDI_SUCCESS) ||
12470 DDI_SUCCESS) ||
12472 DDI_SUCCESS)) {
12475 }
12477 /* Check all acc handles */
12480 DDI_SUCCESS) ||
12482 DDI_SUCCESS) ||
12484 DDI_SUCCESS) ||
12486 DDI_SUCCESS) ||
12488 DDI_SUCCESS) ||
12490 DDI_SUCCESS)) {
12493 }
12497 fail:
12499 }
12501 static int
12503 {
12508 /*
12509 * Check if capabilities list is supported and if so,
12510 * get initial capabilities pointer and clear bits 0,1.
12511 */
12518 }
12520 /*
12521 * Walk capabilities if supported.
12522 */
12525 /*
12526 * Check that we haven't exceeded the maximum number of
12527 * capabilities and that the pointer is in a valid range.
12528 */
12533 }
12537 caps_ptr);
12539 }
12541 /*
12542 * Get next capability and check that it is valid.
12543 * For now, we only support power management.
12544 */
12553 /* Save PMCSR offset */
12556 /*
12557 * The following capabilities are valid. Any others
12558 * will cause a message to be logged.
12559 */
12568 "?mptsas%d unrecognized capability "
12571 }
12573 /*
12574 * Get next capabilities pointer and clear bits 0,1.
12575 */
12578 }
12580 }
12582 static int
12584 {
12587 NULL,
12590 NULL
12591 };
12596 }
12597 /*
12598 * If PCI's capability does not support PM, then don't need
12599 * to registe the pm-components
12600 */
12603 /*
12604 * If power management is supported by this chip, create
12605 * pm-components property for the power management framework
12606 */
12618 }
12620 /*
12621 * Power on device.
12622 */
12630 PCI_PMCSR_D0);
12631 }
12635 }
12639 /*
12640 * Set pm idle delay.
12641 */
12646 }
12648 static int
12650 {
12656 /* Get supported interrupt types */
12661 }
12665 /*
12666 * Try MSI, but fall back to FIXED
12667 */
12673 }
12674 }
12683 }
12684 }
12687 }
12689 static void
12691 {
12693 }
12695 /*
12696 * mptsas_add_intrs:
12697 *
12698 * Register FIXED or MSI interrupts.
12699 */
12700 static int
12702 {
12709 /* Get number of interrupts */
12716 }
12718 /* Get number of available interrupts */
12725 }
12730 }
12732 /* Mpt only have one interrupt routine */
12735 }
12737 /* Allocate an array of interrupt handles */
12743 /* call ddi_intr_alloc() */
12749 ret);
12752 }
12754 /* use interrupt count returned or abort? */
12758 }
12762 /*
12763 * Get priority for first msi, assume remaining are all the same
12764 */
12769 /* Free already allocated intr */
12772 }
12776 }
12778 /* Test for high level mutex */
12783 /* Free already allocated intr */
12786 }
12790 }
12792 /* Call ddi_intr_add_handler() */
12799 /* Free already allocated intr */
12802 }
12806 }
12807 }
12813 /* Free already allocated intr */
12816 }
12820 }
12822 /*
12823 * Enable interrupts
12824 */
12826 /* Call ddi_intr_block_enable() for MSI interrupts */
12829 /* Call ddi_intr_enable for MSI or FIXED interrupts */
12832 }
12833 }
12835 }
12837 /*
12838 * mptsas_rem_intrs:
12839 *
12840 * Unregister FIXED or MSI interrupts
12841 */
12842 static void
12844 {
12849 /* Disable all interrupts */
12851 /* Call ddi_intr_block_disable() */
12856 }
12857 }
12859 /* Call ddi_intr_remove_handler() */
12863 }
12866 }
12868 /*
12869 * The IO fault service error handling callback function
12870 */
12871 /*ARGSUSED*/
12872 static int
12874 {
12875 /*
12876 * as the driver can always deal with an error in any dma or
12877 * access handle, we can just return the fme_status value.
12878 */
12881 }
12883 /*
12884 * mptsas_fm_init - initialize fma capabilities and register with IO
12885 * fault services.
12886 */
12887 static void
12889 {
12890 /*
12891 * Need to change iblock to priority for new MSI intr
12892 */
12893 ddi_iblock_cookie_t fm_ibc;
12895 /* Only register with IO Fault Services if we have some capability */
12897 /* Adjust access and dma attributes for FMA */
12902 /*
12903 * Register capabilities with IO Fault Services.
12904 * mpt->m_fm_capabilities will be updated to indicate
12905 * capabilities actually supported (not requested.)
12906 */
12909 /*
12910 * Initialize pci ereport capabilities if ereport
12911 * capable (should always be.)
12912 */
12916 }
12918 /*
12919 * Register error callback if error callback capable.
12920 */
12924 }
12925 }
12926 }
12928 /*
12929 * mptsas_fm_fini - Releases fma capabilities and un-registers with IO
12930 * fault services.
12931 *
12932 */
12933 static void
12935 {
12936 /* Only unregister FMA capabilities if registered */
12939 /*
12940 * Un-register error callback if error callback capable.
12941 */
12945 }
12947 /*
12948 * Release any resources allocated by pci_ereport_setup()
12949 */
12954 }
12956 /* Unregister from IO Fault Services */
12959 /* Adjust access and dma attributes for FMA */
12964 }
12965 }
12967 int
12969 {
12970 ddi_fm_error_t de;
12976 }
12978 int
12980 {
12981 ddi_fm_error_t de;
12987 }
12989 void
12991 {
13000 }
13001 }
13003 static int
13006 {
13010 mptsas_phymask_t phymask;
13026 }
13029 MPI2_SAS_DEVICE_INFO_SATA_DEVICE |
13033 }
13035 /*
13036 * Check if the dev handle is for a Phys Disk. If so, set return value
13037 * and exit. Don't add Phys Disks to hash.
13038 */
13045 }
13046 }
13047 }
13049 /*
13050 * Get SATA Device Name from SAS device page0 for
13051 * sata device, if device name doesn't exist, set m_sas_wwn to
13052 * 0 for direct attached SATA. For the device behind the expander
13053 * we still can use STP address assigned by expander.
13054 */
13056 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
13058 /* alloc a tmp_tgt to send the cmd */
13060 KM_SLEEP);
13074 }
13075 }
13085 }
13089 }
13091 uint64_t
13093 {
13104 inq83_retry:
13111 }
13112 /* According to SAT2, the first descriptor is logic unit name */
13117 }
13126 /* The data is not ready, wait and retry */
13127 inq83_retry--;
13130 }
13134 }
13135 out:
13138 }
13140 static int
13143 {
13160 }
13174 }
13176 }
13179 }
13181 }
13183 static int
13187 {
13193 /*
13194 * scsi_hba_tran_t->tran_tgt_private is used to pass the address
13195 * information to scsi_init_pkt, allocate a scsi_hba_tran structure
13196 * to simulate the cmds from sd
13197 */
13202 }
13209 }
13220 }
13225 }
13228 }
13231 }
13234 out:
13237 }
13240 }
13243 }
13245 }
13246 static int
13248 {
13260 ptr++;
13263 }
13275 }
13286 }
13293 }
13300 out:
13307 }
13309 /*
13310 * mptsas_parse_smp_name() is to parse sas wwn string
13311 * which format is "wWWN"
13312 */
13313 static int
13315 {
13320 }
13322 ptr++;
13325 }
13327 }
13329 static int
13332 {
13347 }
13352 }
13353 /*
13354 * Hold the nexus across the bus_config
13355 */
13360 /* parse wwid/target name out of name given */
13364 }
13365 ptr++;
13367 /*
13368 * This is a SMP target device
13369 */
13374 }
13377 /*
13378 * OBP could pass down a non-canonical form
13379 * bootpath without LUN part when LUN is 0.
13380 * So driver need adjust the string.
13381 */
13386 ptr++;
13387 }
13389 /*
13390 * The device path is wWWID format and the device
13391 * is not SMP target device.
13392 */
13397 }
13404 childp);
13405 }
13407 /*
13408 * If this is CD/DVD device in OBP path, the
13409 * ndi_busop_bus_config can be skipped as config one
13410 * operation is done above.
13411 */
13417 }
13421 }
13423 /*
13424 * DDI group instructed us to use this flag.
13425 */
13433 }
13438 }
13445 }
13447 static int
13450 {
13464 }
13468 }
13470 static int
13473 {
13479 /*
13480 * Get the physical port associated to the iport
13481 */
13487 /*
13488 * didn't match any device by searching
13489 */
13491 }
13492 /*
13493 * If the LUN already exists and the status is online,
13494 * we just return the pointer to dev_info_t directly.
13495 * For the mdi_pathinfo node, we'll handle it in
13496 * mptsas_create_virt_lun()
13497 * TODO should be also in mptsas_handle_dr
13498 */
13502 /*
13503 * TODO Another senario is, we hotplug the same disk
13504 * on the same slot, the devhdl changed, is this
13505 * possible?
13506 * tgt_private->t_private != ptgt
13507 */
13509 /*
13510 * The device has changed although the devhdl is the
13511 * same (Enclosure mapping mode, change drive on the
13512 * same slot)
13513 */
13515 }
13517 }
13520 /*
13521 * Configure IR volume
13522 */
13525 }
13529 }
13531 static int
13534 {
13540 /*
13541 * Get the physical port associated to the iport
13542 */
13548 /*
13549 * didn't match any device by searching
13550 */
13552 }
13554 /*
13555 * If the LUN already exists and the status is online,
13556 * we just return the pointer to dev_info_t directly.
13557 * For the mdi_pathinfo node, we'll handle it in
13558 * mptsas_create_virt_lun().
13559 */
13564 }
13569 }
13571 static int
13574 {
13581 /* determine report luns addressing type */
13583 /*
13584 * Vendors in the field have been found to be concatenating
13585 * bus/target/lun to equal the complete lun value instead
13586 * of switching to flat space addressing
13587 */
13588 /* 00b - peripheral device addressing method */
13590 /* FALLTHRU */
13591 /* 10b - logical unit addressing method */
13593 /* FALLTHRU */
13594 /* 01b - flat space addressing method */
13596 /* byte0 bit0-5=msb lun byte1 bit0-7=lsb lun */
13604 }
13605 }
13607 static int
13609 {
13636 /*
13637 * It's a SATA without Device Name
13638 * So don't try multi-LUNs
13639 */
13643 /*
13644 * need configure and create node
13645 */
13647 }
13648 }
13650 /*
13651 * WWN (SAS address or Device Name exist)
13652 */
13654 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
13655 /*
13656 * SATA device with Device Name
13657 * So don't try multi-LUNs
13658 */
13663 }
13664 }
13673 retry++;
13675 }
13687 retry++;
13689 }
13695 }
13704 /*
13705 * find out the number of luns returned by the SCSI ReportLun call
13706 * and allocate buffer space
13707 */
13713 }
13718 }
13722 else
13724 ptgt);
13727 MPTSAS_DEV_GONE);
13728 }
13729 }
13734 }
13736 static int
13738 {
13751 }
13762 }
13766 }
13768 /*
13769 * configure all RAID volumes for virtual iport
13770 */
13771 static void
13773 {
13780 /*
13781 * Get latest RAID info and search for any Volume DevHandles. If any
13782 * are found, configure the volume.
13783 */
13795 }
13796 }
13797 }
13799 }
13801 static void
13804 {
13829 }
13834 }
13837 DDI_SUCCESS) {
13839 }
13846 }
13847 }
13850 }
13852 /*
13853 * The lun has not been there already
13854 */
13856 NDI_DEVI_REMOVE);
13857 }
13858 }
13870 }
13875 }
13882 }
13883 }
13886 }
13889 /*
13890 * The lun has not been there already
13891 */
13893 NDI_DEVI_REMOVE);
13894 }
13895 }
13896 }
13898 void
13900 {
13905 mptsas_smp_t smp_node;
13907 /*
13908 * Get latest RAID info.
13909 */
13919 }
13922 }
13924 /*
13925 * Config target devices
13926 */
13929 /*
13930 * Do loop to get sas device page 0 by GetNextHandle till the
13931 * the last handle. If the sas device is a SATA/SSP target,
13932 * we try to config it.
13933 */
13936 page_address =
13938 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
13945 }
13948 }
13950 }
13952 void
13954 {
13960 /*
13961 * For tgttbl, clear dr_flag.
13962 */
13965 }
13966 }
13968 void
13970 {
13971 /*
13972 * TODO after hard reset, update the driver data structures
13973 * 1. update port/phymask mapping table mpt->m_phy_info
13974 * 2. invalid all the entries in hash table
13975 * m_devhdl = 0xffff and m_deviceinfo = 0
13976 * 3. call sas_device_page/expander_page to update hash table
13977 */
13979 /*
13980 * Invalid the existing entries
13981 */
13988 }
13990 static void
13992 {
13996 mptsas_phymask_t phy_mask;
14000 /*
14001 * Get the phymask associated to the iport
14002 */
14006 /*
14007 * Enumerate RAID volumes here (phymask == 0).
14008 */
14012 }
14018 }
14021 MPTSAS_HASH_FIRST);
14029 }
14032 }
14035 MPTSAS_HASH_FIRST);
14042 }
14046 }
14048 }
14050 static int
14052 {
14058 /*
14059 * The return value means the SCMD_REPORT_LUNS
14060 * did not execute successfully. The target maybe
14061 * doesn't support such command.
14062 */
14064 }
14066 }
14068 /*
14069 * Return fail if not all the childs/paths are freed.
14070 * if there is any path under the HBA, the return value will be always fail
14071 * because we didn't call mdi_pi_free for path
14072 */
14073 static int
14075 {
14091 }
14094 }
14100 }
14103 NDI_DEVI_REMOVE);
14108 DDI_PROP_SUCCESS) {
14110 "unable to create property for "
14112 }
14113 }
14114 }
14123 }
14127 }
14133 }
14136 NDI_DEVI_REMOVE);
14137 /*
14138 * driver will not invoke mdi_pi_free, so path will not
14139 * be freed forever, return DDI_FAILURE.
14140 */
14142 }
14144 }
14146 static int
14149 {
14162 }
14164 /*
14165 * Make sure node is attached otherwise
14166 * it won't have related cache nodes to
14167 * clean up. i_ddi_devi_attached is
14168 * similiar to i_ddi_node_state(cdip) >=
14169 * DS_ATTACHED.
14170 */
14173 /* Get full devname */
14176 /* Clean cache */
14178 DV_CLEAN_FORCE);
14180 }
14186 }
14189 }
14192 }
14196 {
14207 }
14212 }
14215 }
14217 }
14219 static int
14221 {
14234 /*
14235 * Make sure node is attached otherwise
14236 * it won't have related cache nodes to
14237 * clean up. i_ddi_devi_attached is
14238 * similiar to i_ddi_node_state(cdip) >=
14239 * DS_ATTACHED.
14240 */
14243 /* Get full devname */
14246 /* Clean cache */
14248 DV_CLEAN_FORCE);
14250 }
14255 }
14259 {
14273 }
14277 }
14280 }
14285 }
14290 {
14303 }
14307 {
14316 }
14320 {
14329 }
14333 {
14347 }
14349 static int
14352 {
14358 ddi_devid_t devid;
14364 /*
14365 * For DVD/CD ROM and tape devices and optical
14366 * devices, we won't try to enumerate them under
14367 * scsi_vhci, so no need to try page83
14368 */
14374 /*
14375 * The LCA returns good SCSI status, but corrupt page 83 data the first
14376 * time it is queried. The solution is to keep trying to request page83
14377 * and verify the GUID is not (DDI_NOT_WELL_FORMED) in
14378 * mptsas_inq83_retry_timeout seconds. If the timeout expires, driver
14379 * give up to get VPD page at this stage and fail the enumeration.
14380 */
14393 }
14394 /*
14395 * create DEVID from inquiry data
14396 */
14401 /*
14402 * extract GUID from DEVID
14403 */
14406 /*
14407 * Do not enable MPXIO if the strlen(guid) is greater
14408 * than MPTSAS_MAX_GUID_LEN, this constrain would be
14409 * handled by framework later.
14410 */
14416 "lun:%x doesn't have a valid GUID, "
14417 "multipathing for this drive is "
14419 }
14420 }
14422 /*
14423 * devid no longer needed
14424 */
14428 /*
14429 * return value of ddi_devid_scsi_encode equal to
14430 * DDI_NOT_WELL_FORMED means DEVID_RETRY, it worth
14431 * to retry inquiry page 0x83 and get GUID.
14432 */
14441 }
14442 }
14447 }
14451 create_lun:
14455 }
14460 }
14461 out:
14463 /*
14464 * guid no longer needed
14465 */
14467 }
14471 }
14473 static int
14476 {
14516 }
14525 /*
14526 * Same path back online again.
14527 */
14539 }
14543 lun);
14546 }
14549 /*
14550 * The GUID of the LUN has changed which maybe
14551 * because customer mapped another volume to the
14552 * same LUN.
14553 */
14555 "target:%x, lun:%x was changed, maybe "
14556 "because someone mapped another volume "
14563 "target:%x, lun:%x offline "
14568 }
14569 }
14573 lun);
14577 }
14578 }
14585 }
14586 }
14590 /*
14591 * if nodename can't be determined then print a message and skip it
14592 */
14598 }
14601 /* The property is needed by MPAPI */
14611 }
14625 }
14634 }
14640 target);
14643 }
14646 DDI_PROP_SUCCESS) {
14652 }
14656 "create prop for target %d lun %d "
14662 /*
14663 * Direct attached SATA device without DeviceName
14664 */
14666 "create prop for SAS target %d lun %d "
14670 }
14674 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
14685 }
14698 }
14702 /*
14703 * If this device direct attached to the controller
14704 * set the attached-port to the base wwid
14705 */
14709 pdev_sas_wwn);
14711 /*
14712 * Update the iport's attached-port to guid
14713 */
14718 }
14721 DDI_PROP_SUCCESS) {
14723 "mptsas unable to create "
14724 "property for iport target-port"
14726 wwn_str);
14729 }
14733 }
14737 DDI_PROP_SUCCESS) {
14740 attached_wwn_str);
14743 }
14748 /*
14749 * set obp path for pathinfo
14750 */
14755 DDI_SUCCESS) {
14758 component);
14761 }
14762 }
14766 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
14769 DDI_PROP_SUCCESS) {
14771 "failed to create pm-capable "
14775 }
14776 }
14777 /*
14778 * Create the phy-num property
14779 */
14787 }
14793 DDI_SUCCESS) {
14796 }
14798 }
14801 }
14802 virt_create_done:
14807 }
14808 }
14813 }
14816 }
14819 }
14822 }
14824 static int
14827 {
14863 /*
14864 * generate compatible property with binding-set "mpt"
14865 */
14869 /*
14870 * if nodename can't be determined then print a message and skip it
14871 */
14876 }
14881 /*
14882 * if lun alloc success, set props
14883 */
14888 DDI_PROP_SUCCESS) {
14894 }
14899 DDI_PROP_SUCCESS) {
14905 }
14914 }
14916 /*
14917 * We need the SAS WWN for non-multipath devices, so
14918 * we'll use the same property as that multipathing
14919 * devices need to present for MPAPI. If we don't have
14920 * a WWN (e.g. parallel SCSI), don't create the prop.
14921 */
14928 "create property for SAS target %d lun %d "
14932 }
14939 "create property for SAS target %d lun %d "
14945 DDI_PROP_SUCCESS)) {
14946 /*
14947 * Direct attached SATA device without DeviceName
14948 */
14950 "create property for SAS target %d lun %d "
14954 }
14959 "create property for SAS target %d lun %d"
14963 }
14967 "to create guid property for target %d "
14971 }
14973 /*
14974 * The following code is to set properties for SM-HBA support,
14975 * it doesn't apply to RAID volumes
14976 */
14983 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
14995 }
15008 }
15012 /*
15013 * If this device direct attached to the controller
15014 * set the attached-port to the base wwid
15015 */
15019 pdev_sas_wwn);
15021 /*
15022 * Update the iport's attached-port to guid
15023 */
15028 }
15031 DDI_PROP_SUCCESS) {
15033 "mptsas unable to create "
15034 "property for iport target-port"
15036 wwn_str);
15039 }
15043 }
15047 DDI_PROP_SUCCESS) {
15049 "mptsas unable to create "
15051 attached_wwn_str);
15054 }
15059 DDI_PROP_SUCCESS) {
15061 "mptsas unable to create "
15065 }
15066 }
15071 DDI_PROP_SUCCESS) {
15073 "mptsas unable to create "
15077 }
15078 }
15080 phys_raid_lun:
15081 /*
15082 * if this is a SAS controller, and the target is a SATA
15083 * drive, set the 'pm-capable' property for sd and if on
15084 * an OPL platform, also check if this is an ATAPI
15085 * device.
15086 */
15089 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
15095 DDI_PROP_SUCCESS) {
15097 "failed to create pm-capable "
15101 }
15103 }
15106 /*
15107 * add 'obp-path' properties for devinfo
15108 */
15118 }
15122 "unable to set obp-path for SAS "
15126 }
15127 }
15128 /*
15129 * Create the phy-num property for non-raid disk
15130 */
15134 DDI_PROP_SUCCESS) {
15136 "failed to create phy-num property for "
15140 }
15141 }
15142 phys_create_done:
15143 /*
15144 * If props were setup ok, online the lun
15145 */
15147 /*
15148 * Try to online the new node
15149 */
15151 }
15155 DDI_SUCCESS) {
15158 }
15160 }
15162 /*
15163 * If success set rtn flag, else unwire alloc'd lun
15164 */
15171 }
15172 }
15178 }
15181 }
15185 }
15187 static int
15189 {
15193 /* XXX An HBA driver should not be allocating an smp_device. */
15201 }
15203 static int
15205 {
15211 /*
15212 * Get the physical port associated to the iport
15213 * PHYMASK TODO
15214 */
15217 /*
15218 * Find the smp node in hash table with specified sas address and
15219 * physical port
15220 */
15224 }
15229 }
15231 static int
15234 {
15239 mptsas_smp_t dev_info;
15258 /*
15259 * Probe smp device, prevent the node of removed device from being
15260 * configured succesfully
15261 */
15264 }
15268 }
15272 /*
15273 * if lun alloc success, set props
15274 */
15276 /*
15277 * Set the flavor of the child to be SMP flavored
15278 */
15283 DDI_PROP_SUCCESS) {
15286 wwn_str);
15289 }
15293 DDI_PROP_SUCCESS) {
15296 wwn_str);
15299 }
15310 "mptsas unable to get expander "
15314 }
15318 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15329 }
15332 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15343 }
15346 /*
15347 * If this smp direct attached to the controller
15348 * set the attached-port to the base wwid
15349 */
15353 sas_wwn);
15357 }
15361 DDI_PROP_SUCCESS) {
15364 attached_wwn_str);
15367 }
15373 wwn_str);
15376 }
15378 /*
15379 * check the smp to see whether it direct
15380 * attached to the controller
15381 */
15385 }
15390 }
15391 /*
15392 * this iport is an old iport, we need to
15393 * reconfig the props for it.
15394 */
15397 DDI_PROP_SUCCESS) {
15399 MPTSAS_VIRTUAL_PORT);
15403 }
15415 }
15416 }
15420 numphys++;
15421 }
15422 }
15423 /*
15424 * Update PHY info for smhba
15425 */
15431 }
15439 DDI_PROP_SUCCESS) {
15441 MPTSAS_NUM_PHYS);
15445 }
15446 /*
15447 * Add parent's props for SMHBA support
15448 */
15451 DDI_PROP_SUCCESS) {
15453 SCSI_ADDR_PROP_ATTACHED_PORT);
15457 }
15459 smp_create_done:
15460 /*
15461 * If props were setup ok, online the lun
15462 */
15464 /*
15465 * Try to online the new node
15466 */
15468 }
15470 /*
15471 * If success set rtn flag, else unwire alloc'd lun
15472 */
15478 }
15479 }
15482 }
15484 /* smp transport routine */
15486 {
15488 Mpi2SmpPassthroughRequest_t req;
15489 Mpi2SmpPassthroughReply_t rep;
15499 /*
15500 * Need to compose a SMP request message
15501 * and call mptsas_do_passthru() function
15502 */
15513 }
15521 }
15524 }
15538 }
15539 /* do passthrough success, check the smp status */
15556 }
15558 }
15564 }
15567 }
15569 /*
15570 * If we didn't get a match, we need to get sas page0 for each device, and
15571 * untill we get a match. If failed, return NULL
15572 */
15575 {
15582 /*
15583 * PHY named device must be direct attached and attaches to
15584 * narrow port, if the iport is not parent of the device which
15585 * we are looking for.
15586 */
15589 j++;
15590 }
15595 /*
15596 * Must be a narrow port and single device attached to the narrow port
15597 * So the physical port num of device which is equal to the iport's
15598 * port num is the device what we are looking for.
15599 */
15607 MPTSAS_HASH_FIRST);
15612 }
15616 }
15621 }
15623 /* If didn't get a match, come here */
15634 }
15638 }
15643 }
15644 }
15648 }
15650 /*
15651 * The ptgt->m_sas_wwn contains the wwid for each disk.
15652 * For Raid volumes, we need to check m_raidvol[x].m_raidwwid
15653 * If we didn't get a match, we need to get sas page0 for each device, and
15654 * untill we get a match
15655 * If failed, return NULL
15656 */
15659 {
15671 }
15674 /*
15675 * It's IR volume
15676 */
15681 }
15684 }
15689 }
15691 /* If didn't get a match, come here */
15703 }
15707 }
15712 }
15713 }
15717 }
15721 {
15733 }
15738 }
15740 /* If didn't get a match, come here */
15750 }
15757 }
15758 }
15762 }
15764 /* helper functions using hash */
15766 /*
15767 * Can't have duplicate entries for same devhdl,
15768 * if there are invalid entries, the devhdl should be set to 0xffff
15769 */
15772 {
15779 }
15781 }
15783 }
15785 mptsas_target_t *
15788 {
15797 }
15802 }
15808 /* Initialized the tgt structure */
15819 }
15821 static void
15823 mptsas_phymask_t phymask)
15824 {
15832 }
15833 }
15835 /*
15836 * Return the entry in the hash table
15837 */
15840 {
15849 }
15855 }
15857 static void
15859 mptsas_phymask_t phymask)
15860 {
15867 }
15868 }
15870 /*
15871 * Hash operation functions
15872 * key1 is the sas_wwn, key2 is the phymask
15873 */
15874 static void
15876 {
15879 }
15881 MPTSAS_HASH_ARRAY_SIZE);
15884 }
15886 static void
15888 {
15894 }
15902 }
15903 }
15904 }
15906 /*
15907 * You must guarantee the element doesn't exist in the hash table
15908 * before you call mptsas_hash_add()
15909 */
15910 static void
15912 {
15920 }
15931 }
15932 }
15936 mptsas_phymask_t key2)
15937 {
15943 }
15953 }
15959 }
15960 }
15962 }
15966 mptsas_phymask_t key2)
15967 {
15972 }
15980 }
15981 }
15983 }
15987 {
15992 }
16003 }
16004 }
16009 /* the traverse reaches the end */
16014 }
16015 }
16018 }
16020 /*
16021 * Functions for SGPIO LED support
16022 */
16025 {
16036 }
16039 {
16047 }
16052 }
16054 }
16056 #ifdef MPTSAS_GET_LED
16057 static int
16060 {
16062 MPI2_SEP_REQ_ACTION_READ_STATUS));
16063 }
16064 #endif
16065 static int
16067 {
16071 MPI2_SEP_REQ_ACTION_WRITE_STATUS));
16072 }
16073 /*
16074 * send sep request, use enclosure/slot addressing
16075 */
16078 {
16079 Mpi2SepRequest_t req;
16080 Mpi2SepReply_t rep;
16088 /* Do nothing for RAID volumes */
16092 }
16101 }
16108 }
16109 /* do passthrough success, check the ioc status */
16112 MPI2_IOCSTATUS_INVALID_FIELD) {
16117 }
16121 }
16124 }
16127 }
16129 int
16133 {
16134 ddi_dma_cookie_t new_cookie;
16136 uint_t ncookie;
16145 }
16153 }
16162 }
16165 }
16167 void
16169 {
16177 }
16179 static int
16181 {
16195 }
16199 }