arch/x86/kernel/platform/i86pc/boot/boot_serial.h

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 /*
  22  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
  23  * Use is subject to license terms.
  24  */
  25
  26 #ifndef _BOOT_SERIAL_H
  27 #define _BOOT_SERIAL_H
  28
  29 #pragma ident   "%Z%%M% %I%     %E% SMI"
  30
  31 #ifdef __cplusplus
  32 extern "C" {
  33 #endif
  34
  35 /* ---- ports on 16550 serial chips ---- */
  36 #define DAT     0       /* ... data */
  37 #define ICR     1       /* ... intr control reg */
  38 #define ISR     2       /* ... intr status reg */
  39 #define LCR     3       /* ... line control reg */
  40 #define MCR     4       /* ... modem control reg */
  41 #define LSR     5       /* ... line status reg */
  42 #define MSR     6       /* ... modem status reg */
  43 #define DLL     0       /* ... data latch low (used for baud rate) */
  44 #define DLH     1       /* ... data latch high (ditto) */
  45 #define FIFOR   ISR     /* ... fifo write reg */
  46
  47 /* ---- LSR bits ---- */
  48 #define RCA             0x01    /* ... receive char avail */
  49 #define XHRE            0x20    /* ... xmit hold buffer empty */
  50
  51 /* ---- Modem bits ---- */
  52 #define DTR             0x01
  53 #define RTS             0x02
  54 #define OUT2            0x08
  55
  56 #define FIFO_ON         0x01
  57 #define FIFO_OFF        0x00
  58 #define FIFORXFLSH      0x02
  59 #define FIFOTXFLSH      0x04
  60 #define FIFODMA         0x08
  61
  62 /* ---- LCR bits ---- */
  63 #define STOP1           00
  64 #define STOP2           0x04
  65 #define BITS5           0x00    /* 5 bits per char */
  66 #define BITS6           0x01    /* 6 bits per char */
  67 #define BITS7           0x02    /* 7 bits per char */
  68 #define BITS8           0x03    /* 8 bits per char */
  69
  70 /* baud rate definitions */
  71 #define DLAB            0x80    /* divisor latch access bit */
  72 #define ASY110          1047    /* 110 baud rate for serial console */
  73 #define ASY150          768     /* 150 baud rate for serial console */
  74 #define ASY300          384     /* 300 baud rate for serial console */
  75 #define ASY600          192     /* 600 baud rate for serial console */
  76 #define ASY1200         96      /* 1200 baud rate for serial console */
  77 #define ASY2400         48      /* 2400 baud rate for serial console */
  78 #define ASY4800         24      /* 4800 baud rate for serial console */
  79 #define ASY9600         12      /* 9600 baud rate for serial console */
  80 #define ASY19200        6       /* 19200 baud rate for serial console */
  81 #define ASY38400        3       /* 38400 baud rate for serial console */
  82 #define ASY57600        2       /* 57600 baud rate for serial console */
  83 #define ASY115200       1       /* 115200 baud rate for serial console */
  84
  85
  86 /*
  87  *  Defines for the serial port
  88  */
  89
  90 #define SERIAL_FIFO_FLUSH       16      /* maximum number of chars to flush */
  91
  92 /* ---- Bit 11 defines direct serial port ---- */
  93 #define SDIRECT         0x1000
  94
  95 /* ---- Bits 9-10 define flow control ---- */
  96 #define SSOFT           0x800
  97 #define SHARD           0x400
  98
  99 /* ---- Bits 5-8 define baud rate ---- */
 100 #define S110            0x00
 101 #define S150            0x20
 102 #define S300            0x40
 103 #define S600            0x60
 104 #define S1200           0x80
 105 #define S2400           0xa0
 106 #define S4800           0xc0
 107 #define S9600           0xe0
 108 #define S19200          0x100
 109 #define S38400          0x120
 110 #define S57600          0x140
 111 #define S76800          0x160
 112 #define S115200         0x180
 113 #define S153600         0x1a0
 114 #define S230400         0x1c0
 115 #define S307200         0x1e0
 116 #define S460800         0x200
 117
 118 /* ---- Bits 3 & 4 are parity ---- */
 119 #define PARITY_NONE     0x10
 120 #define PARITY_ODD      0x08
 121 #define PARITY_EVEN     0x18
 122
 123 /* ---- Bit 2 is stop bit ---- */
 124 #define STOP_1          0x00
 125 #define STOP_2          0x04
 126
 127 /* ---- Bits 0 & 1 are data bits ---- */
 128 #define DATA_8          0x03
 129 #define DATA_7          0x02
 130 #define DATA_6          0x01
 131 #define DATA_5          0x00
 132
 133 /* ---- Line Status ---- */
 134 #define SERIAL_TIMEOUT  0x80
 135 #define SERIAL_XMITSHFT 0x40
 136 #define SERIAL_XMITHOLD 0x20
 137 #define SERIAL_BREAK    0x10
 138 #define SERIAL_FRAME    0x08
 139 #define SERIAL_PARITY   0x04
 140 #define SERIAL_OVERRUN  0x02
 141 #define SERIAL_DATA     0x01
 142
 143
 144 #ifdef __cplusplus
 145 }
 146 #endif
 147
 148 #endif  /* _BOOT_SERIAL_H */