usr/src/uts/common/io/hxge/hxge_common.h

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21
  22 /*
  23  * Copyright 2009 Sun Microsystems, Inc.  All rights reserved.
  24  * Use is subject to license terms.
  25  */
  26
  27 #ifndef _SYS_HXGE_HXGE_COMMON_H
  28 #define _SYS_HXGE_HXGE_COMMON_H
  29
  30 #include <sys/types.h>
  31 #include <hxge_defs.h>
  32 #include <hxge_pfc.h>
  33 #include <hxge_common_impl.h>
  34
  35 #ifdef  __cplusplus
  36 extern "C" {
  37 #endif
  38
  39 #define HXGE_DMA_START  B_TRUE
  40 #define HXGE_DMA_STOP   B_FALSE
  41 #define HXGE_TIMER_RESO 2
  42 #define HXGE_TIMER_LDG  2
  43
  44 /*
  45  * Receive and Transmit DMA definitions
  46  */
  47 #ifdef  _DMA_USES_VIRTADDR
  48 #define HXGE_DMA_BLOCK          1
  49 #else
  50 #define HXGE_DMA_BLOCK          (64 * 64)
  51 #endif
  52
  53 #define HXGE_RBR_RBB_MIN        128
  54 #define HXGE_RBR_RBB_MAX        ((64 * 128) - 1)
  55 #if defined(__sparc)
  56 #define HXGE_RBR_RBB_DEFAULT    1536            /* Number of RBR Blocks */
  57 #else
  58 #define HXGE_RBR_RBB_DEFAULT    2048            /* Number of RBR Blocks */
  59 #endif
  60 #define HXGE_RCR_MIN            (HXGE_RBR_RBB_MIN * 2)
  61 #define HXGE_RCR_MAX            65504                   /* 2^16 - 32 */
  62
  63 /*
  64  * 4096/256 for x86 and 8192 / 256 for Sparc
  65  *      NOTE: RCR Ring Size should *not* enable bit 19 of the address.
  66  */
  67 #if defined(__sparc)
  68 #define HXGE_RCR_DEFAULT        (HXGE_RBR_RBB_DEFAULT * 32)
  69 #else
  70 #define HXGE_RCR_DEFAULT        (HXGE_RBR_RBB_DEFAULT * 16)
  71 #endif
  72
  73 #define HXGE_TX_RING_DEFAULT    2048
  74 #define HXGE_TX_RING_MAX        ((64 * 128) - 1)
  75
  76 #define RBR_BKSIZE_4K           0
  77 #define RBR_BKSIZE_8K           1
  78 #define RBR_BKSIZE_4K_BYTES     (4 * 1024)
  79
  80 #define RBR_BUFSZ2_2K           0
  81 #define RBR_BUFSZ2_4K           1
  82 #define RBR_BUFSZ2_2K_BYTES     (2 * 1024)
  83 #define RBR_BUFSZ2_4K_BYTES     (4 * 1024)
  84
  85 #define RBR_BUFSZ1_1K           0
  86 #define RBR_BUFSZ1_2K           1
  87 #define RBR_BUFSZ1_1K_BYTES     1024
  88 #define RBR_BUFSZ1_2K_BYTES     (2 * 1024)
  89
  90 #define RBR_BUFSZ0_256B         0
  91 #define RBR_BUFSZ0_512B         1
  92 #define RBR_BUFSZ0_1K           2
  93 #define RBR_BUFSZ0_256_BYTES    256
  94 #define RBR_BUFSZ0_512_BYTES    512
  95 #define RBR_BUFSZ0_1K_BYTES     1024
  96
  97 /*
  98  * VLAN table configuration
  99  */
 100 typedef struct hxge_mv_cfg {
 101         uint8_t         flag;                   /* 0:unconfigure 1:configured */
 102 } hxge_mv_cfg_t, *p_hxge_mv_cfg_t;
 103
 104 typedef struct hxge_param_map {
 105 #if defined(_BIG_ENDIAN)
 106         uint32_t                rsrvd2:2;       /* [30:31] rsrvd */
 107         uint32_t                remove:1;       /* [29] Remove */
 108         uint32_t                pref:1;         /* [28] preference */
 109         uint32_t                rsrv:4;         /* [27:24] preference */
 110         uint32_t                map_to:8;       /* [23:16] map to resource */
 111         uint32_t                param_id:16;    /* [15:0] Param ID */
 112 #else
 113         uint32_t                param_id:16;    /* [15:0] Param ID */
 114         uint32_t                map_to:8;       /* [23:16] map to resource */
 115         uint32_t                rsrv:4;         /* [27:24] preference */
 116         uint32_t                pref:1;         /* [28] preference */
 117         uint32_t                remove:1;       /* [29] Remove */
 118         uint32_t                rsrvd2:2;       /* [30:31] rsrvd */
 119 #endif
 120 } hxge_param_map_t, *p_hxge_param_map_t;
 121
 122 typedef struct hxge_hw_pt_cfg {
 123         uint32_t        start_tdc;       /* start TDC (0 - 3)           */
 124         uint32_t        max_tdcs;        /* max TDC in sequence         */
 125         uint32_t        start_rdc;       /* start RDC (0 - 3)           */
 126         uint32_t        max_rdcs;        /* max rdc in sequence         */
 127         uint32_t        rx_full_header;  /* select the header flag      */
 128         uint32_t        start_ldg;       /* starting logical group #    */
 129         uint32_t        max_ldgs;        /* max logical device group    */
 130         uint32_t        max_ldvs;        /* max logical devices         */
 131 } hxge_hw_pt_cfg_t, *p_hxge_hw_pt_cfg_t;
 132
 133 /* per port configuration */
 134 typedef struct hxge_dma_pt_cfg {
 135         hxge_hw_pt_cfg_t hw_config;     /* hardware configuration       */
 136
 137         uint32_t        alloc_buf_size;
 138         uint32_t        rbr_size;
 139         uint32_t        rcr_size;
 140 } hxge_dma_pt_cfg_t, *p_hxge_dma_pt_cfg_t;
 141
 142 /* classification configuration */
 143 typedef struct hxge_class_pt_cfg {
 144         /* VLAN table */
 145         hxge_mv_cfg_t   vlan_tbl[VLAN_ID_MAX + 1];
 146         /* class config value */
 147         uint32_t        init_hash;
 148         uint32_t        class_cfg[TCAM_CLASS_MAX];
 149 } hxge_class_pt_cfg_t, *p_hxge_class_pt_cfg_t;
 150
 151 typedef struct hxge_hw_list {
 152         struct hxge_hw_list     *next;
 153         hxge_os_mutex_t         hxge_cfg_lock;
 154         hxge_os_mutex_t         hxge_tcam_lock;
 155         hxge_os_mutex_t         hxge_vlan_lock;
 156
 157         hxge_dev_info_t         *parent_devp;
 158         struct _hxge_t          *hxge_p;
 159         uint32_t                ndevs;
 160         uint32_t                flags;
 161         uint32_t                magic;
 162 } hxge_hw_list_t, *p_hxge_hw_list_t;
 163
 164 #ifdef  __cplusplus
 165 }
 166 #endif
 167
 168 #endif  /* _SYS_HXGE_HXGE_COMMON_H */