| blob | 1c2b8f22638ea679becf41bc1d9d99216c67d61a |
1 '\" te
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6 .TH TRAPSTAT 1M "May 11, 2004"
7 .SH NAME
8 trapstat \- report trap statistics
9 .SH SYNOPSIS
10 .LP
11 .nf
12 \fB/usr/sbin/trapstat\fR [\fB-t\fR | \fB-T\fR | \fB-e\fR \fIentry\fR]
13 [\fB-C\fR \fIprocessor_set_id\fR | \fB-c\fR \fIcpulist\fR] [\fB-P\fR] [\fB-a\fR]
14 [\fB-r\fR \fIrate\fR] [ [\fIinterval\fR [\fIcount\fR]] | \fIcommand\fR | [\fIargs\fR]]
15 .fi
17 .LP
18 .nf
19 \fB/usr/sbin/trapstat\fR \fB-l\fR
20 .fi
22 .SH DESCRIPTION
23 .sp
24 .LP
25 The \fBtrapstat\fR utility gathers and displays run-time trap statistics on
26 UltraSPARC-based systems. The default output is a table of trap types and
27 \fBCPU\fR \fBID\fRs, with each row of the table denoting a trap type and each
28 column of the table denoting a \fBCPU\fR. If standard output is a terminal, the
29 table contains as many columns of data as can fit within the terminal width; if
30 standard output is not a terminal, the table contains at most six columns of
31 data. By default, data is gathered and and displayed for all \fBCPU\fRs; if the
32 data cannot fit in a single table, it is printed across multiple tables. The
33 set of \fBCPU\fRs for which data is gathered and displayed can be optionally
34 specified with the \fB-c\fR or \fB-C\fR option.
35 .sp
36 .LP
37 Unless the \fB-r\fR option or the \fB-a\fR option is specified, the value
38 displayed in each entry of the table corresponds to the number of traps per
39 second. If the \fB-r\fR option is specified, the value corresponds to the
40 number of traps over the interval implied by the specified sampling rate; if
41 the \fB-a\fR option is specified, the value corresponds to the accumulated
42 number of traps since the invocation of \fBtrapstat\fR.
43 .sp
44 .LP
45 By default, \fBtrapstat\fR displays data once per second, and runs
46 indefinitely; both of these behaviors can be optionally controlled with the
47 \fIinterval\fR and \fIcount\fR parameters, respectively. The \fIinterval\fR is
48 specified in seconds; the \fIcount\fR indicates the number of intervals to be
49 executed before exiting. Alternatively, \fBcommand\fR can be specified, in
50 which case \fBtrapstat\fR executes the provided command and continues to run
51 until the command exits. A positive integer is assumed to be an \fIinterval\fR;
52 if the desired \fB\fIcommand\fR\fR cannot be distinguished from an integer, the
53 full path of \fIcommand\fR must be specified.
54 .sp
55 .LP
56 UltraSPARC I (obsolete), II, and III handle translation lookaside buffer (TLB)
57 misses by trapping to the operating system. TLB miss traps can be a significant
58 component of overall system performance for some workloads; the \fB-t\fR option
59 provides in-depth information on these traps. When run with this option,
60 \fBtrapstat\fR displays both the rate of TLB miss traps \fI\fR and the
61 percentage of time spent processing those traps. Additionally, TLB misses that
62 hit in the translation storage buffer (TSB) are differentiated from TLB misses
63 that further miss in the TSB. (The TSB is a software structure used as a
64 translation entry cache to allow the TLB to be quickly filled; it is discussed
65 in detail in the \fIUltraSPARC II User's Manual\fR.) The TLB and TSB miss
66 information is further broken down into user- and kernel-mode misses.
67 .sp
68 .LP
69 Workloads with working sets that exceed the TLB reach may spend a significant
70 amount of time missing in the TLB. To accommodate such workloads, the operating
71 system supports multiple page sizes: larger page sizes increase the effective
72 TLB reach and thereby reduce the number of TLB misses. To provide insight into
73 the relationship between page size and TLB miss rate, \fBtrapstat\fR optionally
74 provides in-depth TLB miss information broken down by page size using the
75 \fB-T\fR option. The information provided by the \fB-T\fR option is a superset
76 of that provided by the \fB-t\fR option; only one of \fB-t\fR and \fB-T\fR can
77 be specified.
78 .SH OPTIONS
79 .sp
80 .LP
81 The following options are supported:
82 .sp
83 .ne 2
84 .na
85 \fB\fB-a\fR\fR
86 .ad
87 .RS 24n
88 Displays the number of traps as accumulating, monotonically increasing values
89 instead of per-second or per-interval rates.
90 .RE
92 .sp
93 .ne 2
94 .na
95 \fB\fB-c\fR \fIcpulist\fR \fR
96 .ad
97 .RS 24n
98 Enables \fBtrapstat\fR only on the \fBCPU\fRs specified by \fIcpulist\fR.
99 .sp
100 \fIcpulist\fR can be a single processor \fBID\fR (for example, \fB4\fR), a
101 range of processor\fB ID\fRs (for example, \fB4-6\fR), or a comma separated
102 list of processor\fB ID\fRs or processor \fBID\fR ranges (for example,
103 \fB4,5,6\fR or \fB4,6-8\fR).
104 .RE
106 .sp
107 .ne 2
108 .na
109 \fB\fB-C\fR \fIprocessor_set_id\fR \fR
110 .ad
111 .RS 24n
112 Enables \fBtrapstat\fR only on the \fBCPU\fRs in the processor set specified by
113 \fIprocessor_set_id\fR.
114 .sp
115 \fBtrapstat\fR modifies its output to always reflect the \fBCPU\fRs in the
116 specified processor set. If a \fBCPU\fR is added to the set, \fBtrapstat\fR
117 modifies its output to include the added \fBCPU\fR; if a \fBCPU\fR is removed
118 from the set, \fBtrapstat\fR modifies its output to exclude the removed CPU. At
119 most one processor set can be specified.
120 .RE
122 .sp
123 .ne 2
124 .na
125 \fB\fB-e\fR \fIentrylist\fR \fR
126 .ad
127 .RS 24n
128 Enables \fBtrapstat\fR only for the trap table entry or entries specified by
129 \fIentrylist\fR. A trap table entry can be specified by trap number or by trap
130 name (for example, the level-10 trap can be specified as \fB74\fR, \fB0x4A\fR,
131 \fB0x4a\fR, or \fBlevel-10\fR).
132 .sp
133 \fIentrylist\fR can be a single trap table entry or a comma separated list of
134 trap table entries. If the specified trap table entry is not valid,
135 \fBtrapstat\fR prints a table of all valid trap table entries and values. A
136 list of valid trap table entries is also found in \fIThe SPARC Architecture
137 Manual, Version 9\fR and the \fISun Microelectronics UltraSPARC II User's
138 Manual.\fR If the parsable option (\fB-P\fR) is specified in addition to the
139 \fB-e\fR option, the format of the data is as follows:
140 .sp
142 .sp
143 .TS
144 c c
145 l l .
146 Field Contents
147 1 Timestamp (nanoseconds since start)
148 2 CPU ID
149 3 Trap number (in hexadecimal)
150 4 Trap name
151 5 Trap rate per interval
152 .TE
154 Each field is separated with whitespace. If the format is modified, it will be
155 modified by adding potentially new fields beginning with field 6; exant fields
156 will remain unchanged.
157 .RE
159 .sp
160 .ne 2
161 .na
162 \fB\fB-l\fR \fR
163 .ad
164 .RS 24n
165 Lists trap table entries. By default, a table is displayed containing all valid
166 trap numbers, their names and a brief description. The trap name is used in
167 both the default output and in the \fIentrylist\fR parameter for the \fB-e\fR
168 argument. If the parsable option (\fB-P\fR) is specified in addition to the
169 \fB-l\fR option, the format of the data is as follows:
170 .sp
172 .sp
173 .TS
174 c c
175 l l .
176 Field Contents
177 1 Trap number in hexadecimal
178 2 Trap number in decimal
179 3 Trap name
180 Remaining Trap description
181 .TE
183 .RE
185 .sp
186 .ne 2
187 .na
188 \fB\fB-P\fR \fR
189 .ad
190 .RS 24n
191 Generates parsable output. When run without other data gathering modifying
192 options (that is, \fB-e\fR, \fB-t\fR or \fB-T\fR), \fBtrapstat\fR's the
193 parsable output has the following format:
194 .sp
196 .sp
197 .TS
198 c c
199 l l .
200 Field Contents
201 1 Timestamp (nanoseconds since start)
202 2 CPU ID
203 3 Trap number (in hexadecimal)
204 4 Trap name
205 5 Trap rate per interval
206 .TE
208 Each field is separated with whitespace. If the format is modified, it will be
209 modified by adding potentially new fields beginning with field 6; extant fields
210 will remain unchanged.
211 .RE
213 .sp
214 .ne 2
215 .na
216 \fB\fB-r\fR \fIrate\fR \fR
217 .ad
218 .RS 24n
219 Explicitly sets the sampling rate to be \fIrate\fR samples per second. If this
220 option is specified, \fBtrapstat\fR's output changes from a traps-per-second to
221 traps-per-sampling-interval.
222 .RE
224 .sp
225 .ne 2
226 .na
227 \fB\fB-t\fR\fR
228 .ad
229 .RS 24n
230 Enables TLB statistics.
231 .sp
232 A table is displayed with four principal columns of data: \fIitlb-miss\fR,
233 \fIitsb-miss\fR, \fIdtlb-miss\fR, and \fIdtsb-miss\fR. The columns contain both
234 the rate of the corresponding event and the percentage of \fBCPU\fR time spent
235 processing the event. The percentage of \fBCPU\fR time is given only in terms
236 of a single \fBCPU\fR. The rows of the table correspond to \fBCPU\fRs, with
237 each \fBCPU\fR consuming two rows: one row for user-mode events (denoted with
238 \fBu\fR) and one row for kernel-mode events (denoted with \fBk\fR). For each
239 row, the percentage of \fBCPU\fR time is totalled and displayed in the
240 rightmost column. The \fBCPU\fRs are delineated with a solid line. If the
241 parsable option (\fB-P\fR) is specified in addition to the \fB-t\fR option, the
242 format of the data is as follows:
243 .sp
245 .sp
246 .TS
247 c c
248 l l .
249 Field Contents
250 1 Timestamp (nanoseconds since start)
251 2 CPU ID
252 3 Mode (\fBk\fR denotes kernel, \fBu\fR denotes user)
253 4 I-TLB misses
254 5 Percentage of time in I-TLB miss handler
255 6 I-TSB misses
256 7 Percentage of time in I-TSB miss handler
257 8 D-TLB misses
258 9 Percentage of time in D-TLB miss handler
259 10 D-TSB misses
260 11 Percentage of time in D-TSB miss handler
261 .TE
263 Each field is separated with whitespace. If the format is modified, it will be
264 modified by adding potentially new fields beginning with field 12; extant
265 fields will remain unchanged.
266 .RE
268 .sp
269 .ne 2
270 .na
271 \fB\fB-T\fR \fR
272 .ad
273 .RS 24n
274 Enables \fBTLB\fR statistics, with page size information. As with the \fB-t\fR
275 option, a table is displayed with four principal columns of data:
276 \fIitlb-miss\fR, \fIitsb-miss\fR, \fIdtlb-miss\fR, and \fIdtsb-miss\fR. The
277 columns contain both the absolute number of the corresponding event, and the
278 percentage of \fBCPU\fR time spent processing the event. The percentage of
279 \fBCPU\fR time is given only in terms of a single \fBCPU\fR. The rows of the
280 table correspond to \fBCPU\fRs, with each \fBCPU\fR consuming two sets of rows:
281 one set for user-level events (denoted with \fBu\fR) and one set for
282 kernel-level events (denoted with \fBk\fR). Each set, in turn, contains as many
283 rows as there are page sizes supported (see \fBgetpagesizes\fR(3C)). For each
284 row, the percentage of \fBCPU\fR time is totalled and displayed in the
285 right-most column. The two sets are delineated with a dashed line; CPUs are
286 delineated with a solid line. If the parsable option (\fB-P\fR) is specified in
287 addition to the \fB-T\fR option, the format of the data is as follows:
288 .sp
290 .sp
291 .TS
292 c c
293 l l .
294 Field Contents
295 1 Timestamp (nanoseconds since start)
296 2 CPU ID
297 3 Mode \fBk\fR denotes kernel, \fBu\fR denotes user)
298 4 Page size, in decimal
299 5 I-TLB misses
300 6 Percentage of time in I-TLB miss handler
301 7 I-TSB misses
302 8 Percentage of time in I-TSB miss handler
303 9 D-TLB misses
304 10 Percentage of time in D-TLB miss handler
305 11 D-TSB misses
306 12 Percentage of time in D-TSB miss handler
307 .TE
309 Each field is separated with whitespace. If the format is modified, it will be
310 modified by adding potentially new fields beginning with field 13; extant
311 fields will remain unchanged.
312 .RE
314 .SH EXAMPLES
315 .LP
316 \fBExample 1 \fRUsing \fBtrapstat\fR Without Options
317 .sp
318 .LP
319 When run without options, \fBtrapstat\fR displays a table of trap types and
320 CPUs. At most six columns can fit in the default terminal width; if (as in this
321 example) there are more than six CPUs, multiple tables are displayed:
323 .sp
324 .in +2
325 .nf
326 example# \fBtrapstat\fR
327 vct name | cpu0 cpu1 cpu4 cpu5 cpu8 cpu9
328 ------------------------+------------------------------------------------------
329 24 cleanwin | 6446 4837 6368 2153 2623 1321
330 41 level-1 | 100 0 0 0 1 0
331 44 level-4 | 0 1 1 1 0 0
332 45 level-5 | 0 0 0 0 0 0
333 47 level-7 | 0 0 0 0 9 0
334 49 level-9 | 100 100 100 100 100 100
335 4a level-10 | 100 0 0 0 0 0
336 4d level-13 | 6 10 7 16 13 11
337 4e level-14 | 100 0 0 0 1 0
338 60 int-vec | 2607 2740 2642 2922 2920 3033
339 64 itlb-miss | 3129 2475 3167 1037 1200 569
340 68 dtlb-miss | 121061 86162 109838 37386 45639 20269
341 6c dtlb-prot | 997 847 1061 379 406 184
342 84 spill-user-32 | 2809 2133 2739 200806 332776 454504
343 88 spill-user-64 | 45819 207856 93487 228529 68373 77590
344 8c spill-user-32-cln | 784 561 767 274 353 215
345 90 spill-user-64-cln | 9 37 17 39 12 13
346 98 spill-kern-64 | 62913 50145 63869 21916 28431 11738
347 a4 spill-asuser-32 | 1327 947 1288 460 572 335
348 a8 spill-asuser-64 | 26 48 18 54 10 14
349 ac spill-asuser-32-cln | 4580 3599 4555 1538 1978 857
350 b0 spill-asuser-64-cln | 26 0 0 2 0 0
351 c4 fill-user-32 | 2862 2161 2798 191746 318115 435850
352 c8 fill-user-64 | 45813 197781 89179 217668 63905 74281
353 cc fill-user-32-cln | 3802 2833 3733 10153 16419 19475
354 d0 fill-user-64-cln | 329 10105 4873 10603 4235 3649
355 d8 fill-kern-64 | 62519 49943 63611 21824 28328 11693
356 108 syscall-32 | 2285 1634 2278 737 957 383
357 126 self-xcall | 100 0 0 0 0 0
359 vct name | cpu12 cpu13 cpu14 cpu15
360 ------------------------+------------------------------------
361 24 cleanwin | 5435 4232 6302 6104
362 41 level-1 | 0 0 0 0
363 44 level-4 | 2 0 0 1
364 45 level-5 | 0 0 0 0
365 47 level-7 | 0 0 0 0
366 49 level-9 | 100 100 100 100
367 4a level-10 | 0 0 0 0
368 4d level-13 | 15 11 22 11
369 4e level-14 | 0 0 0 0
370 60 int-vec | 2813 2833 2738 2714
371 64 itlb-miss | 2636 1925 3133 3029
372 68 dtlb-miss | 90528 70639 107786 103425
373 6c dtlb-prot | 819 675 988 954
374 84 spill-user-32 | 175768 39933 2811 2742
375 88 spill-user-64 | 0 241348 96907 118298
376 8c spill-user-32-cln | 681 513 753 730
377 90 spill-user-64-cln | 0 42 16 20
378 98 spill-kern-64 | 52158 40914 62305 60141
379 a4 spill-asuser-32 | 1113 856 1251 1208
380 a8 spill-asuser-64 | 0 64 16 24
381 ac spill-asuser-32-cln | 3816 2942 4515 4381
382 b0 spill-asuser-64-cln | 0 0 0 0
383 c4 fill-user-32 | 170744 38444 2876 2784
384 c8 fill-user-64 | 0 230381 92941 111694
385 cc fill-user-32-cln | 8550 3790 3612 3553
386 d0 fill-user-64-cln | 0 10726 4495 5845
387 d8 fill-kern-64 | 51968 40760 62053 59922
388 108 syscall-32 | 1839 1495 2144 2083
389 126 self-xcall | 0 0 0 0
390 .fi
391 .in -2
392 .sp
394 .LP
395 \fBExample 2 \fRUsing \fBtrapset\fR with CPU Filtering
396 .sp
397 .LP
398 The \fB-c\fR option can be used to limit the \fBCPU\fRs on which
399 \fBtrapstat\fR is enabled. This example limits \fBCPU 1\fR and \fBCPU\fRs
400 \fB12\fR through \fB15\fR.
402 .sp
403 .in +2
404 .nf
405 example# \fBtrapstat -c 1,12-15\fR
408 vct name | cpu1 cpu12 cpu13 cpu14 cpu15
409 ------------------------+---------------------------------------------
410 24 cleanwin | 6923 3072 2500 3518 2261
411 44 level-4 | 3 0 0 1 1
412 49 level-9 | 100 100 100 100 100
413 4d level-13 | 23 8 14 19 14
414 60 int-vec | 2559 2699 2752 2688 2792
415 64 itlb-miss | 3296 1548 1174 1698 1087
416 68 dtlb-miss | 114788 54313 43040 58336 38057
417 6c dtlb-prot | 1046 549 417 545 370
418 84 spill-user-32 | 66551 29480 301588 26522 213032
419 88 spill-user-64 | 0 318652 111239 299829 221716
420 8c spill-user-32-cln | 856 347 331 416 293
421 90 spill-user-64-cln | 0 55 21 59 39
422 98 spill-kern-64 | 66464 31803 24758 34004 22277
423 a4 spill-asuser-32 | 1423 569 560 698 483
424 a8 spill-asuser-64 | 0 74 32 98 46
425 ac spill-asuser-32-cln | 4875 2250 1728 2384 1584
426 b0 spill-asuser-64-cln | 0 2 0 1 0
427 c4 fill-user-32 | 64193 28418 287516 27055 202093
428 c8 fill-user-64 | 0 305016 106692 288542 210654
429 cc fill-user-32-cln | 6733 3520 15185 2396 12035
430 d0 fill-user-64-cln | 0 13226 3506 12933 11032
431 d8 fill-kern-64 | 66220 31680 24674 33892 22196
432 108 syscall-32 | 2446 967 817 1196 755
433 .fi
434 .in -2
435 .sp
437 .LP
438 \fBExample 3 \fRUsing \fBtrapstat\fR with TLB Statistics
439 .sp
440 .LP
441 The \fB-t\fR option displays in-depth \fBTLB\fR statistics, including the
442 amount of time spent performing \fBTLB\fR miss processing. The following
443 example shows that the machine is spending 14.1 percent of its time just
444 handling D-TLB misses:
446 .sp
447 .in +2
448 .nf
449 example# \fBtrapstat -t\fR
450 cpu m| itlb-miss %tim itsb-miss %tim | dtlb-miss %tim dtsb-miss %tim |%tim
451 -----+-------------------------------+-------------------------------+----
452 0 u| 2571 0.3 0 0.0 | 10802 1.3 0 0.0 | 1.6
453 0 k| 0 0.0 0 0.0 | 106420 13.4 184 0.1 |13.6
454 -----+-------------------------------+-------------------------------+----
455 1 u| 3069 0.3 0 0.0 | 10983 1.2 100 0.0 | 1.6
456 1 k| 27 0.0 0 0.0 | 106974 12.6 19 0.0 |12.7
457 -----+-------------------------------+-------------------------------+----
458 2 u| 3033 0.3 0 0.0 | 11045 1.2 105 0.0 | 1.6
459 2 k| 43 0.0 0 0.0 | 107842 12.7 108 0.0 |12.8
460 -----+-------------------------------+-------------------------------+----
461 3 u| 2924 0.3 0 0.0 | 10380 1.2 121 0.0 | 1.6
462 3 k| 54 0.0 0 0.0 | 102682 12.2 16 0.0 |12.2
463 -----+-------------------------------+-------------------------------+----
464 4 u| 3064 0.3 0 0.0 | 10832 1.2 120 0.0 | 1.6
465 4 k| 31 0.0 0 0.0 | 107977 13.0 236 0.1 |13.1
466 =====+===============================+===============================+====
467 ttl | 14816 0.3 0 0.0 | 585937 14.1 1009 0.0 |14.5
468 .fi
469 .in -2
470 .sp
472 .LP
473 \fBExample 4 \fRUsing \fBtrapstat\fR with TLB Statistics and Page Size
474 Information
475 .sp
476 .LP
477 By specifying the \fB-T\fR option, \fBtrapstat\fR shows \fBTLB\fR misses broken
478 down by page size. In this example, CPU 0 is spending 7.9 percent of its time
479 handling user-mode TLB misses on 8K pages, and another 2.3 percent of its time
480 handling user-mode TLB misses on 64K pages.
482 .sp
483 .in +2
484 .nf
485 example# \fBtrapstat -T -c 0\fR
486 cpu m size| itlb-miss %tim itsb-miss %tim | dtlb-miss %tim dtsb-miss %tim |%tim
487 ----------+-------------------------------+-------------------------------+----
488 0 u 8k| 1300 0.1 15 0.0 | 104897 7.9 90 0.0 | 8.0
489 0 u 64k| 0 0.0 0 0.0 | 29935 2.3 7 0.0 | 2.3
490 0 u 512k| 0 0.0 0 0.0 | 3569 0.2 2 0.0 | 0.2
491 0 u 4m| 0 0.0 0 0.0 | 233 0.0 2 0.0 | 0.0
492 - - - - - + - - - - - - - - - - - - - - - + - - - - - - - - - - - - - - - + - -
493 0 k 8k| 13 0.0 0 0.0 | 71733 6.5 110 0.0 | 6.5
494 0 k 64k| 0 0.0 0 0.0 | 0 0.0 0 0.0 | 0.0
495 0 k 512k| 0 0.0 0 0.0 | 0 0.0 206 0.1 | 0.1
496 0 k 4m| 0 0.0 0 0.0 | 0 0.0 0 0.0 | 0.0
497 ==========+===============================+===============================+====
498 ttl | 1313 0.1 15 0.0 | 210367 17.1 417 0.2 |17.5
499 .fi
500 .in -2
501 .sp
503 .LP
504 \fBExample 5 \fRUsing \fBtrapstat\fR with Entry Filtering
505 .sp
506 .LP
507 By specifying the \fB-e\fR option, \fBtrapstat\fR displays statistics for only
508 specific trap types. Using this option minimizes the probe effect when seeking
509 specific data. This example yields statistics for only the \fIdtlb-prot\fR and
510 \fIsyscall-32\fR traps on CPUs 12 through 15:
512 .sp
513 .in +2
514 .nf
515 example# \fBtrapstat -e dtlb-prot,syscall-32 -c 12-15\fR
516 vct name | cpu12 cpu13 cpu14 cpu15
517 ------------------------+------------------------------------
518 6c dtlb-prot | 817 754 1018 560
519 108 syscall-32 | 1426 1647 2186 1142
521 vct name | cpu12 cpu13 cpu14 cpu15
522 ------------------------+------------------------------------
523 6c dtlb-prot | 1085 996 800 707
524 108 syscall-32 | 2578 2167 1638 1452
525 .fi
526 .in -2
527 .sp
529 .LP
530 \fBExample 6 \fRUsing \fBtrapstat\fR with a Higher Sampling Rate
531 .sp
532 .LP
533 The following example uses the \fB-r\fR option to specify a sampling rate of
534 1000 samples per second, and filter only for the level-10 trap. Additionally,
535 specifying the \fB-P\fR option yields parsable output.
537 .sp
538 .LP
539 Notice the timestamp difference between the level-10 events: 9,998,000
540 nanoseconds and 10,007,000 nanoseconds. These level-10 events correspond to the
541 system clock, which by default ticks at 100 hertz (that is, every 10,000,000
542 nanoseconds).
544 .sp
545 .in +2
546 .nf
547 example# \fBtrapstat -e level-10 -P -r 1000\fR
548 1070400 0 4a level-10 0
549 2048600 0 4a level-10 0
550 3030400 0 4a level-10 1
551 4035800 0 4a level-10 0
552 5027200 0 4a level-10 0
553 6027200 0 4a level-10 0
554 7027400 0 4a level-10 0
555 8028200 0 4a level-10 0
556 9026400 0 4a level-10 0
557 10029600 0 4a level-10 0
558 11028600 0 4a level-10 0
559 12024000 0 4a level-10 0
560 13028400 0 4a level-10 1
561 14031200 0 4a level-10 0
562 15027200 0 4a level-10 0
563 16027600 0 4a level-10 0
564 17025000 0 4a level-10 0
565 18026000 0 4a level-10 0
566 19027800 0 4a level-10 0
567 20025600 0 4a level-10 0
568 21025200 0 4a level-10 0
569 22025000 0 4a level-10 0
570 23035400 0 4a level-10 1
571 24027400 0 4a level-10 0
572 25026000 0 4a level-10 0
573 26027000 0 4a level-10 0
574 .fi
575 .in -2
576 .sp
578 .SH ATTRIBUTES
579 .sp
580 .LP
581 See \fBattributes\fR(5) for descriptions of the following attributes:
582 .sp
584 .sp
585 .TS
586 box;
587 c c
588 l l .
589 ATTRIBUTE TYPE ATTRIBUTE VALUE
590 Interface Stability
591 Human Readable Output Unstable
592 Parsable Output Evolving
593 .TE
595 .SH SEE ALSO
596 .sp
597 .LP
598 \fBlockstat\fR(1M), \fBpmap\fR(1), \fBpsrset\fR(1M), \fBpsrinfo\fR(1M),
599 \fBpbind\fR(1M), \fBppgsz\fR(1), \fBgetpagesizes\fR(3C)
600 .sp
601 .LP
602 \fISun Microelectronics UltraSPARC II User's Manual,\fR January 1997, STP1031,
603 .sp
604 .LP
605 \fIThe SPARC Architecture Manual, Version 9,\fR 1994, Prentice-Hall.
606 .SH NOTES
607 .sp
608 .LP
609 When enabled, \fBtrapstat\fR induces a varying probe effect, depending on the
610 type of information collected. While the precise probe effect depends upon the
611 specifics of the hardware, the following table can be used as a rough guide:
612 .sp
614 .sp
615 .TS
616 c c
617 l l .
618 Option Approximate probe effect
619 default 3-5% per trap
620 \fB-e\fR 3-5% per specified trap
621 \fB-t\fR, \fB-T\fR T{
622 40-45% per TLB miss trap hitting in the TSB, 25-30% per TLB miss trap missing in the TSB
623 T}
624 .TE
626 .sp
627 .LP
628 These probe effects are \fIper trap\fR not for the system as a whole. For
629 example, running \fBtrapstat\fR with the default options on a system that
630 spends 7% of total time handling traps induces a performance degradation of
631 less than one half of one percent; running \fBtrapstat\fR with the \fB-t\fR or
632 \fB-T\fR option on a system spending 5% of total time processing TLB misses
633 induce a performance degradation of no more than 2.5%.
634 .sp
635 .LP
636 When run with the \fB-t\fR or \fB-T\fR option, \fBtrapstat\fR accounts for its
637 probe effect when calculating the \fI%tim\fR fields. This assures that the
638 \fI%tim\fR fields are a reasonably accurate indicator of the time a given
639 workload is spending handling TLB misses \(em regardless of the perturbing
640 presence of \fBtrapstat\fR.
641 .sp
642 .LP
643 While the \fI%tim\fR fields include the explicit cost of executing the TLB miss
644 handler, they do \fInot\fR include the implicit costs of TLB miss traps (for
645 example, pipeline effects, cache pollution, etc). These implicit costs become
646 more significant as the trap rate grows; if high \fI%tim\fR values are reported
647 (greater than 50%), you can accurately infer that much of the balance of time
648 is being spent on the implicit costs of the TLB miss traps.
649 .sp
650 .LP
651 Due to the potential system wide degradation induced, only the super-user can
652 run \fBtrapstat\fR.
653 .sp
654 .LP
655 Due to the limitation of the underlying statistics gathering methodology, only
656 one instance of \fBtrapstat\fR can run at a time.