usr/src/uts/common/sys/rtc.h

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21
  22 /*
  23  * Copyright 2007 Sun Microsystems, Inc.  All rights reserved.
  24  * Use is subject to license terms.
  25  */
  26
  27 /*      Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */
  28
  29 /*      Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T   */
  30 /*        All Rights Reserved   */
  31
  32 #ifndef _SYS_RTC_H
  33 #define _SYS_RTC_H
  34
  35 #pragma ident   "%Z%%M% %I%     %E% SMI"
  36
  37 #ifdef  __cplusplus
  38 extern "C" {
  39 #endif
  40
  41
  42 /*
  43  * Definitions for Real Time Clock driver (Motorola MC146818 chip).
  44  */
  45
  46 /*
  47  * MP NOTE:
  48  * cmos_lck must be locked when addressing CMOS via
  49  * RTC_ADDR and RTC_DATA i/o addresses
  50  */
  51 #define RTC_ADDR        0x70    /* I/O port address of for register select */
  52 #define RTC_DATA        0x71    /* I/O port address for data read/write */
  53
  54 /*
  55  * Register A definitions
  56  */
  57 #define RTC_A           0x0a    /* register A address */
  58 #define RTC_UIP         0x80    /* Update in progress bit */
  59 #define RTC_DIV0        0x00    /* Time base of 4.194304 MHz */
  60 #define RTC_DIV1        0x10    /* Time base of 1.048576 MHz */
  61 #define RTC_DIV2        0x20    /* Time base of 32.768 KHz */
  62 #define RTC_RATE6       0x06    /* interrupt rate of 976.562 */
  63
  64 /*
  65  * Register B definitions
  66  */
  67 #define RTC_B           0x0b    /* register B address */
  68 #define RTC_SET         0x80    /* stop updates for time set */
  69 #define RTC_PIE         0x40    /* Periodic interrupt enable */
  70 #define RTC_AIE         0x20    /* Alarm interrupt enable */
  71 #define RTC_UIE         0x10    /* Update ended interrupt enable */
  72 #define RTC_SQWE        0x08    /* Square wave enable */
  73 #define RTC_DM          0x04    /* Date mode, 1 = binary, 0 = BCD */
  74 #define RTC_HM          0x02    /* hour mode, 1 = 24 hour, 0 = 12 hour */
  75 #define RTC_DSE         0x01    /* Daylight savings enable */
  76
  77 /*
  78  * Register C definitions
  79  */
  80 #define RTC_C           0x0c    /* register C address */
  81 #define RTC_IRQF        0x80    /* IRQ flag */
  82 #define RTC_PF          0x40    /* PF flag bit */
  83 #define RTC_AF          0x20    /* AF flag bit */
  84 #define RTC_UF          0x10    /* UF flag bit */
  85
  86 /*
  87  * Register D definitions
  88  */
  89 #define RTC_D           0x0d    /* register D address */
  90 #define RTC_VRT         0x80    /* Valid RAM and time bit */
  91
  92 #define RTC_NREG        0x0e    /* number of RTC registers */
  93 #define RTC_NREGP       0x0c    /* number of RTC registers to set time */
  94 #define RTC_CENTURY     0x32    /* not included in RTC_NREG(P) */
  95
  96 /*
  97  * Ioctl definitions for accessing RTC.
  98  */
  99 #define RTCIOC  ('R' << 8)
 100
 101 #define RTCRTIME        (RTCIOC | 0x01)         /* Read time from RTC */
 102 #define RTCSTIME        (RTCIOC | 0x02)         /* Set time into RTC */
 103
 104 struct  rtc_t {                 /* registers 0x0 to 0xD, 0x32 */
 105         unsigned char   rtc_sec;
 106         unsigned char   rtc_asec;
 107         unsigned char   rtc_min;
 108         unsigned char   rtc_amin;
 109         unsigned char   rtc_hr;
 110         unsigned char   rtc_ahr;
 111         unsigned char   rtc_dow;
 112         unsigned char   rtc_dom;
 113         unsigned char   rtc_mon;
 114         unsigned char   rtc_yr;
 115         unsigned char   rtc_statusa;
 116         unsigned char   rtc_statusb;
 117         unsigned char   rtc_statusc;
 118         unsigned char   rtc_statusd;
 119         unsigned char   rtc_century; /* register 0x32 */
 120         unsigned char   rtc_adom;       /* ACPI-provided day alarm */
 121         unsigned char   rtc_amon;       /* ACPI-provided mon alarm */
 122 };
 123
 124 #ifdef  __cplusplus
 125 }
 126 #endif
 127
 128 #endif  /* _SYS_RTC_H */