usr/src/uts/common/io/e1000g/e1000_osdep.h

   1 /*
   2  * This file is provided under a CDDLv1 license.  When using or
   3  * redistributing this file, you may do so under this license.
   4  * In redistributing this file this license must be included
   5  * and no other modification of this header file is permitted.
   6  *
   7  * CDDL LICENSE SUMMARY
   8  *
   9  * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
  10  *
  11  * The contents of this file are subject to the terms of Version
  12  * 1.0 of the Common Development and Distribution License (the "License").
  13  *
  14  * You should have received a copy of the License with this software.
  15  * You can obtain a copy of the License at
  16  *      http://www.opensolaris.org/os/licensing.
  17  * See the License for the specific language governing permissions
  18  * and limitations under the License.
  19  */
  20
  21 /*
  22  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
  23  * Use is subject to license terms of the CDDLv1.
  24  */
  25
  26 #ifndef _E1000_OSDEP_H
  27 #define _E1000_OSDEP_H
  28
  29 #ifdef __cplusplus
  30 extern "C" {
  31 #endif
  32
  33 #include <sys/types.h>
  34 #include <sys/conf.h>
  35 #include <sys/debug.h>
  36 #include <sys/stropts.h>
  37 #include <sys/stream.h>
  38 #include <sys/strlog.h>
  39 #include <sys/kmem.h>
  40 #include <sys/stat.h>
  41 #include <sys/kstat.h>
  42 #include <sys/modctl.h>
  43 #include <sys/errno.h>
  44 #include <sys/ddi.h>
  45 #include <sys/sunddi.h>
  46 #include <sys/pci.h>
  47 #include <sys/atomic.h>
  48 #include <sys/note.h>
  49 #include <sys/mutex.h>
  50 #include <sys/pci_cap.h>
  51 #include "e1000g_debug.h"
  52
  53 #define usec_delay(x)           drv_usecwait(x)
  54 #define usec_delay_irq          usec_delay
  55 #define msec_delay(x)           drv_usecwait(x * 1000)
  56 #define msec_delay_irq          msec_delay
  57
  58 #ifdef E1000G_DEBUG
  59 #define DEBUGOUT(S)             \
  60         E1000G_DEBUGLOG_0(NULL, E1000G_INFO_LEVEL, S)
  61 #define DEBUGOUT1(S, A)         \
  62         E1000G_DEBUGLOG_1(NULL, E1000G_INFO_LEVEL, S, A)
  63 #define DEBUGOUT2(S, A, B)      \
  64         E1000G_DEBUGLOG_2(NULL, E1000G_INFO_LEVEL, S, A, B)
  65 #define DEBUGOUT3(S, A, B, C)   \
  66         E1000G_DEBUGLOG_3(NULL, E1000G_INFO_LEVEL, S, A, B, C)
  67 #define DEBUGFUNC(F)            \
  68         E1000G_DEBUGLOG_0(NULL, E1000G_TRACE_LEVEL, F)
  69 #else
  70 #define DEBUGOUT(S)
  71 #define DEBUGOUT1(S, A)
  72 #define DEBUGOUT2(S, A, B)
  73 #define DEBUGOUT3(S, A, B, C)
  74 #define DEBUGFUNC(F)
  75 #endif
  76
  77 #define OS_DEP(hw)              ((struct e1000g_osdep *)((hw)->back))
  78
  79 #define false           0
  80 #define true            1
  81 #define FALSE           false
  82 #define TRUE            true
  83
  84 #define CMD_MEM_WRT_INVALIDATE  0x0010  /* BIT_4 */
  85 #define PCI_COMMAND_REGISTER    0x04
  86 #define PCI_EX_CONF_CAP         0xE0
  87 #define ADAPTER_REG_SET         1 /* solaris mapping of adapter registers */
  88 #define ICH_FLASH_REG_SET       2       /* solaris mapping of flash memory */
  89
  90 #define RECEIVE_BUFFER_ALIGN_SIZE       256
  91 #define E1000_MDALIGN                   4096
  92 #define E1000_MDALIGN_82546             65536
  93 #define E1000_ERT_2048                  0x100
  94
  95 /* PHY Extended Status Register */
  96 #define IEEE_ESR_1000T_HD_CAPS  0x1000  /* 1000T HD capable */
  97 #define IEEE_ESR_1000T_FD_CAPS  0x2000  /* 1000T FD capable */
  98 #define IEEE_ESR_1000X_HD_CAPS  0x4000  /* 1000X HD capable */
  99 #define IEEE_ESR_1000X_FD_CAPS  0x8000  /* 1000X FD capable */
 100
 101 /*
 102  * required by shared code
 103  */
 104 #define E1000_WRITE_FLUSH(a)    (void)E1000_READ_REG(a, E1000_STATUS)
 105
 106 #define E1000_WRITE_REG(hw, reg, value) \
 107 {\
 108         if ((hw)->mac.type != e1000_82542) \
 109                 ddi_put32((OS_DEP(hw))->reg_handle, \
 110                     (uint32_t *)((uintptr_t)(hw)->hw_addr + reg), \
 111                     value); \
 112         else \
 113                 ddi_put32((OS_DEP(hw))->reg_handle, \
 114                     (uint32_t *)((uintptr_t)(hw)->hw_addr + \
 115                     e1000_translate_register_82542(reg)), \
 116                     value); \
 117 }
 118
 119 #define E1000_READ_REG(hw, reg) (\
 120         ((hw)->mac.type != e1000_82542) ? \
 121             ddi_get32((OS_DEP(hw))->reg_handle, \
 122                 (uint32_t *)((uintptr_t)(hw)->hw_addr + reg)) : \
 123             ddi_get32((OS_DEP(hw))->reg_handle, \
 124                 (uint32_t *)((uintptr_t)(hw)->hw_addr + \
 125                 e1000_translate_register_82542(reg))))
 126
 127 #define E1000_WRITE_REG_ARRAY(hw, reg, offset, value) \
 128 {\
 129         if ((hw)->mac.type != e1000_82542) \
 130                 ddi_put32((OS_DEP(hw))->reg_handle, \
 131                     (uint32_t *)((uintptr_t)(hw)->hw_addr + \
 132                     reg + ((offset) << 2)),\
 133                     value); \
 134         else \
 135                 ddi_put32((OS_DEP(hw))->reg_handle, \
 136                     (uint32_t *)((uintptr_t)(hw)->hw_addr + \
 137                     e1000_translate_register_82542(reg) + \
 138                     ((offset) << 2)), value); \
 139 }
 140
 141 #define E1000_READ_REG_ARRAY(hw, reg, offset) (\
 142         ((hw)->mac.type != e1000_82542) ? \
 143             ddi_get32((OS_DEP(hw))->reg_handle, \
 144                 (uint32_t *)((uintptr_t)(hw)->hw_addr + reg + \
 145                 ((offset) << 2))) : \
 146             ddi_get32((OS_DEP(hw))->reg_handle, \
 147                 (uint32_t *)((uintptr_t)(hw)->hw_addr + \
 148                 e1000_translate_register_82542(reg) + \
 149                 ((offset) << 2))))
 150
 151
 152 #define E1000_WRITE_REG_ARRAY_DWORD(a, reg, offset, value)      \
 153         E1000_WRITE_REG_ARRAY(a, reg, offset, value)
 154 #define E1000_READ_REG_ARRAY_DWORD(a, reg, offset)              \
 155         E1000_READ_REG_ARRAY(a, reg, offset)
 156
 157
 158 #define E1000_READ_FLASH_REG(hw, reg)   \
 159         ddi_get32((OS_DEP(hw))->ich_flash_handle, \
 160                 (uint32_t *)((uintptr_t)(hw)->flash_address + (reg)))
 161
 162 #define E1000_READ_FLASH_REG16(hw, reg) \
 163         ddi_get16((OS_DEP(hw))->ich_flash_handle, \
 164                 (uint16_t *)((uintptr_t)(hw)->flash_address + (reg)))
 165
 166 #define E1000_WRITE_FLASH_REG(hw, reg, value)   \
 167         ddi_put32((OS_DEP(hw))->ich_flash_handle, \
 168                 (uint32_t *)((uintptr_t)(hw)->flash_address + (reg)), (value))
 169
 170 #define E1000_WRITE_FLASH_REG16(hw, reg, value) \
 171         ddi_put16((OS_DEP(hw))->ich_flash_handle, \
 172                 (uint16_t *)((uintptr_t)(hw)->flash_address + (reg)), (value))
 173
 174 #define UNREFERENCED_1PARAMETER(_p)             _NOTE(ARGUNUSED(_p))
 175 #define UNREFERENCED_2PARAMETER(_p, _q)         _NOTE(ARGUNUSED(_p, _q))
 176 #define UNREFERENCED_3PARAMETER(_p, _q, _r)     _NOTE(ARGUNUSED(_p, _q, _r))
 177 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) _NOTE(ARGUNUSED(_p, _q, _r, _s))
 178 #define UNREFERENCED_5PARAMETER(_p, _q, _r, _s, _t)     \
 179         _NOTE(ARGUNUSED(_p, _q, _r, _s, _t))
 180
 181 typedef int8_t          s8;
 182 typedef int16_t         s16;
 183 typedef int32_t         s32;
 184 typedef int64_t         s64;
 185 typedef uint8_t         u8;
 186 typedef uint16_t        u16;
 187 typedef uint32_t        u32;
 188 typedef uint64_t        u64;
 189 typedef boolean_t       bool;
 190
 191 #define __le16 u16
 192 #define __le32 u32
 193 #define __le64 u64
 194
 195 struct e1000g_osdep {
 196         ddi_acc_handle_t reg_handle;
 197         ddi_acc_handle_t cfg_handle;
 198         ddi_acc_handle_t ich_flash_handle;
 199         ddi_acc_handle_t io_reg_handle;
 200         struct e1000g *adapter;
 201 };
 202
 203 /* Shared Code Mutex Defines */
 204 #define E1000_MUTEX                     kmutex_t
 205 #define E1000_MUTEX_INIT(mutex)         mutex_init(mutex, NULL, \
 206         MUTEX_DRIVER, NULL)
 207 #define E1000_MUTEX_DESTROY(mutex)      mutex_destroy(mutex)
 208
 209 #define E1000_MUTEX_LOCK(mutex)         mutex_enter(mutex)
 210 #define E1000_MUTEX_TRYLOCK(mutex)      mutex_tryenter(mutex)
 211 #define E1000_MUTEX_UNLOCK(mutex)       mutex_exit(mutex)
 212
 213 #ifdef __sparc  /* on SPARC, use only memory-mapped routines */
 214 #define E1000_WRITE_REG_IO      E1000_WRITE_REG
 215 #else   /* on x86, use port io routines */
 216 #define E1000_WRITE_REG_IO(a, reg, val) { \
 217         ddi_put32((OS_DEP(a))->io_reg_handle, \
 218             (uint32_t *)(a)->io_base, \
 219             reg); \
 220         ddi_put32((OS_DEP(a))->io_reg_handle, \
 221             (uint32_t *)((a)->io_base + 4), \
 222             val); \
 223 }
 224 #endif  /* __sparc */
 225
 226 #ifdef __cplusplus
 227 }
 228 #endif
 229
 230 #endif  /* _E1000_OSDEP_H */