usr/src/uts/sun4u/sys/pci/pci_fm.h

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 /*
  22  * Copyright 2006 Sun Microsystems, Inc.  All rights reserved.
  23  * Use is subject to license terms.
  24  */
  25
  26 #ifndef _PCI_FM_H
  27 #define _PCI_FM_H
  28
  29 #pragma ident   "%Z%%M% %I%     %E% SMI"
  30
  31 #include <sys/ddifm.h>
  32
  33 #ifdef  __cplusplus
  34 extern "C" {
  35 #endif
  36
  37 #ifdef _KERNEL
  38
  39 #define PBM_PRIMARY             1
  40 #define PBM_SECONDARY           0
  41 #define PBM_NONFATAL            0
  42 #define PBM_FATAL               1
  43 #define CB_NONFATAL             0
  44 #define CB_FATAL                1
  45 #define FM_LOG_PCI              0
  46 #define FM_LOG_PBM              1
  47 #define PCI_SIDEA               0
  48 #define PCI_SIDEB               1
  49 #define ECC_MAX_ERRS            6
  50
  51 /*
  52  * Since pci_pbm_err_handler() is called by various interrupt/trap/callback
  53  * handlers, it is necessary for it to know where it is being called from.
  54  * Below are the flags passed to pci_pbm_err_handler() to give it knowledge
  55  * of it's caller.
  56  */
  57 #define PCI_TRAP_CALL           0x0
  58 #define PCI_CB_CALL             0x1
  59 #define PCI_INTR_CALL           0x2
  60 #define PCI_BUS_EXIT_CALL       0x3
  61 #define PCI_ECC_CALL            0x4
  62
  63 #define PCIX_ERROR_SUBCLASS     "pcix"
  64 #define PCIX_SECONDARY          "s-"
  65 #define PCIX_STAT               "pcix-stat"
  66 #define PCIX_PFAR               "pcix-pfar"
  67
  68 extern errorq_t *pci_ecc_queue;         /* per-system ecc handling queue */
  69
  70 /*
  71  * region where schizo pio ecc error was detected
  72  */
  73 typedef enum {
  74         SCH_REG_UPA,
  75         SCH_REG_PCIA_REG,
  76         SCH_REG_PCIA_MEM,
  77         SCH_REG_PCIA_CFGIO,
  78         SCH_REG_PCIB_REG,
  79         SCH_REG_PCIB_MEM,
  80         SCH_REG_PCIB_CFGIO,
  81         SCH_REG_SAFARI_REGS
  82 } ecc_region_t;
  83
  84 typedef struct pbm_fm_err {
  85         char *pbm_err_class;
  86         uint64_t pbm_reg_bit;
  87         int pbm_pri;
  88         int pbm_flag;
  89         char *pbm_terr_class;
  90 } pbm_fm_err_t;
  91
  92 typedef struct ecc_format {
  93         ecc_region_t ecc_region;
  94         uint64_t ecc_space;
  95         int ecc_side;
  96 } ecc_format_t;
  97
  98 typedef struct cb_fm_err {
  99         char *cb_err_class;
 100         uint64_t cb_reg_bit;
 101         int cb_fatal;
 102 } cb_fm_err_t;
 103
 104 typedef struct ecc_fm_err {
 105         char *ecc_err_class;
 106         uint64_t ecc_reg_bit;
 107         int ecc_type;
 108         int ecc_pri;
 109         uint64_t ecc_region_bits;
 110         int ecc_region;
 111         int ecc_flag;
 112 } ecc_fm_err_t;
 113
 114 /*
 115  * iommu errstate used to store iommu specific registers
 116  */
 117 struct iommu_errstate {
 118         uint64_t iommu_stat;
 119         uint64_t iommu_tfar;
 120 };
 121
 122 struct pci_errstate {
 123         char *pci_err_class;
 124         uint16_t pci_cfg_stat;
 125         uint16_t pci_cfg_comm;
 126         uint64_t pci_pa;
 127 };
 128
 129 /*
 130  * pbm errstate use to encompass the state for all errors
 131  * detected by the pci block
 132  */
 133 struct pbm_errstate {
 134         char *pbm_err_class;
 135         int pbm_pri;
 136         int pbm_log;
 137         uint32_t pbm_err;
 138         uint32_t pbm_multi;
 139         char *pbm_bridge_type;
 140         uint64_t pbm_ctl_stat;
 141         uint64_t pbm_afsr;
 142         uint64_t pbm_afar;
 143         uint64_t pbm_va_log;
 144         uint64_t pbm_err_sl;
 145         iommu_errstate_t pbm_iommu;
 146         uint64_t pbm_pcix_stat;
 147         uint32_t pbm_pcix_pfar;
 148         pci_errstate_t pbm_pci;
 149         char *pbm_terr_class;
 150 };
 151
 152 /*
 153  * ecc errstate used to store all state captured,
 154  * upon detection of an ecc error.
 155  */
 156 struct ecc_errstate {
 157         char *ecc_bridge_type;
 158         ecc_t *ecc_p;
 159         uint64_t ecc_afsr;
 160         uint64_t ecc_afar;
 161         uint64_t ecc_offset;
 162         uint64_t ecc_dev_id;
 163         uint64_t ecc_dw_offset;
 164         struct async_flt ecc_aflt;
 165         ecc_intr_info_t ecc_ii_p;
 166         uint64_t ecc_ctrl;
 167         int ecc_pri;
 168         ecc_region_t ecc_region;
 169         uint64_t ecc_ena;
 170         uint64_t ecc_err_addr;
 171         char *ecc_err_type;
 172         int ecc_pg_ret;
 173         int ecc_caller;
 174         nvlist_t *ecc_fmri;
 175         uint64_t ecc_dimm_offset;
 176         char ecc_unum[UNUM_NAMLEN];
 177         char ecc_dimm_sid[DIMM_SERIAL_ID_LEN];
 178 };
 179
 180 /*
 181  * control block error state
 182  */
 183 struct cb_errstate {
 184         char *cb_err_class;
 185         char *cb_bridge_type;
 186         uint64_t cb_csr;
 187         uint64_t cb_err;
 188         uint64_t cb_intr;
 189         uint64_t cb_elog;
 190         uint64_t cb_ecc;
 191         uint64_t cb_pcr;
 192         uint64_t cb_ue_afsr;
 193         uint64_t cb_ue_afar;
 194         uint64_t cb_ce_afsr;
 195         uint64_t cb_ce_afar;
 196         uint64_t cb_first_elog;
 197         uint64_t cb_first_eaddr;
 198         uint64_t cb_leaf_status;
 199         pbm_errstate_t cb_pbm[2];
 200 };
 201
 202 extern int pci_fm_init_child(dev_info_t *dip, dev_info_t *tdip, int cap,
 203                 ddi_iblock_cookie_t *ibc);
 204 extern void pci_bus_enter(dev_info_t *dip, ddi_acc_handle_t handle);
 205 extern void pci_bus_exit(dev_info_t *dip, ddi_acc_handle_t handle);
 206 extern void pbm_ereport_post(dev_info_t *dip, uint64_t ena,
 207                 pbm_errstate_t *pbm_err);
 208 extern void pci_fm_acc_setup(ddi_map_req_t *mp, dev_info_t *rdip);
 209 extern void pci_fmri_create(dev_info_t *dip, pci_common_t *cmn_p);
 210 extern void pci_fm_create(pci_t *pci_p);
 211 extern void pci_fm_destroy(pci_t *pci_p);
 212 extern int pci_err_callback(dev_info_t *dip, ddi_fm_error_t *derr,
 213                 const void *impl_data);
 214 #endif /* _KERNEL */
 215
 216 #ifdef  __cplusplus
 217 }
 218 #endif
 219
 220 #endif  /* _PCI_FM_H */