kernel: remove unused utsname_set_machine()
[unleashed.git] / usr / src / uts / sun4u / sys / isadma.h
blob81c4b88d3f23e33db6fe709a88b439c8b320bac7
1 /*
2 * CDDL HEADER START
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License, Version 1.0 only
6 * (the "License"). You may not use this file except in compliance
7 * with the License.
9 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
10 * or http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
14 * When distributing Covered Code, include this CDDL HEADER in each
15 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
16 * If applicable, add the following below this CDDL HEADER, with the
17 * fields enclosed by brackets "[]" replaced with your own identifying
18 * information: Portions Copyright [yyyy] [name of copyright owner]
20 * CDDL HEADER END
23 * Copyright (c) 2000 by Sun Microsystems, Inc.
24 * All rights reserved.
27 #ifndef _SYS_ISADMA_H
28 #define _SYS_ISADMA_H
30 #pragma ident "%Z%%M% %I% %E% SMI"
32 #ifdef __cplusplus
33 extern "C" {
34 #endif
37 * definition of ebus reg spec entry:
39 typedef struct {
40 uint32_t ebus_addr_hi;
41 uint32_t ebus_addr_low;
42 uint32_t ebus_size;
43 } ebus_regspec_t;
46 * driver soft state structure:
48 typedef struct {
49 dev_info_t *isadma_dip; /* Our dip */
50 ebus_regspec_t *isadma_regp; /* Our cached registers */
51 int32_t isadma_reglen; /* reg len */
52 kmutex_t isadma_access_lock; /* PIO/DMA lock */
53 kcondvar_t isadma_access_cv; /* cv to prevent PIO's */
54 dev_info_t *isadma_ldip; /* DMA lock dip */
55 int isadma_want; /* Want state flag */
56 } isadma_devstate_t;
59 * Lower bound and upper bound of DMA address space hole. Registers
60 * in this hole belong to our childs devices.
62 #define LO_BOUND DMAC2_ALLMASK
63 #define HI_BOUND DMA_0XCNT
64 #define IN_CHILD_SPACE(o) ((o) > LO_BOUND && (o) < HI_BOUND)
65 #define IN_16BIT_SPACE(o) ((((o) >= DMA_0ADR) && (o) <= DMA_3WCNT) || \
66 (((o) >= DMA_4ADR) && ((o) <= DMA_7WCNT)))
67 #define IS_SEQREG(o) (((o) == DMAC1_CLFF) || ((o) == DMAC2_CLFF))
68 #define HDL_TO_SEQREG_ADDR(h, o) \
69 ((((o) >= DMA_0ADR) && ((o) <= DMA_3WCNT)) ? \
70 (h)->ahi_common.ah_addr + DMAC1_CLFF : \
71 (h)->ahi_common.ah_addr + DMAC2_CLFF)
73 #define BEGIN_ISADMA(o, v) ((o) == DMAC1_ALLMASK && (v))
74 #define END_ISADMA(o, v) ((o) == DMAC1_ALLMASK && (v) == 0)
76 #ifdef __cplusplus
78 #endif
80 #endif /* _SYS_ISADMA_H */