4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
23 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
27 #include <sys/cpuvar.h>
28 #include <sys/param.h>
29 #include <sys/systm.h>
30 #include <sys/sunddi.h>
32 #include <sys/esunddi.h>
33 #include <sys/sysmacros.h>
36 #include <sys/modctl.h> /* for modload() */
37 #include <sys/platform_module.h>
38 #include <sys/errno.h>
39 #include <sys/daktari.h>
40 #include <sys/machsystm.h>
41 #include <sys/promif.h>
43 #include <sys/memnode.h>
44 #include <vm/vm_dep.h>
47 #include <sys/i2c/clients/i2c_client.h>
50 int (*p2get_mem_unum
)(int, uint64_t, char *, int, int *);
52 /* Daktari Keyswitch Information */
53 #define DAK_KEY_POLL_PORT 3
54 #define DAK_KEY_POLL_BIT 2
55 #define DAK_KEY_POLL_INTVL 10
57 static boolean_t key_locked_bit
;
58 static clock_t keypoll_timeout_hz
;
61 * Table that maps memory slices to a specific memnode.
63 int slice_to_memnode
[DAK_MAX_SLICE
];
66 * For software memory interleaving support.
68 static void update_mem_bounds(int, int, int, uint64_t, uint64_t);
71 slice_table
[DAK_SBD_SLOTS
][DAK_CPUS_PER_BOARD
][DAK_BANKS_PER_MC
][2];
76 int (*daktari_ssc050_get_port_bit
) (dev_info_t
*, int, int, uint8_t *, int);
77 extern void (*abort_seq_handler
)();
78 static int daktari_dev_search(dev_info_t
*, void *);
79 static void keyswitch_poll(void *);
80 static void daktari_abort_seq_handler(char *msg
);
83 startup_platform(void)
86 * Disable an active h/w watchdog timer
89 extern int disable_watchdog_on_exit
;
90 disable_watchdog_on_exit
= 1;
94 set_platform_tsb_spares()
99 #pragma weak mmu_init_large_pages
102 set_platform_defaults(void)
104 extern void mmu_init_large_pages(size_t);
106 if ((mmu_page_sizes
== max_mmu_page_sizes
) &&
107 (mmu_ism_pagesize
!= DEFAULT_ISM_PAGESIZE
)) {
108 if (&mmu_init_large_pages
)
109 mmu_init_large_pages(mmu_ism_pagesize
);
114 load_platform_modules(void)
116 if (modload("misc", "pcihp") < 0) {
117 cmn_err(CE_NOTE
, "pcihp driver failed to load");
119 if (modload("drv", "pmc") < 0) {
120 cmn_err(CE_NOTE
, "pmc driver failed to load");
126 load_platform_drivers(void)
129 dev_info_t
*keysw_dip
;
131 static char *boot_time_drivers
[] = {
140 for (drv
= boot_time_drivers
; *drv
; drv
++) {
141 if (i_ddi_attach_hw_nodes(*drv
) != DDI_SUCCESS
)
142 cmn_err(CE_WARN
, "Failed to install \"%s\" driver.",
147 * mc-us3 & ssc050 must stay loaded for plat_get_mem_unum()
148 * and keyswitch_poll()
150 (void) ddi_hold_driver(ddi_name_to_major("mc-us3"));
151 (void) ddi_hold_driver(ddi_name_to_major("ssc050"));
153 /* Gain access into the ssc050_get_port function */
154 daktari_ssc050_get_port_bit
= (int (*) (dev_info_t
*, int, int,
155 uint8_t *, int)) modgetsymvalue("ssc050_get_port_bit", 0);
156 if (daktari_ssc050_get_port_bit
== NULL
) {
157 cmn_err(CE_WARN
, "cannot find ssc050_get_port_bit");
161 ddi_walk_devs(ddi_root_node(), daktari_dev_search
, (void *)&keysw_dip
);
162 ASSERT(keysw_dip
!= NULL
);
165 * prevent detach of i2c-ssc050
167 e_ddi_hold_devi(keysw_dip
);
169 keypoll_timeout_hz
= drv_usectohz(10 * MICROSEC
);
170 keyswitch_poll(keysw_dip
);
171 abort_seq_handler
= daktari_abort_seq_handler
;
175 daktari_dev_search(dev_info_t
*dip
, void *arg
)
177 char *compatible
= NULL
; /* Search tree for "i2c-ssc050" */
178 int *dev_regs
; /* Info about where the device is. */
182 if (ddi_prop_lookup_string(DDI_DEV_T_ANY
, dip
, DDI_PROP_DONTPASS
,
183 "compatible", &compatible
) != DDI_PROP_SUCCESS
)
184 return (DDI_WALK_CONTINUE
);
186 if (strcmp(compatible
, "i2c-ssc050") == 0) {
187 ddi_prop_free(compatible
);
189 err
= ddi_prop_lookup_int_array(DDI_DEV_T_ANY
, dip
,
190 DDI_PROP_DONTPASS
, "reg", &dev_regs
, &len
);
191 if (err
!= DDI_PROP_SUCCESS
) {
192 return (DDI_WALK_CONTINUE
);
195 * regs[0] contains the bus number and regs[1]
196 * contains the device address of the i2c device.
197 * 0x82 is the device address of the i2c device
198 * from which the key switch position is read.
200 if (dev_regs
[0] == 0 && dev_regs
[1] == 0x82) {
201 *((dev_info_t
**)arg
) = dip
;
202 ddi_prop_free(dev_regs
);
203 return (DDI_WALK_TERMINATE
);
205 ddi_prop_free(dev_regs
);
207 ddi_prop_free(compatible
);
209 return (DDI_WALK_CONTINUE
);
213 keyswitch_poll(void *arg
)
215 dev_info_t
*dip
= arg
;
217 int port
= DAK_KEY_POLL_PORT
;
218 int bit
= DAK_KEY_POLL_BIT
;
221 err
= daktari_ssc050_get_port_bit(dip
, port
, bit
,
222 &port_byte
, I2C_NOSLEEP
);
224 cmn_err(CE_WARN
, "keyswitch polling disabled: "
225 "errno=%d while reading ssc050", err
);
229 key_locked_bit
= (boolean_t
)((port_byte
& 0x1));
230 (void) timeout(keyswitch_poll
, (caddr_t
)dip
, keypoll_timeout_hz
);
234 daktari_abort_seq_handler(char *msg
)
236 if (key_locked_bit
== 0)
237 cmn_err(CE_CONT
, "KEY in LOCKED position, "
238 "ignoring debug enter sequence");
246 plat_cpu_poweron(struct cpu
*cp
)
253 plat_cpu_poweroff(struct cpu
*cp
)
260 * Given a pfn, return the board and beginning/end of the page's
261 * memory controller's address range.
264 plat_discover_slice(pfn_t pfn
, pfn_t
*first
, pfn_t
*last
)
268 for (bd
= 0; bd
< DAK_SBD_SLOTS
; bd
++) {
269 for (cpu
= 0; cpu
< DAK_CPUS_PER_BOARD
; cpu
++) {
270 for (bank
= 0; bank
< DAK_BANKS_PER_MC
; bank
++) {
271 uint64_t *slice
= slice_table
[bd
][cpu
][bank
];
272 uint64_t base
= btop(slice
[SLICE_PA
]);
273 uint64_t len
= btop(slice
[SLICE_SPAN
]);
274 if (len
&& pfn
>= base
&& pfn
< (base
+ len
)) {
276 *last
= base
+ len
- 1;
282 panic("plat_discover_slice: no slice for pfn 0x%lx\n", pfn
);
288 plat_freelist_process(int mnode
)
293 * Called for each board/cpu/PA range detected in plat_fill_mc().
296 update_mem_bounds(int boardid
, int cpuid
, int bankid
,
297 uint64_t base
, uint64_t size
)
302 slice_table
[boardid
][cpuid
][bankid
][SLICE_PA
] = base
;
303 slice_table
[boardid
][cpuid
][bankid
][SLICE_SPAN
] = size
;
305 end
= base
+ size
- 1;
308 * First see if this board already has a memnode associated
309 * with it. If not, see if this slice has a memnode. This
310 * covers the cases where a single slice covers multiple
311 * boards (cross-board interleaving) and where a single
312 * board has multiple slices (1+GB DIMMs).
314 if ((mnode
= plat_lgrphand_to_mem_node(boardid
)) == -1) {
315 if ((mnode
= slice_to_memnode
[PA_2_SLICE(base
)]) == -1)
316 mnode
= mem_node_alloc();
319 ASSERT(mnode
< MAX_MEM_NODES
);
320 plat_assign_lgrphand_to_mem_node(boardid
, mnode
);
323 base
= P2ALIGN(base
, (1ul << PA_SLICE_SHIFT
));
326 slice_to_memnode
[PA_2_SLICE(base
)] = mnode
;
327 base
+= (1ul << PA_SLICE_SHIFT
);
332 * Dynamically detect memory slices in the system by decoding
333 * the cpu memory decoder registers at boot time.
336 plat_fill_mc(pnode_t nodeid
)
338 uint64_t mc_addr
, saf_addr
;
339 uint64_t mc_decode
[DAK_BANKS_PER_MC
];
351 if ((prom_getprop(nodeid
, "portid", (caddr_t
)&portid
) < 0) ||
356 * Decode the board number from the MC portid. Assumes
357 * portid == safari agentid.
359 boardid
= DAK_GETSLOT(portid
);
360 cpuid
= DAK_GETSID(portid
);
363 * The "reg" property returns 4 32-bit values. The first two are
364 * combined to form a 64-bit address. The second two are for a
365 * 64-bit size, but we don't actually need to look at that value.
367 len
= prom_getproplen(nodeid
, "reg");
368 if (len
!= (sizeof (uint32_t) * 4)) {
369 prom_printf("Warning: malformed 'reg' property\n");
372 if (prom_getprop(nodeid
, "reg", (caddr_t
)regs
) < 0)
374 mc_addr
= ((uint64_t)regs
[0]) << 32;
375 mc_addr
|= (uint64_t)regs
[1];
378 * Figure out whether the memory controller we are examining
379 * belongs to this CPU or a different one.
381 saf_addr
= lddsafaddr(8);
382 saf_mask
= (uint64_t)SAF_MASK
;
383 if ((mc_addr
& saf_mask
) == saf_addr
)
388 for (i
= 0; i
< DAK_BANKS_PER_MC
; i
++) {
390 * Memory decode masks are at offsets 0x10 - 0x28.
392 offset
= 0x10 + (i
<< 3);
395 * If the memory controller is local to this CPU, we use
396 * the special ASI to read the decode registers.
397 * Otherwise, we load the values from a magic address in
401 mc_decode
[i
] = lddmcdecode(offset
);
403 mc_decode
[i
] = lddphysio(mc_addr
| offset
);
406 * If the upper bit is set, we have a valid mask
408 if ((int64_t)mc_decode
[i
] < 0) {
410 * The memory decode register is a bitmask field,
411 * so we can decode that into both a base and
414 base
= MC_BASE(mc_decode
[i
]) << PHYS2UM_SHIFT
;
415 size
= MC_UK2SPAN(mc_decode
[i
]);
416 update_mem_bounds(boardid
, cpuid
, i
, base
, size
);
423 * This routine is run midway through the boot process. By the time we get
424 * here, we know about all the active CPU boards in the system, and we have
425 * extracted information about each board's memory from the memory
426 * controllers. We have also figured out which ranges of memory will be
427 * assigned to which memnodes, so we walk the slice table to build the table
432 plat_build_mem_nodes(prom_memlist_t
*list
, size_t nelems
)
438 mem_node_pfn_shift
= PFN_SLICE_SHIFT
;
439 mem_node_physalign
= (1ull << PA_SLICE_SHIFT
);
440 npgs
= 1ull << PFN_SLICE_SHIFT
;
442 for (slice
= 0; slice
< DAK_MAX_SLICE
; slice
++) {
443 if (slice_to_memnode
[slice
] == -1)
445 basepfn
= (uint64_t)slice
<< PFN_SLICE_SHIFT
;
446 mem_node_add_slice(basepfn
, basepfn
+ npgs
- 1);
453 * Daktari support for lgroups.
455 * On Daktari, an lgroup platform handle == slot number.
457 * Mappings between lgroup handles and memnodes are managed
458 * in addition to mappings between memory slices and memnodes
459 * to support cross-board interleaving as well as multiple
460 * slices per board (e.g. >1GB DIMMs). The initial mapping
461 * of memnodes to lgroup handles is determined at boot time.
464 plat_pfn_to_mem_node(pfn_t pfn
)
466 return (slice_to_memnode
[PFN_2_SLICE(pfn
)]);
470 * Return the platform handle for the lgroup containing the given CPU
472 * For Daktari, lgroup platform handle == slot number
475 plat_lgrp_cpu_to_hand(processorid_t id
)
477 return (DAK_GETSLOT(id
));
481 * Platform specific lgroup initialization
489 * Initialize lookup tables to invalid values so we catch
490 * any illegal use of them.
492 for (i
= 0; i
< DAK_MAX_SLICE
; i
++) {
493 slice_to_memnode
[i
] = -1;
498 * Return latency between "from" and "to" lgroups
500 * This latency number can only be used for relative comparison
501 * between lgroups on the running system, cannot be used across platforms,
502 * and may not reflect the actual latency. It is platform and implementation
503 * specific, so platform gets to decide its value. It would be nice if the
504 * number was at least proportional to make comparisons more meaningful though.
505 * NOTE: The numbers below are supposed to be load latencies for uncached
506 * memory divided by 10.
509 plat_lgrp_latency(lgrp_handle_t from
, lgrp_handle_t to
)
512 * Return min remote latency when there are more than two lgroups
513 * (root and child) and getting latency between two different lgroups
514 * or root is involved
516 if (lgrp_optimizations() && (from
!= to
||
517 from
== LGRP_DEFAULT_HANDLE
|| to
== LGRP_DEFAULT_HANDLE
))
523 * No platform drivers on this platform
525 char *platform_module_list
[] = {
531 plat_tod_fault(enum tod_fault_type tod_bad
)
537 plat_get_mem_unum(int synd_code
, uint64_t flt_addr
, int flt_bus_id
,
538 int flt_in_memory
, ushort_t flt_status
, char *buf
, int buflen
, int *lenp
)
540 if (flt_in_memory
&& (p2get_mem_unum
!= NULL
))
541 return (p2get_mem_unum(synd_code
, P2ALIGN(flt_addr
, 8),
548 * This platform hook gets called from mc_add_mem_unum_label() in the mc-us3
549 * driver giving each platform the opportunity to add platform
550 * specific label information to the unum for ECC error logging purposes.
553 plat_add_mem_unum_label(char *unum
, int mcid
, int bank
, int dimm
)
555 _NOTE(ARGUNUSED(bank
, dimm
))
557 char board
= DAK_GETSLOT_LABEL(mcid
);
558 char old_unum
[UNUM_NAMLEN
];
560 (void) strcpy(old_unum
, unum
);
561 (void) snprintf(unum
, UNUM_NAMLEN
, "Slot %c: %s", board
, old_unum
);
565 plat_get_cpu_unum(int cpuid
, char *buf
, int buflen
, int *lenp
)
567 char board
= DAK_GETSLOT_LABEL(cpuid
);
569 if (snprintf(buf
, buflen
, "Slot %c", board
) >= buflen
) {
578 * The zuluvm module required a dmv interrupt for each installed
579 * Zulu/XVR-4000 board. The following has not been updated during the
580 * removal of zuluvm and therefore it may be suboptimal.
583 plat_dmv_params(uint_t
*hwint
, uint_t
*swint
)
586 *swint
= DAK_SBD_SLOTS
- 1;