usr/src/cmd/picl/plugins/sun4u/lib/fruaccess/spd_data.h

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License, Version 1.0 only
   6  * (the "License").  You may not use this file except in compliance
   7  * with the License.
   8  *
   9  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
  10  * or http://www.opensolaris.org/os/licensing.
  11  * See the License for the specific language governing permissions
  12  * and limitations under the License.
  13  *
  14  * When distributing Covered Code, include this CDDL HEADER in each
  15  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  16  * If applicable, add the following below this CDDL HEADER, with the
  17  * fields enclosed by brackets "[]" replaced with your own identifying
  18  * information: Portions Copyright [yyyy] [name of copyright owner]
  19  *
  20  * CDDL HEADER END
  21  */
  22 /*
  23  * Copyright 2003 Sun Microsystems, Inc.  All rights reserved.
  24  * Use is subject to license terms.
  25  */
  26
  27 #ifndef _SPD_DATA_H
  28 #define _SPD_DATA_H
  29
  30 #pragma ident   "%Z%%M% %I%     %E% SMI"
  31
  32 #ifdef  __cplusplus
  33 extern "C" {
  34 #endif
  35
  36 #include <stddef.h>
  37 #include <sys/types.h>
  38
  39 size_t get_sp_sec_hdr(void *sec_hdr, size_t sec_hdr_len);
  40 size_t get_sp_seg_hdr(void *seg_hdr, size_t seg_hdr_len);
  41 int get_spd_data(int fd, char *spd_data, size_t ctr_len, off_t ctr_offset);
  42 int cvrt_dim_data(const char *spd_data, size_t spd_data_len,
  43     uchar_t **sp_seg_ptr, size_t *sp_seg_len);
  44
  45 enum spd_memtype {
  46         SPDMEM_RESERVED = 0,
  47         SPDMEM_FPM_DRAM,
  48         SPDMEM_EDO,
  49         SPDMEM_PIPE,
  50         SPDMEM_SDRAM,
  51         SPDMEM_ROM,
  52         SPDMEM_SGRAM_DDR,
  53         SPDMEM_SDRAM_DDR,
  54         SPDMEM_DDR2_SDRAM
  55 };
  56
  57 typedef struct {
  58         uchar_t         spd_len;        /* bytes written by manufacturer */
  59         uchar_t         spd_max_len;    /* total available prom space */
  60         uchar_t         memory_type;    /* e.g. SDRAM DDR = 0x07 */
  61         uchar_t         n_rows;         /* row address bits */
  62         uchar_t         n_cols;         /* column address bits */
  63         uchar_t         n_mod_rows;     /* number of module rows */
  64         uchar_t         ls_data_width;  /* e.g. 72 bits */
  65         uchar_t         ms_data_width;
  66         uchar_t         vddq_if;        /* e.g. SSTL 2.5V = 0x04 */
  67         uchar_t         cycle_time25;   /* cycle time at CAS latency 2.5 */
  68         uchar_t         access_time25;
  69         uchar_t         config;         /* e.g. ECC = 0x02 */
  70         uchar_t         refresh;        /* e.g. 7.8uS & self refresh = 0x82 */
  71         uchar_t         primary_width;
  72         uchar_t         err_chk_width;
  73         uchar_t         tCCD;
  74         uchar_t         burst_lengths;  /* e.g. 2,4,8 = 0x0e */
  75         uchar_t         n_banks;
  76         uchar_t         cas_lat;
  77         uchar_t         cs_lat;
  78         uchar_t         we_lat;
  79         uchar_t         mod_attrs;
  80         uchar_t         dev_attrs;
  81         uchar_t         cycle_time20;   /* cycle time at CAS latency 2.0 */
  82         uchar_t         access_time20;
  83         uchar_t         cycle_time15;
  84         uchar_t         access_time15;
  85         uchar_t         tRP;
  86         uchar_t         tRRD;
  87         uchar_t         tRCD;
  88         uchar_t         tRAS;
  89         uchar_t         mod_row_density;
  90         uchar_t         addr_ip_setup;
  91         uchar_t         addr_ip_hold;
  92         uchar_t         data_ip_setup;
  93         uchar_t         data_ip_hold;
  94         uchar_t         superset[62 - 36];
  95         uchar_t         spd_rev;
  96         uchar_t         chksum_0_62;
  97         uchar_t         jedec[8];
  98         uchar_t         manu_loc;
  99         uchar_t         manu_part_no[91 - 73];
 100         uchar_t         manu_rev_pcb;
 101         uchar_t         manu_rev_comp;
 102         uchar_t         manu_year;
 103         uchar_t         manu_week;
 104         uchar_t         asmb_serial_no[4];
 105         uchar_t         manu_specific[128 - 99];
 106 } spd_data_t;
 107
 108 /*
 109  * sample section and SP segment headers
 110  */
 111 #define SP_SEC_HDR      \
 112         { 0x08, 0x00, 0x01, 0x00,  0x33, 0x01 }
 113
 114 #define SP_SEG_HDR      \
 115         { 'S', 'P', 0x00, 0x00,  0x41, 0xb6, 0x00, 0x00,  0x00, 0x8d }
 116
 117 /*
 118  * sample SP segment
 119  */
 120 #define SP_DATA { \
 121         0xc1, 0x08, 0x00, 0x00,   0x00, 0x00, 0x00, 0x00,  \
 122         0x00, 0x00, 0xf0, 0x00,   0xfb, 0x00, 0x00, 0x00,  \
 123         0, 0, 0, 0,  0, 0, 0, 0,  0, 0, 0, 0,  0, 0, 0, 0, \
 124         0, 0, 0, 0,  0, 0, 0, 0,  0, 0, 0, 0,  0, 0, 0, 0, \
 125         0, 0, 0, 0,  0, 0, 0, 0,  0, 0, 0, 0,  0, 0, 0, 0, \
 126         0, 0, 0, 0,  0, 0, 0, 0,  0, 0, 0, 0,  0, 0, 0, 0, \
 127         0, 0, 0, 0,  0, 0, 0, 0,  0, 0, 0, 0,  0, 0, 0, 0, \
 128         0, 0, 0, 0,  0, 0, 0, 0,  0, 0, 0, 0,  0, 0, 0, 0, \
 129         0, 0, 0, 0,  0, 0, 0, 0,  0, 0, 0, 0,  0, 0, 0, 0, \
 130         0x00, 0x00, 0x00, 0x00,   0x00, 0x00, 0x00, 0x00,  \
 131         0x0c, 0x00, 0x00, 0x00,   0x00 }
 132
 133 /*
 134  * offsets of records in SP_DATA
 135  */
 136 #define DIMM_CAP_OFF    2
 137 #define SPD_R_OFF       13
 138
 139 /*
 140  * offsets of certain fields within SPD-R record
 141  */
 142 #define DATA_WIDTH      6
 143 #define MANUF_ID        64
 144 #define MANUF_LOC       66
 145 #define MANUF_YEAR      87
 146 #define MANUF_WEEK      89
 147 /* length of complete SPD-R record */
 148 #define SPD_R_LEN       123
 149
 150 #ifdef  __cplusplus
 151 }
 152 #endif
 153
 154 #endif  /* _SPD_DATA_H */