4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
23 * Copyright 2007 Sun Microsystems, Inc. All rights reserved.
24 * Use is subject to license terms.
27 * Copyright (c) 2010, Intel Corporation.
28 * All rights reserved.
31 #ifndef _SYS_PSM_TYPES_H
32 #define _SYS_PSM_TYPES_H
35 * Platform Specific Module Types
38 #include <sys/types.h>
39 #include <sys/cpuvar.h>
49 typedef enum psm_intr_op_e
{
50 PSM_INTR_OP_ALLOC_VECTORS
= 0, /* 0. Allocate vectors */
51 PSM_INTR_OP_FREE_VECTORS
, /* 1. Free vectors */
52 PSM_INTR_OP_NAVAIL_VECTORS
, /* 2. Get # of available vectors */
53 PSM_INTR_OP_XLATE_VECTOR
, /* 3. Translate vector */
54 PSM_INTR_OP_GET_PENDING
, /* 4. Get pending information */
55 PSM_INTR_OP_CLEAR_MASK
, /* 5. Clear interrupt mask */
56 PSM_INTR_OP_SET_MASK
, /* 6. Set interrupt mask */
57 PSM_INTR_OP_GET_CAP
, /* 7. Get devices's capabilities */
58 PSM_INTR_OP_SET_CAP
, /* 8. Set devices's capabilities */
59 PSM_INTR_OP_SET_PRI
, /* 9. Set the interrupt priority */
60 PSM_INTR_OP_GET_SHARED
, /* 10. Get the shared intr info */
61 PSM_INTR_OP_CHECK_MSI
, /* 11. Chk if device supports MSI */
62 PSM_INTR_OP_SET_CPU
, /* 12. Set vector's CPU */
63 PSM_INTR_OP_GET_INTR
, /* 13. Get vector's info */
64 PSM_INTR_OP_GRP_SET_CPU
, /* 14. Set all device's vectors' CPU */
65 PSM_INTR_OP_APIC_TYPE
/* 15. Returns APIC type */
69 * PSM_STATE definitions
71 typedef enum psm_state_op_e
{
78 typedef struct psm_state_req
{
79 psm_state_op_t psr_cmd
;
82 * PSM_STATE_ALLOC, PSM_STATE_FREE, PSM_STATE_SAVE,
83 * PSM_STATE_RESTORE all use the same struct,
84 * but union for later expansion
88 size_t psr_state_size
;
91 } psm_state_request_t
;
93 typedef enum psm_cpu_op_e
{
99 typedef struct psm_cpu_request
{
100 psm_cpu_op_t pcr_cmd
;
119 int (*psm_probe
)(void);
121 void (*psm_softinit
)(void);
122 void (*psm_picinit
)(void);
123 int (*psm_intr_enter
)(int ipl
, int *vectorp
);
124 void (*psm_intr_exit
)(int ipl
, int irqno
);
125 void (*psm_setspl
)(int ipl
);
126 int (*psm_addspl
)(int irqno
, int ipl
, int min_ipl
, int max_ipl
);
127 int (*psm_delspl
)(int irqno
, int ipl
, int min_ipl
, int max_ipl
);
128 int (*psm_disable_intr
)(processorid_t cpun
);
129 void (*psm_enable_intr
)(processorid_t cpun
);
130 int (*psm_softlvl_to_irq
)(int ipl
);
131 void (*psm_set_softintr
)(int ipl
);
132 void (*psm_set_idlecpu
)(processorid_t cpun
);
133 void (*psm_unset_idlecpu
)(processorid_t cpun
);
135 #if defined(PSMI_1_3) || defined(PSMI_1_4) || defined(PSMI_1_5) || \
136 defined(PSMI_1_6) || defined(PSMI_1_7)
137 int (*psm_clkinit
)(int hertz
);
139 void (*psm_clkinit
)(int hertz
);
142 int (*psm_get_clockirq
)(int ipl
);
143 void (*psm_hrtimeinit
)(void);
144 hrtime_t (*psm_gethrtime
)(void);
146 processorid_t (*psm_get_next_processorid
)(processorid_t cpu_id
);
147 #if defined(PSMI_1_5) || defined(PSMI_1_6) || defined(PSMI_1_7)
148 int (*psm_cpu_start
)(processorid_t cpun
, caddr_t ctxt
);
150 void (*psm_cpu_start
)(processorid_t cpun
, caddr_t rm_code
);
152 int (*psm_post_cpu_start
)(void);
153 #if defined(PSMI_1_2) || defined(PSMI_1_3) || defined(PSMI_1_4) || \
154 defined(PSMI_1_5) || defined(PSMI_1_6) || defined(PSMI_1_7)
155 void (*psm_shutdown
)(int cmd
, int fcn
);
157 void (*psm_shutdown
)(void);
159 int (*psm_get_ipivect
)(int ipl
, int type
);
160 void (*psm_send_ipi
)(processorid_t cpun
, int ipl
);
162 int (*psm_translate_irq
)(dev_info_t
*dip
, int irqno
);
164 #if defined(PSMI_1_2) || defined(PSMI_1_3) || defined(PSMI_1_4)
165 int (*psm_tod_get
)(todinfo_t
*tod
);
166 int (*psm_tod_set
)(todinfo_t
*tod
);
168 void (*psm_notify_error
)(int level
, char *errmsg
);
169 #if defined(PSMI_1_2) || defined(PSMI_1_3) || defined(PSMI_1_4) || \
170 defined(PSMI_1_5) || defined(PSMI_1_6) || defined(PSMI_1_7)
171 void (*psm_notify_func
)(int msg
);
173 #if defined(PSMI_1_3) || defined(PSMI_1_4) || defined(PSMI_1_5) || \
174 defined(PSMI_1_6) || defined(PSMI_1_7)
175 void (*psm_timer_reprogram
)(hrtime_t time
);
176 void (*psm_timer_enable
)(void);
177 void (*psm_timer_disable
)(void);
178 void (*psm_post_cyclic_setup
)(void *arg
);
180 #if defined(PSMI_1_4) || defined(PSMI_1_5) || defined(PSMI_1_6) || \
182 void (*psm_preshutdown
)(int cmd
, int fcn
);
184 #if defined(PSMI_1_5) || defined(PSMI_1_6) || defined(PSMI_1_7)
185 int (*psm_intr_ops
)(dev_info_t
*dip
, ddi_intr_handle_impl_t
*handle
,
186 psm_intr_op_t op
, int *result
);
188 #if defined(PSMI_1_6) || defined(PSMI_1_7)
189 int (*psm_state
)(psm_state_request_t
*request
);
191 #if defined(PSMI_1_7)
192 int (*psm_cpu_ops
)(psm_cpu_request_t
*reqp
);
200 struct psm_ops
*p_ops
;
201 char *p_mach_idstring
; /* machine identification string */
202 char *p_mach_desc
; /* machine descriptions */
207 * 0x86vm where v = (version no. - 1) and m = (minor no. + 1)
208 * i.e. psmi 1.0 has v=0 and m=1, psmi 1.1 has v=0 and m=2
209 * also, 0x86 in the high byte is the signature of the psmi
211 #define PSM_INFO_VER01 0x8601
212 #define PSM_INFO_VER01_1 0x8602
213 #define PSM_INFO_VER01_2 0x8603
214 #define PSM_INFO_VER01_3 0x8604
215 #define PSM_INFO_VER01_4 0x8605
216 #define PSM_INFO_VER01_5 0x8606
217 #define PSM_INFO_VER01_6 0x8607
218 #define PSM_INFO_VER01_7 0x8608
219 #define PSM_INFO_VER01_X (PSM_INFO_VER01_1 & 0xFFF0) /* ver 1.X */
222 * owner field definitions
224 #define PSM_OWN_SYS_DEFAULT 0x0001
225 #define PSM_OWN_EXCLUSIVE 0x0002
226 #define PSM_OWN_OVERRIDE 0x0003
228 #define PSM_NULL_INFO -1
231 * Arg to psm_notify_func
233 #define PSM_DEBUG_ENTER 1
234 #define PSM_DEBUG_EXIT 2
235 #define PSM_PANIC_ENTER 3
238 * Soft-level to interrupt vector
240 #define PSM_SV_SOFTWARE -1
241 #define PSM_SV_MIXED -2
244 * Inter-processor interrupt type
246 #define PSM_INTR_IPI_HI 0x01
247 #define PSM_INTR_IPI_LO 0x02
248 #define PSM_INTR_POKE 0x03
253 #define PSMGI_CPU_USER_BOUND 0x80000000 /* user requested bind if set */
254 #define PSMGI_CPU_FLAGS 0x80000000 /* all possible flags */
259 #define PSM_SUCCESS DDI_SUCCESS
260 #define PSM_FAILURE DDI_FAILURE
262 #define PSM_INVALID_IPL 0
263 #define PSM_INVALID_CPU -1
266 struct psm_ops_ver01
{
267 int (*psm_probe
)(void);
269 void (*psm_softinit
)(void);
270 void (*psm_picinit
)(void);
271 int (*psm_intr_enter
)(int ipl
, int *vectorp
);
272 void (*psm_intr_exit
)(int ipl
, int irqno
);
273 void (*psm_setspl
)(int ipl
);
274 int (*psm_addspl
)(int irqno
, int ipl
, int min_ipl
, int max_ipl
);
275 int (*psm_delspl
)(int irqno
, int ipl
, int min_ipl
, int max_ipl
);
276 int (*psm_disable_intr
)(processorid_t cpun
);
277 void (*psm_enable_intr
)(processorid_t cpun
);
278 int (*psm_softlvl_to_irq
)(int ipl
);
279 void (*psm_set_softintr
)(int ipl
);
280 void (*psm_set_idlecpu
)(processorid_t cpun
);
281 void (*psm_unset_idlecpu
)(processorid_t cpun
);
283 void (*psm_clkinit
)(int hertz
);
284 int (*psm_get_clockirq
)(int ipl
);
285 void (*psm_hrtimeinit
)(void);
286 hrtime_t (*psm_gethrtime
)(void);
288 processorid_t (*psm_get_next_processorid
)(processorid_t cpu_id
);
289 void (*psm_cpu_start
)(processorid_t cpun
, caddr_t rm_code
);
290 int (*psm_post_cpu_start
)(void);
291 void (*psm_shutdown
)(void);
292 int (*psm_get_ipivect
)(int ipl
, int type
);
293 void (*psm_send_ipi
)(processorid_t cpun
, int ipl
);
300 #endif /* _SYS_PSM_TYPES_H */