preprocessor cleanup: __xpv
[unleashed.git] / arch / x86 / kernel / kdi / kdi_idt.c
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1 /*
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22 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
23 * Use is subject to license terms.
27 * Management of KMDB's IDT, which is installed upon KMDB activation.
29 * Debugger activation has two flavors, which cover the cases where KMDB is
30 * loaded at boot, and when it is loaded after boot. In brief, in both cases,
31 * the KDI needs to interpose upon several handlers in the IDT. When
32 * mod-loaded KMDB is deactivated, we undo the IDT interposition, restoring the
33 * handlers to what they were before we started.
35 * We also take over the entirety of IDT (except the double-fault handler) on
36 * the active CPU when we're in kmdb so we can handle things like page faults
37 * sensibly.
39 * Boot-loaded KMDB
41 * When we're first activated, we're running on boot's IDT. We need to be able
42 * to function in this world, so we'll install our handlers into boot's IDT.
43 * This is a little complicated: we're using the fake cpu_t set up by
44 * boot_kdi_tmpinit(), so we can't access cpu_idt directly. Instead,
45 * kdi_idt_write() notices that cpu_idt is NULL, and works around this problem.
47 * Later, when we're about to switch to the kernel's IDT, it'll call us via
48 * kdi_idt_sync(), allowing us to add our handlers to the new IDT. While
49 * boot-loaded KMDB can't be unloaded, we still need to save the descriptors we
50 * replace so we can pass traps back to the kernel as necessary.
52 * The last phase of boot-loaded KMDB activation occurs at non-boot CPU
53 * startup. We will be called on each non-boot CPU, thus allowing us to set up
54 * any watchpoints that may have been configured on the boot CPU and interpose
55 * on the given CPU's IDT. We don't save the interposed descriptors in this
56 * case -- see kdi_cpu_init() for details.
58 * Mod-loaded KMDB
60 * This style of activation is much simpler, as the CPUs are already running,
61 * and are using their own copy of the kernel's IDT. We simply interpose upon
62 * each CPU's IDT. We save the handlers we replace, both for deactivation and
63 * for passing traps back to the kernel. Note that for the hypervisors'
64 * benefit, we need to xcall to the other CPUs to do this, since we need to
65 * actively set the trap entries in its virtual IDT from that vcpu's context
66 * rather than just modifying the IDT table from the CPU running kdi_activate().
69 #include <sys/types.h>
70 #include <sys/segments.h>
71 #include <sys/trap.h>
72 #include <sys/cpuvar.h>
73 #include <sys/reboot.h>
74 #include <sys/sunddi.h>
75 #include <sys/archsystm.h>
76 #include <sys/kdi_impl.h>
77 #include <sys/x_call.h>
78 #include <ia32/sys/psw.h>
80 #define KDI_GATE_NVECS 3
82 #define KDI_IDT_NOSAVE 0
83 #define KDI_IDT_SAVE 1
85 #define KDI_IDT_DTYPE_KERNEL 0
86 #define KDI_IDT_DTYPE_BOOT 1
88 kdi_cpusave_t *kdi_cpusave;
89 int kdi_ncpusave;
91 static kdi_main_t kdi_kmdb_main;
93 kdi_drreg_t kdi_drreg;
95 #ifndef __amd64
96 /* Used to track the current set of valid kernel selectors. */
97 uint32_t kdi_cs;
98 uint32_t kdi_ds;
99 uint32_t kdi_fs;
100 uint32_t kdi_gs;
101 #endif
103 uint_t kdi_msr_wrexit_msr;
104 uint64_t *kdi_msr_wrexit_valp;
106 uintptr_t kdi_kernel_handler;
108 int kdi_trap_switch;
110 #define KDI_MEMRANGES_MAX 2
112 kdi_memrange_t kdi_memranges[KDI_MEMRANGES_MAX];
113 int kdi_nmemranges;
115 typedef void idt_hdlr_f(void);
117 extern idt_hdlr_f kdi_trap0, kdi_trap1, kdi_int2, kdi_trap3, kdi_trap4;
118 extern idt_hdlr_f kdi_trap5, kdi_trap6, kdi_trap7, kdi_trap9;
119 extern idt_hdlr_f kdi_traperr10, kdi_traperr11, kdi_traperr12;
120 extern idt_hdlr_f kdi_traperr13, kdi_traperr14, kdi_trap16, kdi_trap17;
121 extern idt_hdlr_f kdi_trap18, kdi_trap19, kdi_trap20, kdi_ivct32;
122 extern idt_hdlr_f kdi_invaltrap;
123 extern size_t kdi_ivct_size;
124 extern char kdi_slave_entry_patch;
126 typedef struct kdi_gate_spec {
127 uint_t kgs_vec;
128 uint_t kgs_dpl;
129 } kdi_gate_spec_t;
132 * Beware: kdi_pass_to_kernel() has unpleasant knowledge of this list.
134 static const kdi_gate_spec_t kdi_gate_specs[KDI_GATE_NVECS] = {
135 { T_SGLSTP, TRP_KPL },
136 { T_BPTFLT, TRP_UPL },
137 { T_DBGENTR, TRP_KPL }
140 static gate_desc_t kdi_kgates[KDI_GATE_NVECS];
142 gate_desc_t kdi_idt[NIDT];
144 struct idt_description {
145 uint_t id_low;
146 uint_t id_high;
147 idt_hdlr_f *id_basehdlr;
148 size_t *id_incrp;
149 } idt_description[] = {
150 { T_ZERODIV, 0, kdi_trap0, NULL },
151 { T_SGLSTP, 0, kdi_trap1, NULL },
152 { T_NMIFLT, 0, kdi_int2, NULL },
153 { T_BPTFLT, 0, kdi_trap3, NULL },
154 { T_OVFLW, 0, kdi_trap4, NULL },
155 { T_BOUNDFLT, 0, kdi_trap5, NULL },
156 { T_ILLINST, 0, kdi_trap6, NULL },
157 { T_NOEXTFLT, 0, kdi_trap7, NULL },
158 { T_DBLFLT, 0, syserrtrap, NULL },
159 { T_EXTOVRFLT, 0, kdi_trap9, NULL },
160 { T_TSSFLT, 0, kdi_traperr10, NULL },
161 { T_SEGFLT, 0, kdi_traperr11, NULL },
162 { T_STKFLT, 0, kdi_traperr12, NULL },
163 { T_GPFLT, 0, kdi_traperr13, NULL },
164 { T_PGFLT, 0, kdi_traperr14, NULL },
165 { 15, 0, kdi_invaltrap, NULL },
166 { T_EXTERRFLT, 0, kdi_trap16, NULL },
167 { T_ALIGNMENT, 0, kdi_trap17, NULL },
168 { T_MCE, 0, kdi_trap18, NULL },
169 { T_SIMDFPE, 0, kdi_trap19, NULL },
170 { T_DBGENTR, 0, kdi_trap20, NULL },
171 { 21, 31, kdi_invaltrap, NULL },
172 { 32, 255, kdi_ivct32, &kdi_ivct_size },
173 { 0, 0, NULL },
176 void
177 kdi_idt_init(selector_t sel)
179 struct idt_description *id;
180 int i;
182 for (id = idt_description; id->id_basehdlr != NULL; id++) {
183 uint_t high = id->id_high != 0 ? id->id_high : id->id_low;
184 size_t incr = id->id_incrp != NULL ? *id->id_incrp : 0;
186 for (i = id->id_low; i <= high; i++) {
187 caddr_t hdlr = (caddr_t)id->id_basehdlr +
188 incr * (i - id->id_low);
189 set_gatesegd(&kdi_idt[i], (void (*)())hdlr, sel,
190 SDT_SYSIGT, TRP_KPL, i);
196 * Patch caller-provided code into the debugger's IDT handlers. This code is
197 * used to save MSRs that must be saved before the first branch. All handlers
198 * are essentially the same, and end with a branch to kdi_cmnint. To save the
199 * MSR, we need to patch in before the branch. The handlers have the following
200 * structure: KDI_MSR_PATCHOFF bytes of code, KDI_MSR_PATCHSZ bytes of
201 * patchable space, followed by more code.
203 void
204 kdi_idt_patch(caddr_t code, size_t sz)
206 int i;
208 ASSERT(sz <= KDI_MSR_PATCHSZ);
210 for (i = 0; i < sizeof (kdi_idt) / sizeof (struct gate_desc); i++) {
211 gate_desc_t *gd;
212 uchar_t *patch;
214 if (i == T_DBLFLT)
215 continue; /* uses kernel's handler */
217 gd = &kdi_idt[i];
218 patch = (uchar_t *)GATESEG_GETOFFSET(gd) + KDI_MSR_PATCHOFF;
221 * We can't ASSERT that there's a nop here, because this may be
222 * a debugger restart. In that case, we're copying the new
223 * patch point over the old one.
225 /* FIXME: dtrace fbt ... */
226 bcopy(code, patch, sz);
228 /* Fill the rest with nops to be sure */
229 while (sz < KDI_MSR_PATCHSZ)
230 patch[sz++] = 0x90; /* nop */
234 static void
235 kdi_idt_gates_install(selector_t sel, int saveold)
237 gate_desc_t gates[KDI_GATE_NVECS];
238 int i;
240 bzero(gates, sizeof (*gates));
242 for (i = 0; i < KDI_GATE_NVECS; i++) {
243 const kdi_gate_spec_t *gs = &kdi_gate_specs[i];
244 uintptr_t func = GATESEG_GETOFFSET(&kdi_idt[gs->kgs_vec]);
245 set_gatesegd(&gates[i], (void (*)())func, sel, SDT_SYSIGT,
246 gs->kgs_dpl, gs->kgs_vec);
249 for (i = 0; i < KDI_GATE_NVECS; i++) {
250 uint_t vec = kdi_gate_specs[i].kgs_vec;
252 if (saveold)
253 kdi_kgates[i] = CPU->cpu_m.mcpu_idt[vec];
255 kdi_idt_write(&gates[i], vec);
259 static void
260 kdi_idt_gates_restore(void)
262 int i;
264 for (i = 0; i < KDI_GATE_NVECS; i++)
265 kdi_idt_write(&kdi_kgates[i], kdi_gate_specs[i].kgs_vec);
269 * Called when we switch to the kernel's IDT. We need to interpose on the
270 * kernel's IDT entries and stop using KMDBCODE_SEL.
272 void
273 kdi_idt_sync(void)
275 kdi_idt_init(KCS_SEL);
276 kdi_idt_gates_install(KCS_SEL, KDI_IDT_SAVE);
280 * On some processors, we'll need to clear a certain MSR before proceeding into
281 * the debugger. Complicating matters, this MSR must be cleared before we take
282 * any branches. We have patch points in every trap handler, which will cover
283 * all entry paths for master CPUs. We also have a patch point in the slave
284 * entry code.
286 static void
287 kdi_msr_add_clrentry(uint_t msr)
289 #ifdef __amd64
290 uchar_t code[] = {
291 0x51, 0x50, 0x52, /* pushq %rcx, %rax, %rdx */
292 0xb9, 0x00, 0x00, 0x00, 0x00, /* movl $MSRNUM, %ecx */
293 0x31, 0xc0, /* clr %eax */
294 0x31, 0xd2, /* clr %edx */
295 0x0f, 0x30, /* wrmsr */
296 0x5a, 0x58, 0x59 /* popq %rdx, %rax, %rcx */
298 uchar_t *patch = &code[4];
299 #else
300 uchar_t code[] = {
301 0x60, /* pushal */
302 0xb9, 0x00, 0x00, 0x00, 0x00, /* movl $MSRNUM, %ecx */
303 0x31, 0xc0, /* clr %eax */
304 0x31, 0xd2, /* clr %edx */
305 0x0f, 0x30, /* wrmsr */
306 0x61 /* popal */
308 uchar_t *patch = &code[2];
309 #endif
311 bcopy(&msr, patch, sizeof (uint32_t));
313 kdi_idt_patch((caddr_t)code, sizeof (code));
315 bcopy(code, &kdi_slave_entry_patch, sizeof (code));
318 static void
319 kdi_msr_add_wrexit(uint_t msr, uint64_t *valp)
321 kdi_msr_wrexit_msr = msr;
322 kdi_msr_wrexit_valp = valp;
325 void
326 kdi_set_debug_msrs(kdi_msr_t *msrs)
328 int nmsrs, i;
330 ASSERT(kdi_cpusave[0].krs_msr == NULL);
332 /* Look in CPU0's MSRs for any special MSRs. */
333 for (nmsrs = 0; msrs[nmsrs].msr_num != 0; nmsrs++) {
334 switch (msrs[nmsrs].msr_type) {
335 case KDI_MSR_CLEARENTRY:
336 kdi_msr_add_clrentry(msrs[nmsrs].msr_num);
337 break;
339 case KDI_MSR_WRITEDELAY:
340 kdi_msr_add_wrexit(msrs[nmsrs].msr_num,
341 msrs[nmsrs].kdi_msr_valp);
342 break;
346 nmsrs++;
348 for (i = 0; i < kdi_ncpusave; i++)
349 kdi_cpusave[i].krs_msr = &msrs[nmsrs * i];
352 void
353 kdi_update_drreg(kdi_drreg_t *drreg)
355 kdi_drreg = *drreg;
358 void
359 kdi_memrange_add(caddr_t base, size_t len)
361 kdi_memrange_t *mr = &kdi_memranges[kdi_nmemranges];
363 ASSERT(kdi_nmemranges != KDI_MEMRANGES_MAX);
365 mr->mr_base = base;
366 mr->mr_lim = base + len - 1;
367 kdi_nmemranges++;
370 void
371 kdi_idt_switch(kdi_cpusave_t *cpusave)
373 if (cpusave == NULL)
374 kdi_idtr_set(kdi_idt, sizeof (kdi_idt) - 1);
375 else
376 kdi_idtr_set(cpusave->krs_idt, (sizeof (*idt0) * NIDT) - 1);
380 * Activation for CPUs other than the boot CPU, called from that CPU's
381 * mp_startup(). We saved the kernel's descriptors when we initialized the
382 * boot CPU, so we don't want to do it again. Saving the handlers from this
383 * CPU's IDT would actually be dangerous with the CPU initialization method in
384 * use at the time of this writing. With that method, the startup code creates
385 * the IDTs for slave CPUs by copying the one used by the boot CPU, which has
386 * already been interposed upon by KMDB. Were we to interpose again, we'd
387 * replace the kernel's descriptors with our own in the save area. By not
388 * saving, but still overwriting, we'll work in the current world, and in any
389 * future world where the IDT is generated from scratch.
391 void
392 kdi_cpu_init(void)
394 kdi_idt_gates_install(KCS_SEL, KDI_IDT_NOSAVE);
395 /* Load the debug registers and MSRs */
396 kdi_cpu_debug_init(&kdi_cpusave[CPU->cpu_id]);
400 * Activation for all CPUs for mod-loaded kmdb, i.e. a kmdb that wasn't
401 * loaded at boot.
403 static int
404 kdi_cpu_activate(void)
406 kdi_idt_gates_install(KCS_SEL, KDI_IDT_SAVE);
407 return (0);
410 void
411 kdi_activate(kdi_main_t main, kdi_cpusave_t *cpusave, uint_t ncpusave)
413 int i;
414 cpuset_t cpuset;
416 CPUSET_ALL(cpuset);
418 kdi_cpusave = cpusave;
419 kdi_ncpusave = ncpusave;
421 kdi_kmdb_main = main;
423 for (i = 0; i < kdi_ncpusave; i++) {
424 kdi_cpusave[i].krs_cpu_id = i;
426 kdi_cpusave[i].krs_curcrumb =
427 &kdi_cpusave[i].krs_crumbs[KDI_NCRUMBS - 1];
428 kdi_cpusave[i].krs_curcrumbidx = KDI_NCRUMBS - 1;
431 if (boothowto & RB_KMDB)
432 kdi_idt_init(KMDBCODE_SEL);
433 else
434 kdi_idt_init(KCS_SEL);
436 /* The initial selector set. Updated by the debugger-entry code */
437 #ifndef __amd64
438 kdi_cs = B32CODE_SEL;
439 kdi_ds = kdi_fs = kdi_gs = B32DATA_SEL;
440 #endif
442 kdi_memranges[0].mr_base = kdi_segdebugbase;
443 kdi_memranges[0].mr_lim = kdi_segdebugbase + kdi_segdebugsize - 1;
444 kdi_nmemranges = 1;
446 kdi_drreg.dr_ctl = KDIREG_DRCTL_RESERVED;
447 kdi_drreg.dr_stat = KDIREG_DRSTAT_RESERVED;
449 kdi_msr_wrexit_msr = 0;
450 kdi_msr_wrexit_valp = NULL;
452 if (boothowto & RB_KMDB) {
453 kdi_idt_gates_install(KMDBCODE_SEL, KDI_IDT_NOSAVE);
454 } else {
455 xc_call(0, 0, 0, CPUSET2BV(cpuset),
456 (xc_func_t)kdi_cpu_activate);
460 static int
461 kdi_cpu_deactivate(void)
463 kdi_idt_gates_restore();
464 return (0);
467 void
468 kdi_deactivate(void)
470 cpuset_t cpuset;
471 CPUSET_ALL(cpuset);
473 xc_call(0, 0, 0, CPUSET2BV(cpuset), (xc_func_t)kdi_cpu_deactivate);
474 kdi_nmemranges = 0;
478 * We receive all breakpoints and single step traps. Some of them,
479 * including those from userland and those induced by DTrace providers,
480 * are intended for the kernel, and must be processed there. We adopt
481 * this ours-until-proven-otherwise position due to the painful
482 * consequences of sending the kernel an unexpected breakpoint or
483 * single step. Unless someone can prove to us that the kernel is
484 * prepared to handle the trap, we'll assume there's a problem and will
485 * give the user a chance to debug it.
488 kdi_trap_pass(kdi_cpusave_t *cpusave)
490 greg_t tt = cpusave->krs_gregs[KDIREG_TRAPNO];
491 greg_t pc = cpusave->krs_gregs[KDIREG_PC];
492 greg_t cs = cpusave->krs_gregs[KDIREG_CS];
494 if (USERMODE(cs))
495 return (1);
497 if (tt != T_BPTFLT && tt != T_SGLSTP)
498 return (0);
500 if (tt == T_BPTFLT && kdi_dtrace_get_state() ==
501 KDI_DTSTATE_DTRACE_ACTIVE)
502 return (1);
505 * See the comments in the kernel's T_SGLSTP handler for why we need to
506 * do this.
508 if (tt == T_SGLSTP &&
509 (pc == (greg_t)sys_sysenter || pc == (greg_t)brand_sys_sysenter))
510 return (1);
512 return (0);
516 * State has been saved, and all CPUs are on the CPU-specific stacks. All
517 * CPUs enter here, and head off into the debugger proper.
519 void
520 kdi_debugger_entry(kdi_cpusave_t *cpusave)
523 * BPTFLT gives us control with %eip set to the instruction *after*
524 * the int 3. Back it off, so we're looking at the instruction that
525 * triggered the fault.
527 if (cpusave->krs_gregs[KDIREG_TRAPNO] == T_BPTFLT)
528 cpusave->krs_gregs[KDIREG_PC]--;
530 kdi_kmdb_main(cpusave);