4 * Copyright(c) 2007-2009 Intel Corporation. All rights reserved.
5 * The contents of this file are subject to the terms of the
6 * Common Development and Distribution License (the "License").
7 * You may not use this file except in compliance with the License.
9 * You can obtain a copy of the license at:
10 * http://www.opensolaris.org/os/licensing.
11 * See the License for the specific language governing permissions
12 * and limitations under the License.
14 * When using or redistributing this file, you may do so under the
15 * License only. No other modification of this header is permitted.
17 * If applicable, add the following below this CDDL HEADER, with the
18 * fields enclosed by brackets "[]" replaced with your own identifying
19 * information: Portions Copyright [yyyy] [name of copyright owner]
25 * Copyright 2009 Sun Microsystems, Inc. All rights reserved.
26 * Use is subject to license terms of the CDDL.
36 #include <sys/types.h>
38 #include <sys/debug.h>
39 #include <sys/stropts.h>
40 #include <sys/stream.h>
41 #include <sys/strlog.h>
44 #include <sys/kstat.h>
45 #include <sys/modctl.h>
46 #include <sys/errno.h>
48 #include <sys/dditypes.h>
49 #include <sys/sunddi.h>
50 #include <sys/stdbool.h>
52 #include <sys/pci_cap.h>
53 #include <sys/atomic.h>
55 #include "igb_debug.h"
57 #define usec_delay(x) drv_usecwait(x)
58 #define usec_delay_irq usec_delay
59 #define msec_delay(x) drv_usecwait(x * 1000)
60 #define msec_delay_irq msec_delay
62 #define DEBUGOUT(S) IGB_DEBUGLOG_0(NULL, S)
63 #define DEBUGOUT1(S, A) IGB_DEBUGLOG_1(NULL, S, A)
64 #define DEBUGOUT2(S, A, B) IGB_DEBUGLOG_2(NULL, S, A, B)
65 #define DEBUGOUT3(S, A, B, C) IGB_DEBUGLOG_3(NULL, S, A, B, C)
68 #define DEBUGFUNC(F) IGB_DEBUGFUNC(F)
73 #define OS_DEP(hw) ((struct igb_osdep *)((hw)->back))
78 #define CMD_MEM_WRT_INVALIDATE 0x0010 /* BIT_4 */
79 #define PCI_COMMAND_REGISTER 0x04
80 #define PCI_EX_CONF_CAP 0xE0
84 * Constants used in setting flow control thresholds
86 #define E1000_PBA_MASK 0xffff
87 #define E1000_PBA_SHIFT 10
88 #define E1000_FC_HIGH_DIFF 0x1638 /* High: 5688 bytes below Rx FIFO size */
89 #define E1000_FC_LOW_DIFF 0x1640 /* Low: 5696 bytes below Rx FIFO size */
90 #define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */
92 /* PHY Extended Status Register */
93 #define IEEE_ESR_1000T_HD_CAPS 0x1000 /* 1000T HD capable */
94 #define IEEE_ESR_1000T_FD_CAPS 0x2000 /* 1000T FD capable */
95 #define IEEE_ESR_1000X_HD_CAPS 0x4000 /* 1000X HD capable */
96 #define IEEE_ESR_1000X_FD_CAPS 0x8000 /* 1000X FD capable */
98 /* VMDq MODE supported by hardware */
99 #define E1000_VMDQ_OFF 0
100 #define E1000_VMDQ_MAC 1
101 #define E1000_VMDQ_MAC_RSS 2
103 /* VMDq based on packet destination MAC address */
104 #define E1000_MRQC_ENABLE_VMDQ_MAC_GROUP 0x00000003
105 /* VMDq based on packet destination MAC address and RSS */
106 #define E1000_MRQC_ENABLE_VMDQ_MAC_RSS_GROUP 0x00000005
107 /* The default queue in each VMDqs */
108 #define E1000_VMDQ_MAC_GROUP_DEFAULT_QUEUE 0x100
110 #define E1000_WRITE_FLUSH(a) (void) E1000_READ_REG(a, E1000_STATUS)
112 #define E1000_WRITE_REG(hw, reg, value) \
113 ddi_put32((OS_DEP(hw))->reg_handle, \
114 (uint32_t *)((uintptr_t)(hw)->hw_addr + reg), (value))
116 #define E1000_READ_REG(hw, reg) \
117 ddi_get32((OS_DEP(hw))->reg_handle, \
118 (uint32_t *)((uintptr_t)(hw)->hw_addr + reg))
120 #define E1000_WRITE_REG_ARRAY(hw, reg, offset, value) \
121 ddi_put32((OS_DEP(hw))->reg_handle, \
122 (uint32_t *)((uintptr_t)(hw)->hw_addr + reg + ((offset) << 2)), \
125 #define E1000_READ_REG_ARRAY(hw, reg, offset) \
126 ddi_get32((OS_DEP(hw))->reg_handle, \
127 (uint32_t *)((uintptr_t)(hw)->hw_addr + reg + ((offset) << 2)))
129 #define E1000_WRITE_REG_ARRAY_DWORD(a, reg, offset, value) \
130 E1000_WRITE_REG_ARRAY(a, reg, offset, value)
131 #define E1000_READ_REG_ARRAY_DWORD(a, reg, offset) \
132 E1000_READ_REG_ARRAY(a, reg, offset)
135 #define E1000_READ_FLASH_REG(hw, reg) \
136 ddi_get32((OS_DEP(hw))->ich_flash_handle, \
137 (uint32_t *)((uintptr_t)(hw)->flash_address + (reg)))
139 #define E1000_READ_FLASH_REG16(hw, reg) \
140 ddi_get16((OS_DEP(hw))->ich_flash_handle, \
141 (uint16_t *)((uintptr_t)(hw)->flash_address + (reg)))
143 #define E1000_WRITE_FLASH_REG(hw, reg, value) \
144 ddi_put32((OS_DEP(hw))->ich_flash_handle, \
145 (uint32_t *)((uintptr_t)(hw)->flash_address + (reg)), (value))
147 #define E1000_WRITE_FLASH_REG16(hw, reg, value) \
148 ddi_put16((OS_DEP(hw))->ich_flash_handle, \
149 (uint16_t *)((uintptr_t)(hw)->flash_address + (reg)), (value))
151 #define UNREFERENCED_1PARAMETER(_p) _NOTE(ARGUNUSED(_p))
152 #define UNREFERENCED_2PARAMETER(_p, _q) _NOTE(ARGUNUSED(_p, _q))
153 #define UNREFERENCED_3PARAMETER(_p, _q, _r) _NOTE(ARGUNUSED(_p, _q, _r))
154 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) _NOTE(ARGUNUSED(_p, _q, _r, _s))
155 #define UNREFERENCED_5PARAMETER(_p, _q, _r, _s, _t) \
156 _NOTE(ARGUNUSED(_p, _q, _r, _s, _t))
167 typedef uint16_t u16
;
168 typedef uint32_t u32
;
169 typedef uint64_t u64
;
172 * igb only uses the first two of the ddi_acc_handle_t, the latter end up coming
173 * from the common code for devices that igb doesn't support. For now, we end up
174 * bringing in those other two handles just for making life easier for sharin
178 ddi_acc_handle_t reg_handle
;
179 ddi_acc_handle_t cfg_handle
;
180 ddi_acc_handle_t ich_flash_handle
; /* UNUSED */
181 ddi_acc_handle_t io_reg_handle
; /* UNUSED */
185 /* Shared Code Mutex Defines */
186 #define E1000_MUTEX kmutex_t
187 #define E1000_MUTEX_INIT(mutex) mutex_init(mutex, NULL, \
189 #define E1000_MUTEX_DESTROY(mutex) mutex_destroy(mutex)
191 #define E1000_MUTEX_LOCK(mutex) mutex_enter(mutex)
192 #define E1000_MUTEX_TRYLOCK(mutex) mutex_tryenter(mutex)
193 #define E1000_MUTEX_UNLOCK(mutex) mutex_exit(mutex)
195 #ifdef __sparc /* on SPARC, use only memory-mapped routines */
196 #define E1000_WRITE_REG_IO E1000_WRITE_REG
197 #else /* on x86, use port io routines */
198 #define E1000_WRITE_REG_IO(a, reg, val) { \
199 ddi_put32((OS_DEP(a))->io_reg_handle, \
200 (uint32_t *)(a)->io_base, \
202 ddi_put32((OS_DEP(a))->io_reg_handle, \
203 (uint32_t *)((a)->io_base + 4), \
212 #endif /* _IGB_OSDEP_H */