kernel/drivers/net/hxge/hpi_txdma.h

   1 /*
   2  * CDDL HEADER START
   3  *
   4  * The contents of this file are subject to the terms of the
   5  * Common Development and Distribution License (the "License").
   6  * You may not use this file except in compliance with the License.
   7  *
   8  * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9  * or http://www.opensolaris.org/os/licensing.
  10  * See the License for the specific language governing permissions
  11  * and limitations under the License.
  12  *
  13  * When distributing Covered Code, include this CDDL HEADER in each
  14  * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15  * If applicable, add the following below this CDDL HEADER, with the
  16  * fields enclosed by brackets "[]" replaced with your own identifying
  17  * information: Portions Copyright [yyyy] [name of copyright owner]
  18  *
  19  * CDDL HEADER END
  20  */
  21 /*
  22  * Copyright 2008 Sun Microsystems, Inc.  All rights reserved.
  23  * Use is subject to license terms.
  24  */
  25
  26 #ifndef _HPI_TXDMA_H
  27 #define _HPI_TXDMA_H
  28
  29 #pragma ident   "%Z%%M% %I%     %E% SMI"
  30
  31 #ifdef  __cplusplus
  32 extern "C" {
  33 #endif
  34
  35 #include <hpi.h>
  36 #include <hxge_txdma_hw.h>
  37 #include <hxge_tdc_hw.h>
  38
  39 typedef enum _txdma_cs_cntl_e {
  40         TXDMA_INIT_RESET        = 0x1,
  41         TXDMA_INIT_START        = 0x2,
  42         TXDMA_START             = 0x3,
  43         TXDMA_RESET             = 0x4,
  44         TXDMA_STOP              = 0x5,
  45         TXDMA_MBOX_ENABLE       = 0x6
  46 } txdma_cs_cntl_t;
  47
  48 #define HXGE_TXDMA_OFFSET(x, v, channel) (x + \
  49                 (!v ? DMC_OFFSET(channel) : TDMC_PIOVADDR_OFFSET(channel)))
  50 /*
  51  * PIO macros to read and write the transmit registers.
  52  */
  53 #define TXDMA_REG_READ64(handle, reg, channel, val_p)   \
  54                 HXGE_REG_RD64(handle, \
  55                 (HXGE_TXDMA_OFFSET(reg, handle.is_vraddr, channel)), val_p)
  56
  57 #define TXDMA_REG_WRITE64(handle, reg, channel, data)   \
  58                 HXGE_REG_WR64(handle, \
  59                 HXGE_TXDMA_OFFSET(reg, handle.is_vraddr, channel), data)
  60
  61 #define HPI_TXDMA_GATHER_INDEX(index)   \
  62                 ((index <= TX_MAX_GATHER_POINTERS)) ? HPI_SUCCESS : \
  63                 (HPI_TXDMA_GATHER_INVALID)
  64
  65 /*
  66  * Transmit HPI error codes
  67  */
  68 #define TXDMA_ER_ST                     (TXDMA_BLK_ID << HPI_BLOCK_ID_SHIFT)
  69 #define TXDMA_ID_SHIFT(n)               (n << HPI_PORT_CHAN_SHIFT)
  70
  71 #define TXDMA_HW_STOP_FAILED            (HPI_BK_HW_ER_START | 0x1)
  72 #define TXDMA_HW_RESUME_FAILED          (HPI_BK_HW_ER_START | 0x2)
  73
  74 #define TXDMA_GATHER_INVALID            (HPI_BK_ERROR_START | 0x1)
  75 #define TXDMA_XFER_LEN_INVALID          (HPI_BK_ERROR_START | 0x2)
  76
  77 #define HPI_TXDMA_OPCODE_INVALID(n)     (TXDMA_ID_SHIFT(n) |    \
  78                                         TXDMA_ER_ST | OPCODE_INVALID)
  79
  80 #define HPI_TXDMA_FUNC_INVALID(n)       (TXDMA_ID_SHIFT(n) |    \
  81                                         TXDMA_ER_ST | PORT_INVALID)
  82 #define HPI_TXDMA_CHANNEL_INVALID(n)    (TXDMA_ID_SHIFT(n) |    \
  83                                         TXDMA_ER_ST | CHANNEL_INVALID)
  84
  85 #define HPI_TXDMA_PAGE_INVALID(n)       (TXDMA_ID_SHIFT(n) |    \
  86                                         TXDMA_ER_ST | LOGICAL_PAGE_INVALID)
  87
  88 #define HPI_TXDMA_REGISTER_INVALID      (TXDMA_ER_ST | REGISTER_INVALID)
  89 #define HPI_TXDMA_COUNTER_INVALID       (TXDMA_ER_ST | COUNTER_INVALID)
  90 #define HPI_TXDMA_CONFIG_INVALID        (TXDMA_ER_ST | CONFIG_INVALID)
  91
  92
  93 #define HPI_TXDMA_GATHER_INVALID        (TXDMA_ER_ST | TXDMA_GATHER_INVALID)
  94 #define HPI_TXDMA_XFER_LEN_INVALID      (TXDMA_ER_ST | TXDMA_XFER_LEN_INVALID)
  95
  96 #define HPI_TXDMA_RESET_FAILED          (TXDMA_ER_ST | RESET_FAILED)
  97 #define HPI_TXDMA_STOP_FAILED           (TXDMA_ER_ST | TXDMA_HW_STOP_FAILED)
  98 #define HPI_TXDMA_RESUME_FAILED         (TXDMA_ER_ST | TXDMA_HW_RESUME_FAILED)
  99
 100 /*
 101  * Transmit DMA Channel HPI Prototypes.
 102  */
 103 hpi_status_t hpi_txdma_log_page_handle_set(hpi_handle_t handle,
 104     uint8_t channel, tdc_page_handle_t *hdl_p);
 105 hpi_status_t hpi_txdma_channel_reset(hpi_handle_t handle, uint8_t channel);
 106 hpi_status_t hpi_txdma_channel_init_enable(hpi_handle_t handle,
 107     uint8_t channel);
 108 hpi_status_t hpi_txdma_channel_enable(hpi_handle_t handle, uint8_t channel);
 109 hpi_status_t hpi_txdma_channel_disable(hpi_handle_t handle, uint8_t channel);
 110 hpi_status_t hpi_txdma_channel_mbox_enable(hpi_handle_t handle,
 111     uint8_t channel);
 112 hpi_status_t hpi_txdma_channel_control(hpi_handle_t handle,
 113     txdma_cs_cntl_t control, uint8_t channel);
 114 hpi_status_t hpi_txdma_control_status(hpi_handle_t handle, io_op_t op_mode,
 115     uint8_t channel, tdc_stat_t *cs_p);
 116
 117 hpi_status_t hpi_txdma_event_mask(hpi_handle_t handle, io_op_t op_mode,
 118     uint8_t channel, tdc_int_mask_t *mask_p);
 119
 120 hpi_status_t hpi_txdma_ring_config(hpi_handle_t handle, io_op_t op_mode,
 121     uint8_t channel, uint64_t *reg_data);
 122 hpi_status_t hpi_txdma_mbox_config(hpi_handle_t handle, io_op_t op_mode,
 123     uint8_t channel, uint64_t *mbox_addr);
 124 hpi_status_t hpi_txdma_desc_gather_set(hpi_handle_t handle,
 125     p_tx_desc_t desc_p, uint8_t gather_index,
 126     boolean_t mark, uint8_t ngathers,
 127     uint64_t dma_ioaddr, uint32_t transfer_len);
 128 hpi_status_t hpi_txdma_control_stop_wait(hpi_handle_t handle,
 129     uint8_t channel);
 130
 131 hpi_status_t hpi_txdma_desc_set_xfer_len(hpi_handle_t handle,
 132     p_tx_desc_t desc_p, uint32_t transfer_len);
 133
 134 hpi_status_t hpi_txdma_desc_set_zero(hpi_handle_t handle, uint16_t entries);
 135 hpi_status_t hpi_txdma_ring_head_get(hpi_handle_t handle, uint8_t channel,
 136     tdc_tdr_head_t *hdl_p);
 137 void hpi_txdma_dump_desc_one(hpi_handle_t handle, p_tx_desc_t desc_p,
 138     int desc_index);
 139
 140 #ifdef  __cplusplus
 141 }
 142 #endif
 143
 144 #endif  /* _HPI_TXDMA_H */