Merge commit '4c28a617e3922d92a58e813a5b955eb526b9c386'
[unleashed.git] / arch / x86 / kernel / platform / i86pc / os / trap.c
blob27434558abd624d69306f5da986eae02dc059ae9
1 /*
2 * CDDL HEADER START
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
19 * CDDL HEADER END
23 * Copyright (c) 1992, 2010, Oracle and/or its affiliates. All rights reserved.
26 /* Copyright (c) 1990, 1991 UNIX System Laboratories, Inc. */
27 /* Copyright (c) 1984, 1986, 1987, 1988, 1989, 1990 AT&T */
28 /* All Rights Reserved */
29 /* */
30 /* Copyright (c) 1987, 1988 Microsoft Corporation */
31 /* All Rights Reserved */
32 /* */
35 * Copyright 2018 Joyent, Inc.
38 #include <sys/types.h>
39 #include <sys/sysmacros.h>
40 #include <sys/param.h>
41 #include <sys/signal.h>
42 #include <sys/systm.h>
43 #include <sys/user.h>
44 #include <sys/proc.h>
45 #include <sys/disp.h>
46 #include <sys/class.h>
47 #include <sys/core.h>
48 #include <sys/syscall.h>
49 #include <sys/cpuvar.h>
50 #include <sys/vm.h>
51 #include <sys/sysinfo.h>
52 #include <sys/fault.h>
53 #include <sys/stack.h>
54 #include <sys/psw.h>
55 #include <sys/regset.h>
56 #include <sys/fp.h>
57 #include <sys/trap.h>
58 #include <sys/kmem.h>
59 #include <sys/vtrace.h>
60 #include <sys/cmn_err.h>
61 #include <sys/prsystm.h>
62 #include <sys/mutex_impl.h>
63 #include <sys/machsystm.h>
64 #include <sys/archsystm.h>
65 #include <sys/sdt.h>
66 #include <sys/avintr.h>
67 #include <sys/kobj.h>
69 #include <vm/hat.h>
71 #include <vm/seg_kmem.h>
72 #include <vm/as.h>
73 #include <vm/seg.h>
74 #include <vm/hat_pte.h>
75 #include <vm/hat_i86.h>
77 #include <sys/procfs.h>
79 #include <sys/reboot.h>
80 #include <sys/debug.h>
81 #include <sys/debugreg.h>
82 #include <sys/modctl.h>
83 #include <sys/aio_impl.h>
84 #include <sys/tnf.h>
85 #include <sys/tnf_probe.h>
86 #include <sys/cred.h>
87 #include <sys/mman.h>
88 #include <sys/x86_archext.h>
89 #include <sys/copyops.h>
90 #include <c2/audit.h>
91 #include <sys/ftrace.h>
92 #include <sys/panic.h>
93 #include <sys/traptrace.h>
94 #include <sys/ontrap.h>
95 #include <sys/cpc_impl.h>
96 #include <sys/bootconf.h>
97 #include <sys/bootinfo.h>
98 #include <sys/promif.h>
99 #include <sys/mach_mmu.h>
100 #include <sys/contract/process_impl.h>
102 #define USER 0x10000 /* user-mode flag added to trap type */
104 static const char *trap_type_mnemonic[] = {
105 "de", "db", "2", "bp",
106 "of", "br", "ud", "nm",
107 "df", "9", "ts", "np",
108 "ss", "gp", "pf", "15",
109 "mf", "ac", "mc", "xf"
112 static const char *trap_type[] = {
113 "Divide error", /* trap id 0 */
114 "Debug", /* trap id 1 */
115 "NMI interrupt", /* trap id 2 */
116 "Breakpoint", /* trap id 3 */
117 "Overflow", /* trap id 4 */
118 "BOUND range exceeded", /* trap id 5 */
119 "Invalid opcode", /* trap id 6 */
120 "Device not available", /* trap id 7 */
121 "Double fault", /* trap id 8 */
122 "Coprocessor segment overrun", /* trap id 9 */
123 "Invalid TSS", /* trap id 10 */
124 "Segment not present", /* trap id 11 */
125 "Stack segment fault", /* trap id 12 */
126 "General protection", /* trap id 13 */
127 "Page fault", /* trap id 14 */
128 "Reserved", /* trap id 15 */
129 "x87 floating point error", /* trap id 16 */
130 "Alignment check", /* trap id 17 */
131 "Machine check", /* trap id 18 */
132 "SIMD floating point exception", /* trap id 19 */
135 #define TRAP_TYPES (sizeof (trap_type) / sizeof (trap_type[0]))
137 #define SLOW_SCALL_SIZE 2
138 #define FAST_SCALL_SIZE 2
140 int tudebug = 0;
141 int tudebugbpt = 0;
142 int tudebugfpe = 0;
143 int tudebugsse = 0;
145 #if defined(TRAPDEBUG) || defined(lint)
146 int tdebug = 0;
147 int lodebug = 0;
148 int faultdebug = 0;
149 #else
150 #define tdebug 0
151 #define lodebug 0
152 #define faultdebug 0
153 #endif /* defined(TRAPDEBUG) || defined(lint) */
155 #if defined(TRAPTRACE)
157 * trap trace record for cpu0 is allocated here.
158 * trap trace records for non-boot cpus are allocated in mp_startup_init().
160 static trap_trace_rec_t trap_tr0[TRAPTR_NENT];
161 trap_trace_ctl_t trap_trace_ctl[NCPU] = {
163 (uintptr_t)trap_tr0, /* next record */
164 (uintptr_t)trap_tr0, /* first record */
165 (uintptr_t)(trap_tr0 + TRAPTR_NENT), /* limit */
166 (uintptr_t)0 /* current */
171 * default trap buffer size
173 size_t trap_trace_bufsize = TRAPTR_NENT * sizeof (trap_trace_rec_t);
174 int trap_trace_freeze = 0;
175 int trap_trace_off = 0;
178 * A dummy TRAPTRACE entry to use after death.
180 trap_trace_rec_t trap_trace_postmort;
182 static void dump_ttrace(void);
183 #endif /* TRAPTRACE */
184 static void dumpregs(struct regs *);
185 static void showregs(uint_t, struct regs *, caddr_t);
186 static int kern_gpfault(struct regs *);
188 /*ARGSUSED*/
189 static int
190 die(uint_t type, struct regs *rp, caddr_t addr, processorid_t cpuid)
192 struct panic_trap_info ti;
193 const char *trap_name, *trap_mnemonic;
195 if (type < TRAP_TYPES) {
196 trap_name = trap_type[type];
197 trap_mnemonic = trap_type_mnemonic[type];
198 } else {
199 trap_name = "trap";
200 trap_mnemonic = "-";
203 #ifdef TRAPTRACE
204 TRAPTRACE_FREEZE;
205 #endif
207 ti.trap_regs = rp;
208 ti.trap_type = type & ~USER;
209 ti.trap_addr = addr;
211 curthread->t_panic_trap = &ti;
213 if (type == T_PGFLT && addr < (caddr_t)kernelbase) {
214 panic("BAD TRAP: type=%x (#%s %s) rp=%p addr=%p "
215 "occurred in module \"%s\" due to %s",
216 type, trap_mnemonic, trap_name, (void *)rp, (void *)addr,
217 mod_containing_pc((caddr_t)rp->r_pc),
218 addr < (caddr_t)PAGESIZE ?
219 "a NULL pointer dereference" :
220 "an illegal access to a user address");
221 } else
222 panic("BAD TRAP: type=%x (#%s %s) rp=%p addr=%p",
223 type, trap_mnemonic, trap_name, (void *)rp, (void *)addr);
224 return (0);
228 * Rewrite the instruction at pc to be an int $T_SYSCALLINT instruction.
230 * int <vector> is two bytes: 0xCD <vector>
233 static int
234 rewrite_syscall(caddr_t pc)
236 uchar_t instr[SLOW_SCALL_SIZE] = { 0xCD, T_SYSCALLINT };
238 if (uwrite(curthread->t_procp, instr, SLOW_SCALL_SIZE,
239 (uintptr_t)pc) != 0)
240 return (1);
242 return (0);
246 * Test to see if the instruction at pc is sysenter or syscall. The second
247 * argument should be the x86 feature flag corresponding to the expected
248 * instruction.
250 * sysenter is two bytes: 0x0F 0x34
251 * syscall is two bytes: 0x0F 0x05
252 * int $T_SYSCALLINT is two bytes: 0xCD 0x91
255 static int
256 instr_is_other_syscall(caddr_t pc, int which)
258 uchar_t instr[FAST_SCALL_SIZE];
260 ASSERT(which == X86FSET_SEP || which == X86FSET_ASYSC || which == 0xCD);
262 if (copyin_nowatch(pc, (caddr_t)instr, FAST_SCALL_SIZE) != 0)
263 return (0);
265 switch (which) {
266 case X86FSET_SEP:
267 if (instr[0] == 0x0F && instr[1] == 0x34)
268 return (1);
269 break;
270 case X86FSET_ASYSC:
271 if (instr[0] == 0x0F && instr[1] == 0x05)
272 return (1);
273 break;
274 case 0xCD:
275 if (instr[0] == 0xCD && instr[1] == T_SYSCALLINT)
276 return (1);
277 break;
280 return (0);
283 static const char *
284 syscall_insn_string(int syscall_insn)
286 switch (syscall_insn) {
287 case X86FSET_SEP:
288 return ("sysenter");
289 case X86FSET_ASYSC:
290 return ("syscall");
291 case 0xCD:
292 return ("int");
293 default:
294 return ("Unknown");
298 static int
299 ldt_rewrite_syscall(struct regs *rp, proc_t *p, int syscall_insn)
301 caddr_t linearpc;
302 int return_code = 0;
304 mutex_enter(&p->p_ldtlock); /* Must be held across linear_pc() */
306 if (linear_pc(rp, p, &linearpc) == 0) {
309 * If another thread beat us here, it already changed
310 * this site to the slower (int) syscall instruction.
312 if (instr_is_other_syscall(linearpc, 0xCD)) {
313 return_code = 1;
314 } else if (instr_is_other_syscall(linearpc, syscall_insn)) {
316 if (rewrite_syscall(linearpc) == 0) {
317 return_code = 1;
319 #ifdef DEBUG
320 else
321 cmn_err(CE_WARN, "failed to rewrite %s "
322 "instruction in process %d",
323 syscall_insn_string(syscall_insn),
324 p->p_pid);
325 #endif /* DEBUG */
329 mutex_exit(&p->p_ldtlock); /* Must be held across linear_pc() */
331 return (return_code);
335 * Test to see if the instruction at pc is a system call instruction.
337 * The bytes of an lcall instruction used for the syscall trap.
338 * static uchar_t lcall[7] = { 0x9a, 0, 0, 0, 0, 0x7, 0 };
339 * static uchar_t lcallalt[7] = { 0x9a, 0, 0, 0, 0, 0x27, 0 };
342 #define LCALLSIZE 7
344 static int
345 instr_is_lcall_syscall(caddr_t pc)
347 uchar_t instr[LCALLSIZE];
349 if (copyin_nowatch(pc, (caddr_t)instr, LCALLSIZE) == 0 &&
350 instr[0] == 0x9a &&
351 instr[1] == 0 &&
352 instr[2] == 0 &&
353 instr[3] == 0 &&
354 instr[4] == 0 &&
355 (instr[5] == 0x7 || instr[5] == 0x27) &&
356 instr[6] == 0)
357 return (1);
359 return (0);
362 #ifdef __amd64
365 * In the first revisions of amd64 CPUs produced by AMD, the LAHF and
366 * SAHF instructions were not implemented in 64-bit mode. Later revisions
367 * did implement these instructions. An extension to the cpuid instruction
368 * was added to check for the capability of executing these instructions
369 * in 64-bit mode.
371 * Intel originally did not implement these instructions in EM64T either,
372 * but added them in later revisions.
374 * So, there are different chip revisions by both vendors out there that
375 * may or may not implement these instructions. The easy solution is to
376 * just always emulate these instructions on demand.
378 * SAHF == store %ah in the lower 8 bits of %rflags (opcode 0x9e)
379 * LAHF == load the lower 8 bits of %rflags into %ah (opcode 0x9f)
382 #define LSAHFSIZE 1
384 static int
385 instr_is_lsahf(caddr_t pc, uchar_t *instr)
387 if (copyin_nowatch(pc, (caddr_t)instr, LSAHFSIZE) == 0 &&
388 (*instr == 0x9e || *instr == 0x9f))
389 return (1);
390 return (0);
394 * Emulate the LAHF and SAHF instructions. The reference manuals define
395 * these instructions to always load/store bit 1 as a 1, and bits 3 and 5
396 * as a 0. The other, defined, bits are copied (the PS_ICC bits and PS_P).
398 * Note that %ah is bits 8-15 of %rax.
400 static void
401 emulate_lsahf(struct regs *rp, uchar_t instr)
403 if (instr == 0x9e) {
404 /* sahf. Copy bits from %ah to flags. */
405 rp->r_ps = (rp->r_ps & ~0xff) |
406 ((rp->r_rax >> 8) & PSL_LSAHFMASK) | PS_MB1;
407 } else {
408 /* lahf. Copy bits from flags to %ah. */
409 rp->r_rax = (rp->r_rax & ~0xff00) |
410 (((rp->r_ps & PSL_LSAHFMASK) | PS_MB1) << 8);
412 rp->r_pc += LSAHFSIZE;
414 #endif /* __amd64 */
416 #ifdef OPTERON_ERRATUM_91
419 * Test to see if the instruction at pc is a prefetch instruction.
421 * The first byte of prefetch instructions is always 0x0F.
422 * The second byte is 0x18 for regular prefetch or 0x0D for AMD 3dnow prefetch.
423 * The third byte (ModRM) contains the register field bits (bits 3-5).
424 * These bits must be between 0 and 3 inclusive for regular prefetch and
425 * 0 and 1 inclusive for AMD 3dnow prefetch.
427 * In 64-bit mode, there may be a one-byte REX prefex (0x40-0x4F).
430 static int
431 cmp_to_prefetch(uchar_t *p)
433 #ifdef _LP64
434 if ((p[0] & 0xF0) == 0x40) /* 64-bit REX prefix */
435 p++;
436 #endif
437 return ((p[0] == 0x0F && p[1] == 0x18 && ((p[2] >> 3) & 7) <= 3) ||
438 (p[0] == 0x0F && p[1] == 0x0D && ((p[2] >> 3) & 7) <= 1));
441 static int
442 instr_is_prefetch(caddr_t pc)
444 uchar_t instr[4]; /* optional REX prefix plus 3-byte opcode */
446 return (copyin_nowatch(pc, instr, sizeof (instr)) == 0 &&
447 cmp_to_prefetch(instr));
450 #endif /* OPTERON_ERRATUM_91 */
453 * Called from the trap handler when a processor trap occurs.
455 * Note: All user-level traps that might call stop() must exit
456 * trap() by 'goto out' or by falling through.
457 * Note Also: trap() is usually called with interrupts enabled, (PS_IE == 1)
458 * however, there are paths that arrive here with PS_IE == 0 so special care
459 * must be taken in those cases.
461 void
462 trap(struct regs *rp, caddr_t addr, processorid_t cpuid)
464 kthread_t *ct = curthread;
465 enum seg_rw rw;
466 unsigned type;
467 proc_t *p = ttoproc(ct);
468 klwp_t *lwp = ttolwp(ct);
469 uintptr_t lofault;
470 label_t *onfault;
471 faultcode_t pagefault(), res, errcode;
472 enum fault_type fault_type;
473 k_siginfo_t siginfo;
474 uint_t fault = 0;
475 int mstate;
476 int sicode = 0;
477 int watchcode;
478 int watchpage;
479 caddr_t vaddr;
480 size_t sz;
481 int ta;
482 #ifdef __amd64
483 uchar_t instr;
484 #endif
486 ASSERT_STACK_ALIGNED();
488 type = rp->r_trapno;
489 CPU_STATS_ADDQ(CPU, sys, trap, 1);
491 if (type == T_PGFLT) {
493 errcode = rp->r_err;
494 if (errcode & PF_ERR_WRITE)
495 rw = S_WRITE;
496 else if ((caddr_t)rp->r_pc == addr ||
497 (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC)))
498 rw = S_EXEC;
499 else
500 rw = S_READ;
502 #if defined(__i386)
504 * Pentium Pro work-around
506 if ((errcode & PF_ERR_PROT) && pentiumpro_bug4046376) {
507 uint_t attr;
508 uint_t priv_violation;
509 uint_t access_violation;
511 if (hat_getattr(addr < (caddr_t)kernelbase ?
512 curproc->p_as->a_hat : kas.a_hat, addr, &attr)
513 == -1) {
514 errcode &= ~PF_ERR_PROT;
515 } else {
516 priv_violation = (errcode & PF_ERR_USER) &&
517 !(attr & PROT_USER);
518 access_violation = (errcode & PF_ERR_WRITE) &&
519 !(attr & PROT_WRITE);
520 if (!priv_violation && !access_violation)
521 goto cleanup;
524 #endif /* __i386 */
526 } else if (type == T_SGLSTP && lwp != NULL)
527 lwp->lwp_pcb.pcb_drstat = (uintptr_t)addr;
529 if (tdebug)
530 showregs(type, rp, addr);
532 if (USERMODE(rp->r_cs)) {
534 * Set up the current cred to use during this trap. u_cred
535 * no longer exists. t_cred is used instead.
536 * The current process credential applies to the thread for
537 * the entire trap. If trapping from the kernel, this
538 * should already be set up.
540 if (ct->t_cred != p->p_cred) {
541 cred_t *oldcred = ct->t_cred;
543 * DTrace accesses t_cred in probe context. t_cred
544 * must always be either NULL, or point to a valid,
545 * allocated cred structure.
547 ct->t_cred = crgetcred();
548 crfree(oldcred);
550 ASSERT(lwp != NULL);
551 type |= USER;
552 ASSERT(lwptoregs(lwp) == rp);
553 lwp->lwp_state = LWP_SYS;
555 switch (type) {
556 case T_PGFLT + USER:
557 if ((caddr_t)rp->r_pc == addr)
558 mstate = LMS_TFAULT;
559 else
560 mstate = LMS_DFAULT;
561 break;
562 default:
563 mstate = LMS_TRAP;
564 break;
567 mstate = new_mstate(ct, mstate);
569 bzero(&siginfo, sizeof (siginfo));
572 switch (type) {
573 case T_PGFLT + USER:
574 case T_SGLSTP:
575 case T_SGLSTP + USER:
576 case T_BPTFLT + USER:
577 break;
579 default:
580 FTRACE_2("trap(): type=0x%lx, regs=0x%lx",
581 (ulong_t)type, (ulong_t)rp);
582 break;
585 switch (type) {
586 case T_SIMDFPE:
587 /* Make sure we enable interrupts before die()ing */
588 sti(); /* The SIMD exception comes in via cmninttrap */
589 /*FALLTHROUGH*/
590 default:
591 if (type & USER) {
592 if (tudebug)
593 showregs(type, rp, (caddr_t)0);
594 printf("trap: Unknown trap type %d in user mode\n",
595 type & ~USER);
596 siginfo.si_signo = SIGILL;
597 siginfo.si_code = ILL_ILLTRP;
598 siginfo.si_addr = (caddr_t)rp->r_pc;
599 siginfo.si_trapno = type & ~USER;
600 fault = FLTILL;
601 } else {
602 (void) die(type, rp, addr, cpuid);
603 /*NOTREACHED*/
605 break;
607 case T_PGFLT: /* system page fault */
609 * If we're under on_trap() protection (see <sys/ontrap.h>),
610 * set ot_trap and bounce back to the on_trap() call site
611 * via the installed trampoline.
613 if ((ct->t_ontrap != NULL) &&
614 (ct->t_ontrap->ot_prot & OT_DATA_ACCESS)) {
615 ct->t_ontrap->ot_trap |= OT_DATA_ACCESS;
616 rp->r_pc = ct->t_ontrap->ot_trampoline;
617 goto cleanup;
621 * If we have an Instruction fault in kernel mode, then that
622 * means we've tried to execute a user page (SMEP) or both of
623 * PAE and NXE are enabled. In either case, given that it's a
624 * kernel fault, we should panic immediately and not try to make
625 * any more forward progress. This indicates a bug in the
626 * kernel, which if execution continued, could be exploited to
627 * wreak havoc on the system.
629 if (errcode & PF_ERR_EXEC) {
630 (void) die(type, rp, addr, cpuid);
634 * We need to check if SMAP is in play. If SMAP is in play, then
635 * any access to a user page will show up as a protection
636 * violation. To see if SMAP is enabled we first check if it's a
637 * user address and whether we have the feature flag set. If we
638 * do and the interrupted registers do not allow for user
639 * accesses (PS_ACHK is not enabled), then we need to die
640 * immediately.
642 if (addr < (caddr_t)kernelbase &&
643 is_x86_feature(x86_featureset, X86FSET_SMAP) == B_TRUE &&
644 (rp->r_ps & PS_ACHK) == 0) {
645 (void) die(type, rp, addr, cpuid);
649 * See if we can handle as pagefault. Save lofault and onfault
650 * across this. Here we assume that an address less than
651 * KERNELBASE is a user fault. We can do this as copy.s
652 * routines verify that the starting address is less than
653 * KERNELBASE before starting and because we know that we
654 * always have KERNELBASE mapped as invalid to serve as a
655 * "barrier".
657 lofault = ct->t_lofault;
658 onfault = ct->t_onfault;
659 ct->t_lofault = 0;
661 mstate = new_mstate(ct, LMS_KFAULT);
663 if (addr < (caddr_t)kernelbase) {
664 res = pagefault(addr,
665 (errcode & PF_ERR_PROT)? F_PROT: F_INVAL, rw, 0);
666 if (res == FC_NOMAP &&
667 addr < p->p_usrstack &&
668 grow(addr))
669 res = 0;
670 } else {
671 res = pagefault(addr,
672 (errcode & PF_ERR_PROT)? F_PROT: F_INVAL, rw, 1);
674 (void) new_mstate(ct, mstate);
677 * Restore lofault and onfault. If we resolved the fault, exit.
678 * If we didn't and lofault wasn't set, die.
680 ct->t_lofault = lofault;
681 ct->t_onfault = onfault;
682 if (res == 0)
683 goto cleanup;
685 #if defined(OPTERON_ERRATUM_93) && defined(_LP64)
686 if (lofault == 0 && opteron_erratum_93) {
688 * Workaround for Opteron Erratum 93. On return from
689 * a System Managment Interrupt at a HLT instruction
690 * the %rip might be truncated to a 32 bit value.
691 * BIOS is supposed to fix this, but some don't.
692 * If this occurs we simply restore the high order bits.
693 * The HLT instruction is 1 byte of 0xf4.
695 uintptr_t rip = rp->r_pc;
697 if ((rip & 0xfffffffful) == rip) {
698 rip |= 0xfffffffful << 32;
699 if (hat_getpfnum(kas.a_hat, (caddr_t)rip) !=
700 PFN_INVALID &&
701 (*(uchar_t *)rip == 0xf4 ||
702 *(uchar_t *)(rip - 1) == 0xf4)) {
703 rp->r_pc = rip;
704 goto cleanup;
708 #endif /* OPTERON_ERRATUM_93 && _LP64 */
710 #ifdef OPTERON_ERRATUM_91
711 if (lofault == 0 && opteron_erratum_91) {
713 * Workaround for Opteron Erratum 91. Prefetches may
714 * generate a page fault (they're not supposed to do
715 * that!). If this occurs we simply return back to the
716 * instruction.
718 caddr_t pc = (caddr_t)rp->r_pc;
721 * If the faulting PC is not mapped, this is a
722 * legitimate kernel page fault that must result in a
723 * panic. If the faulting PC is mapped, it could contain
724 * a prefetch instruction. Check for that here.
726 if (hat_getpfnum(kas.a_hat, pc) != PFN_INVALID) {
727 if (cmp_to_prefetch((uchar_t *)pc)) {
728 #ifdef DEBUG
729 cmn_err(CE_WARN, "Opteron erratum 91 "
730 "occurred: kernel prefetch"
731 " at %p generated a page fault!",
732 (void *)rp->r_pc);
733 #endif /* DEBUG */
734 goto cleanup;
737 (void) die(type, rp, addr, cpuid);
739 #endif /* OPTERON_ERRATUM_91 */
741 if (lofault == 0)
742 (void) die(type, rp, addr, cpuid);
745 * Cannot resolve fault. Return to lofault.
747 if (lodebug) {
748 showregs(type, rp, addr);
749 traceregs(rp);
751 if (FC_CODE(res) == FC_OBJERR)
752 res = FC_ERRNO(res);
753 else
754 res = EFAULT;
755 rp->r_r0 = res;
756 rp->r_pc = ct->t_lofault;
757 goto cleanup;
759 case T_PGFLT + USER: /* user page fault */
760 if (faultdebug) {
761 char *fault_str;
763 switch (rw) {
764 case S_READ:
765 fault_str = "read";
766 break;
767 case S_WRITE:
768 fault_str = "write";
769 break;
770 case S_EXEC:
771 fault_str = "exec";
772 break;
773 default:
774 fault_str = "";
775 break;
777 printf("user %s fault: addr=0x%lx errcode=0x%x\n",
778 fault_str, (uintptr_t)addr, errcode);
781 #if defined(OPTERON_ERRATUM_100) && defined(_LP64)
783 * Workaround for AMD erratum 100
785 * A 32-bit process may receive a page fault on a non
786 * 32-bit address by mistake. The range of the faulting
787 * address will be
789 * 0xffffffff80000000 .. 0xffffffffffffffff or
790 * 0x0000000100000000 .. 0x000000017fffffff
792 * The fault is always due to an instruction fetch, however
793 * the value of r_pc should be correct (in 32 bit range),
794 * so we ignore the page fault on the bogus address.
796 if (p->p_model == DATAMODEL_ILP32 &&
797 (0xffffffff80000000 <= (uintptr_t)addr ||
798 (0x100000000 <= (uintptr_t)addr &&
799 (uintptr_t)addr <= 0x17fffffff))) {
800 if (!opteron_erratum_100)
801 panic("unexpected erratum #100");
802 if (rp->r_pc <= 0xffffffff)
803 goto out;
805 #endif /* OPTERON_ERRATUM_100 && _LP64 */
807 ASSERT(!(curthread->t_flag & T_WATCHPT));
808 watchpage = (pr_watch_active(p) && pr_is_watchpage(addr, rw));
809 #ifdef __i386
811 * In 32-bit mode, the lcall (system call) instruction fetches
812 * one word from the stack, at the stack pointer, because of the
813 * way the call gate is constructed. This is a bogus
814 * read and should not be counted as a read watchpoint.
815 * We work around the problem here by testing to see if
816 * this situation applies and, if so, simply jumping to
817 * the code in locore.s that fields the system call trap.
818 * The registers on the stack are already set up properly
819 * due to the match between the call gate sequence and the
820 * trap gate sequence. We just have to adjust the pc.
822 if (watchpage && addr == (caddr_t)rp->r_sp &&
823 rw == S_READ && instr_is_lcall_syscall((caddr_t)rp->r_pc)) {
824 extern void watch_syscall(void);
826 rp->r_pc += LCALLSIZE;
827 watch_syscall(); /* never returns */
828 /* NOTREACHED */
830 #endif /* __i386 */
831 vaddr = addr;
832 if (!watchpage || (sz = instr_size(rp, &vaddr, rw)) <= 0)
833 fault_type = (errcode & PF_ERR_PROT)? F_PROT: F_INVAL;
834 else if ((watchcode = pr_is_watchpoint(&vaddr, &ta,
835 sz, NULL, rw)) != 0) {
836 if (ta) {
837 do_watch_step(vaddr, sz, rw,
838 watchcode, rp->r_pc);
839 fault_type = F_INVAL;
840 } else {
841 bzero(&siginfo, sizeof (siginfo));
842 siginfo.si_signo = SIGTRAP;
843 siginfo.si_code = watchcode;
844 siginfo.si_addr = vaddr;
845 siginfo.si_trapafter = 0;
846 siginfo.si_pc = (caddr_t)rp->r_pc;
847 fault = FLTWATCH;
848 break;
850 } else {
851 /* XXX pr_watch_emul() never succeeds (for now) */
852 if (rw != S_EXEC && pr_watch_emul(rp, vaddr, rw))
853 goto out;
854 do_watch_step(vaddr, sz, rw, 0, 0);
855 fault_type = F_INVAL;
858 res = pagefault(addr, fault_type, rw, 0);
861 * If pagefault() succeeded, ok.
862 * Otherwise attempt to grow the stack.
864 if (res == 0 ||
865 (res == FC_NOMAP &&
866 addr < p->p_usrstack &&
867 grow(addr))) {
868 lwp->lwp_lastfault = FLTPAGE;
869 lwp->lwp_lastfaddr = addr;
870 if (prismember(&p->p_fltmask, FLTPAGE)) {
871 bzero(&siginfo, sizeof (siginfo));
872 siginfo.si_addr = addr;
873 (void) stop_on_fault(FLTPAGE, &siginfo);
875 goto out;
876 } else if (res == FC_PROT && addr < p->p_usrstack &&
877 (mmu.pt_nx != 0 && (errcode & PF_ERR_EXEC))) {
878 report_stack_exec(p, addr);
881 #ifdef OPTERON_ERRATUM_91
883 * Workaround for Opteron Erratum 91. Prefetches may generate a
884 * page fault (they're not supposed to do that!). If this
885 * occurs we simply return back to the instruction.
887 * We rely on copyin to properly fault in the page with r_pc.
889 if (opteron_erratum_91 &&
890 addr != (caddr_t)rp->r_pc &&
891 instr_is_prefetch((caddr_t)rp->r_pc)) {
892 #ifdef DEBUG
893 cmn_err(CE_WARN, "Opteron erratum 91 occurred: "
894 "prefetch at %p in pid %d generated a trap!",
895 (void *)rp->r_pc, p->p_pid);
896 #endif /* DEBUG */
897 goto out;
899 #endif /* OPTERON_ERRATUM_91 */
901 if (tudebug)
902 showregs(type, rp, addr);
904 * In the case where both pagefault and grow fail,
905 * set the code to the value provided by pagefault.
906 * We map all errors returned from pagefault() to SIGSEGV.
908 bzero(&siginfo, sizeof (siginfo));
909 siginfo.si_addr = addr;
910 switch (FC_CODE(res)) {
911 case FC_HWERR:
912 case FC_NOSUPPORT:
913 siginfo.si_signo = SIGBUS;
914 siginfo.si_code = BUS_ADRERR;
915 fault = FLTACCESS;
916 break;
917 case FC_ALIGN:
918 siginfo.si_signo = SIGBUS;
919 siginfo.si_code = BUS_ADRALN;
920 fault = FLTACCESS;
921 break;
922 case FC_OBJERR:
923 if ((siginfo.si_errno = FC_ERRNO(res)) != EINTR) {
924 siginfo.si_signo = SIGBUS;
925 siginfo.si_code = BUS_OBJERR;
926 fault = FLTACCESS;
928 break;
929 default: /* FC_NOMAP or FC_PROT */
930 siginfo.si_signo = SIGSEGV;
931 siginfo.si_code =
932 (res == FC_NOMAP)? SEGV_MAPERR : SEGV_ACCERR;
933 fault = FLTBOUNDS;
934 break;
936 break;
938 case T_ILLINST + USER: /* invalid opcode fault */
940 * If the syscall instruction is disabled due to LDT usage, a
941 * user program that attempts to execute it will trigger a #ud
942 * trap. Check for that case here. If this occurs on a CPU which
943 * doesn't even support syscall, the result of all of this will
944 * be to emulate that particular instruction.
946 if (p->p_ldt != NULL &&
947 ldt_rewrite_syscall(rp, p, X86FSET_ASYSC))
948 goto out;
950 #ifdef __amd64
952 * Emulate the LAHF and SAHF instructions if needed.
953 * See the instr_is_lsahf function for details.
955 if (p->p_model == DATAMODEL_LP64 &&
956 instr_is_lsahf((caddr_t)rp->r_pc, &instr)) {
957 emulate_lsahf(rp, instr);
958 goto out;
960 #endif
962 /*FALLTHROUGH*/
964 if (tudebug)
965 showregs(type, rp, (caddr_t)0);
966 siginfo.si_signo = SIGILL;
967 siginfo.si_code = ILL_ILLOPC;
968 siginfo.si_addr = (caddr_t)rp->r_pc;
969 fault = FLTILL;
970 break;
972 case T_ZERODIV + USER: /* integer divide by zero */
973 if (tudebug && tudebugfpe)
974 showregs(type, rp, (caddr_t)0);
975 siginfo.si_signo = SIGFPE;
976 siginfo.si_code = FPE_INTDIV;
977 siginfo.si_addr = (caddr_t)rp->r_pc;
978 fault = FLTIZDIV;
979 break;
981 case T_OVFLW + USER: /* integer overflow */
982 if (tudebug && tudebugfpe)
983 showregs(type, rp, (caddr_t)0);
984 siginfo.si_signo = SIGFPE;
985 siginfo.si_code = FPE_INTOVF;
986 siginfo.si_addr = (caddr_t)rp->r_pc;
987 fault = FLTIOVF;
988 break;
991 * When using an eager FPU on x86, the #NM trap is no longer meaningful.
992 * Userland should not be able to trigger it. Anything that does
993 * represents a fatal error in the kernel and likely in the register
994 * state of the system. User FPU state should always be valid.
996 case T_NOEXTFLT + USER: /* math coprocessor not available */
997 case T_NOEXTFLT:
998 (void) die(type, rp, addr, cpuid);
999 break;
1002 * Kernel threads leveraging floating point need to mask the exceptions
1003 * or ensure that they cannot happen. There is no recovery from this.
1005 case T_EXTERRFLT: /* x87 floating point exception pending */
1006 sti(); /* T_EXTERRFLT comes in via cmninttrap */
1007 (void) die(type, rp, addr, cpuid);
1008 break;
1010 case T_EXTERRFLT + USER: /* x87 floating point exception pending */
1011 if (tudebug && tudebugfpe)
1012 showregs(type, rp, addr);
1013 if (sicode = fpexterrflt(rp)) {
1014 siginfo.si_signo = SIGFPE;
1015 siginfo.si_code = sicode;
1016 siginfo.si_addr = (caddr_t)rp->r_pc;
1017 fault = FLTFPE;
1019 break;
1021 case T_SIMDFPE + USER: /* SSE and SSE2 exceptions */
1022 if (tudebug && tudebugsse)
1023 showregs(type, rp, addr);
1024 if (!is_x86_feature(x86_featureset, X86FSET_SSE) &&
1025 !is_x86_feature(x86_featureset, X86FSET_SSE2)) {
1027 * There are rumours that some user instructions
1028 * on older CPUs can cause this trap to occur; in
1029 * which case send a SIGILL instead of a SIGFPE.
1031 siginfo.si_signo = SIGILL;
1032 siginfo.si_code = ILL_ILLTRP;
1033 siginfo.si_addr = (caddr_t)rp->r_pc;
1034 siginfo.si_trapno = type & ~USER;
1035 fault = FLTILL;
1036 } else if ((sicode = fpsimderrflt(rp)) != 0) {
1037 siginfo.si_signo = SIGFPE;
1038 siginfo.si_code = sicode;
1039 siginfo.si_addr = (caddr_t)rp->r_pc;
1040 fault = FLTFPE;
1043 sti(); /* The SIMD exception comes in via cmninttrap */
1044 break;
1046 case T_BPTFLT: /* breakpoint trap */
1048 * Kernel breakpoint traps should only happen when kmdb is
1049 * active, and even then, it'll have interposed on the IDT, so
1050 * control won't get here. If it does, we've hit a breakpoint
1051 * without the debugger, which is very strange, and very
1052 * fatal.
1054 if (tudebug && tudebugbpt)
1055 showregs(type, rp, (caddr_t)0);
1057 (void) die(type, rp, addr, cpuid);
1058 break;
1060 case T_SGLSTP: /* single step/hw breakpoint exception */
1062 #if !defined(__xpv)
1064 * We'd never normally get here, as kmdb handles its own single
1065 * step traps. There is one nasty exception though, as
1066 * described in more detail in sys_sysenter(). Note that
1067 * checking for all four locations covers both the KPTI and the
1068 * non-KPTI cases correctly: the former will never be found at
1069 * (brand_)sys_sysenter, and vice versa.
1071 if (lwp != NULL && (lwp->lwp_pcb.pcb_drstat & DR_SINGLESTEP)) {
1072 if (rp->r_pc == (greg_t)brand_sys_sysenter ||
1073 rp->r_pc == (greg_t)sys_sysenter ||
1074 rp->r_pc == (greg_t)tr_brand_sys_sysenter ||
1075 rp->r_pc == (greg_t)tr_sys_sysenter) {
1077 rp->r_pc += 0x3; /* sizeof (swapgs) */
1079 rp->r_ps &= ~PS_T; /* turn off trace */
1080 lwp->lwp_pcb.pcb_flags |= DEBUG_PENDING;
1081 ct->t_post_sys = 1;
1082 aston(curthread);
1083 goto cleanup;
1084 } else {
1085 if (tudebug && tudebugbpt)
1086 showregs(type, rp, (caddr_t)0);
1089 #endif /* !__xpv */
1091 if (boothowto & RB_DEBUG)
1092 debug_enter(NULL);
1093 else
1094 (void) die(type, rp, addr, cpuid);
1095 break;
1097 case T_NMIFLT: /* NMI interrupt */
1098 printf("Unexpected NMI in system mode\n");
1099 goto cleanup;
1101 case T_NMIFLT + USER: /* NMI interrupt */
1102 printf("Unexpected NMI in user mode\n");
1103 break;
1105 case T_GPFLT: /* general protection violation */
1107 * Any #GP that occurs during an on_trap .. no_trap bracket
1108 * with OT_DATA_ACCESS or OT_SEGMENT_ACCESS protection,
1109 * or in a on_fault .. no_fault bracket, is forgiven
1110 * and we trampoline. This protection is given regardless
1111 * of whether we are 32/64 bit etc - if a distinction is
1112 * required then define new on_trap protection types.
1114 * On amd64, we can get a #gp from referencing addresses
1115 * in the virtual address hole e.g. from a copyin or in
1116 * update_sregs while updating user segment registers.
1118 * On the 32-bit hypervisor we could also generate one in
1119 * mfn_to_pfn by reaching around or into where the hypervisor
1120 * lives which is protected by segmentation.
1124 * If we're under on_trap() protection (see <sys/ontrap.h>),
1125 * set ot_trap and trampoline back to the on_trap() call site
1126 * for OT_DATA_ACCESS or OT_SEGMENT_ACCESS.
1128 if (ct->t_ontrap != NULL) {
1129 int ttype = ct->t_ontrap->ot_prot &
1130 (OT_DATA_ACCESS | OT_SEGMENT_ACCESS);
1132 if (ttype != 0) {
1133 ct->t_ontrap->ot_trap |= ttype;
1134 if (tudebug)
1135 showregs(type, rp, (caddr_t)0);
1136 rp->r_pc = ct->t_ontrap->ot_trampoline;
1137 goto cleanup;
1142 * If we're under lofault protection (copyin etc.),
1143 * longjmp back to lofault with an EFAULT.
1145 if (ct->t_lofault) {
1147 * Fault is not resolvable, so just return to lofault
1149 if (lodebug) {
1150 showregs(type, rp, addr);
1151 traceregs(rp);
1153 rp->r_r0 = EFAULT;
1154 rp->r_pc = ct->t_lofault;
1155 goto cleanup;
1159 * We fall through to the next case, which repeats
1160 * the OT_SEGMENT_ACCESS check which we've already
1161 * done, so we'll always fall through to the
1162 * T_STKFLT case.
1164 /*FALLTHROUGH*/
1165 case T_SEGFLT: /* segment not present fault */
1167 * One example of this is #NP in update_sregs while
1168 * attempting to update a user segment register
1169 * that points to a descriptor that is marked not
1170 * present.
1172 if (ct->t_ontrap != NULL &&
1173 ct->t_ontrap->ot_prot & OT_SEGMENT_ACCESS) {
1174 ct->t_ontrap->ot_trap |= OT_SEGMENT_ACCESS;
1175 if (tudebug)
1176 showregs(type, rp, (caddr_t)0);
1177 rp->r_pc = ct->t_ontrap->ot_trampoline;
1178 goto cleanup;
1180 /*FALLTHROUGH*/
1181 case T_STKFLT: /* stack fault */
1182 case T_TSSFLT: /* invalid TSS fault */
1183 if (tudebug)
1184 showregs(type, rp, (caddr_t)0);
1185 if (kern_gpfault(rp))
1186 (void) die(type, rp, addr, cpuid);
1187 goto cleanup;
1190 * ONLY 32-bit PROCESSES can USE a PRIVATE LDT! 64-bit apps
1191 * should have no need for them, so we put a stop to it here.
1193 * So: not-present fault is ONLY valid for 32-bit processes with
1194 * a private LDT trying to do a system call. Emulate it.
1196 * #gp fault is ONLY valid for 32-bit processes also, which DO NOT
1197 * have a private LDT, and are trying to do a system call. Emulate it.
1200 case T_SEGFLT + USER: /* segment not present fault */
1201 case T_GPFLT + USER: /* general protection violation */
1202 #ifdef _SYSCALL32_IMPL
1203 if (p->p_model != DATAMODEL_NATIVE) {
1204 #endif /* _SYSCALL32_IMPL */
1205 if (instr_is_lcall_syscall((caddr_t)rp->r_pc)) {
1206 if (type == T_SEGFLT + USER)
1207 ASSERT(p->p_ldt != NULL);
1209 if ((p->p_ldt == NULL && type == T_GPFLT + USER) ||
1210 type == T_SEGFLT + USER) {
1213 * The user attempted a system call via the obsolete
1214 * call gate mechanism. Because the process doesn't have
1215 * an LDT (i.e. the ldtr contains 0), a #gp results.
1216 * Emulate the syscall here, just as we do above for a
1217 * #np trap.
1221 * Since this is a not-present trap, rp->r_pc points to
1222 * the trapping lcall instruction. We need to bump it
1223 * to the next insn so the app can continue on.
1225 rp->r_pc += LCALLSIZE;
1226 lwp->lwp_regs = rp;
1229 * Normally the microstate of the LWP is forced back to
1230 * LMS_USER by the syscall handlers. Emulate that
1231 * behavior here.
1233 mstate = LMS_USER;
1235 dosyscall();
1236 goto out;
1239 #ifdef _SYSCALL32_IMPL
1241 #endif /* _SYSCALL32_IMPL */
1243 * If the current process is using a private LDT and the
1244 * trapping instruction is sysenter, the sysenter instruction
1245 * has been disabled on the CPU because it destroys segment
1246 * registers. If this is the case, rewrite the instruction to
1247 * be a safe system call and retry it. If this occurs on a CPU
1248 * which doesn't even support sysenter, the result of all of
1249 * this will be to emulate that particular instruction.
1251 if (p->p_ldt != NULL &&
1252 ldt_rewrite_syscall(rp, p, X86FSET_SEP))
1253 goto out;
1255 /*FALLTHROUGH*/
1257 case T_BOUNDFLT + USER: /* bound fault */
1258 case T_STKFLT + USER: /* stack fault */
1259 case T_TSSFLT + USER: /* invalid TSS fault */
1260 if (tudebug)
1261 showregs(type, rp, (caddr_t)0);
1262 siginfo.si_signo = SIGSEGV;
1263 siginfo.si_code = SEGV_MAPERR;
1264 siginfo.si_addr = (caddr_t)rp->r_pc;
1265 fault = FLTBOUNDS;
1266 break;
1268 case T_ALIGNMENT + USER: /* user alignment error (486) */
1269 if (tudebug)
1270 showregs(type, rp, (caddr_t)0);
1271 bzero(&siginfo, sizeof (siginfo));
1272 siginfo.si_signo = SIGBUS;
1273 siginfo.si_code = BUS_ADRALN;
1274 siginfo.si_addr = (caddr_t)rp->r_pc;
1275 fault = FLTACCESS;
1276 break;
1278 case T_SGLSTP + USER: /* single step/hw breakpoint exception */
1279 if (tudebug && tudebugbpt)
1280 showregs(type, rp, (caddr_t)0);
1282 /* Was it single-stepping? */
1283 if (lwp->lwp_pcb.pcb_drstat & DR_SINGLESTEP) {
1284 pcb_t *pcb = &lwp->lwp_pcb;
1286 rp->r_ps &= ~PS_T;
1288 * If both NORMAL_STEP and WATCH_STEP are in effect,
1289 * give precedence to WATCH_STEP. If neither is set,
1290 * user must have set the PS_T bit in %efl; treat this
1291 * as NORMAL_STEP.
1293 if ((fault = undo_watch_step(&siginfo)) == 0 &&
1294 ((pcb->pcb_flags & NORMAL_STEP) ||
1295 !(pcb->pcb_flags & WATCH_STEP))) {
1296 siginfo.si_signo = SIGTRAP;
1297 siginfo.si_code = TRAP_TRACE;
1298 siginfo.si_addr = (caddr_t)rp->r_pc;
1299 fault = FLTTRACE;
1301 pcb->pcb_flags &= ~(NORMAL_STEP|WATCH_STEP);
1303 break;
1305 case T_BPTFLT + USER: /* breakpoint trap */
1306 if (tudebug && tudebugbpt)
1307 showregs(type, rp, (caddr_t)0);
1309 * int 3 (the breakpoint instruction) leaves the pc referring
1310 * to the address one byte after the breakpointed address.
1311 * If the P_PR_BPTADJ flag has been set via /proc, We adjust
1312 * it back so it refers to the breakpointed address.
1314 if (p->p_proc_flag & P_PR_BPTADJ)
1315 rp->r_pc--;
1316 siginfo.si_signo = SIGTRAP;
1317 siginfo.si_code = TRAP_BRKPT;
1318 siginfo.si_addr = (caddr_t)rp->r_pc;
1319 fault = FLTBPT;
1320 break;
1322 case T_AST:
1324 * This occurs only after the cs register has been made to
1325 * look like a kernel selector, either through debugging or
1326 * possibly by functions like setcontext(). The thread is
1327 * about to cause a general protection fault at common_iret()
1328 * in locore. We let that happen immediately instead of
1329 * doing the T_AST processing.
1331 goto cleanup;
1333 case T_AST + USER: /* profiling, resched, h/w error pseudo trap */
1334 if (lwp->lwp_pcb.pcb_flags & ASYNC_HWERR) {
1335 proc_t *p = ttoproc(curthread);
1336 extern void print_msg_hwerr(ctid_t ct_id, proc_t *p);
1338 lwp->lwp_pcb.pcb_flags &= ~ASYNC_HWERR;
1339 print_msg_hwerr(p->p_ct_process->conp_contract.ct_id,
1341 contract_process_hwerr(p->p_ct_process, p);
1342 siginfo.si_signo = SIGKILL;
1343 siginfo.si_code = SI_NOINFO;
1344 } else if (lwp->lwp_pcb.pcb_flags & CPC_OVERFLOW) {
1345 lwp->lwp_pcb.pcb_flags &= ~CPC_OVERFLOW;
1346 if (kcpc_overflow_ast()) {
1348 * Signal performance counter overflow
1350 if (tudebug)
1351 showregs(type, rp, (caddr_t)0);
1352 bzero(&siginfo, sizeof (siginfo));
1353 siginfo.si_signo = SIGEMT;
1354 siginfo.si_code = EMT_CPCOVF;
1355 siginfo.si_addr = (caddr_t)rp->r_pc;
1356 fault = FLTCPCOVF;
1360 break;
1364 * We can't get here from a system trap
1366 ASSERT(type & USER);
1368 if (fault) {
1369 /* We took a fault so abort single step. */
1370 lwp->lwp_pcb.pcb_flags &= ~(NORMAL_STEP|WATCH_STEP);
1372 * Remember the fault and fault adddress
1373 * for real-time (SIGPROF) profiling.
1375 lwp->lwp_lastfault = fault;
1376 lwp->lwp_lastfaddr = siginfo.si_addr;
1378 DTRACE_PROC2(fault, int, fault, ksiginfo_t *, &siginfo);
1381 * If a debugger has declared this fault to be an
1382 * event of interest, stop the lwp. Otherwise just
1383 * deliver the associated signal.
1385 if (siginfo.si_signo != SIGKILL &&
1386 prismember(&p->p_fltmask, fault) &&
1387 stop_on_fault(fault, &siginfo) == 0)
1388 siginfo.si_signo = 0;
1391 if (siginfo.si_signo)
1392 trapsig(&siginfo, (fault != FLTFPE && fault != FLTCPCOVF));
1394 if (lwp->lwp_oweupc)
1395 profil_tick(rp->r_pc);
1397 if (ct->t_astflag | ct->t_sig_check) {
1399 * Turn off the AST flag before checking all the conditions that
1400 * may have caused an AST. This flag is on whenever a signal or
1401 * unusual condition should be handled after the next trap or
1402 * syscall.
1404 astoff(ct);
1406 * If a single-step trap occurred on a syscall (see above)
1407 * recognize it now. Do this before checking for signals
1408 * because deferred_singlestep_trap() may generate a SIGTRAP to
1409 * the LWP or may otherwise mark the LWP to call issig(FORREAL).
1411 if (lwp->lwp_pcb.pcb_flags & DEBUG_PENDING)
1412 deferred_singlestep_trap((caddr_t)rp->r_pc);
1414 ct->t_sig_check = 0;
1417 * As in other code paths that check against TP_CHANGEBIND,
1418 * we perform the check first without p_lock held -- only
1419 * acquiring p_lock in the unlikely event that it is indeed
1420 * set. This is safe because we are doing this after the
1421 * astoff(); if we are racing another thread setting
1422 * TP_CHANGEBIND on us, we will pick it up on a subsequent
1423 * lap through.
1425 if (curthread->t_proc_flag & TP_CHANGEBIND) {
1426 mutex_enter(&p->p_lock);
1427 if (curthread->t_proc_flag & TP_CHANGEBIND) {
1428 timer_lwpbind();
1429 curthread->t_proc_flag &= ~TP_CHANGEBIND;
1431 mutex_exit(&p->p_lock);
1435 * for kaio requests that are on the per-process poll queue,
1436 * aiop->aio_pollq, they're AIO_POLL bit is set, the kernel
1437 * should copyout their result_t to user memory. by copying
1438 * out the result_t, the user can poll on memory waiting
1439 * for the kaio request to complete.
1441 if (p->p_aio)
1442 aio_cleanup(0);
1444 * If this LWP was asked to hold, call holdlwp(), which will
1445 * stop. holdlwps() sets this up and calls pokelwps() which
1446 * sets the AST flag.
1448 * Also check TP_EXITLWP, since this is used by fresh new LWPs
1449 * through lwp_rtt(). That flag is set if the lwp_create(2)
1450 * syscall failed after creating the LWP.
1452 if (ISHOLD(p))
1453 holdlwp();
1456 * All code that sets signals and makes ISSIG evaluate true must
1457 * set t_astflag afterwards.
1459 if (ISSIG_PENDING(ct, lwp, p)) {
1460 if (issig(FORREAL))
1461 psig();
1462 ct->t_sig_check = 1;
1465 if (ct->t_rprof != NULL) {
1466 realsigprof(0, 0, 0);
1467 ct->t_sig_check = 1;
1471 * /proc can't enable/disable the trace bit itself
1472 * because that could race with the call gate used by
1473 * system calls via "lcall". If that happened, an
1474 * invalid EFLAGS would result. prstep()/prnostep()
1475 * therefore schedule an AST for the purpose.
1477 if (lwp->lwp_pcb.pcb_flags & REQUEST_STEP) {
1478 lwp->lwp_pcb.pcb_flags &= ~REQUEST_STEP;
1479 rp->r_ps |= PS_T;
1481 if (lwp->lwp_pcb.pcb_flags & REQUEST_NOSTEP) {
1482 lwp->lwp_pcb.pcb_flags &= ~REQUEST_NOSTEP;
1483 rp->r_ps &= ~PS_T;
1487 out: /* We can't get here from a system trap */
1488 ASSERT(type & USER);
1490 if (ISHOLD(p))
1491 holdlwp();
1494 * Set state to LWP_USER here so preempt won't give us a kernel
1495 * priority if it occurs after this point. Call CL_TRAPRET() to
1496 * restore the user-level priority.
1498 * It is important that no locks (other than spinlocks) be entered
1499 * after this point before returning to user mode (unless lwp_state
1500 * is set back to LWP_SYS).
1502 lwp->lwp_state = LWP_USER;
1504 if (ct->t_trapret) {
1505 ct->t_trapret = 0;
1506 thread_lock(ct);
1507 CL_TRAPRET(ct);
1508 thread_unlock(ct);
1510 if (CPU->cpu_runrun || curthread->t_schedflag & TS_ANYWAITQ)
1511 preempt();
1512 prunstop();
1513 (void) new_mstate(ct, mstate);
1515 return;
1517 cleanup: /* system traps end up here */
1518 ASSERT(!(type & USER));
1522 * Patch non-zero to disable preemption of threads in the kernel.
1524 int IGNORE_KERNEL_PREEMPTION = 0; /* XXX - delete this someday */
1526 struct kpreempt_cnts { /* kernel preemption statistics */
1527 int kpc_idle; /* executing idle thread */
1528 int kpc_intr; /* executing interrupt thread */
1529 int kpc_clock; /* executing clock thread */
1530 int kpc_blocked; /* thread has blocked preemption (t_preempt) */
1531 int kpc_notonproc; /* thread is surrendering processor */
1532 int kpc_inswtch; /* thread has ratified scheduling decision */
1533 int kpc_prilevel; /* processor interrupt level is too high */
1534 int kpc_apreempt; /* asynchronous preemption */
1535 int kpc_spreempt; /* synchronous preemption */
1536 } kpreempt_cnts;
1539 * kernel preemption: forced rescheduling, preempt the running kernel thread.
1540 * the argument is old PIL for an interrupt,
1541 * or the distingished value KPREEMPT_SYNC.
1543 void
1544 kpreempt(int asyncspl)
1546 kthread_t *ct = curthread;
1548 if (IGNORE_KERNEL_PREEMPTION) {
1549 aston(CPU->cpu_dispthread);
1550 return;
1554 * Check that conditions are right for kernel preemption
1556 do {
1557 if (ct->t_preempt) {
1559 * either a privileged thread (idle, panic, interrupt)
1560 * or will check when t_preempt is lowered
1561 * We need to specifically handle the case where
1562 * the thread is in the middle of swtch (resume has
1563 * been called) and has its t_preempt set
1564 * [idle thread and a thread which is in kpreempt
1565 * already] and then a high priority thread is
1566 * available in the local dispatch queue.
1567 * In this case the resumed thread needs to take a
1568 * trap so that it can call kpreempt. We achieve
1569 * this by using siron().
1570 * How do we detect this condition:
1571 * idle thread is running and is in the midst of
1572 * resume: curthread->t_pri == -1 && CPU->dispthread
1573 * != CPU->thread
1574 * Need to ensure that this happens only at high pil
1575 * resume is called at high pil
1576 * Only in resume_from_idle is the pil changed.
1578 if (ct->t_pri < 0) {
1579 kpreempt_cnts.kpc_idle++;
1580 if (CPU->cpu_dispthread != CPU->cpu_thread)
1581 siron();
1582 } else if (ct->t_flag & T_INTR_THREAD) {
1583 kpreempt_cnts.kpc_intr++;
1584 if (ct->t_pil == CLOCK_LEVEL)
1585 kpreempt_cnts.kpc_clock++;
1586 } else {
1587 kpreempt_cnts.kpc_blocked++;
1588 if (CPU->cpu_dispthread != CPU->cpu_thread)
1589 siron();
1591 aston(CPU->cpu_dispthread);
1592 return;
1594 if (ct->t_state != TS_ONPROC ||
1595 ct->t_disp_queue != CPU->cpu_disp) {
1596 /* this thread will be calling swtch() shortly */
1597 kpreempt_cnts.kpc_notonproc++;
1598 if (CPU->cpu_thread != CPU->cpu_dispthread) {
1599 /* already in swtch(), force another */
1600 kpreempt_cnts.kpc_inswtch++;
1601 siron();
1603 return;
1605 if (getpil() >= DISP_LEVEL) {
1607 * We can't preempt this thread if it is at
1608 * a PIL >= DISP_LEVEL since it may be holding
1609 * a spin lock (like sched_lock).
1611 siron(); /* check back later */
1612 kpreempt_cnts.kpc_prilevel++;
1613 return;
1615 if (!interrupts_enabled()) {
1617 * Can't preempt while running with ints disabled
1619 kpreempt_cnts.kpc_prilevel++;
1620 return;
1622 if (asyncspl != KPREEMPT_SYNC)
1623 kpreempt_cnts.kpc_apreempt++;
1624 else
1625 kpreempt_cnts.kpc_spreempt++;
1627 ct->t_preempt++;
1628 preempt();
1629 ct->t_preempt--;
1630 } while (CPU->cpu_kprunrun);
1634 * Print out debugging info.
1636 static void
1637 showregs(uint_t type, struct regs *rp, caddr_t addr)
1639 int s;
1641 s = spl7();
1642 type &= ~USER;
1643 if (PTOU(curproc)->u_comm[0])
1644 printf("%s: ", PTOU(curproc)->u_comm);
1645 if (type < TRAP_TYPES)
1646 printf("#%s %s\n", trap_type_mnemonic[type], trap_type[type]);
1647 else
1648 switch (type) {
1649 case T_SYSCALL:
1650 printf("Syscall Trap:\n");
1651 break;
1652 case T_AST:
1653 printf("AST\n");
1654 break;
1655 default:
1656 printf("Bad Trap = %d\n", type);
1657 break;
1659 if (type == T_PGFLT) {
1660 printf("Bad %s fault at addr=0x%lx\n",
1661 USERMODE(rp->r_cs) ? "user": "kernel", (uintptr_t)addr);
1662 } else if (addr) {
1663 printf("addr=0x%lx\n", (uintptr_t)addr);
1666 printf("pid=%d, pc=0x%lx, sp=0x%lx, eflags=0x%lx\n",
1667 (ttoproc(curthread) && ttoproc(curthread)->p_pidp) ?
1668 ttoproc(curthread)->p_pid : 0, rp->r_pc, rp->r_sp, rp->r_ps);
1670 printf("cr0: %b cr4: %b\n",
1671 (uint_t)getcr0(), FMT_CR0, (uint_t)getcr4(), FMT_CR4);
1673 printf("cr2: %lx ", getcr2());
1674 printf("cr3: %lx ", getcr3());
1675 #if defined(__amd64)
1676 printf("cr8: %lx\n", getcr8());
1677 #endif
1678 printf("\n");
1680 dumpregs(rp);
1681 splx(s);
1684 static void
1685 dumpregs(struct regs *rp)
1687 #if defined(__amd64)
1688 const char fmt[] = "\t%3s: %16lx %3s: %16lx %3s: %16lx\n";
1690 printf(fmt, "rdi", rp->r_rdi, "rsi", rp->r_rsi, "rdx", rp->r_rdx);
1691 printf(fmt, "rcx", rp->r_rcx, " r8", rp->r_r8, " r9", rp->r_r9);
1692 printf(fmt, "rax", rp->r_rax, "rbx", rp->r_rbx, "rbp", rp->r_rbp);
1693 printf(fmt, "r10", rp->r_r10, "r11", rp->r_r11, "r12", rp->r_r12);
1694 printf(fmt, "r13", rp->r_r13, "r14", rp->r_r14, "r15", rp->r_r15);
1696 printf(fmt, "fsb", rdmsr(MSR_AMD_FSBASE), "gsb", rdmsr(MSR_AMD_GSBASE),
1697 " ds", rp->r_ds);
1698 printf(fmt, " es", rp->r_es, " fs", rp->r_fs, " gs", rp->r_gs);
1700 printf(fmt, "trp", rp->r_trapno, "err", rp->r_err, "rip", rp->r_rip);
1701 printf(fmt, " cs", rp->r_cs, "rfl", rp->r_rfl, "rsp", rp->r_rsp);
1703 printf("\t%3s: %16lx\n", " ss", rp->r_ss);
1705 #elif defined(__i386)
1706 const char fmt[] = "\t%3s: %8lx %3s: %8lx %3s: %8lx %3s: %8lx\n";
1708 printf(fmt, " gs", rp->r_gs, " fs", rp->r_fs,
1709 " es", rp->r_es, " ds", rp->r_ds);
1710 printf(fmt, "edi", rp->r_edi, "esi", rp->r_esi,
1711 "ebp", rp->r_ebp, "esp", rp->r_esp);
1712 printf(fmt, "ebx", rp->r_ebx, "edx", rp->r_edx,
1713 "ecx", rp->r_ecx, "eax", rp->r_eax);
1714 printf(fmt, "trp", rp->r_trapno, "err", rp->r_err,
1715 "eip", rp->r_eip, " cs", rp->r_cs);
1716 printf("\t%3s: %8lx %3s: %8lx %3s: %8lx\n",
1717 "efl", rp->r_efl, "usp", rp->r_uesp, " ss", rp->r_ss);
1719 #endif /* __i386 */
1723 * Test to see if the instruction is iret on i386 or iretq on amd64.
1725 * On the hypervisor we can only test for nopop_sys_rtt_syscall. If true
1726 * then we are in the context of hypervisor's failsafe handler because it
1727 * tried to iret and failed due to a bad selector. See xen_failsafe_callback.
1729 static int
1730 instr_is_iret(caddr_t pc)
1734 #if defined(__amd64)
1735 static const uint8_t iret_insn[2] = { 0x48, 0xcf }; /* iretq */
1737 #elif defined(__i386)
1738 static const uint8_t iret_insn[1] = { 0xcf }; /* iret */
1739 #endif /* __i386 */
1740 return (bcmp(pc, iret_insn, sizeof (iret_insn)) == 0);
1744 #if defined(__i386)
1747 * Test to see if the instruction is part of __SEGREGS_POP
1749 * Note carefully the appallingly awful dependency between
1750 * the instruction sequence used in __SEGREGS_POP and these
1751 * instructions encoded here.
1753 static int
1754 instr_is_segregs_pop(caddr_t pc)
1756 static const uint8_t movw_0_esp_gs[4] = { 0x8e, 0x6c, 0x24, 0x0 };
1757 static const uint8_t movw_4_esp_fs[4] = { 0x8e, 0x64, 0x24, 0x4 };
1758 static const uint8_t movw_8_esp_es[4] = { 0x8e, 0x44, 0x24, 0x8 };
1759 static const uint8_t movw_c_esp_ds[4] = { 0x8e, 0x5c, 0x24, 0xc };
1761 if (bcmp(pc, movw_0_esp_gs, sizeof (movw_0_esp_gs)) == 0 ||
1762 bcmp(pc, movw_4_esp_fs, sizeof (movw_4_esp_fs)) == 0 ||
1763 bcmp(pc, movw_8_esp_es, sizeof (movw_8_esp_es)) == 0 ||
1764 bcmp(pc, movw_c_esp_ds, sizeof (movw_c_esp_ds)) == 0)
1765 return (1);
1767 return (0);
1770 #endif /* __i386 */
1773 * Test to see if the instruction is part of _sys_rtt (or the KPTI trampolines
1774 * which are used by _sys_rtt).
1776 * Again on the hypervisor if we try to IRET to user land with a bad code
1777 * or stack selector we will get vectored through xen_failsafe_callback.
1778 * In which case we assume we got here via _sys_rtt since we only allow
1779 * IRET to user land to take place in _sys_rtt.
1781 static int
1782 instr_is_sys_rtt(caddr_t pc)
1784 extern void _sys_rtt(), _sys_rtt_end();
1786 #if !defined(__xpv)
1787 extern void tr_sysc_ret_start(), tr_sysc_ret_end();
1788 extern void tr_intr_ret_start(), tr_intr_ret_end();
1790 if ((uintptr_t)pc >= (uintptr_t)tr_sysc_ret_start &&
1791 (uintptr_t)pc <= (uintptr_t)tr_sysc_ret_end)
1792 return (1);
1794 if ((uintptr_t)pc >= (uintptr_t)tr_intr_ret_start &&
1795 (uintptr_t)pc <= (uintptr_t)tr_intr_ret_end)
1796 return (1);
1797 #endif
1799 if ((uintptr_t)pc < (uintptr_t)_sys_rtt ||
1800 (uintptr_t)pc > (uintptr_t)_sys_rtt_end)
1801 return (0);
1803 return (1);
1807 * Handle #gp faults in kernel mode.
1809 * One legitimate way this can happen is if we attempt to update segment
1810 * registers to naughty values on the way out of the kernel.
1812 * This can happen in a couple of ways: someone - either accidentally or
1813 * on purpose - creates (setcontext(2), lwp_create(2)) or modifies
1814 * (signal(2)) a ucontext that contains silly segment register values.
1815 * Or someone - either accidentally or on purpose - modifies the prgregset_t
1816 * of a subject process via /proc to contain silly segment register values.
1818 * (The unfortunate part is that we can end up discovering the bad segment
1819 * register value in the middle of an 'iret' after we've popped most of the
1820 * stack. So it becomes quite difficult to associate an accurate ucontext
1821 * with the lwp, because the act of taking the #gp trap overwrites most of
1822 * what we were going to send the lwp.)
1824 * OTOH if it turns out that's -not- the problem, and we're -not- an lwp
1825 * trying to return to user mode and we get a #gp fault, then we need
1826 * to die() -- which will happen if we return non-zero from this routine.
1828 static int
1829 kern_gpfault(struct regs *rp)
1831 kthread_t *t = curthread;
1832 proc_t *p = ttoproc(t);
1833 klwp_t *lwp = ttolwp(t);
1834 struct regs tmpregs, *trp = NULL;
1835 caddr_t pc = (caddr_t)rp->r_pc;
1836 int v;
1837 uint32_t auditing = AU_AUDITING();
1840 * if we're not an lwp, or in the case of running native the
1841 * pc range is outside _sys_rtt, then we should immediately
1842 * be die()ing horribly.
1844 if (lwp == NULL || !instr_is_sys_rtt(pc))
1845 return (1);
1848 * So at least we're in the right part of the kernel.
1850 * Disassemble the instruction at the faulting pc.
1851 * Once we know what it is, we carefully reconstruct the stack
1852 * based on the order in which the stack is deconstructed in
1853 * _sys_rtt. Ew.
1855 if (instr_is_iret(pc)) {
1857 * We took the #gp while trying to perform the IRET.
1858 * This means that either %cs or %ss are bad.
1859 * All we know for sure is that most of the general
1860 * registers have been restored, including the
1861 * segment registers, and all we have left on the
1862 * topmost part of the lwp's stack are the
1863 * registers that the iretq was unable to consume.
1865 * All the rest of the state was crushed by the #gp
1866 * which pushed -its- registers atop our old save area
1867 * (because we had to decrement the stack pointer, sigh) so
1868 * all that we can try and do is to reconstruct the
1869 * crushed frame from the #gp trap frame itself.
1871 trp = &tmpregs;
1872 trp->r_ss = lwptoregs(lwp)->r_ss;
1873 trp->r_sp = lwptoregs(lwp)->r_sp;
1874 trp->r_ps = lwptoregs(lwp)->r_ps;
1875 trp->r_cs = lwptoregs(lwp)->r_cs;
1876 trp->r_pc = lwptoregs(lwp)->r_pc;
1877 bcopy(rp, trp, offsetof(struct regs, r_pc));
1880 * Validate simple math
1882 ASSERT(trp->r_pc == lwptoregs(lwp)->r_pc);
1883 ASSERT(trp->r_err == rp->r_err);
1889 #if defined(__amd64)
1890 if (trp == NULL && PCB_NEED_UPDATE_SEGS(&lwp->lwp_pcb)) {
1893 * This is the common case -- we're trying to load
1894 * a bad segment register value in the only section
1895 * of kernel code that ever loads segment registers.
1897 * We don't need to do anything at this point because
1898 * the pcb contains all the pending segment register
1899 * state, and the regs are still intact because we
1900 * didn't adjust the stack pointer yet. Given the fidelity
1901 * of all this, we could conceivably send a signal
1902 * to the lwp, rather than core-ing.
1904 trp = lwptoregs(lwp);
1905 ASSERT((caddr_t)trp == (caddr_t)rp->r_sp);
1908 #elif defined(__i386)
1910 if (trp == NULL && instr_is_segregs_pop(pc))
1911 trp = lwptoregs(lwp);
1913 #endif /* __i386 */
1915 if (trp == NULL)
1916 return (1);
1919 * If we get to here, we're reasonably confident that we've
1920 * correctly decoded what happened on the way out of the kernel.
1921 * Rewrite the lwp's registers so that we can create a core dump
1922 * the (at least vaguely) represents the mcontext we were
1923 * being asked to restore when things went so terribly wrong.
1927 * Make sure that we have a meaningful %trapno and %err.
1929 trp->r_trapno = rp->r_trapno;
1930 trp->r_err = rp->r_err;
1932 if ((caddr_t)trp != (caddr_t)lwptoregs(lwp))
1933 bcopy(trp, lwptoregs(lwp), sizeof (*trp));
1936 mutex_enter(&p->p_lock);
1937 lwp->lwp_cursig = SIGSEGV;
1938 mutex_exit(&p->p_lock);
1941 * Terminate all LWPs but don't discard them. If another lwp beat
1942 * us to the punch by calling exit(), evaporate now.
1944 proc_is_exiting(p);
1945 if (exitlwps(1) != 0) {
1946 mutex_enter(&p->p_lock);
1947 lwp_exit();
1950 if (auditing) /* audit core dump */
1951 audit_core_start(SIGSEGV);
1952 v = core(SIGSEGV, B_FALSE);
1953 if (auditing) /* audit core dump */
1954 audit_core_finish(v ? CLD_KILLED : CLD_DUMPED);
1955 exit(v ? CLD_KILLED : CLD_DUMPED, SIGSEGV);
1956 return (0);
1960 * dump_tss() - Display the TSS structure
1963 #if defined(__amd64)
1965 static void
1966 dump_tss(void)
1968 const char tss_fmt[] = "tss.%s:\t0x%p\n"; /* Format string */
1969 tss_t *tss = CPU->cpu_tss;
1971 printf(tss_fmt, "tss_rsp0", (void *)tss->tss_rsp0);
1972 printf(tss_fmt, "tss_rsp1", (void *)tss->tss_rsp1);
1973 printf(tss_fmt, "tss_rsp2", (void *)tss->tss_rsp2);
1975 printf(tss_fmt, "tss_ist1", (void *)tss->tss_ist1);
1976 printf(tss_fmt, "tss_ist2", (void *)tss->tss_ist2);
1977 printf(tss_fmt, "tss_ist3", (void *)tss->tss_ist3);
1978 printf(tss_fmt, "tss_ist4", (void *)tss->tss_ist4);
1979 printf(tss_fmt, "tss_ist5", (void *)tss->tss_ist5);
1980 printf(tss_fmt, "tss_ist6", (void *)tss->tss_ist6);
1981 printf(tss_fmt, "tss_ist7", (void *)tss->tss_ist7);
1984 #elif defined(__i386)
1986 static void
1987 dump_tss(void)
1989 const char tss_fmt[] = "tss.%s:\t0x%p\n"; /* Format string */
1990 tss_t *tss = CPU->cpu_tss;
1992 printf(tss_fmt, "tss_link", (void *)(uintptr_t)tss->tss_link);
1993 printf(tss_fmt, "tss_esp0", (void *)(uintptr_t)tss->tss_esp0);
1994 printf(tss_fmt, "tss_ss0", (void *)(uintptr_t)tss->tss_ss0);
1995 printf(tss_fmt, "tss_esp1", (void *)(uintptr_t)tss->tss_esp1);
1996 printf(tss_fmt, "tss_ss1", (void *)(uintptr_t)tss->tss_ss1);
1997 printf(tss_fmt, "tss_esp2", (void *)(uintptr_t)tss->tss_esp2);
1998 printf(tss_fmt, "tss_ss2", (void *)(uintptr_t)tss->tss_ss2);
1999 printf(tss_fmt, "tss_cr3", (void *)(uintptr_t)tss->tss_cr3);
2000 printf(tss_fmt, "tss_eip", (void *)(uintptr_t)tss->tss_eip);
2001 printf(tss_fmt, "tss_eflags", (void *)(uintptr_t)tss->tss_eflags);
2002 printf(tss_fmt, "tss_eax", (void *)(uintptr_t)tss->tss_eax);
2003 printf(tss_fmt, "tss_ebx", (void *)(uintptr_t)tss->tss_ebx);
2004 printf(tss_fmt, "tss_ecx", (void *)(uintptr_t)tss->tss_ecx);
2005 printf(tss_fmt, "tss_edx", (void *)(uintptr_t)tss->tss_edx);
2006 printf(tss_fmt, "tss_esp", (void *)(uintptr_t)tss->tss_esp);
2009 #endif /* __amd64 */
2011 #if defined(TRAPTRACE)
2013 int ttrace_nrec = 10; /* number of records to dump out */
2014 int ttrace_dump_nregs = 0; /* dump out this many records with regs too */
2017 * Dump out the last ttrace_nrec traptrace records on each CPU
2019 static void
2020 dump_ttrace(void)
2022 trap_trace_ctl_t *ttc;
2023 trap_trace_rec_t *rec;
2024 uintptr_t current;
2025 int i, j, k;
2026 int n = NCPU;
2027 #if defined(__amd64)
2028 const char banner[] =
2029 "CPU ADDRESS TIMESTAMP TYPE VC HANDLER PC\n";
2030 /* Define format for the CPU, ADDRESS, and TIMESTAMP fields */
2031 const char fmt1[] = "%3d %016lx %12llx";
2032 char data1[34]; /* length of string formatted by fmt1 + 1 */
2033 #elif defined(__i386)
2034 const char banner[] =
2035 "CPU ADDRESS TIMESTAMP TYPE VC HANDLER PC\n";
2036 /* Define format for the CPU, ADDRESS, and TIMESTAMP fields */
2037 const char fmt1[] = "%3d %08lx %12llx";
2038 char data1[26]; /* length of string formatted by fmt1 + 1 */
2039 #endif
2040 /* Define format for the TYPE and VC fields */
2041 const char fmt2[] = "%4s %3x";
2042 char data2[9]; /* length of string formatted by fmt2 + 1 */
2044 * Define format for the HANDLER field. Width is arbitrary, but should
2045 * be enough for common handler's names, and leave enough space for
2046 * the PC field, especially when we are in kmdb.
2048 const char fmt3h[] = "#%-15s";
2049 const char fmt3p[] = "%-16p";
2050 const char fmt3s[] = "%-16s";
2051 char data3[17]; /* length of string formatted by fmt3* + 1 */
2053 if (ttrace_nrec == 0)
2054 return;
2056 printf("\n");
2057 printf(banner);
2059 for (i = 0; i < n; i++) {
2060 ttc = &trap_trace_ctl[i];
2061 if (ttc->ttc_first == (uintptr_t)NULL)
2062 continue;
2064 current = ttc->ttc_next - sizeof (trap_trace_rec_t);
2065 for (j = 0; j < ttrace_nrec; j++) {
2066 struct sysent *sys;
2067 struct autovec *vec;
2068 extern struct av_head autovect[];
2069 int type;
2070 ulong_t off;
2071 char *sym, *stype;
2073 if (current < ttc->ttc_first)
2074 current =
2075 ttc->ttc_limit - sizeof (trap_trace_rec_t);
2077 if (current == (uintptr_t)NULL)
2078 continue;
2080 rec = (trap_trace_rec_t *)current;
2082 if (rec->ttr_stamp == 0)
2083 break;
2085 (void) snprintf(data1, sizeof (data1), fmt1, i,
2086 (uintptr_t)rec, rec->ttr_stamp);
2088 switch (rec->ttr_marker) {
2089 case TT_SYSCALL:
2090 case TT_SYSENTER:
2091 case TT_SYSC:
2092 case TT_SYSC64:
2093 sys = &sysent32[rec->ttr_sysnum];
2094 switch (rec->ttr_marker) {
2095 case TT_SYSC64:
2096 sys = &sysent[rec->ttr_sysnum];
2097 /* FALLTHROUGH */
2098 case TT_SYSC:
2099 stype = "sysc"; /* syscall */
2100 break;
2101 case TT_SYSCALL:
2102 stype = "lcal"; /* lcall */
2103 break;
2104 case TT_SYSENTER:
2105 stype = "syse"; /* sysenter */
2106 break;
2107 default:
2108 break;
2110 (void) snprintf(data2, sizeof (data2), fmt2,
2111 stype, rec->ttr_sysnum);
2112 if (sys != NULL) {
2113 sym = kobj_getsymname(
2114 (uintptr_t)sys->sy_callc,
2115 &off);
2116 if (sym != NULL) {
2117 (void) snprintf(data3,
2118 sizeof (data3), fmt3s, sym);
2119 } else {
2120 (void) snprintf(data3,
2121 sizeof (data3), fmt3p,
2122 sys->sy_callc);
2124 } else {
2125 (void) snprintf(data3, sizeof (data3),
2126 fmt3s, "unknown");
2128 break;
2130 case TT_INTERRUPT:
2131 (void) snprintf(data2, sizeof (data2), fmt2,
2132 "intr", rec->ttr_vector);
2133 if (get_intr_handler != NULL)
2134 vec = (struct autovec *)
2135 (*get_intr_handler)
2136 (rec->ttr_cpuid, rec->ttr_vector);
2137 else
2138 vec =
2139 autovect[rec->ttr_vector].avh_link;
2141 if (vec != NULL) {
2142 sym = kobj_getsymname(
2143 (uintptr_t)vec->av_vector, &off);
2144 if (sym != NULL) {
2145 (void) snprintf(data3,
2146 sizeof (data3), fmt3s, sym);
2147 } else {
2148 (void) snprintf(data3,
2149 sizeof (data3), fmt3p,
2150 vec->av_vector);
2152 } else {
2153 (void) snprintf(data3, sizeof (data3),
2154 fmt3s, "unknown");
2156 break;
2158 case TT_TRAP:
2159 case TT_EVENT:
2160 type = rec->ttr_regs.r_trapno;
2161 (void) snprintf(data2, sizeof (data2), fmt2,
2162 "trap", type);
2163 if (type < TRAP_TYPES) {
2164 (void) snprintf(data3, sizeof (data3),
2165 fmt3h, trap_type_mnemonic[type]);
2166 } else {
2167 switch (type) {
2168 case T_AST:
2169 (void) snprintf(data3,
2170 sizeof (data3), fmt3s,
2171 "ast");
2172 break;
2173 default:
2174 (void) snprintf(data3,
2175 sizeof (data3), fmt3s, "");
2176 break;
2179 break;
2181 default:
2182 break;
2185 sym = kobj_getsymname(rec->ttr_regs.r_pc, &off);
2186 if (sym != NULL) {
2187 printf("%s %s %s %s+%lx\n", data1, data2, data3,
2188 sym, off);
2189 } else {
2190 printf("%s %s %s %lx\n", data1, data2, data3,
2191 rec->ttr_regs.r_pc);
2194 if (ttrace_dump_nregs-- > 0) {
2195 int s;
2197 if (rec->ttr_marker == TT_INTERRUPT)
2198 printf(
2199 "\t\tipl %x spl %x pri %x\n",
2200 rec->ttr_ipl,
2201 rec->ttr_spl,
2202 rec->ttr_pri);
2204 dumpregs(&rec->ttr_regs);
2206 printf("\t%3s: %p\n\n", " ct",
2207 (void *)rec->ttr_curthread);
2210 * print out the pc stack that we recorded
2211 * at trap time (if any)
2213 for (s = 0; s < rec->ttr_sdepth; s++) {
2214 uintptr_t fullpc;
2216 if (s >= TTR_STACK_DEPTH) {
2217 printf("ttr_sdepth corrupt\n");
2218 break;
2221 fullpc = (uintptr_t)rec->ttr_stack[s];
2223 sym = kobj_getsymname(fullpc, &off);
2224 if (sym != NULL)
2225 printf("-> %s+0x%lx()\n",
2226 sym, off);
2227 else
2228 printf("-> 0x%lx()\n", fullpc);
2230 printf("\n");
2232 current -= sizeof (trap_trace_rec_t);
2237 #endif /* TRAPTRACE */
2239 void
2240 panic_showtrap(struct panic_trap_info *tip)
2242 showregs(tip->trap_type, tip->trap_regs, tip->trap_addr);
2244 #if defined(TRAPTRACE)
2245 dump_ttrace();
2246 #endif
2248 if (tip->trap_type == T_DBLFLT)
2249 dump_tss();
2252 void
2253 panic_savetrap(panic_data_t *pdp, struct panic_trap_info *tip)
2255 panic_saveregs(pdp, tip->trap_regs);