| blob | 00f3543a368b4f9cf80f6de90a9902825edb0c0d |
1 /*
2 * CDDL HEADER START
3 *
4 * The contents of this file are subject to the terms of the
5 * Common Development and Distribution License (the "License").
6 * You may not use this file except in compliance with the License.
7 *
8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
9 * or http://www.opensolaris.org/os/licensing.
10 * See the License for the specific language governing permissions
11 * and limitations under the License.
12 *
13 * When distributing Covered Code, include this CDDL HEADER in each
14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
15 * If applicable, add the following below this CDDL HEADER, with the
16 * fields enclosed by brackets "[]" replaced with your own identifying
17 * information: Portions Copyright [yyyy] [name of copyright owner]
18 *
19 * CDDL HEADER END
20 */
22 /*
23 * Copyright (c) 2009, 2010, Oracle and/or its affiliates. All rights reserved.
24 * Copyright 2016 Nexenta Systems, Inc. All rights reserved.
25 * Copyright (c) 2014, Joyent, Inc. All rights reserved.
26 * Copyright 2014 OmniTI Computer Consulting, Inc. All rights reserved.
27 * Copyright (c) 2014, Tegile Systems Inc. All rights reserved.
28 */
30 /*
31 * Copyright (c) 2000 to 2010, LSI Corporation.
32 * All rights reserved.
33 *
34 * Redistribution and use in source and binary forms of all code within
35 * this file that is exclusively owned by LSI, with or without
36 * modification, is permitted provided that, in addition to the CDDL 1.0
37 * License requirements, the following conditions are met:
38 *
39 * Neither the name of the author nor the names of its contributors may be
40 * used to endorse or promote products derived from this software without
41 * specific prior written permission.
42 *
43 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
44 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
45 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
46 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
47 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
48 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
49 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS
50 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
51 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
52 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
53 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH
54 * DAMAGE.
55 */
57 /*
58 * mptsas - This is a driver based on LSI Logic's MPT2.0/2.5 interface.
59 *
60 */
62 #if defined(lint) || defined(DEBUG)
63 #define MPTSAS_DEBUG
64 #endif
66 /*
67 * standard header files.
68 */
69 #include <sys/note.h>
70 #include <sys/scsi/scsi.h>
71 #include <sys/pci.h>
72 #include <sys/file.h>
73 #include <sys/policy.h>
74 #include <sys/model.h>
75 #include <sys/sysevent.h>
76 #include <sys/sysevent/eventdefs.h>
77 #include <sys/sysevent/dr.h>
78 #include <sys/sata/sata_defs.h>
79 #include <sys/sata/sata_hba.h>
80 #include <sys/scsi/generic/sas.h>
81 #include <sys/scsi/impl/scsi_sas.h>
83 #pragma pack(1)
84 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_type.h>
85 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2.h>
86 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_cnfg.h>
87 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_init.h>
88 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_ioc.h>
89 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_sas.h>
90 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_tool.h>
91 #include <sys/scsi/adapters/mpt_sas/mpi/mpi2_raid.h>
92 #pragma pack()
94 /*
95 * private header files.
96 *
97 */
98 #include <sys/scsi/impl/scsi_reset_notify.h>
99 #include <sys/scsi/adapters/mpt_sas/mptsas_var.h>
100 #include <sys/scsi/adapters/mpt_sas/mptsas_ioctl.h>
101 #include <sys/scsi/adapters/mpt_sas/mptsas_smhba.h>
102 #include <sys/scsi/adapters/mpt_sas/mptsas_hash.h>
103 #include <sys/raidioctl.h>
107 /*
108 * FMA header files
109 */
110 #include <sys/ddifm.h>
111 #include <sys/fm/protocol.h>
112 #include <sys/fm/util.h>
113 #include <sys/fm/io/ddi.h>
115 /*
116 * autoconfiguration data and routines.
117 */
122 /*
123 * cb_ops function
124 */
127 #ifdef __sparc
133 /*
134 * Resource initilaization for hardware
135 */
159 /*
160 * SCSA function prototypes
161 */
188 /*
189 * SMP functions
190 */
193 /*
194 * internal function prototypes.
195 */
235 pMpi2ReplyDescriptorsUnion_t reply_desc_union);
237 pMpi2ReplyDescriptorsUnion_t reply_desc);
239 pMpi2ReplyDescriptorsUnion_t reply_desc);
325 /*
326 * helper functions
327 */
362 mptsas_phymask_t phymask);
366 /*
367 * Enumeration / DR functions
368 */
402 uint_t flags);
420 /*
421 * Power management functions
422 */
426 /*
427 * MPT MSI tunable:
428 *
429 * By default MSI is enabled on all supported platforms.
430 */
434 /*
435 * Global switch for use of MPI2.5 FAST PATH.
436 * We don't really know what FAST PATH actually does, so if it is suspected
437 * to cause problems it can be turned off by setting this variable to B_FALSE.
438 */
446 /*
447 * FMA Prototypes
448 */
455 /*
456 * This device is created by the SCSI pseudo nexus driver (SCSI vHCI). It is
457 * under this device that the paths to a physical device are created when
458 * MPxIO is used.
459 */
462 /*
463 * Tunable timeout value for Inquiry VPD page 0x83
464 * By default the value is 30 seconds.
465 */
468 /*
469 * This is used to allocate memory for message frame storage, not for
470 * data I/O DMA. All message frames must be stored in the first 4G of
471 * physical memory.
472 */
473 ddi_dma_attr_t mptsas_dma_attrs = {
486 };
488 /*
489 * This is used for data I/O DMA memory allocation. (full 64-bit DMA
490 * physical addresses are supported.)
491 */
492 ddi_dma_attr_t mptsas_dma_attrs64 = {
505 };
507 ddi_device_acc_attr_t mptsas_dev_attr = {
508 DDI_DEVICE_ATTR_V1,
509 DDI_STRUCTURE_LE_ACC,
510 DDI_STRICTORDER_ACC,
511 DDI_DEFAULT_ACC
512 };
532 nodev /* awrite */
533 };
543 #ifdef __sparc
544 mptsas_reset,
545 #else
551 #ifdef __sparc
552 ddi_quiesce_not_needed
553 #else
554 mptsas_quiesce /* quiesce */
556 };
565 };
569 };
578 /*
579 * Local static data
580 */
581 #if defined(MPTSAS_DEBUG)
582 /*
583 * Flags to indicate which debug messages are to be printed and which go to the
584 * debug log ring buffer. Default is to not print anything, and to log
585 * everything except the watchsubr() output which normally happens every second.
586 */
607 /*
608 * Default length for extended auto request sense buffers.
609 * All sense buffers need to be under the same alloc because there
610 * is only one common top 32bits (of 64bits) address register.
611 * Most requests only require 32 bytes, but some request >256.
612 * We use rmalloc()/rmfree() on this additional memory to manage the
613 * "extended" requests.
614 */
617 /*
618 * We believe that all software resrictions of having to run with DMA
619 * attributes to limit allocation to the first 4G are removed.
620 * However, this flag remains to enable quick switchback should suspicious
621 * problems emerge.
622 * Note that scsi_alloc_consistent_buf() does still adhere to allocating
623 * 32 bit addressable memory, but we can cope if that is changed now.
624 */
627 /*
628 * warlock directives
629 */
631 mptsas_cmd NcrTableIndirect buf scsi_cdb scsi_status))
637 /*
638 * SM - HBA statics
639 */
642 #ifdef MPTSAS_DEBUG
644 #endif
646 /*
647 * Notes:
648 * - scsi_hba_init(9F) initializes SCSI HBA modules
649 * - must call scsi_hba_fini(9F) if modload() fails
650 */
651 int
653 {
655 /* CONSTCOND */
661 MPTSAS_INITIAL_SOFT_SPACE);
664 }
669 }
681 }
684 }
686 /*
687 * Notes:
688 * - scsi_hba_fini(9F) uninitializes SCSI HBA modules
689 */
690 int
692 {
694 /* CONSTCOND */
705 }
707 }
709 /*
710 * The loadable-module _info(9E) entry point
711 */
712 int
714 {
715 /* CONSTCOND */
720 }
722 static int
724 {
729 }
731 static int
733 {
741 }
743 static int
745 {
753 }
755 static int
757 {
762 }
764 static uint64_t
766 {
771 }
773 static int
775 {
784 }
786 static uint64_t
788 {
790 }
792 static int
794 {
801 }
803 static void
805 {
807 }
809 static void
811 {
813 }
815 static void
817 {
824 }
828 }
834 }
836 static int
838 {
861 /* CONSTCOND */
869 /*
870 * If this a scsi-iport node, nothing to do here.
871 */
876 }
881 NULL) {
885 }
893 NULL) {
897 }
899 /*
900 * Overwrite parent's tran_hba_private to iport's tran vector
901 */
906 /*
907 * Get SAS address for initiator port according dev_handle
908 */
913 DDI_PROP_SUCCESS) {
915 MPTSAS_VIRTUAL_PORT);
919 }
921 }
930 }
931 }
938 }
944 else
947 /*
948 * Update PHY info for smhba
949 */
955 }
962 numphys++;
963 }
964 }
972 DDI_PROP_SUCCESS) {
978 }
981 DDI_PROP_SUCCESS) {
984 }
988 DDI_PROP_SUCCESS) {
993 }
997 DDI_PROP_SUCCESS) {
1002 }
1005 DDI_PROP_SUCCESS) {
1007 MPTSAS_VIRTUAL_PORT);
1011 }
1024 attached_devhdl);
1027 }
1036 }
1037 }
1042 attached_sas_wwn);
1045 DDI_PROP_SUCCESS) {
1049 }
1051 /* Create kstats for each phy on this iport */
1055 /*
1056 * register sas hba iport with mdi (MPxIO/vhci)
1057 */
1061 }
1063 }
1065 /*
1066 * Notes:
1067 * Set up all device state and allocate data structures,
1068 * mutexes, condition variables, etc. for device operation.
1069 * Add interrupts needed.
1070 * Return DDI_SUCCESS if device is ready, else return DDI_FAILURE.
1071 */
1072 static int
1074 {
1092 /* CONSTCOND */
1097 }
1111 }
1113 /*
1114 * Reset hardware and softc to "no outstanding commands"
1115 * Note that a check condition can result on first command
1116 * to a target.
1117 */
1120 /*
1121 * raise power.
1122 */
1130 /*
1131 * The pm_raise_power() call above failed,
1132 * and that can only occur if we were unable
1133 * to reset the hardware. This is probably
1134 * due to unhealty hardware, and because
1135 * important filesystems(such as the root
1136 * filesystem) could be on the attached disks,
1137 * it would not be a good idea to continue,
1138 * as we won't be entirely certain we are
1139 * writing correct data. So we panic() here
1140 * to not only prevent possible data corruption,
1141 * but to give developers or end users a hope
1142 * of identifying and correcting any problems.
1143 */
1146 }
1147 }
1151 /*
1152 * Reinitialize ioc
1153 */
1159 }
1161 }
1162 /*
1163 * mptsas_update_driver_data needs interrupts so enable them
1164 * first.
1165 */
1169 /* start requests, if possible */
1174 /*
1175 * Restart watch thread
1176 */
1180 mptsas_tick);
1182 }
1185 /* report idle status to pm framework */
1188 }
1195 }
1199 /*
1200 * Allocate softc information.
1201 */
1206 }
1214 }
1216 /* Indicate that we are 'sizeof (scsi_*(9S))' clean. */
1222 /* Make a per-instance copy of the structures */
1228 }
1232 /*
1233 * Size of individual request sense buffer
1234 */
1237 /*
1238 * Initialize FMA
1239 */
1251 }
1253 /*
1254 * Setup configuration space
1255 */
1259 }
1260 config_setup++;
1266 }
1267 map_setup++;
1269 /*
1270 * A taskq is created for dealing with the event handler
1271 */
1276 }
1277 event_taskq_create++;
1279 /*
1280 * A taskq is created for dealing with dr events
1281 */
1288 }
1289 dr_taskq_create++;
1314 MPTSAS_DONEQ_THREAD_ACTIVE;
1324 }
1326 doneq_thread_create++;
1327 }
1329 /*
1330 * Disable hardware interrupt since we're not ready to
1331 * handle it yet.
1332 */
1336 intr_added++;
1338 /* Initialize mutex used in interrupt handler */
1348 }
1356 mutex_init_done++;
1359 /*
1360 * Initialize power management component
1361 */
1368 }
1369 }
1371 /*
1372 * Initialize chip using Message Unit Reset, if allowed
1373 */
1379 }
1387 /*
1388 * The refhash for temporary targets uses the address of the target
1389 * struct itself as tag, so the tag offset is 0. See the implementation
1390 * of mptsas_tmp_target_hash() and mptsas_tmp_target_cmp().
1391 */
1397 /*
1398 * Fill in the phy_info structure and get the base WWID
1399 */
1404 }
1410 }
1416 }
1420 /*
1421 * Register the iport for multiple port HBA
1422 */
1425 /*
1426 * initialize SCSI HBA transport structure
1427 */
1430 hba_attach_setup++;
1434 smp_attach_setup++;
1443 "scsi_reset_delay of 0 is not recommended,"
1446 }
1448 /*
1449 * Initialize the wait and done FIFO queue
1450 */
1456 /*
1457 * ioc cmd queue initialize
1458 */
1464 /*
1465 * enable event notification
1466 */
1471 }
1474 /*
1475 * used for mptsas_watch
1476 */
1489 }
1491 added_watchdog++;
1493 /*
1494 * Initialize PHY info for smhba.
1495 * This requires watchdog to be enabled otherwise if interrupts
1496 * don't work the system will hang.
1497 */
1502 }
1504 /* Check all dma handles allocated in attach */
1518 }
1520 /* Check all acc handles allocated in attach */
1537 }
1539 /*
1540 * After this point, we are not going to fail the attach.
1541 */
1543 /* Print message of HBA present */
1546 /* report idle status to pm framework */
1549 }
1553 fail:
1558 /* deallocate in reverse order */
1570 }
1572 }
1578 }
1581 }
1592 }
1595 }
1606 }
1610 }
1614 }
1621 }
1624 }
1627 }
1635 }
1642 }
1646 }
1649 }
1656 }
1658 }
1660 static int
1662 {
1668 }
1676 }
1683 }
1685 /*
1686 * Cancel timeout threads for this mpt
1687 */
1694 }
1702 }
1708 /*
1709 * Cancel watch threads if all mpts suspended
1710 */
1715 }
1720 timeout_id_t tid;
1729 }
1736 }
1737 }
1742 /*
1743 * If this mpt is not in full power(PM_LEVEL_D0), just return.
1744 */
1749 }
1751 /* Disable HBA interrupts in hardware */
1753 /*
1754 * Send RAID action system shutdown to sync IR
1755 */
1760 /* drain the taskq */
1765 }
1767 #ifdef __sparc
1768 /*ARGSUSED*/
1769 static int
1771 {
1775 /*
1776 * If this call is for iport, just return.
1777 */
1787 /*
1788 * Send RAID action system shutdown to sync IR. Disable HBA
1789 * interrupts in hardware first.
1790 */
1795 }
1797 /*
1798 * quiesce(9E) entry point.
1799 *
1800 * This function is called when the system is single-threaded at high
1801 * PIL with preemption disabled. Therefore, this function must not be
1802 * blocked.
1803 *
1804 * This function returns DDI_SUCCESS on success, or DDI_FAILURE on failure.
1805 * DDI_FAILURE indicates an error condition and should almost never happen.
1806 */
1807 static int
1809 {
1813 /*
1814 * If this call is for iport, just return.
1815 */
1825 /* Disable HBA interrupts in hardware */
1827 /* Send RAID action system shutdonw to sync IR */
1831 }
1834 /*
1835 * detach(9E). Remove all device allocations and system resources;
1836 * disable device interrupts.
1837 * Return DDI_SUCCESS if done; DDI_FAILURE if there's a problem.
1838 */
1839 static int
1841 {
1842 /* CONSTCOND */
1855 }
1856 /* NOTREACHED */
1857 }
1859 static int
1861 {
1878 }
1879 /*
1880 * Still have pathinfo child, should not detach mpt driver
1881 */
1884 /*
1885 * MPxIO enabled for the iport
1886 */
1892 }
1898 }
1902 }
1907 }
1909 /* Make sure power level is D0 before accessing registers */
1914 DDI_SUCCESS) {
1920 }
1921 }
1922 }
1924 /*
1925 * Send RAID action system shutdown to sync IR. After action, send a
1926 * Message Unit Reset. Since after that DMA resource will be freed,
1927 * set ioc to READY state will avoid HBA initiated DMA operation.
1928 */
1948 }
1952 }
1956 }
1963 }
1969 /*
1970 * Cancel timeout threads for this mpt
1971 */
1979 }
1987 }
1991 /*
1992 * last mpt? ... if active, CANCEL watch threads.
1993 */
1996 timeout_id_t tid;
1997 /*
1998 * Clear mptsas_timeouts_enable so that the watch thread
1999 * gets restarted on DDI_ATTACH
2000 */
2008 }
2015 }
2016 }
2019 /*
2020 * Delete Phy stats
2021 */
2026 /*
2027 * Delete nt_active.
2028 */
2033 /* deallocate everything that was allocated in mptsas_attach */
2039 /* Lower the power informing PM Framework */
2043 "!mptsas%d: Lower power request failed "
2046 }
2053 }
2073 }
2075 static void
2077 {
2084 }
2087 }
2089 static void
2091 {
2093 /*
2094 * Remove device instance from the global linked list
2095 */
2104 }
2105 }
2108 }
2109 }
2113 }
2115 }
2117 static int
2119 {
2120 ddi_dma_attr_t task_dma_attrs;
2127 /* allocate Task Management ddi_dma resources */
2132 }
2136 }
2138 static void
2140 {
2145 }
2147 static int
2149 {
2153 /* Allocate a transport structure */
2155 SCSI_HBA_CANSLEEP);
2192 /*
2193 * All children of the HBA are iports. We need tran was cloned.
2194 * So we pass the flags to SCSA. SCSI_HBA_TRAN_CLONE will be
2195 * inherited to iport's tran vector.
2196 */
2205 }
2207 }
2209 static void
2211 {
2216 }
2217 }
2219 static void
2221 {
2224 /*
2225 * initial value of mask is 0
2226 */
2247 }
2248 }
2254 }
2255 }
2260 /*
2261 * register a iport
2262 */
2265 }
2267 /*
2268 * register a virtual port for RAID volume always
2269 */
2272 }
2274 static int
2276 {
2286 }
2287 /*
2288 * Initialize smp hash table
2289 */
2294 KM_SLEEP);
2298 }
2300 static void
2302 {
2307 }
2309 }
2311 static int
2313 {
2317 /*
2318 * create kmem cache for packets
2319 */
2329 }
2331 /*
2332 * create kmem cache for extra SGL frames if SGL cannot
2333 * be accomodated into main request frame.
2334 */
2344 }
2347 }
2349 static void
2351 {
2352 /* deallocate in reverse order */
2356 }
2360 }
2361 }
2363 static int
2365 {
2366 #ifndef __lock_lint
2368 #endif
2380 }
2384 /*
2385 * If the device is busy, don't lower its power level
2386 */
2390 }
2395 /*
2396 * Wait up to 30 seconds for IOC to come out of reset.
2397 */
2403 }
2405 }
2406 /*
2407 * If IOC is not in operational state, try to hard reset it.
2408 */
2410 MPI2_IOC_STATE_OPERATIONAL) {
2417 }
2418 }
2430 }
2433 }
2435 /*
2436 * Initialize configuration space and figure out which
2437 * chip and revison of the chip the mpt driver is using.
2438 */
2439 static int
2441 {
2451 }
2453 /*
2454 * This is a workaround for a XMITS ASIC bug which does not
2455 * drive the CBE upper bits.
2456 */
2458 PCI_STAT_PERROR) {
2460 PCI_STAT_PERROR);
2461 }
2465 /*
2466 * Get the chip device id:
2467 */
2470 /*
2471 * Save the revision.
2472 */
2475 /*
2476 * Save the SubSystem Vendor and Device IDs
2477 */
2481 /*
2482 * Set the latency timer to 0x40 as specified by the upa -> pci
2483 * bridge chip design team. This may be done by the sparc pci
2484 * bus nexus driver, but the driver should make sure the latency
2485 * timer is correct for performance reasons.
2486 */
2488 MPTSAS_LATENCY_TIMER);
2492 }
2494 static void
2496 {
2501 }
2502 }
2504 static void
2506 {
2507 ushort_t cmdreg;
2509 /*
2510 * Set the command register to the needed values.
2511 */
2517 }
2519 static void
2521 {
2522 ushort_t cmdreg;
2524 /*
2525 * Clear the master enable bit in the PCI command register.
2526 * This prevents any bus mastering activity like DMA.
2527 */
2531 }
2533 int
2535 {
2536 ddi_dma_attr_t attrs;
2547 }
2550 }
2552 void
2554 {
2558 }
2560 int
2562 {
2563 ddi_dma_attr_t attrs;
2564 ddi_dma_handle_t dma_handle;
2565 caddr_t memp;
2566 ddi_acc_handle_t accessp;
2578 }
2586 }
2591 }
2593 static int
2595 {
2596 ddi_dma_attr_t frame_dma_attrs;
2597 caddr_t memp;
2598 ddi_dma_cookie_t cookie;
2601 /*
2602 * re-alloc when it has already alloced
2603 */
2608 /*
2609 * The size of the request frame pool is:
2610 * Number of Request Frames * Request Frame Size
2611 */
2614 /*
2615 * set the DMA attributes. System Request Message Frames must be
2616 * aligned on a 16-byte boundry.
2617 */
2622 /*
2623 * allocate the request frame pool.
2624 */
2629 }
2631 /*
2632 * Store the request frame memory address. This chip uses this
2633 * address to dma to and from the driver's frame. The second
2634 * address is the address mpt uses to fill in the frame.
2635 */
2639 /*
2640 * Clear the request frame pool.
2641 */
2645 }
2647 static int
2649 {
2650 ddi_dma_attr_t sense_dma_attrs;
2651 caddr_t memp;
2652 ddi_dma_cookie_t cookie;
2658 /*
2659 * re-alloc when it has already alloced
2660 */
2665 }
2667 /*
2668 * The size of the request sense pool is:
2669 * (Number of Request Frames - 2 ) * Request Sense Size +
2670 * extra memory for extended sense requests.
2671 */
2673 mptsas_extreq_sense_bufsize;
2675 /*
2676 * set the DMA attributes. ARQ buffers
2677 * aligned on a 16-byte boundry.
2678 */
2683 /*
2684 * allocate the request sense buffer pool.
2685 */
2690 }
2692 /*
2693 * Store the request sense base memory address. This chip uses this
2694 * address to dma the request sense data. The second
2695 * address is the address mpt uses to access the data.
2696 * The third is the base for the extended rqsense buffers.
2697 */
2703 /*
2704 * The extra memory is divided up into multiples of the base
2705 * buffer size in order to allocate via rmalloc().
2706 * Note that the rmallocmap cannot start at zero!
2707 */
2713 /*
2714 * Clear the pool.
2715 */
2719 }
2721 static int
2723 {
2724 ddi_dma_attr_t frame_dma_attrs;
2725 caddr_t memp;
2726 ddi_dma_cookie_t cookie;
2729 /*
2730 * re-alloc when it has already alloced
2731 */
2735 }
2737 /*
2738 * The size of the reply frame pool is:
2739 * Number of Reply Frames * Reply Frame Size
2740 */
2743 /*
2744 * set the DMA attributes. System Reply Message Frames must be
2745 * aligned on a 4-byte boundry. This is the default.
2746 */
2750 /*
2751 * allocate the reply frame pool
2752 */
2757 }
2759 /*
2760 * Store the reply frame memory address. This chip uses this
2761 * address to dma to and from the driver's frame. The second
2762 * address is the address mpt uses to process the frame.
2763 */
2767 /*
2768 * Clear the reply frame pool.
2769 */
2773 }
2775 static int
2777 {
2778 ddi_dma_attr_t frame_dma_attrs;
2779 caddr_t memp;
2780 ddi_dma_cookie_t cookie;
2783 /*
2784 * re-alloc when it has already alloced
2785 */
2789 }
2791 /*
2792 * The reply free queue size is:
2793 * Reply Free Queue Depth * 4
2794 * The "4" is the size of one 32 bit address (low part of 64-bit
2795 * address)
2796 */
2799 /*
2800 * set the DMA attributes The Reply Free Queue must be aligned on a
2801 * 16-byte boundry.
2802 */
2807 /*
2808 * allocate the reply free queue
2809 */
2814 }
2816 /*
2817 * Store the reply free queue memory address. This chip uses this
2818 * address to read from the reply free queue. The second address
2819 * is the address mpt uses to manage the queue.
2820 */
2824 /*
2825 * Clear the reply free queue memory.
2826 */
2830 }
2832 static int
2834 {
2835 ddi_dma_attr_t frame_dma_attrs;
2836 caddr_t memp;
2837 ddi_dma_cookie_t cookie;
2840 /*
2841 * re-alloc when it has already alloced
2842 */
2846 }
2848 /*
2849 * The reply descriptor post queue size is:
2850 * Reply Descriptor Post Queue Depth * 8
2851 * The "8" is the size of each descriptor (8 bytes or 64 bits).
2852 */
2855 /*
2856 * set the DMA attributes. The Reply Descriptor Post Queue must be
2857 * aligned on a 16-byte boundry.
2858 */
2863 /*
2864 * allocate the reply post queue
2865 */
2870 }
2872 /*
2873 * Store the reply descriptor post queue memory address. This chip
2874 * uses this address to write to the reply descriptor post queue. The
2875 * second address is the address mpt uses to manage the queue.
2876 */
2880 /*
2881 * Clear the reply post queue memory.
2882 */
2886 }
2888 static void
2890 {
2894 }
2895 }
2897 static int
2899 {
2905 }
2907 }
2909 }
2911 static void
2913 {
2918 }
2919 }
2921 static void
2923 {
2926 }
2928 static void
2930 {
2933 /*
2934 * Free up any allocated memory
2935 */
2939 }
2945 }
2950 }
2955 }
2960 }
2965 }
2966 }
2968 static int
2970 {
2976 /* Get the target num */
2982 /*
2983 * Stick in the address of form "pPHY,LUN"
2984 */
2989 /*
2990 * Stick in the address of the form "wWWN,LUN"
2991 */
2996 }
3002 }
3004 }
3006 /*
3007 * tran_tgt_init(9E) - target device instance initialization
3008 */
3009 static int
3012 {
3013 #ifndef __lock_lint
3015 #endif
3017 /*
3018 * At this point, the scsi_device structure already exists
3019 * and has been initialized.
3020 *
3021 * Use this function to allocate target-private data structures,
3022 * if needed by this HBA. Add revised flow-control and queue
3023 * properties for child here, if desired and if you can tell they
3024 * support tagged queueing by now.
3025 */
3034 mptsas_target_addr_t addr;
3046 }
3047 /*
3048 * phymask is 0 means the virtual port for RAID
3049 */
3054 /*
3055 * Very bad news if this occurs. Somehow scsi_vhci has
3056 * lost the pathinfo node for this target.
3057 */
3059 }
3062 DDI_PROP_SUCCESS) {
3065 }
3071 }
3073 }
3079 DDI_PROP_SUCCESS) {
3082 }
3086 }
3087 }
3098 sas_wwn);
3100 }
3103 KM_SLEEP);
3107 }
3111 }
3116 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
3127 /*
3128 * According SCSI/ATA Translation -2 (SAT-2) revision 01a
3129 * chapter 12.4.2 VPD page 89h includes 512 bytes ATA IDENTIFY
3130 * DEVICE data or ATA IDENTIFY PACKET DEVICE data.
3131 */
3139 }
3144 }
3155 /*
3156 * override SCSA "inquiry-*" properties
3157 */
3169 }
3172 }
3175 }
3176 /*
3177 * tran_tgt_free(9E) - target device instance deallocation
3178 */
3179 static void
3182 {
3183 #ifndef __lock_lint
3185 #endif
3192 }
3193 }
3195 /*
3196 * scsi_pkt handling
3197 *
3198 * Visible to the external world via the transport structure.
3199 */
3201 /*
3202 * Notes:
3203 * - transport the command to the addressed SCSI target/lun device
3204 * - normal operation is to schedule the command to be transported,
3205 * and return TRAN_ACCEPT if this is successful.
3206 * - if NO_INTR, tran_start must poll device for command completion
3207 */
3208 static int
3210 {
3211 #ifndef __lock_lint
3213 #endif
3224 /*
3225 * prepare the pkt before taking mutex.
3226 */
3230 }
3232 /*
3233 * Send the command to target/lun, however your HBA requires it.
3234 * If busy, return TRAN_BUSY; if there's some other formatting error
3235 * in the packet, return TRAN_BADPKT; otherwise, fall through to the
3236 * return of TRAN_ACCEPT.
3237 *
3238 * Remember that access to shared resources, including the mptsas_t
3239 * data structure and the HBA hardware registers, must be protected
3240 * with mutexes, here and everywhere.
3241 *
3242 * Also remember that at interrupt time, you'll get an argument
3243 * to the interrupt handler which is a pointer to your mptsas_t
3244 * structure; you'll have to remember which commands are outstanding
3245 * and which scsi_pkt is the currently-running command so the
3246 * interrupt handler can refer to the pkt to set completion
3247 * status, call the target driver back through pkt_comp, etc.
3248 *
3249 * If the instance lock is held by other thread, don't spin to wait
3250 * for it. Instead, queue the cmd and next time when the instance lock
3251 * is not held, accept all the queued cmd. A extra tx_waitq is
3252 * introduced to protect the queue.
3253 *
3254 * The polled cmd will not be queud and accepted as usual.
3255 *
3256 * Under the tx_waitq mutex, record whether a thread is draining
3257 * the tx_waitq. An IO requesting thread that finds the instance
3258 * mutex contended appends to the tx_waitq and while holding the
3259 * tx_wait mutex, if the draining flag is not set, sets it and then
3260 * proceeds to spin for the instance mutex. This scheme ensures that
3261 * the last cmd in a burst be processed.
3262 *
3263 * we enable this feature only when the helper threads are enabled,
3264 * at which we think the loads are heavy.
3265 *
3266 * per instance mutex m_tx_waitq_mutex is introduced to protect the
3267 * m_tx_waitqtail, m_tx_waitq, m_tx_draining.
3268 */
3280 /*
3281 * ptgt->m_dr_flag is protected by m_mutex or
3282 * m_tx_waitq_mutex. In this case, m_tx_waitq_mutex
3283 * is acquired.
3284 */
3287 /*
3288 * The command should be allowed to
3289 * retry by returning TRAN_BUSY to
3290 * to stall the I/O's which come from
3291 * scsi_vhci since the device/path is
3292 * in unstable state now.
3293 */
3297 /*
3298 * The device is offline, just fail the
3299 * command by returning
3300 * TRAN_FATAL_ERROR.
3301 */
3304 }
3305 }
3317 }
3318 }
3321 /*
3322 * ptgt->m_dr_flag is protected by m_mutex or m_tx_waitq_mutex
3323 * in this case, m_mutex is acquired.
3324 */
3327 /*
3328 * commands should be allowed to retry by
3329 * returning TRAN_BUSY to stall the I/O's
3330 * which come from scsi_vhci since the device/
3331 * path is in unstable state now.
3332 */
3336 /*
3337 * The device is offline, just fail the
3338 * command by returning TRAN_FATAL_ERROR.
3339 */
3342 }
3343 }
3346 }
3349 }
3351 /*
3352 * Accept all the queued cmds(if any) before accept the current one.
3353 */
3354 static int
3356 {
3361 /*
3362 * The call to mptsas_accept_tx_waitq() must always be performed
3363 * because that is where mpt->m_tx_draining is cleared.
3364 */
3368 /*
3369 * ptgt->m_dr_flag is protected by m_mutex or m_tx_waitq_mutex
3370 * in this case, m_mutex is acquired.
3371 */
3374 /*
3375 * The command should be allowed to retry by returning
3376 * TRAN_BUSY to stall the I/O's which come from
3377 * scsi_vhci since the device/path is in unstable state
3378 * now.
3379 */
3382 /*
3383 * The device is offline, just fail the command by
3384 * return TRAN_FATAL_ERROR.
3385 */
3387 }
3388 }
3392 }
3394 static int
3396 {
3409 }
3410 }
3412 /*
3413 * reset the throttle if we were draining
3414 */
3420 }
3422 /*
3423 * If HBA is being reset, the DevHandles are being re-initialized,
3424 * which means that they could be invalid even if the target is still
3425 * attached. Check if being reset and if DevHandle is being
3426 * re-initialized. If this is the case, return BUSY so the I/O can be
3427 * retried later.
3428 */
3437 }
3438 }
3440 /*
3441 * If device handle has already been invalidated, just
3442 * fail the command. In theory, command from scsi_vhci
3443 * client is impossible send down command with invalid
3444 * devhdl since devhdl is set after path offline, target
3445 * driver is not suppose to select a offlined path.
3446 */
3457 }
3458 }
3459 /*
3460 * The first case is the normal case. mpt gets a command from the
3461 * target driver and starts it.
3462 * Since SMID 0 is reserved and the TM slot is reserved, the actual max
3463 * commands is m_max_requests - 2.
3464 */
3475 }
3477 /*
3478 * Add this pkt to the work queue
3479 */
3485 /*
3486 * Only flush the doneq if this is not a TM
3487 * cmd. For TM cmds the flushing of the
3488 * doneq will be done in those routines.
3489 */
3492 }
3493 }
3494 }
3496 }
3498 int
3500 {
3507 /*
3508 * Account for reserved TM request slot and reserved SMID of 0.
3509 */
3512 /*
3513 * Find the next available slot, beginning at m_rotor. If no slot is
3514 * available, we'll return FALSE to indicate that. This mechanism
3515 * considers only the normal slots, not the reserved slot 0 nor the
3516 * task management slot m_n_normal + 1. The rotor is left to point to
3517 * the normal slot after the one we select, unless we select the last
3518 * normal slot in which case it returns to slot 1.
3519 */
3539 /*
3540 * only increment per target ncmds if this is not a
3541 * command that has no target associated with it (i.e. a
3542 * event acknoledgment)
3543 */
3545 /*
3546 * Expiration time is set in mptsas_start_cmd
3547 */
3551 /*
3552 * Initialize expiration time for passthrough commands,
3553 */
3556 }
3558 }
3560 /*
3561 * prepare the pkt:
3562 * the pkt may have been resubmitted or just reused so
3563 * initialize some fields and do some checks.
3564 */
3565 static int
3567 {
3572 /*
3573 * Reinitialize some fields that need it; the packet may
3574 * have been resubmitted
3575 */
3583 /*
3584 * zero status byte.
3585 */
3591 /*
3592 * consistent packets need to be sync'ed first
3593 * (only for data going out)
3594 */
3598 DDI_DMA_SYNC_FORDEV);
3599 }
3600 }
3607 }
3609 /*
3610 * tran_init_pkt(9E) - allocate scsi_pkt(9S) for command
3611 *
3612 * One of three possibilities:
3613 * - allocate scsi_pkt
3614 * - allocate scsi_pkt and DMA resources
3615 * - allocate DMA resources to an already-allocated pkt
3616 */
3621 {
3624 uint_t oldcookiec;
3633 tran_tgt_private;
3637 }
3646 #ifdef MPTSAS_TEST_EXTRN_ALLOC
3648 #endif
3654 /*
3655 * Allocate the new packet.
3656 */
3658 ddi_dma_handle_t save_dma_handle;
3686 /*
3687 * We are going to allocate external packet space which
3688 * might include the sense data buffer for DMA so we
3689 * need to increase the reference counter here. In a
3690 * case the HBA is in reset we just simply free the
3691 * allocated packet and bail out.
3692 */
3700 }
3705 /*
3706 * if extern alloc fails, all will be
3707 * deallocated, including cmd
3708 */
3713 /*
3714 * If the external packet space allocation
3715 * failed, or we didn't allocate the sense
3716 * data buffer for DMA we need to decrease the
3717 * reference counter.
3718 */
3728 /*
3729 * if extern allocation fails, it will
3730 * deallocate the new pkt as well
3731 */
3733 }
3734 }
3735 }
3741 }
3744 /* grab cmd->cmd_cookiec here as oldcookiec */
3748 /*
3749 * If the dma was broken up into PARTIAL transfers cmd_nwin will be
3750 * greater than 0 and we'll need to grab the next dma window
3751 */
3752 /*
3753 * SLM-not doing extra command frame right now; may add later
3754 */
3758 /*
3759 * Make sure we havn't gone past the the total number
3760 * of windows
3761 */
3764 }
3769 }
3771 }
3776 }
3778 /*
3779 * DMA resource allocation. This version assumes your
3780 * HBA has some sort of bus-mastering or onboard DMA capability, with a
3781 * scatter-gather list of length MPTSAS_MAX_DMA_SEGS, as given in the
3782 * ddi_dma_attr_t structure and passed to scsi_impl_dmaget.
3783 */
3790 /*
3791 * Set up DMA memory and position to the next DMA segment.
3792 */
3801 }
3805 }
3809 }
3811 /*
3812 * workaround for byte hole issue on psycho and
3813 * schizo pre 2.1
3814 */
3819 }
3845 }
3849 }
3851 }
3853 get_dma_cookies:
3863 }
3865 }
3867 /*
3868 * Allocate extra SGL buffer if needed.
3869 */
3873 DDI_FAILURE) {
3879 }
3881 }
3882 }
3884 /*
3885 * Always use scatter-gather transfer
3886 * Use the loop below to store physical addresses of
3887 * DMA segments, from the DMA cookies, into your HBA's
3888 * scatter-gather list.
3889 * We need to ensure we have enough kmem alloc'd
3890 * for the sg entries since we are no longer using an
3891 * array inside mptsas_cmd_t.
3892 *
3893 * We check cmd->cmd_cookiec against oldcookiec so
3894 * the scatter-gather list is correctly allocated
3895 */
3900 oldcookiec);
3902 }
3903 }
3911 "unable to kmem_alloc enough memory "
3913 /*
3914 * if we have an ENOMEM condition we need to behave
3915 * the same way as the rest of this routine
3916 */
3921 }
3923 }
3924 }
3930 /*
3931 * store the first segment into the S/G list
3932 */
3939 /*
3940 * dmacount counts the size of the dma for this window
3941 * (if partial dma is being used). totaldmacount
3942 * keeps track of the total amount of dma we have
3943 * transferred for all the windows (needed to calculate
3944 * the resid value below).
3945 */
3949 /*
3950 * We already stored the first DMA scatter gather segment,
3951 * start at 1 if we need to store more.
3952 */
3954 /*
3955 * Get next DMA cookie
3956 */
3959 dmap++;
3964 /*
3965 * store the segment parms into the S/G list
3966 */
3972 }
3974 /*
3975 * If this was partially allocated we set the resid
3976 * the amount of data NOT transferred in this window
3977 * If there is only one window, the resid will be 0
3978 */
3982 }
3984 }
3986 /*
3987 * tran_destroy_pkt(9E) - scsi_pkt(9s) deallocation
3988 *
3989 * Notes:
3990 * - also frees DMA resources if allocated
3991 * - implicit DMA synchonization
3992 */
3993 static void
3995 {
4005 }
4010 }
4024 /*
4025 * If the packet had the sense data buffer for DMA allocated we
4026 * need to decrease the reference counter.
4027 */
4035 }
4036 }
4037 }
4039 /*
4040 * kmem cache constructor and destructor:
4041 * When constructing, we bzero the cmd and allocate the dma handle
4042 * When destructing, just free the dma handle
4043 */
4044 static int
4046 {
4055 /*
4056 * allocate a dma handle
4057 */
4062 }
4064 }
4066 static void
4068 {
4069 #ifndef __lock_lint
4071 #endif
4079 }
4080 }
4082 static int
4084 {
4087 ddi_dma_attr_t frame_dma_attr;
4089 ddi_dma_cookie_t cookie;
4090 uint_t ncookie;
4103 }
4115 }
4126 }
4128 /*
4129 * Store the SGL memory address. This chip uses this
4130 * address to dma to and from the driver. The second
4131 * address is the address mpt uses to fill in the SGL.
4132 */
4136 }
4138 static void
4140 {
4141 #ifndef __lock_lint
4143 #endif
4153 }
4155 }
4157 /*
4158 * Figure out if we need to use a different method for the request
4159 * sense buffer and allocate from the map if necessary.
4160 */
4161 static boolean_t
4163 {
4167 /* Sense length is limited to an 8 bit value in MPI Spec. */
4184 }
4187 }
4189 /*
4190 * allocate and deallocate external pkt space (ie. not part of mptsas_cmd)
4191 * for non-standard length cdb, pkt_private, status areas
4192 * if allocation fails, then deallocate all external space and the pkt
4193 */
4194 /* ARGSUSED */
4195 static int
4198 {
4212 }
4215 }
4219 }
4222 }
4226 }
4230 /* allocate sense data buf for DMA */
4235 }
4237 fail:
4240 }
4242 /*
4243 * deallocate external pkt space and deallocate the pkt
4244 */
4245 static void
4247 {
4254 /* NOTREACHED */
4255 }
4259 }
4262 }
4265 }
4268 }
4271 }
4273 /*
4274 * tran_sync_pkt(9E) - explicit DMA synchronization
4275 */
4276 /*ARGSUSED*/
4277 static void
4279 {
4289 }
4290 }
4292 /*
4293 * tran_dmafree(9E) - deallocate DMA resources allocated for command
4294 */
4295 /*ARGSUSED*/
4296 static void
4298 {
4308 }
4311 }
4313 static void
4315 {
4319 DDI_DMA_SYNC_FORCPU);
4320 }
4322 }
4324 static void
4327 {
4328 pMpi2SGESimple64_t sge;
4345 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4346 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
4347 MPI2_SGE_FLAGS_SHIFT);
4349 /*
4350 * If this is the last cookie, we set the flags
4351 * to indicate so
4352 */
4355 }
4358 MPI2_SGE_FLAGS_SHIFT);
4361 MPI2_SGE_FLAGS_SHIFT);
4362 }
4364 dmap++;
4365 sge++;
4366 }
4367 }
4369 static void
4372 {
4373 pMpi2SGESimple64_t sge;
4374 pMpi2SGEChain64_t sgechain;
4376 uint_t cookiec;
4380 /*
4381 * Save the number of entries in the DMA
4382 * Scatter/Gather list
4383 */
4386 /*
4387 * Hereby we start to deal with multiple frames.
4388 * The process is as follows:
4389 * 1. Determine how many frames are needed for SGL element
4390 * storage; Note that all frames are stored in contiguous
4391 * memory space and in 64-bit DMA mode each element is
4392 * 3 double-words (12 bytes) long.
4393 * 2. Fill up the main frame. We need to do this separately
4394 * since it contains the SCSI IO request header and needs
4395 * dedicated processing. Note that the last 4 double-words
4396 * of the SCSI IO header is for SGL element storage
4397 * (MPI2_SGE_IO_UNION).
4398 * 3. Fill the chain element in the main frame, so the DMA
4399 * engine can use the following frames.
4400 * 4. Enter a loop to fill the remaining frames. Note that the
4401 * last frame contains no chain element. The remaining
4402 * frames go into the mpt SGL buffer allocated on the fly,
4403 * not immediately following the main message frame, as in
4404 * Gen1.
4405 * Some restrictions:
4406 * 1. For 64-bit DMA, the simple element and chain element
4407 * are both of 3 double-words (12 bytes) in size, even
4408 * though all frames are stored in the first 4G of mem
4409 * range and the higher 32-bits of the address are always 0.
4410 * 2. On some controllers (like the 1064/1068), a frame can
4411 * hold SGL elements with the last 1 or 2 double-words
4412 * (4 or 8 bytes) un-used. On these controllers, we should
4413 * recognize that there's not enough room for another SGL
4414 * element and move the sge pointer to the next frame.
4415 */
4422 /*
4423 * Sgemax is the number of SGE's that will fit
4424 * each extra frame and frames is total
4425 * number of frames we'll need. 1 sge entry per
4426 * frame is reseverd for the chain element thus the -1 below.
4427 */
4432 /*
4433 * A little check to see if we need to round up the number
4434 * of frames we need
4435 */
4441 }
4445 /*
4446 * First fill in the main frame
4447 */
4451 MPI2_SGE_FLAGS_SHIFT));
4454 j++;
4456 /*
4457 * Fill in the chain element in the main frame.
4458 * About calculation on ChainOffset:
4459 * 1. Struct msg_scsi_io_request has 4 double-words (16 bytes)
4460 * in the end reserved for SGL element storage
4461 * (MPI2_SGE_IO_UNION); we should count it in our
4462 * calculation. See its definition in the header file.
4463 * 2. Constant j is the counter of the current SGL element
4464 * that will be processed, and (j - 1) is the number of
4465 * SGL elements that have been processed (stored in the
4466 * main frame).
4467 * 3. ChainOffset value should be in units of double-words (4
4468 * bytes) so the last value should be divided by 4.
4469 */
4476 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4477 MPI2_SGE_FLAGS_64_BIT_ADDRESSING);
4480 /*
4481 * The size of the next frame is the accurate size of space
4482 * (in bytes) used to store the SGL elements. j is the counter
4483 * of SGL elements. (j - 1) is the number of SGL elements that
4484 * have been processed (stored in frames).
4485 */
4494 }
4502 /*
4503 * If there are more than 2 frames left we have to
4504 * fill in the next chain offset to the location of
4505 * the chain element in the next frame.
4506 * sgemax is the number of simple elements in an extra
4507 * frame. Note that the value NextChainOffset should be
4508 * in double-words (4 bytes).
4509 */
4515 }
4517 /*
4518 * Jump to next frame;
4519 * Starting here, chain buffers go into the per command SGL.
4520 * This buffer is allocated when chain buffers are needed.
4521 */
4525 /*
4526 * Start filling in frames with SGE's. If we
4527 * reach the end of frame and still have SGE's
4528 * to fill we need to add a chain element and
4529 * use another frame. j will be our counter
4530 * for what cookie we are at and i will be
4531 * the total cookiec. k is the current frame
4532 */
4536 /*
4537 * If we have reached the end of frame
4538 * and we have more SGE's to fill in
4539 * we have to fill the final entry
4540 * with a chain element and then
4541 * continue to the next frame
4542 */
4545 j--;
4546 chainflags = (
4547 MPI2_SGE_FLAGS_CHAIN_ELEMENT |
4548 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4549 MPI2_SGE_FLAGS_64_BIT_ADDRESSING);
4552 /*
4553 * k is the frame counter and (k + 1)
4554 * is the number of the next frame.
4555 * Note that frames are in contiguous
4556 * memory space.
4557 */
4562 nframe_phys_addr);
4567 /*
4568 * If there are more than 2 frames left
4569 * we have to next chain offset to
4570 * the location of the chain element
4571 * in the next frame and fill in the
4572 * length of the next chain
4573 */
4586 /*
4587 * This is the last frame. Set
4588 * the NextChainOffset to 0 and
4589 * Length is the total size of
4590 * all remaining simple elements
4591 */
4599 }
4601 /* Jump to the next frame */
4607 }
4620 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
4621 MPI2_SGE_FLAGS_SYSTEM_ADDRESS |
4622 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
4623 MPI2_SGE_FLAGS_SHIFT);
4625 /*
4626 * If we are at the end of the frame and
4627 * there is another frame to fill in
4628 * we set the last simple element as last
4629 * element
4630 */
4634 MPI2_SGE_FLAGS_SHIFT);
4635 }
4637 /*
4638 * If this is the final cookie we
4639 * indicate it by setting the flags
4640 */
4644 MPI2_SGE_FLAGS_END_OF_BUFFER |
4645 MPI2_SGE_FLAGS_END_OF_LIST) <<
4646 MPI2_SGE_FLAGS_SHIFT);
4647 }
4649 flags |=
4651 MPI2_SGE_FLAGS_SHIFT);
4653 flags |=
4655 MPI2_SGE_FLAGS_SHIFT);
4656 }
4659 dmap++;
4660 sge++;
4661 }
4662 }
4664 /*
4665 * Sync DMA with the chain buffers that were just created
4666 */
4668 }
4670 static void
4673 {
4674 pMpi2IeeeSgeSimple64_t ieeesge;
4693 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
4695 /*
4696 * If this is the last cookie, we set the flags
4697 * to indicate so
4698 */
4701 }
4704 dmap++;
4705 ieeesge++;
4706 }
4707 }
4709 static void
4712 {
4713 pMpi2IeeeSgeSimple64_t ieeesge;
4714 pMpi25IeeeSgeChain64_t ieeesgechain;
4716 uint_t cookiec;
4720 /*
4721 * Save the number of entries in the DMA
4722 * Scatter/Gather list
4723 */
4728 /*
4729 * Hereby we start to deal with multiple frames.
4730 * The process is as follows:
4731 * 1. Determine how many frames are needed for SGL element
4732 * storage; Note that all frames are stored in contiguous
4733 * memory space and in 64-bit DMA mode each element is
4734 * 4 double-words (16 bytes) long.
4735 * 2. Fill up the main frame. We need to do this separately
4736 * since it contains the SCSI IO request header and needs
4737 * dedicated processing. Note that the last 4 double-words
4738 * of the SCSI IO header is for SGL element storage
4739 * (MPI2_SGE_IO_UNION).
4740 * 3. Fill the chain element in the main frame, so the DMA
4741 * engine can use the following frames.
4742 * 4. Enter a loop to fill the remaining frames. Note that the
4743 * last frame contains no chain element. The remaining
4744 * frames go into the mpt SGL buffer allocated on the fly,
4745 * not immediately following the main message frame, as in
4746 * Gen1.
4747 * Restrictions:
4748 * For 64-bit DMA, the simple element and chain element
4749 * are both of 4 double-words (16 bytes) in size, even
4750 * though all frames are stored in the first 4G of mem
4751 * range and the higher 32-bits of the address are always 0.
4752 */
4759 /*
4760 * Sgemax is the number of SGE's that will fit
4761 * each extra frame and frames is total
4762 * number of frames we'll need. 1 sge entry per
4763 * frame is reseverd for the chain element thus the -1 below.
4764 */
4769 /*
4770 * A little check to see if we need to round up the number
4771 * of frames we need
4772 */
4778 }
4783 /*
4784 * First fill in the main frame
4785 */
4790 j++;
4792 /*
4793 * Fill in the chain element in the main frame.
4794 * About calculation on ChainOffset:
4795 * 1. Struct msg_scsi_io_request has 4 double-words (16 bytes)
4796 * in the end reserved for SGL element storage
4797 * (MPI2_SGE_IO_UNION); we should count it in our
4798 * calculation. See its definition in the header file.
4799 * 2. Constant j is the counter of the current SGL element
4800 * that will be processed, and (j - 1) is the number of
4801 * SGL elements that have been processed (stored in the
4802 * main frame).
4803 * 3. ChainOffset value should be in units of quad-words (16
4804 * bytes) so the last value should be divided by 16.
4805 */
4812 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
4815 /*
4816 * The size of the next frame is the accurate size of space
4817 * (in bytes) used to store the SGL elements. j is the counter
4818 * of SGL elements. (j - 1) is the number of SGL elements that
4819 * have been processed (stored in frames).
4820 */
4830 }
4838 /*
4839 * If there are more than 2 frames left we have to
4840 * fill in the next chain offset to the location of
4841 * the chain element in the next frame.
4842 * sgemax is the number of simple elements in an extra
4843 * frame. Note that the value NextChainOffset should be
4844 * in double-words (4 bytes).
4845 */
4851 }
4853 /*
4854 * Jump to next frame;
4855 * Starting here, chain buffers go into the per command SGL.
4856 * This buffer is allocated when chain buffers are needed.
4857 */
4861 /*
4862 * Start filling in frames with SGE's. If we
4863 * reach the end of frame and still have SGE's
4864 * to fill we need to add a chain element and
4865 * use another frame. j will be our counter
4866 * for what cookie we are at and i will be
4867 * the total cookiec. k is the current frame
4868 */
4872 /*
4873 * If we have reached the end of frame
4874 * and we have more SGE's to fill in
4875 * we have to fill the final entry
4876 * with a chain element and then
4877 * continue to the next frame
4878 */
4881 j--;
4882 chainflags =
4883 MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT |
4884 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR;
4887 /*
4888 * k is the frame counter and (k + 1)
4889 * is the number of the next frame.
4890 * Note that frames are in contiguous
4891 * memory space.
4892 */
4897 nframe_phys_addr);
4902 /*
4903 * If there are more than 2 frames left
4904 * we have to next chain offset to
4905 * the location of the chain element
4906 * in the next frame and fill in the
4907 * length of the next chain
4908 */
4923 /*
4924 * This is the last frame. Set
4925 * the NextChainOffset to 0 and
4926 * Length is the total size of
4927 * all remaining simple elements
4928 */
4936 }
4938 /* Jump to the next frame */
4944 }
4955 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
4957 /*
4958 * If we are at the end of the frame and
4959 * there is another frame to fill in
4960 * do we need to do anything?
4961 * if ((l == sgemax) && (k != frames)) {
4962 * }
4963 */
4965 /*
4966 * If this is the final cookie set end of list.
4967 */
4970 }
4973 dmap++;
4974 ieeesge++;
4975 }
4976 }
4978 /*
4979 * Sync DMA with the chain buffers that were just created
4980 */
4982 }
4984 static void
4987 {
4992 /*
4993 * Set read/write bit in control.
4994 */
4999 }
5003 /*
5004 * We have 4 cases here. First where we can fit all the
5005 * SG elements into the main frame, and the case
5006 * where we can't. The SG element is also different when using
5007 * MPI2.5 interface.
5008 * If we have more cookies than we can attach to a frame
5009 * we will need to use a chain element to point
5010 * a location of memory where the rest of the S/G
5011 * elements reside.
5012 */
5017 MPI25_IEEE_SGE_FLAGS_END_OF_LIST);
5022 | MPI2_SGE_FLAGS_END_OF_BUFFER
5024 MPI2_SGE_FLAGS_SHIFT));
5025 }
5031 }
5032 }
5033 }
5035 /*
5036 * Interrupt handling
5037 * Utility routine. Poll for status of a command sent to HBA
5038 * without interrupts (a FLAG_NOINTR command).
5039 */
5040 int
5042 {
5049 }
5051 /*
5052 * Wait, using drv_usecwait(), long enough for the command to
5053 * reasonably return from the target if the target isn't
5054 * "dead". A polled command may well be sent from scsi_poll, and
5055 * there are retries built in to scsi_poll if the transport
5056 * accepted the packet (TRAN_ACCEPT). scsi_poll waits 1 second
5057 * and retries the transport up to scsi_poll_busycnt times
5058 * (currently 60) if
5059 * 1. pkt_reason is CMD_INCOMPLETE and pkt_state is 0, or
5060 * 2. pkt_reason is CMD_CMPLT and *pkt_scbp has STATUS_BUSY
5061 *
5062 * limit the waiting to avoid a hang in the event that the
5063 * cmd never gets started but we are still receiving interrupts
5064 */
5070 }
5071 }
5075 /*
5076 * this isn't supposed to happen, the hba must be wedged
5077 * Mark this cmd as a timeout.
5078 */
5090 /* find and remove it from the waitq */
5093 }
5095 }
5099 }
5101 /*
5102 * Used for polling cmds and TM function
5103 */
5104 static int
5106 {
5108 pMpi2ReplyDescriptorsUnion_t reply_desc_union;
5115 /*
5116 * Get the current interrupt mask and disable interrupts. When
5117 * re-enabling ints, set mask to saved value.
5118 */
5122 /*
5123 * Keep polling for at least (polltime * 1000) seconds
5124 */
5127 DDI_DMA_SYNC_FORCPU);
5138 }
5140 /*
5141 * The reply is valid, process it according to its
5142 * type.
5143 */
5148 }
5150 /*
5151 * Update the global reply index
5152 */
5157 /*
5158 * Re-enable interrupts and quit.
5159 */
5161 int_mask);
5164 }
5166 /*
5167 * Clear polling flag, re-enable interrupts and quit.
5168 */
5172 }
5174 static void
5176 pMpi2ReplyDescriptorsUnion_t reply_desc)
5177 {
5178 pMpi2SCSIIOSuccessReplyDescriptor_t scsi_io_success;
5189 /*
5190 * This is a success reply so just complete the IO. First, do a sanity
5191 * check on the SMID. The final slot is used for TM requests, which
5192 * would not come into this reply handler.
5193 */
5196 SMID);
5199 }
5203 /*
5204 * print warning and return if the slot is empty
5205 */
5210 }
5214 STATE_GOT_STATUS);
5217 }
5226 }
5229 /*
5230 * The target returned QFULL or busy, do not add tihs
5231 * pkt to the doneq since the hba will retry
5232 * this cmd.
5233 *
5234 * The pkt has already been resubmitted in
5235 * mptsas_handle_qfull() or in mptsas_check_scsi_io_error().
5236 * Remove this cmd_flag here.
5237 */
5241 }
5242 }
5244 static void
5246 pMpi2ReplyDescriptorsUnion_t reply_desc)
5247 {
5248 pMpi2AddressReplyDescriptor_t address_reply;
5249 pMPI2DefaultReply_t reply;
5266 /*
5267 * If reply frame is not in the proper range we should ignore this
5268 * message and exit the interrupt handler.
5269 */
5280 }
5283 DDI_DMA_SYNC_FORCPU);
5285 reply_frame_dma_baseaddr));
5291 /*
5292 * don't get slot information and command for events since these values
5293 * don't exist
5294 */
5297 /*
5298 * This could be a TM reply, which use the last allocated SMID,
5299 * so allow for that.
5300 */
5305 DDI_SERVICE_UNAFFECTED);
5307 }
5311 /*
5312 * print warning and return if the slot is empty
5313 */
5318 }
5329 }
5331 }
5332 /*
5333 * Depending on the function, we need to handle
5334 * the reply frame (and cmd) differently.
5335 */
5343 cmd);
5356 /*
5357 * Record the event if its type is enabled in
5358 * this mpt instance by ioctl.
5359 */
5362 /*
5363 * Handle time critical events
5364 * NOT_RESPONDING/ADDED only now
5365 */
5367 /*
5368 * Would not return main process,
5369 * just let taskq resolve ack action
5370 * and ack would be sent in taskq thread
5371 */
5373 }
5378 }
5384 /*
5385 * Return the reply frame to the free queue.
5386 */
5391 DDI_DMA_SYNC_FORDEV);
5394 }
5398 }
5401 /*
5402 * If SMID is 0, this implies that the reply is due to a
5403 * release function with a status that the buffer has been
5404 * released. Set the buffer flags accordingly.
5405 */
5412 pBuffer =
5417 }
5419 /*
5420 * Normal handling of diag post reply with SMID.
5421 */
5424 /*
5425 * print warning and return if the slot is empty
5426 */
5431 }
5435 }
5440 }
5442 /*
5443 * Return the reply frame to the free queue.
5444 */
5447 reply_addr);
5449 DDI_DMA_SYNC_FORDEV);
5452 }
5460 /*
5461 * The target returned QFULL or busy, do not add this
5462 * pkt to the doneq since the hba will retry
5463 * this cmd.
5464 *
5465 * The pkt has already been resubmitted in
5466 * mptsas_handle_qfull() or in mptsas_check_scsi_io_error().
5467 * Remove this cmd_flag here.
5468 */
5472 }
5473 }
5475 #ifdef MPTSAS_DEBUG
5477 #endif
5479 static void
5482 {
5509 }
5516 scsi_state);
5517 }
5526 /*
5527 * if loginfo PL_LOGINFO_CODE_IO_DEVICE_MISSING_DELAY_RETRY
5528 * 0x31170000 comes, that means the device missing delay
5529 * is in progressing, the command need retry later.
5530 */
5533 }
5537 MPI2_IOCSTATUS_SCSI_DEVICE_NOT_THERE)) {
5542 DRAIN_THROTTLE);
5543 }
5545 }
5553 }
5554 }
5567 }
5570 }
5579 DDI_DMA_SYNC_FORKERNEL);
5580 #ifdef MPTSAS_DEBUG
5584 #endif
5587 cmd_rqs_len));
5590 /*
5591 * Set proper status for pkt if autosense was valid
5592 */
5596 }
5598 /*
5599 * ASC=0x47 is parity error
5600 * ASC=0x48 is initiator detected error received
5601 */
5606 }
5608 /*
5609 * ASC/ASCQ=0x3F/0x0E means report_luns data changed
5610 * ASC/ASCQ=0x25/0x00 means invalid lun
5611 */
5622 KM_NOSLEEP);
5625 "resource for handle SAS dynamic"
5628 }
5637 mptsas_handle_dr,
5643 "for handle SAS dynamic reconfigure"
5645 }
5646 }
5655 }
5677 }
5681 /*
5682 * When timeout requested, propagate
5683 * proper reason and statistics to
5684 * target drivers.
5685 */
5690 STAT_BUS_RESET);
5691 }
5706 /*
5707 * set throttles to drain
5708 */
5712 }
5714 /*
5715 * retry command
5716 */
5729 }
5746 }
5747 }
5749 static void
5752 {
5770 }
5783 /*
5784 * Check for invalid DevHandle of 0 in case application
5785 * sends bad command. DevHandle of 0 could cause problems.
5786 */
5792 task_type);
5793 }
5797 task_type);
5800 }
5801 }
5803 static void
5805 {
5816 }
5821 }
5825 }
5827 }
5833 }
5836 /*
5837 * mpt interrupt handler.
5838 */
5839 static uint_t
5841 {
5843 pMpi2ReplyDescriptorsUnion_t reply_desc_union;
5850 /*
5851 * If interrupts are shared by two channels then check whether this
5852 * interrupt is genuinely for this channel by making sure first the
5853 * chip is in high power state.
5854 */
5859 }
5861 /*
5862 * If polling, interrupt was triggered by some shared interrupt because
5863 * IOC interrupts are disabled during polling, so polling routine will
5864 * handle any replies. Considering this, if polling is happening,
5865 * return with interrupt unclaimed.
5866 */
5871 }
5873 /*
5874 * Read the istat register.
5875 */
5877 /*
5878 * read fifo until empty.
5879 */
5880 #ifndef __lock_lint
5882 #endif
5885 DDI_DMA_SYNC_FORCPU);
5894 }
5896 /*
5897 * The reply is valid, process it according to its
5898 * type. Also, set a flag for updating the reply index
5899 * after they've all been processed.
5900 */
5905 /*
5906 * Increment post index and roll over if needed.
5907 */
5910 }
5911 }
5913 /*
5914 * Update the global reply index if at least one reply was
5915 * processed.
5916 */
5920 }
5924 }
5927 /*
5928 * If no helper threads are created, process the doneq in ISR. If
5929 * helpers are created, use the doneq length as a metric to measure the
5930 * load on the interrupt CPU. If it is long enough, which indicates the
5931 * load is heavy, then we deliver the IO completions to the helpers.
5932 * This measurement has some limitations, although it is simple and
5933 * straightforward and works well for most of the cases at present.
5934 */
5940 }
5942 /*
5943 * If there are queued cmd, start them now.
5944 */
5947 }
5951 }
5953 static void
5955 pMpi2ReplyDescriptorsUnion_t reply_desc_union)
5956 {
5961 /*
5962 * The reply is valid, process it according to its
5963 * type. Also, set a flag for updated the reply index
5964 * after they've all been processed.
5965 */
5977 }
5979 /*
5980 * Clear the reply descriptor for re-use and increment
5981 * index.
5982 */
5987 DDI_DMA_SYNC_FORDEV);
5988 }
5990 /*
5991 * handle qfull condition
5992 */
5993 static void
5995 {
6000 /*
6001 * We have exhausted the retries on QFULL, or,
6002 * the target driver has indicated that it
6003 * wants to handle QFULL itself by setting
6004 * qfull-retries capability to 0. In either case
6005 * we want the target driver's QFULL handling
6006 * to kick in. We do this by having pkt_reason
6007 * as CMD_CMPLT and pkt_scbp as STATUS_QFULL.
6008 */
6014 }
6022 /*
6023 * when target gives queue full status with no commands
6024 * outstanding (m_t_ncmds == 0), throttle is set to 0
6025 * (HOLD_THROTTLE), and the queue full handling start
6026 * (see psarc/1994/313); if there are commands outstanding,
6027 * throttle is set to (m_t_ncmds - 2)
6028 */
6030 /*
6031 * By setting throttle to QFULL_THROTTLE, we
6032 * avoid submitting new commands and in
6033 * mptsas_restart_cmd find out slots which need
6034 * their throttles to be cleared.
6035 */
6041 }
6042 }
6043 }
6044 }
6046 mptsas_phymask_t
6048 {
6056 /*
6057 * If physport is 0xFF, this is a RAID volume. Use phymask of 0.
6058 */
6061 }
6069 }
6070 }
6074 }
6076 /*
6077 * mpt free device handle after device gone, by use of passthrough
6078 */
6079 static int
6081 {
6082 Mpi2SasIoUnitControlRequest_t req;
6083 Mpi2SasIoUnitControlReply_t rep;
6088 /*
6089 * Need to compose a SAS IO Unit Control request message
6090 * and call mptsas_do_passthru() function
6091 */
6105 }
6107 /* do passthrough success, check the ioc status */
6112 }
6115 }
6117 static void
6119 {
6150 }
6151 }
6157 }
6158 }
6163 /*
6164 * register a iport, if the port has already been existed
6165 * SCSA will do nothing and just return.
6166 */
6169 }
6172 }
6174 /*
6175 * mptsas_handle_dr is a task handler for DR, the DR action includes:
6176 * 1. Directly attched Device Added/Removed.
6177 * 2. Expander Device Added/Removed.
6178 * 3. Indirectly Attached Device Added/Expander.
6179 * 4. LUNs of a existing device status change.
6180 * 5. RAID volume created/deleted.
6181 * 6. Member of RAID volume is released because of RAID deletion.
6182 * 7. Physical disks are removed because of RAID creation.
6183 */
6184 static void
6186 {
6195 uint_t event;
6212 /*
6213 * Direct attached or expander attached device added
6214 * into system or a Phys Disk that is being unhidden.
6215 */
6217 }
6220 /*
6221 * New expander added into system, it must be the head
6222 * of topo_change_list_t
6223 */
6229 }
6230 /*
6231 * All cases port_update == 1 may cause initiator port form change
6232 */
6235 /*
6236 * mpt->m_port_chng flag indicates some PHYs of initiator
6237 * port have changed to online. So when expander added or
6238 * directly attached device online event come, we force to
6239 * update port information by issueing SAS IO Unit Page and
6240 * update PHYMASKs.
6241 */
6245 }
6254 MPTSAS_DR_EVENT_OFFLINE_SMP)) {
6255 /*
6256 * For all offline events, phymask is known
6257 */
6260 }
6263 }
6267 }
6270 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED) &&
6272 /*
6273 * There is no any field in IR_CONFIG_CHANGE
6274 * event indicate physport/phynum, let's get
6275 * parent after SAS Device Page0 request.
6276 */
6278 }
6282 /*
6283 * If the direct attached device added or a
6284 * phys disk is being unhidden, argument
6285 * physport actually is PHY#, so we have to get
6286 * phymask according PHY#.
6287 */
6289 }
6291 /*
6292 * Translate physport to phymask so that we can search
6293 * parent dip.
6294 */
6296 physport);
6299 find_parent:
6301 /*
6302 * For RAID topology change node, write the iport name
6303 * as v0.
6304 */
6308 /*
6309 * phymask can bo 0 if the drive has been
6310 * pulled by the time an add event is
6311 * processed. If phymask is 0, just skip this
6312 * event and continue.
6313 */
6325 }
6327 }
6329 phy_mask_name);
6334 }
6336 }
6338 handle_topo_change:
6341 /*
6342 * If HBA is being reset, don't perform operations depending
6343 * on the IOC. We must free the topo list, however.
6344 */
6347 else
6358 /*
6359 * If direct attached device associated, make sure
6360 * reset the parent before start the next one. But
6361 * all devices associated with expander shares the
6362 * parent. Also, reset parent if this is for RAID.
6363 */
6365 }
6366 }
6367 out:
6369 }
6371 static void
6374 {
6397 {
6402 /*
6403 * Get latest RAID info.
6404 */
6412 }
6415 /*
6416 * If a Phys Disk was deleted, RAID info needs to be
6417 * updated to reflect the new topology.
6418 */
6421 /*
6422 * Get sas device page 0 by DevHandle to make sure if
6423 * SSP/SATA end device exist.
6424 */
6426 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
6433 "mptsas_handle_topo_change: target %d is "
6438 "mptsas_handle_topo_change: could not "
6442 "mptsas_handle_topo_change: could not "
6445 }
6446 /*
6447 * If rval is DEV_INFO_PHYS_DISK or indicates failure
6448 * then there is nothing else to do, just leave.
6449 */
6452 }
6453 }
6465 phy_mask_name);
6472 }
6473 }
6481 /*
6482 * hold nexus for bus configure
6483 */
6487 /*
6488 * release nexus for bus configure
6489 */
6493 /*
6494 * Add parent's props for SMHBA support
6495 */
6502 parent,
6503 SCSI_ADDR_PROP_ATTACHED_PORT,
6504 attached_wwnstr)
6507 parent,
6508 SCSI_ADDR_PROP_ATTACHED_PORT);
6512 }
6515 DDI_PROP_SUCCESS) {
6521 }
6523 /*
6524 * Update PHY info for smhba
6525 */
6532 }
6535 /*
6536 * topo_node->un.physport is really the PHY#
6537 * for direct attached devices
6538 */
6544 DDI_PROP_SUCCESS) {
6548 "mptsas virtual-port"
6551 }
6552 }
6553 }
6560 }
6562 {
6578 }
6583 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED)) {
6584 /*
6585 * Get latest RAID info if RAID volume status changes
6586 * or Phys Disk status changes
6587 */
6589 }
6590 /*
6591 * Abort all outstanding command on the device
6592 */
6599 }
6614 /*
6615 * Clear parent's props for SMHBA support
6616 */
6622 DDI_PROP_SUCCESS) {
6624 SCSI_ADDR_PROP_ATTACHED_PORT);
6628 }
6631 DDI_PROP_SUCCESS) {
6633 MPTSAS_NUM_PHYS);
6637 }
6640 DDI_PROP_SUCCESS) {
6642 MPTSAS_VIRTUAL_PORT);
6646 }
6647 }
6656 /*
6657 * clean DR_INTRANSITION flag to allow I/O down to
6658 * PHCI driver since failover finished.
6659 * Invalidate the devhdl
6660 */
6666 }
6668 /*
6669 * Send SAS IO Unit Control to free the dev handle
6670 */
6677 rval));
6678 }
6681 }
6683 {
6685 /*
6686 * If this is the remove handle event, do a reset first.
6687 */
6694 }
6695 }
6697 /*
6698 * Send SAS IO Unit Control to free the dev handle
6699 */
6703 rval));
6705 }
6707 {
6708 mptsas_smp_t smp;
6720 }
6725 }
6734 }
6736 {
6744 /*
6745 * The mptsas_smp_t data is released only if the dip is offlined
6746 * successfully.
6747 */
6756 DEVINFO_DIRECT_ATTACHED) {
6759 DDI_PROP_SUCCESS) {
6761 MPTSAS_VIRTUAL_PORT);
6765 }
6766 /*
6767 * Check whether the smp connected to the iport,
6768 */
6771 DDI_PROP_SUCCESS) {
6773 MPTSAS_NUM_PHYS);
6777 }
6778 /*
6779 * Clear parent's attached-port props
6780 */
6784 DDI_PROP_SUCCESS) {
6786 SCSI_ADDR_PROP_ATTACHED_PORT);
6790 }
6791 }
6800 }
6805 }
6808 }
6809 }
6811 /*
6812 * Record the event if its type is enabled in mpt instance by ioctl.
6813 */
6814 static void
6816 {
6818 pMpi2EventNotificationReply_t eventreply;
6835 /*
6836 * Generate a system event to let anyone who cares know that a
6837 * LOG_ENTRY_ADDED event has occurred. This is sent no matter what the
6838 * event mask is set to.
6839 */
6842 }
6844 /*
6845 * Record the event only if it is not masked. Determine which dword
6846 * and bit of event mask to test.
6847 */
6859 /*
6860 * Limit data to size in m_event entry
6861 */
6864 }
6869 }
6871 /*
6872 * check for index wrap-around
6873 */
6876 }
6879 /*
6880 * Set flag to send the event.
6881 */
6883 }
6884 }
6886 /*
6887 * Generate a system event if flag is set to let anyone who cares know
6888 * that an event has occurred.
6889 */
6893 }
6894 }
6896 #define SMP_RESET_IN_PROGRESS MPI2_EVENT_SAS_TOPO_LR_SMP_RESET_IN_PROGRESS
6897 /*
6898 * handle sync events from ioc in interrupt
6899 * return value:
6900 * DDI_SUCCESS: The event is handled by this func
6901 * DDI_FAILURE: Event is not handled
6902 */
6903 static int
6905 {
6907 pMpi2EventNotificationReply_t eventreply;
6910 uint_t iocstatus;
6927 "!mptsas_handle_event_sync: event 0x%x, "
6928 "IOCStatus=0x%x, "
6934 "mptsas_handle_event_sync: event 0x%x, "
6935 "IOCStatus=0x%x, "
6939 }
6940 }
6942 /*
6943 * figure out what kind of event we got and handle accordingly
6944 */
6947 {
6948 pMpi2EventDataSasTopologyChangeList_t sas_topo_change_list;
6987 /*
6988 * New expander device added
6989 */
6993 KM_SLEEP);
7005 }
7017 KM_SLEEP);
7030 }
7040 }
7043 }
7054 /*
7055 * Filter out processing of Phy Vacant Status unless
7056 * the reason code is "Not Responding". Process all
7057 * other combinations of Phy Status and Reason Codes.
7058 */
7060 MPI2_EVENT_SAS_TOPO_PHYSTATUS_VACANT) &&
7062 MPI2_EVENT_SAS_TOPO_RC_TARG_NOT_RESPONDING)) {
7064 }
7070 {
7077 MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK) >>
7078 MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT;
7115 }
7116 /*
7117 * New target device added into the system.
7118 * Set association flag according to if an
7119 * expander is used or not.
7120 */
7121 exp_flag =
7122 MPTSAS_TOPO_FLAG_EXPANDER_ATTACHED_DEVICE;
7124 MPTSAS_TOPO_FLAG_EXPANDER_ASSOCIATED) {
7126 }
7129 KM_SLEEP);
7132 MPTSAS_DR_EVENT_RECONFIG_TARGET;
7134 /*
7135 * Per MPI 2, if expander dev handle
7136 * is 0, it's a directly attached
7137 * device. So driver use PHY to decide
7138 * which iport is associated
7139 */
7142 }
7152 }
7154 }
7156 {
7160 /*
7161 * Set association flag according to if an
7162 * expander is used or not.
7163 */
7164 exp_flag =
7165 MPTSAS_TOPO_FLAG_EXPANDER_ATTACHED_DEVICE;
7167 MPTSAS_TOPO_FLAG_EXPANDER_ASSOCIATED) {
7169 }
7170 /*
7171 * Target device is removed from the system
7172 * Before the device is really offline from
7173 * from system.
7174 */
7177 /*
7178 * If ptgt is NULL here, it means that the
7179 * DevHandle is not in the hash table. This is
7180 * reasonable sometimes. For example, if a
7181 * disk was pulled, then added, then pulled
7182 * again, the disk will not have been put into
7183 * the hash table because the add event will
7184 * have an invalid phymask. BUT, this does not
7185 * mean that the DevHandle is invalid. The
7186 * controller will still have a valid DevHandle
7187 * that must be removed. To do this, use the
7188 * MPTSAS_TOPO_FLAG_REMOVE_HANDLE event.
7189 */
7193 KM_SLEEP);
7197 MPTSAS_TOPO_FLAG_REMOVE_HANDLE;
7203 topo_node;
7207 }
7209 }
7211 /*
7212 * Update DR flag immediately avoid I/O failure
7213 * before failover finish. Pay attention to the
7214 * mutex protect, we need grab m_tx_waitq_mutex
7215 * during set m_dr_flag because we won't add
7216 * the following command into waitq, instead,
7217 * we need return TRAN_BUSY in the tran_start
7218 * context.
7219 */
7226 KM_SLEEP);
7231 MPTSAS_DR_EVENT_OFFLINE_TARGET;
7240 }
7242 }
7247 MPI2_EVENT_SAS_TOPO_LR_CURRENT_MASK) >>
7248 MPI2_EVENT_SAS_TOPO_LR_CURRENT_SHIFT;
7255 ESC_SAS_PHY_EVENT,
7256 SAS_PHY_REMOVE,
7259 negotiated_link_rate
7266 ESC_SAS_PHY_EVENT,
7267 SAS_PHY_OFFLINE,
7284 }
7286 ESC_SAS_PHY_EVENT,
7287 SAS_PHY_ONLINE,
7296 }
7298 ESC_SAS_PHY_EVENT,
7299 SAS_PHY_ONLINE,
7308 }
7310 ESC_SAS_PHY_EVENT,
7311 SAS_PHY_ONLINE,
7320 }
7322 ESC_SAS_PHY_EVENT,
7323 SAS_PHY_ONLINE,
7330 }
7333 MPI2_EVENT_SAS_TOPO_LR_PREV_MASK) >>
7334 MPI2_EVENT_SAS_TOPO_LR_PREV_SHIFT;
7369 }
7377 "target not responding, delaying "
7380 }
7383 prev));
7384 }
7386 /*
7387 * Launch DR taskq to handle topology change
7388 */
7397 }
7400 }
7401 }
7403 }
7405 {
7433 {
7439 KM_SLEEP);
7443 MPTSAS_DR_EVENT_RECONFIG_TARGET;
7447 MPTSAS_TOPO_FLAG_RAID_ASSOCIATED;
7454 }
7456 }
7459 {
7467 /*
7468 * Clear any flags related to volume
7469 */
7472 /*
7473 * Update DR flag immediately avoid I/O failure
7474 */
7481 KM_SLEEP);
7486 MPTSAS_DR_EVENT_OFFLINE_TARGET;
7489 MPTSAS_TOPO_FLAG_RAID_ASSOCIATED;
7496 }
7498 }
7501 {
7507 /*
7508 * Update DR flag immediately avoid I/O failure
7509 */
7516 KM_SLEEP);
7521 MPTSAS_DR_EVENT_OFFLINE_TARGET;
7524 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED;
7531 }
7533 }
7536 {
7537 /*
7538 * The physical drive is released by a IR
7539 * volume. But we cannot get the the physport
7540 * or phynum from the event data, so we only
7541 * can get the physport/phynum after SAS
7542 * Device Page0 request for the devhdl.
7543 */
7546 KM_SLEEP);
7550 MPTSAS_DR_EVENT_RECONFIG_TARGET;
7553 MPTSAS_TOPO_FLAG_RAID_PHYSDRV_ASSOCIATED;
7561 }
7563 }
7566 }
7567 }
7570 /*
7571 * Launch DR taskq to handle topology change
7572 */
7581 }
7584 }
7585 }
7587 }
7590 }
7593 }
7595 /*
7596 * handle events from ioc
7597 */
7598 static void
7600 {
7602 pMpi2EventNotificationReply_t eventreply;
7607 uint_t iocstatus;
7614 /*
7615 * If HBA is being reset, drop incoming event.
7616 */
7621 }
7632 "!mptsas_handle_event: IOCStatus=0x%x, "
7638 "mptsas_handle_event: IOCStatus=0x%x, "
7642 }
7643 }
7645 /*
7646 * figure out what kind of event we got and handle accordingly
7647 */
7655 iocloginfo));
7664 {
7669 sasdiscovery =
7690 }
7696 }
7701 {
7702 pMpi2EventDataTaskSetFull_t taskfull;
7710 }
7712 {
7713 /*
7714 * SAS TOPOLOGY CHANGE LIST Event has already been handled
7715 * in mptsas_handle_event_sync() of interrupt context
7716 */
7718 }
7720 {
7721 pMpi2EventDataSasEnclDevStatusChange_t encstatus;
7739 }
7745 }
7747 /*
7748 * MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE is handled by
7749 * mptsas_handle_event_sync,in here just send ack message.
7750 */
7752 {
7753 pMpi2EventDataSasDeviceStatusChange_t statuschange;
7772 wwn));
7824 }
7826 }
7828 {
7829 /*
7830 * IR TOPOLOGY CHANGE LIST Event has already been handled
7831 * in mpt_handle_event_sync() of interrupt context
7832 */
7834 }
7836 {
7864 rc);
7865 }
7871 }
7873 {
7874 pMpi2EventDataSasBroadcastPrimitive_t sas_broadcast;
7889 ESC_SAS_HBA_PORT_BROADCAST,
7890 SAS_PORT_BROADCAST_CHANGE,
7895 ESC_SAS_HBA_PORT_BROADCAST,
7896 SAS_PORT_BROADCAST_SES,
7901 ESC_SAS_HBA_PORT_BROADCAST,
7902 SAS_PORT_BROADCAST_D01_4,
7907 ESC_SAS_HBA_PORT_BROADCAST,
7908 SAS_PORT_BROADCAST_D04_7,
7913 ESC_SAS_HBA_PORT_BROADCAST,
7914 SAS_PORT_BROADCAST_D16_7,
7919 ESC_SAS_HBA_PORT_BROADCAST,
7920 SAS_PORT_BROADCAST_D29_7,
7925 ESC_SAS_HBA_PORT_BROADCAST,
7926 SAS_PORT_BROADCAST_D24_0,
7931 ESC_SAS_HBA_PORT_BROADCAST,
7932 SAS_PORT_BROADCAST_D27_4,
7940 }
7945 }
7947 {
7962 /*
7963 * Get latest RAID info and then find the DevHandle for this
7964 * event in the configuration. If the DevHandle is not found
7965 * just exit the event.
7966 */
7975 }
7976 }
7977 }
7980 }
7984 {
7987 state;
7991 ", auto-config of hot-swap drives is %s"
7992 ", write caching is %s"
7995 MPI2_RAIDVOL0_SETTING_AUTO_CONFIG_HSWAP_DISABLE
7997 i == MPI2_RAIDVOL0_SETTING_UNCHANGED
7999 i == MPI2_RAIDVOL0_SETTING_DISABLE_WRITE_CACHING
8001 i == MPI2_RAIDVOL0_SETTING_ENABLE_WRITE_CACHING
8006 }
8008 {
8014 state == MPI2_RAID_VOL_STATE_OPTIMAL
8016 state == MPI2_RAID_VOL_STATE_DEGRADED
8018 state == MPI2_RAID_VOL_STATE_ONLINE
8020 state == MPI2_RAID_VOL_STATE_INITIALIZING
8022 state == MPI2_RAID_VOL_STATE_FAILED
8024 state == MPI2_RAID_VOL_STATE_MISSING
8028 }
8030 {
8036 vol,
8037 state & MPI2_RAIDVOL0_STATUS_FLAG_ENABLED
8039 state & MPI2_RAIDVOL0_STATUS_FLAG_QUIESCED
8041 state & MPI2_RAIDVOL0_STATUS_FLAG_VOLUME_INACTIVE
8043 state &
8044 MPI2_RAIDVOL0_STATUS_FLAG_BAD_BLOCK_TABLE_FULL
8046 state &
8047 MPI2_RAIDVOL0_STATUS_FLAG_RESYNC_IN_PROGRESS
8049 state & MPI2_RAIDVOL0_STATUS_FLAG_BACKGROUND_INIT
8051 state &
8052 MPI2_RAIDVOL0_STATUS_FLAG_CAPACITY_EXPANSION
8054 state &
8055 MPI2_RAIDVOL0_STATUS_FLAG_CONSISTENCY_CHECK
8057 state & MPI2_RAIDVOL0_STATUS_FLAG_DATA_SCRUB
8060 }
8063 }
8065 }
8067 {
8093 " PhysDiskNum %d with DevHandle 0x%x in slot %d "
8094 "for enclosure with handle 0x%x is now in hot "
8103 " PhysDiskNum %d with DevHandle 0x%x in slot %d "
8104 "for enclosure with handle 0x%x is now "
8106 enchandle,
8107 status & MPI2_PHYSDISK0_STATUS_FLAG_INACTIVE_VOLUME
8109 status & MPI2_PHYSDISK0_STATUS_FLAG_OUT_OF_SYNC
8111 status & MPI2_PHYSDISK0_STATUS_FLAG_QUIESCED
8113 status &
8114 MPI2_PHYSDISK0_STATUS_FLAG_WRITE_CACHE_ENABLED
8116 status & MPI2_PHYSDISK0_STATUS_FLAG_OCE_TARGET
8122 " PhysDiskNum %d with DevHandle 0x%x in slot %d "
8125 state == MPI2_RAID_PD_STATE_OPTIMAL
8127 state == MPI2_RAID_PD_STATE_REBUILDING
8129 state == MPI2_RAID_PD_STATE_DEGRADED
8131 state == MPI2_RAID_PD_STATE_HOT_SPARE
8133 state == MPI2_RAID_PD_STATE_ONLINE
8135 state == MPI2_RAID_PD_STATE_OFFLINE
8137 state == MPI2_RAID_PD_STATE_NOT_COMPATIBLE
8139 state == MPI2_RAID_PD_STATE_NOT_CONFIGURED
8143 }
8145 }
8150 }
8152 /*
8153 * Return the reply frame to the free queue.
8154 */
8158 DDI_DMA_SYNC_FORDEV);
8161 }
8165 }
8167 /*
8168 * invoked from timeout() to restart qfull cmds with throttle == 0
8169 */
8170 static void
8172 {
8185 MAX_THROTTLE);
8186 }
8187 }
8188 }
8191 }
8193 void
8195 {
8203 /*
8204 * Task Management cmds are removed in their own routines. Also,
8205 * we don't want to modify timeout based on TM cmds.
8206 */
8209 }
8213 /*
8214 * remove the cmd.
8215 */
8222 /*
8223 * only decrement per target ncmds if command
8224 * has a target associated with it.
8225 */
8228 /*
8229 * reset throttle if we just ran an untagged command
8230 * to a tagged target
8231 */
8235 }
8237 /*
8238 * Remove this command from the active queue.
8239 */
8242 cmd_active_link);
8244 }
8245 }
8246 }
8248 /*
8249 * This is all we need to do for ioc commands.
8250 */
8254 }
8257 }
8259 /*
8260 * accept all cmds on the tx_waitq if any and then
8261 * start a fresh request from the top of the device queue.
8262 *
8263 * since there are always cmds queued on the tx_waitq, and rare cmds on
8264 * the instance waitq, so this function should not be invoked in the ISR,
8265 * the mptsas_restart_waitq() is invoked in the ISR instead. otherwise, the
8266 * burden belongs to the IO dispatch CPUs is moved the interrupt CPU.
8267 */
8268 static void
8270 {
8276 }
8279 }
8281 /*
8282 * start a fresh request from the top of the device queue
8283 */
8284 static void
8286 {
8294 /*
8295 * If there is a reset delay, don't start any cmds. Otherwise, start
8296 * as many cmds as possible.
8297 * Since SMID 0 is reserved and the TM slot is reserved, the actual max
8298 * commands is m_max_requests - 2.
8299 */
8306 /*
8307 * passthru command get slot need
8308 * set CFLAG_PREPARED.
8309 */
8313 }
8316 }
8319 /*
8320 * Send the config page request and delete it
8321 * from the waitq.
8322 */
8326 }
8329 }
8332 /*
8333 * Send the FW Diag request and delete if from
8334 * the waitq.
8335 */
8339 }
8342 }
8348 }
8356 }
8357 }
8359 }
8360 }
8361 /*
8362 * Cmds are queued if tran_start() doesn't get the m_mutexlock(no wait).
8363 * Accept all those queued cmds before new cmd is accept so that the
8364 * cmds are sent in order.
8365 */
8366 static void
8368 {
8374 /*
8375 * A Bus Reset could occur at any time and flush the tx_waitq,
8376 * so we cannot count on the tx_waitq to contain even one cmd.
8377 * And when the m_tx_waitq_mutex is released and run
8378 * mptsas_accept_pkt(), the tx_waitq may be flushed.
8379 */
8385 }
8388 }
8395 }
8396 }
8399 /*
8400 * mpt tag type lookup
8401 */
8405 static int
8407 {
8411 pMpi2SCSIIORequest_t io_request;
8424 /*
8425 * Set SMID and increment index. Rollover to 1 instead of 0 if index
8426 * is at the max. 0 is an invalid SMID, so we call the first index 1.
8427 */
8430 /*
8431 * It is possible for back to back device reset to
8432 * happen before the reset delay has expired. That's
8433 * ok, just let the device reset go out on the bus.
8434 */
8437 }
8439 /*
8440 * if a non-tagged cmd is submitted to an active tagged target
8441 * then drain before submitting this cmd; SCSI-2 allows RQSENSE
8442 * to be untagged
8443 */
8454 }
8459 }
8461 }
8463 /*
8464 * Set correct tag bits.
8465 */
8481 }
8485 }
8487 }
8491 }
8496 /*
8497 * Mapping of the buffer was done in mptsas_pkt_alloc_extern().
8498 * Calculate the DMA address with the same offset.
8499 */
8512 }
8519 MPI2_FUNCTION_SCSI_IO_REQUEST);
8531 }
8533 /*
8534 * setup the Scatter/Gather DMA list for this request
8535 */
8541 MPI2_SGE_FLAGS_END_OF_BUFFER |
8542 MPI2_SGE_FLAGS_SIMPLE_ELEMENT |
8544 }
8546 /*
8547 * save ARQ information
8548 */
8559 DDI_DMA_SYNC_FORDEV);
8561 /*
8562 * Build request descriptor and write it to the request desc post reg.
8563 */
8568 /*
8569 * Start timeout.
8570 */
8573 #ifdef MPTSAS_TEST
8574 /*
8575 * Force timeouts to happen immediately.
8576 */
8579 #endif
8583 /*
8584 * Common case is that this is the last pending expiration
8585 * (or queue is empty). Insert at head of the queue.
8586 */
8589 /*
8590 * Queue is not empty and first element expires later than
8591 * this command. Search for element expiring sooner.
8592 */
8598 }
8599 }
8601 /*
8602 * No element found expiring sooner, append to
8603 * non-empty queue.
8604 */
8606 cmd_active_link);
8607 }
8608 }
8614 }
8616 }
8618 /*
8619 * Select a helper thread to handle current doneq
8620 */
8621 static void
8623 {
8630 /*
8631 * If the completed command on help thread[i] less than
8632 * doneq_thread_threshold, then pick the thread[i]. Otherwise
8633 * pick a thread which has least completed command.
8634 */
8641 }
8645 }
8647 }
8652 }
8654 /*
8655 * move the current global doneq to the doneq of thead[t]
8656 */
8657 static void
8659 {
8667 }
8673 }
8674 }
8676 void
8678 {
8681 /* Check all acc and dma handles */
8683 DDI_SUCCESS) ||
8685 DDI_SUCCESS) ||
8687 DDI_SUCCESS) ||
8689 DDI_SUCCESS) ||
8691 DDI_SUCCESS) ||
8693 DDI_SUCCESS) ||
8695 DDI_SUCCESS) ||
8697 DDI_SUCCESS)) {
8699 DDI_SERVICE_UNAFFECTED);
8701 DDI_FME_VER0);
8704 }
8706 DDI_SUCCESS) ||
8708 DDI_SUCCESS) ||
8710 DDI_SUCCESS) ||
8712 DDI_SUCCESS) ||
8714 DDI_SUCCESS) ||
8716 DDI_SUCCESS)) {
8718 DDI_SERVICE_UNAFFECTED);
8721 }
8727 }
8730 DDI_SUCCESS) ||
8732 DDI_SUCCESS)))) {
8736 }
8737 }
8739 /*
8740 * These routines manipulate the queue of commands that
8741 * are waiting for their completion routines to be called.
8742 * The queue is usually in FIFO order but on an MP system
8743 * it's possible for the completion routines to get out
8744 * of order. If that's a problem you need to add a global
8745 * mutex around the code that calls the completion routine
8746 * in the interrupt handler.
8747 */
8748 static void
8750 {
8762 /*
8763 * only add scsi pkts that have completion routines to
8764 * the doneq. no intr cmds do not have callbacks.
8765 */
8770 }
8771 }
8775 {
8779 /* pop one off the done queue */
8781 /* if the queue is now empty fix the tail pointer */
8785 }
8788 }
8790 }
8792 static void
8794 {
8806 /*
8807 * run the completion routines of all the
8808 * completed commands
8809 */
8813 /* run this command's completion routine */
8818 }
8821 }
8822 }
8824 /*
8825 * These routines manipulate the target's queue of pending requests
8826 */
8827 void
8829 {
8838 }
8844 }
8845 }
8849 {
8862 }
8863 }
8865 }
8867 /*
8868 * remove specified cmd from the middle of the wait queue.
8869 */
8870 static void
8872 {
8881 }
8892 }
8904 }
8906 }
8908 }
8912 {
8921 }
8923 /*
8924 * remove specified cmd from the middle of the tx_waitq.
8925 */
8926 static void
8928 {
8943 }
8955 }
8957 }
8959 }
8961 /*
8962 * device and bus reset handling
8963 *
8964 * Notes:
8965 * - RESET_ALL: reset the controller
8966 * - RESET_TARGET: reset the target specified in scsi_address
8967 */
8968 static int
8970 {
8980 }
8982 level));
8985 /*
8986 * if we are not in panic set up a reset delay for this target
8987 */
8992 }
8996 /*
8997 * The transport layer expect to only see TRUE and
8998 * FALSE. Therefore, we will adjust the return value
8999 * if mptsas_do_scsi_reset returns FAILED.
9000 */
9004 }
9006 static int
9008 {
9016 devhdl);
9017 }
9019 /*
9020 * Issue a Target Reset message to the target specified but not to a
9021 * disk making up a raid volume. Just look through the RAID config
9022 * Phys Disk list of DevHandles. If the target's DevHandle is in this
9023 * list, then don't reset this target.
9024 */
9030 }
9031 }
9032 }
9039 }
9041 static int
9044 {
9051 }
9053 static int
9055 {
9067 }
9068 }
9070 static int
9072 {
9074 }
9076 void
9078 {
9082 /*
9083 * if the bus is draining/quiesced, no changes to the throttles
9084 * are allowed. Not allowing change of throttles during draining
9085 * limits error recovery but will reduce draining time
9086 *
9087 * all throttles should have been set to HOLD_THROTTLE
9088 */
9091 }
9097 }
9098 }
9100 /*
9101 * Clean up from a device reset.
9102 * For the case of target reset, this function clears the waitq of all
9103 * commands for a particular target. For the case of abort task set, this
9104 * function clears the waitq of all commonds for a particular target/lun.
9105 */
9106 static void
9108 {
9112 uchar_t reason;
9113 uint_t stat;
9114 hrtime_t timestamp;
9120 /*
9121 * Make sure the I/O Controller has flushed all cmds
9122 * that are associated with this target for a target reset
9123 * and target/lun for abort task set.
9124 * Account for TM requests, which use the last SMID.
9125 */
9135 /*
9136 * When timeout requested, propagate
9137 * proper reason and statistics to
9138 * target drivers.
9139 */
9142 }
9145 tasktype));
9150 }
9155 /*FALLTHROUGH*/
9161 tasktype));
9165 stat);
9167 }
9171 }
9172 }
9174 /*
9175 * Flush the waitq and tx_waitq of this target's cmds
9176 */
9191 }
9193 }
9205 }
9207 }
9213 /*FALLTHROUGH*/
9222 }
9224 }
9236 }
9238 }
9243 tasktype);
9245 }
9246 }
9248 /*
9249 * Clean up hba state, abort all outstanding command and commands in waitq
9250 * reset timeout of all targets.
9251 */
9252 static void
9254 {
9261 /*
9262 * The I/O Controller should have already sent back
9263 * all commands via the scsi I/O reply frame. Make
9264 * sure all commands have been flushed.
9265 * Account for TM request, which use the last SMID.
9266 */
9272 /*
9273 * Need to make sure to tell everyone that might be
9274 * waiting on this command that it's going to fail. If
9275 * we get here, this command will never timeout because
9276 * the active command table is going to be re-allocated,
9277 * so there will be nothing to check against a time out.
9278 * Instead, mark the command as failed due to reset.
9279 */
9281 STAT_BUS_RESET);
9288 }
9290 }
9293 slot));
9299 }
9301 /*
9302 * Flush the waitq.
9303 */
9315 }
9316 }
9318 /*
9319 * Flush the tx_waitq
9320 */
9327 }
9330 /*
9331 * Drain the taskqs prior to reallocating resources. The thread
9332 * passing through here could be launched from either (dr)
9333 * or (event) taskqs so only wait on the 'other' queue since
9334 * waiting on 'this' queue is a deadlock condition.
9335 */
9343 }
9345 /*
9346 * set pkt_reason and OR in pkt_statistics flag
9347 */
9348 static void
9350 uint_t stat)
9351 {
9352 #ifndef __lock_lint
9354 #endif
9362 }
9364 }
9365 }
9367 static void
9369 {
9378 }
9380 }
9382 static void
9384 {
9394 }
9397 }
9399 /*
9400 * mptsas_watch_reset_delay(_subr) is invoked by timeout() and checks every
9401 * mpt instance for active reset delays
9402 */
9403 static void
9405 {
9406 #ifndef __lock_lint
9408 #endif
9422 }
9426 }
9431 }
9432 }
9434 static int
9436 {
9449 MPTSAS_WATCH_RESET_DELAY_TICK;
9453 MAX_THROTTLE);
9454 restart++;
9457 }
9458 }
9459 }
9463 }
9465 }
9467 #ifdef MPTSAS_TEST
9468 static void
9470 {
9476 }
9479 }
9480 }
9481 }
9482 #endif
9484 /*
9485 * abort handling:
9486 *
9487 * Notes:
9488 * - if pkt is not NULL, abort just that command
9489 * - if pkt is NULL, abort all outstanding commands for target
9490 */
9491 static int
9493 {
9500 tran_tgt_private;
9511 }
9513 static int
9515 {
9522 /*
9523 * Abort the command pkt on the target/lun in ap. If pkt is
9524 * NULL, abort all outstanding commands on that target/lun.
9525 * If you can abort them, return 1, else return 0.
9526 * Each packet that's aborted should be sent back to the target
9527 * driver through the callback routine, with pkt_reason set to
9528 * CMD_ABORTED.
9529 *
9530 * abort cmd pkt on HBA hardware; clean out of outstanding
9531 * command lists, etc.
9532 */
9534 /* abort the specified packet */
9542 STAT_ABORTED);
9546 }
9548 /*
9549 * Have mpt firmware abort this command
9550 */
9557 /*
9558 * The transport layer expects only TRUE and FALSE.
9559 * Therefore, if mptsas_ioc_task_management returns
9560 * FAILED we will return FALSE.
9561 */
9565 }
9566 }
9568 /*
9569 * If pkt is NULL then abort task set
9570 */
9574 /*
9575 * The transport layer expects only TRUE and FALSE.
9576 * Therefore, if mptsas_ioc_task_management returns
9577 * FAILED we will return FALSE.
9578 */
9582 #ifdef MPTSAS_TEST
9585 }
9586 #endif
9588 done:
9591 }
9593 /*
9594 * capability handling:
9595 * (*tran_getcap). Get the capability named, and return its value.
9596 */
9597 static int
9599 {
9612 }
9652 MPI2_IOCFACTS_CAPABILITY_TLR)
9654 else
9660 }
9666 }
9668 /*
9669 * (*tran_setcap). Set the capability named to the value given.
9670 */
9671 static int
9673 {
9683 }
9690 }
9700 /*
9701 * None of these are settable via
9702 * the capability interface.
9703 */
9706 /*
9707 * We cannot turn off arq so return false if asked to
9708 */
9713 }
9718 MAX_THROTTLE);
9735 }
9738 }
9740 /*
9741 * Utility routine for mptsas_ifsetcap/ifgetcap
9742 */
9743 /*ARGSUSED*/
9744 static int
9746 {
9754 }
9756 static int
9758 {
9763 /*
9764 * if there are active commands, then we cannot
9765 * change size of active slots array.
9766 */
9774 }
9775 /*
9776 * Since SMID 0 is reserved and the TM slot is reserved, the
9777 * number of slots that can be used at any one time is
9778 * m_max_requests - 2.
9779 */
9788 }
9790 static void
9792 {
9801 }
9803 /*
9804 * Error logging, printing, and debug print routines.
9805 */
9808 /*PRINTFLIKE3*/
9809 void
9811 {
9819 }
9831 }
9834 }
9836 #ifdef MPTSAS_DEBUG
9837 /*
9838 * Use a circular buffer to log messages to private memory.
9839 * Increment idx atomically to minimize risk to miss lines.
9840 * It's fast and does not hold up the proceedings too much.
9841 */
9847 /*PRINTFLIKE1*/
9848 void
9850 {
9861 }
9863 /*PRINTFLIKE1*/
9864 void
9866 {
9876 #ifdef PROM_PRINTF
9878 #else
9880 #endif
9882 }
9883 #endif
9885 /*
9886 * timeout handling
9887 */
9888 static void
9890 {
9891 #ifndef __lock_lint
9893 #endif
9905 /* Skip device if not powered on */
9913 }
9914 }
9916 /*
9917 * Check if controller is in a FAULT state. If so, reset it.
9918 */
9928 }
9929 }
9931 /*
9932 * For now, always call mptsas_watchsubr.
9933 */
9939 }
9942 }
9949 }
9951 static void
9953 {
9956 /*
9957 * If we were draining due to a qfull condition,
9958 * go back to full throttle.
9959 */
9965 }
9972 /*
9973 * Earliest command timeout expired. Drain throttle.
9974 */
9977 /*
9978 * Check for remaining commands.
9979 */
9982 /*
9983 * Wait for remaining commands to complete or
9984 * time out.
9985 */
9988 }
9990 /*
9991 * All command timeouts expired.
9992 */
10003 }
10004 }
10006 static void
10008 {
10018 #ifdef MPTSAS_TEST
10020 mptsas_test_untagged++;
10021 }
10022 #endif
10024 /*
10025 * Check for commands stuck in active slot
10026 * Account for TM requests, which use the last SMID.
10027 */
10032 /*
10033 * There seems to be a command stuck
10034 * in the active slot. Drain throttle.
10035 */
10038 DRAIN_THROTTLE);
10041 CFLAG_FW_DIAG)) {
10042 /*
10043 * passthrough command timeout
10044 */
10046 CFLAG_TIMEOUT);
10050 }
10051 }
10052 }
10053 }
10058 }
10063 }
10064 }
10066 /*
10067 * timeout recovery
10068 */
10069 static void
10071 {
10084 }
10091 /*
10092 * Abort all outstanding commands on the device.
10093 */
10098 }
10099 }
10101 /*
10102 * Device / Hotplug control
10103 */
10104 static int
10106 {
10115 }
10117 static int
10119 {
10128 }
10130 static int
10132 {
10138 /* Set all the throttles to zero */
10142 }
10144 /* If there are any outstanding commands in the queue */
10150 /*
10151 * Quiesce has been interrupted
10152 */
10157 }
10165 }
10169 /* Bus has been quiesced */
10175 }
10176 }
10177 /* Bus was not busy - QUIESCED */
10181 }
10183 static int
10185 {
10194 }
10198 }
10200 static void
10202 {
10210 /* Command queue has been drained */
10213 /*
10214 * The throttle may have been reset because
10215 * of a SCSI bus reset
10216 */
10220 }
10225 }
10226 }
10228 }
10230 /*ARGSUSED*/
10231 static void
10233 {
10244 }
10252 }
10254 static void
10256 pMpi2SGESimple64_t sgep)
10257 {
10260 ddi_dma_cookie_t data_cookie;
10261 ddi_dma_cookie_t dataout_cookie;
10271 MPI2_SGE_FLAGS_END_OF_BUFFER |
10272 MPI2_SGE_FLAGS_HOST_TO_IOC |
10273 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
10274 MPI2_SGE_FLAGS_SHIFT);
10282 sgep++;
10283 }
10286 MPI2_SGE_FLAGS_LAST_ELEMENT |
10287 MPI2_SGE_FLAGS_END_OF_BUFFER |
10288 MPI2_SGE_FLAGS_END_OF_LIST |
10289 MPI2_SGE_FLAGS_64_BIT_ADDRESSING) <<
10290 MPI2_SGE_FLAGS_SHIFT);
10293 MPI2_SGE_FLAGS_SHIFT);
10296 MPI2_SGE_FLAGS_SHIFT);
10297 }
10299 sge_flags);
10305 }
10307 static void
10309 pMpi2IeeeSgeSimple64_t ieeesgep)
10310 {
10313 ddi_dma_cookie_t data_cookie;
10314 ddi_dma_cookie_t dataout_cookie;
10322 MPI2_IEEE_SGE_FLAGS_SYSTEM_ADDR);
10331 ieeesgep++;
10332 }
10340 }
10342 static void
10344 {
10345 caddr_t memp;
10346 pMPI2RequestHeader_t request_hdrp;
10365 /*
10366 * Store the passthrough message in memory location
10367 * corresponding to our slot number
10368 */
10375 }
10382 /*
10383 * Add an SGE, even if the length is zero.
10384 */
10393 }
10398 pMpi2SCSIIORequest_t scsi_io_req;
10399 caddr_t arsbuf;
10407 /*
10408 * Mapping of the buffer was done in
10409 * mptsas_do_passthru().
10410 * Calculate the DMA address with the same offset.
10411 */
10425 }
10430 ars_dmaaddrlow);
10432 /*
10433 * Put SGE for data and data_out buffer at the end of
10434 * scsi_io_request message header.(64 bytes in total)
10435 * Set SGLOffset0 value
10436 */
10440 /*
10441 * Setup descriptor info. RAID passthrough must use the
10442 * default request descriptor which is already set, so if this
10443 * is a SCSI IO request, change the descriptor to SCSI IO.
10444 */
10449 }
10451 DDI_DMA_SYNC_FORDEV);
10452 }
10454 /*
10455 * We must wait till the message has been completed before
10456 * beginning the next message so we wait for this one to
10457 * finish.
10458 */
10466 }
10467 }
10482 /*
10483 * Prepare the pt for a SAS2 FW_DOWNLOAD request.
10484 */
10485 static void
10487 {
10488 pMpi2FWDownloadTCSGE_t tcsge;
10489 pMpi2FWDownloadRequest req;
10491 /*
10492 * If SAS3, call separate function.
10493 */
10497 }
10499 /*
10500 * User requests should come in with the Transaction
10501 * context element where the SGL will go. Putting the
10502 * SGL after that seems to work, but don't really know
10503 * why. Other drivers tend to create an extra SGL and
10504 * refer to the TCE through that.
10505 */
10511 }
10524 }
10526 /*
10527 * Prepare the pt for a SAS3 FW_DOWNLOAD request.
10528 */
10529 static void
10531 {
10532 pMpi2FWDownloadTCSGE_t tcsge;
10533 pMpi2FWDownloadRequest req2;
10534 pMpi25FWDownloadRequest req25;
10536 /*
10537 * User requests should come in with the Transaction
10538 * context element where the SGL will go. The new firmware
10539 * Doesn't use TCE and has space in the main request for
10540 * this information. So move to the right place.
10541 */
10548 }
10562 }
10564 /*
10565 * Prepare the pt for a SAS2 FW_UPLOAD request.
10566 */
10567 static void
10569 {
10570 pMpi2FWUploadTCSGE_t tcsge;
10571 pMpi2FWUploadRequest_t req;
10573 /*
10574 * If SAS3, call separate function.
10575 */
10579 }
10581 /*
10582 * User requests should come in with the Transaction
10583 * context element where the SGL will go. Putting the
10584 * SGL after that seems to work, but don't really know
10585 * why. Other drivers tend to create an extra SGL and
10586 * refer to the TCE through that.
10587 */
10593 }
10606 }
10608 /*
10609 * Prepare the pt a SAS3 FW_UPLOAD request.
10610 */
10611 static void
10613 {
10614 pMpi2FWUploadTCSGE_t tcsge;
10615 pMpi2FWUploadRequest_t req2;
10616 pMpi25FWUploadRequest_t req25;
10618 /*
10619 * User requests should come in with the Transaction
10620 * context element where the SGL will go. The new firmware
10621 * Doesn't use TCE and has space in the main request for
10622 * this information. So move to the right place.
10623 */
10630 }
10644 }
10646 /*
10647 * Prepare the pt for an IOC_FACTS request.
10648 */
10649 static void
10651 {
10652 #ifndef __lock_lint
10654 #endif
10666 }
10668 /*
10669 * Prepare the pt for a PORT_FACTS request.
10670 */
10671 static void
10673 {
10674 #ifndef __lock_lint
10676 #endif
10688 }
10690 /*
10691 * Prepare pt for a SATA_PASSTHROUGH request.
10692 */
10693 static void
10695 {
10696 #ifndef __lock_lint
10698 #endif
10709 }
10711 static void
10713 {
10714 #ifndef __lock_lint
10716 #endif
10727 }
10729 /*
10730 * Prepare pt for a CONFIG request.
10731 */
10732 static void
10734 {
10735 #ifndef __lock_lint
10737 #endif
10748 }
10750 /*
10751 * Prepare pt for a SCSI_IO_REQ request.
10752 */
10753 static void
10755 {
10756 #ifndef __lock_lint
10758 #endif
10769 }
10771 /*
10772 * Prepare the mptsas_cmd for a SAS_IO_UNIT_CONTROL request.
10773 */
10774 static void
10776 {
10777 #ifndef __lock_lint
10779 #endif
10781 }
10783 /*
10784 * A set of functions to prepare an mptsas_cmd for the various
10785 * supported requests.
10786 */
10788 U8 Function;
10797 mpi_pre_sata_passthrough },
10799 mpi_pre_smp_passthrough},
10801 mpi_pre_scsi_io_req},
10804 mpi_pre_sas_io_unit_control },
10806 };
10808 static void
10810 {
10811 pMPI2RequestHeader_t hdr;
10823 }
10824 }
10829 }
10832 static int
10837 {
10838 mptsas_pt_request_t pt;
10839 mptsas_dma_alloc_state_t data_dma_state;
10840 mptsas_dma_alloc_state_t dataout_dma_state;
10841 caddr_t memp;
10845 pMPI2RequestHeader_t request_hdrp;
10846 pMPI2RequestHeader_t request_msg;
10847 pMPI2DefaultReply_t reply_msg;
10848 Mpi2SCSIIOReply_t rep_msg;
10860 /*
10861 * copy in the request buffer since it could be used by
10862 * another thread when the pt request into waitq
10863 */
10869 }
10876 pMpi2SCSITaskManagementRequest_t task;
10881 mode);
10886 }
10888 }
10897 }
10909 }
10910 }
10912 }
10915 }
10924 }
10935 }
10936 }
10940 }
10946 }
10965 /*
10966 * Form a blank cmd/pkt to store the acknowledgement message
10967 */
10979 boolean_t ret;
10994 }
11003 }
11010 /*
11011 * Save the command in a slot
11012 */
11014 /*
11015 * Once passthru command get slot, set cmd_flags
11016 * CFLAG_PREPARED.
11017 */
11022 }
11026 }
11036 }
11043 }
11046 /*
11047 * cmd_rfm is zero means the command reply is a CONTEXT
11048 * reply and no PCI Write to post the free reply SMFA
11049 * because no reply message frame is used.
11050 * cmd_rfm is non-zero means the reply is a ADDRESS
11051 * reply and reply message frame is used.
11052 */
11055 DDI_DMA_SYNC_FORCPU);
11059 }
11066 }
11071 }
11077 }
11091 }
11095 mode)) {
11101 }
11102 }
11111 }
11112 }
11113 }
11118 DDI_DMA_SYNC_FORCPU);
11122 mode)) {
11128 }
11129 }
11130 }
11131 }
11133 out:
11134 /*
11135 * Put the reply frame back on the free queue, increment the free
11136 * index, and write the new index to the free index register. But only
11137 * if this reply is an ADDRESS reply.
11138 */
11144 DDI_DMA_SYNC_FORDEV);
11147 }
11150 }
11155 }
11159 }
11160 }
11165 DDI_SUCCESS) {
11167 DDI_SERVICE_UNAFFECTED);
11169 }
11171 }
11174 DDI_SUCCESS) {
11176 DDI_SERVICE_UNAFFECTED);
11178 }
11180 }
11184 }
11185 }
11191 }
11193 static int
11195 {
11196 /*
11197 * If timeout is 0, set timeout to default of 60 seconds.
11198 */
11201 }
11214 }
11215 /*
11216 * Send passthru request messages
11217 */
11228 }
11229 }
11231 static uint8_t
11233 {
11239 }
11240 }
11243 }
11245 static void
11247 {
11248 pMpi2DiagBufferPostRequest_t pDiag_post_msg;
11249 pMpi2DiagReleaseRequest_t pDiag_release_msg;
11257 /*
11258 * Form the diag message depending on the post or release function.
11259 */
11276 i++) {
11280 }
11299 }
11301 /*
11302 * Send the message
11303 */
11305 DDI_DMA_SYNC_FORDEV);
11307 MPI2_REQ_DESCRIPT_FLAGS_DEFAULT_TYPE;
11311 DDI_SUCCESS) ||
11313 DDI_SUCCESS)) {
11315 }
11316 }
11318 static int
11321 {
11322 mptsas_diag_request_t diag;
11326 pMpi2DiagBufferPostReply_t reply;
11330 /*
11331 * If buffer is not enabled, just leave.
11332 */
11337 }
11339 /*
11340 * Clear some flags initially.
11341 */
11346 /*
11347 * Get a cmd buffer from the cmd buffer pool
11348 */
11353 }
11364 /*
11365 * Form a blank cmd/pkt to store the acknowledgement message
11366 */
11373 /*
11374 * Save the command in a slot
11375 */
11377 /*
11378 * Once passthru command get slot, set cmd_flags
11379 * CFLAG_PREPARED.
11380 */
11385 }
11389 }
11395 }
11397 /*
11398 * cmd_rfm points to the reply message if a reply was given. Check the
11399 * IOCStatus to make sure everything went OK with the FW diag request
11400 * and set buffer flags.
11401 */
11405 DDI_DMA_SYNC_FORCPU);
11410 /*
11411 * Get the reply message data
11412 */
11420 /*
11421 * If post failed quit.
11422 */
11429 }
11431 /*
11432 * Post was successful.
11433 */
11438 }
11440 out:
11441 /*
11442 * Put the reply frame back on the free queue, increment the free
11443 * index, and write the new index to the free index register. But only
11444 * if this reply is an ADDRESS reply.
11445 */
11451 DDI_DMA_SYNC_FORDEV);
11454 }
11457 }
11461 }
11464 }
11467 }
11469 static int
11473 {
11474 mptsas_diag_request_t diag;
11478 pMpi2DiagReleaseReply_t reply;
11482 /*
11483 * If buffer is not enabled, just leave.
11484 */
11491 }
11493 /*
11494 * Clear some flags initially.
11495 */
11500 /*
11501 * Get a cmd buffer from the cmd buffer pool
11502 */
11508 }
11519 /*
11520 * Form a blank cmd/pkt to store the acknowledgement message
11521 */
11528 /*
11529 * Save the command in a slot
11530 */
11532 /*
11533 * Once passthru command get slot, set cmd_flags
11534 * CFLAG_PREPARED.
11535 */
11540 }
11544 }
11550 }
11552 /*
11553 * cmd_rfm points to the reply message if a reply was given. Check the
11554 * IOCStatus to make sure everything went OK with the FW diag request
11555 * and set buffer flags.
11556 */
11560 DDI_DMA_SYNC_FORCPU);
11565 /*
11566 * Get the reply message data
11567 */
11573 /*
11574 * If release failed quit.
11575 */
11581 iocloginfo));
11583 }
11585 /*
11586 * Release was successful.
11587 */
11591 /*
11592 * If this was for an UNREGISTER diag type command, clear the
11593 * unique ID.
11594 */
11597 }
11598 }
11600 out:
11601 /*
11602 * Put the reply frame back on the free queue, increment the free
11603 * index, and write the new index to the free index register. But only
11604 * if this reply is an ADDRESS reply.
11605 */
11611 DDI_DMA_SYNC_FORDEV);
11614 }
11617 }
11621 }
11624 }
11627 }
11629 static int
11632 {
11646 /*
11647 * Check for valid buffer type
11648 */
11652 }
11654 /*
11655 * Get the current buffer and look up the unique ID. The unique ID
11656 * should not be found. If it is, the ID is already in use.
11657 */
11663 }
11665 /*
11666 * The buffer's unique ID should not be registered yet, and the given
11667 * unique ID cannot be 0.
11668 */
11673 }
11675 /*
11676 * If this buffer is already posted as immediate, just change owner.
11677 */
11683 }
11685 /*
11686 * Post a new buffer after checking if it's enabled. The DMA buffer
11687 * that is allocated will be contiguous (sgl_len = 1).
11688 */
11692 }
11700 }
11702 /*
11703 * Copy the given info to the diag buffer and post the buffer.
11704 */
11709 i++) {
11712 }
11713 }
11719 DDI_SUCCESS) {
11724 }
11726 /*
11727 * In case there was a failure, free the DMA buffer.
11728 */
11731 }
11734 }
11736 static int
11739 {
11749 /*
11750 * Get the current buffer and look up the unique ID. The unique ID
11751 * should be there.
11752 */
11757 }
11761 /*
11762 * Try to release the buffer from FW before freeing it. If release
11763 * fails, don't free the DMA buffer in case FW tries to access it
11764 * later. If buffer is not owned by firmware, can't release it.
11765 */
11771 }
11773 /*
11774 * At this point, return the current status no matter what happens with
11775 * the DMA buffer.
11776 */
11780 DDI_SUCCESS) {
11784 DDI_SERVICE_UNAFFECTED);
11785 }
11787 }
11790 }
11792 static int
11795 {
11804 /*
11805 * If ID is valid, query on ID.
11806 * If ID is invalid, query on buffer type.
11807 */
11813 }
11819 }
11820 }
11822 /*
11823 * Fill query structure with the diag buffer info.
11824 */
11830 i++) {
11833 }
11834 }
11841 /*
11842 * Set/Clear application flags
11843 */
11848 }
11851 MPTSAS_FW_DIAG_FLAG_BUFFER_VALID;
11855 }
11858 MPTSAS_FW_DIAG_FLAG_FW_BUFFER_ACCESS;
11862 }
11865 }
11867 static int
11871 {
11881 /*
11882 * Get the current buffer and look up the unique ID. The unique ID
11883 * should be there.
11884 */
11889 }
11893 /*
11894 * Make sure requested read is within limits
11895 */
11900 }
11902 /*
11903 * Copy the requested data from DMA to the diag_read_buffer. The DMA
11904 * buffer that was allocated is one contiguous buffer.
11905 */
11909 DDI_DMA_SYNC_FORCPU);
11914 }
11915 }
11918 /*
11919 * Set or clear the Force Release flag.
11920 */
11925 }
11927 /*
11928 * If buffer is to be reregistered, make sure it's not already owned by
11929 * firmware first.
11930 */
11935 return_code);
11936 }
11937 }
11940 }
11942 static int
11945 {
11955 /*
11956 * Get the current buffer and look up the unique ID. The unique ID
11957 * should be there.
11958 */
11963 }
11967 /*
11968 * If buffer is not owned by firmware, it's already been released.
11969 */
11973 }
11975 /*
11976 * Release the buffer.
11977 */
11979 MPTSAS_FW_DIAG_TYPE_RELEASE);
11981 }
11983 static int
11986 {
11987 mptsas_fw_diag_register_t diag_register;
11988 mptsas_fw_diag_unregister_t diag_unregister;
11989 mptsas_fw_diag_query_t diag_query;
11990 mptsas_diag_read_buffer_t diag_read_buffer;
11991 mptsas_fw_diag_release_t diag_release;
12004 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
12007 }
12011 }
12013 return_code);
12019 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
12022 }
12026 }
12028 return_code);
12034 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
12037 }
12041 }
12043 return_code);
12048 }
12049 }
12056 }
12062 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
12065 }
12069 ioctl_mode);
12075 }
12076 }
12082 MPTSAS_FW_DIAG_ERROR_INVALID_PARAMETER;
12085 }
12089 }
12091 return_code);
12098 }
12104 }
12107 }
12109 static int
12111 {
12113 mptsas_diag_action_t driver_data;
12117 /*
12118 * Copy the user data to a driver data buffer.
12119 */
12122 /*
12123 * Send diag action request if Action is valid
12124 */
12133 mode);
12142 }
12145 }
12148 }
12151 }
12154 }
12156 /*
12157 * This routine handles the "event query" ioctl.
12158 */
12159 static int
12162 {
12164 mptsas_event_query_t driverdata;
12172 }
12180 }
12183 }
12185 /*
12186 * This routine handles the "event enable" ioctl.
12187 */
12188 static int
12191 {
12193 mptsas_event_enable_t driverdata;
12200 }
12207 }
12209 }
12211 /*
12212 * This routine handles the "event report" ioctl.
12213 */
12214 static int
12217 {
12219 mptsas_event_report_t driverdata;
12241 }
12245 }
12246 }
12250 }
12253 }
12257 }
12259 static void
12261 {
12263 uint_t reglen;
12265 /*
12266 * Lookup the 'reg' property and extract the other data
12267 */
12270 DDI_PROP_SUCCESS) {
12271 /*
12272 * Extract the PCI data from the 'reg' property first DWORD.
12273 * The entry looks like the following:
12274 * First DWORD:
12275 * Bits 0 - 7 8-bit Register number
12276 * Bits 8 - 10 3-bit Function number
12277 * Bits 11 - 15 5-bit Device number
12278 * Bits 16 - 23 8-bit Bus number
12279 * Bits 24 - 25 2-bit Address Space type identifier
12280 *
12281 */
12290 /*
12291 * If we can't determine the PCI data then we fill in FF's for
12292 * the data to indicate this.
12293 */
12297 }
12299 /*
12300 * Saved in the mpt->m_fwversion
12301 */
12303 }
12305 static void
12307 {
12312 MPTIOCTL_ADAPTER_TYPE_SAS3 :
12313 MPTIOCTL_ADAPTER_TYPE_SAS2;
12321 }
12323 static void
12325 {
12327 uint_t reglen;
12329 /*
12330 * Lookup the 'reg' property and extract the other data
12331 */
12334 DDI_PROP_SUCCESS) {
12335 /*
12336 * Extract the PCI data from the 'reg' property first DWORD.
12337 * The entry looks like the following:
12338 * First DWORD:
12339 * Bits 8 - 10 3-bit Function number
12340 * Bits 11 - 15 5-bit Device number
12341 * Bits 16 - 23 8-bit Bus number
12342 */
12348 /*
12349 * If we can't determine the PCI info then we fill in FF's for
12350 * the data to indicate this.
12351 */
12355 }
12357 /*
12358 * Now get the interrupt vector and the pci header. The vector can
12359 * only be 0 right now. The header is the first 256 bytes of config
12360 * space.
12361 */
12365 i);
12366 }
12367 }
12369 static int
12371 {
12373 mptsas_reg_access_t driverdata;
12378 /*
12379 * IO access is not supported.
12380 */
12398 }
12411 }
12414 }
12418 }
12420 static int
12422 {
12424 mptsas_led_control_t lc;
12429 }
12438 }
12444 /* Locate the target we're interrogating... */
12449 /* We could not find a target for that enclosure/slot. */
12452 }
12455 /* Update our internal LED state. */
12459 /* Flush it to the controller. */
12463 }
12465 /* Return our internal LED state. */
12471 }
12474 }
12476 static int
12478 {
12494 }
12496 /* Find out how many targets there are. */
12500 count++;
12501 }
12504 /*
12505 * If we haven't been asked to copy out information on each target,
12506 * then just return the count.
12507 */
12512 /*
12513 * If we haven't been given a large enough buffer to copy out into,
12514 * let the caller know.
12515 */
12520 }
12528 /*
12529 * The number of targets changed while we weren't
12530 * looking, so give up.
12531 */
12536 }
12541 i++;
12542 }
12546 /* Copy out the disk information to the caller. */
12550 }
12554 copy_out:
12558 }
12561 }
12563 static int
12566 {
12569 mptsas_update_flash_t flashdata;
12570 mptsas_pass_thru_t passthru_data;
12571 mptsas_adapter_data_t adapter_data;
12572 mptsas_pci_info_t pci_info;
12585 }
12589 /*
12590 * Called from iport node, get the states
12591 */
12596 }
12598 }
12599 /* Make sure power level is D0 before accessing registers */
12606 DDI_SUCCESS) {
12608 "mptsas%d: mptsas_ioctl: Raise power "
12612 }
12615 }
12618 }
12624 }
12625 /*
12626 * The following code control the OK2RM LED, it doesn't affect
12627 * the ioctl return status.
12628 */
12632 NDI_SUCCESS) {
12634 }
12642 }
12648 }
12655 }
12659 }
12661 }
12674 }
12681 }
12683 /*
12684 * Reset the chip to start using the new
12685 * firmware. Reset if failed also.
12686 */
12690 }
12694 /*
12695 * The user has requested to pass through a command to
12696 * be executed by the MPT firmware. Call our routine
12697 * which does this. Only allow one passthru IOCTL at
12698 * one time. Other threads will block on
12699 * m_passthru_mutex, which is of adaptive variant.
12700 */
12705 }
12714 /*
12715 * The user has requested to read adapter data. Call
12716 * our routine which does this.
12717 */
12723 }
12737 }
12741 }
12744 /*
12745 * The user has requested to read pci info. Call
12746 * our routine which does this.
12747 */
12755 }
12764 }
12768 /*
12769 * The user has done a diag buffer action. Call our
12770 * routine which does this. Only allow one diag action
12771 * at one time.
12772 */
12777 }
12785 /*
12786 * The user has done an event query. Call our routine
12787 * which does this.
12788 */
12793 /*
12794 * The user has done an event enable. Call our routine
12795 * which does this.
12796 */
12801 /*
12802 * The user has done an event report. Call our routine
12803 * which does this.
12804 */
12809 /*
12810 * The user has requested register access. Call our
12811 * routine which does this.
12812 */
12818 rval);
12820 }
12822 out:
12824 }
12826 int
12828 {
12834 /*
12835 * Set a flag telling I/O path that we're processing a reset. This is
12836 * needed because after the reset is complete, the hash table still
12837 * needs to be rebuilt. If I/Os are started before the hash table is
12838 * rebuilt, I/O errors will occur. This flag allows I/Os to be marked
12839 * so that they can be retried.
12840 */
12843 /*
12844 * Wait until all the allocated sense data buffers for DMA are freed.
12845 */
12849 /*
12850 * Set all throttles to HOLD
12851 */
12855 }
12857 /*
12858 * Disable interrupts
12859 */
12862 /*
12863 * Abort all commands: outstanding commands, commands in waitq and
12864 * tx_waitq.
12865 */
12868 /*
12869 * Reinitialize the chip.
12870 */
12873 }
12875 /*
12876 * Enable interrupts again
12877 */
12880 /*
12881 * If mptsas_init_chip was successful, update the driver data.
12882 */
12885 }
12887 /*
12888 * Reset the throttles
12889 */
12893 }
12901 }
12903 /*
12904 * Clear the reset flag so that I/Os can continue.
12905 */
12909 }
12911 static int
12913 {
12914 ddi_dma_cookie_t cookie;
12918 /*
12919 * Check to see if the firmware image is valid
12920 */
12922 MPI2_DIAG_FLASH_BAD_SIG) {
12925 }
12927 /*
12928 * Reset the chip
12929 */
12934 }
12938 }
12939 /*
12940 * Setup configuration space
12941 */
12946 }
12948 /*
12949 * IOC facts can change after a diag reset so all buffers that are
12950 * based on these numbers must be de-allocated and re-allocated. Get
12951 * new IOC facts each time chip is initialized.
12952 */
12956 }
12960 }
12961 /*
12962 * Allocate request message frames, reply free queue, reply descriptor
12963 * post queue, and reply message frames using latest IOC facts.
12964 */
12968 }
12972 }
12976 }
12980 }
12984 }
12986 mur:
12987 /*
12988 * Re-Initialize ioc to operational state
12989 */
12993 }
12997 /*
12998 * Initialize reply post index. Reply free index is initialized after
12999 * the next loop.
13000 */
13003 /*
13004 * Initialize the Reply Free Queue with the physical addresses of our
13005 * reply frames.
13006 */
13013 }
13015 DDI_DMA_SYNC_FORDEV);
13017 /*
13018 * Initialize the reply free index to one past the last frame on the
13019 * queue. This will signify that the queue is empty to start with.
13020 */
13024 /*
13025 * Initialize the reply post queue to 0xFFFFFFFF,0xFFFFFFFF's.
13026 */
13031 }
13033 DDI_DMA_SYNC_FORDEV);
13035 /*
13036 * Enable ports
13037 */
13041 }
13043 /*
13044 * enable events
13045 */
13050 }
13052 /*
13053 * We need checks in attach and these.
13054 * chip_init is called in mult. places
13055 */
13058 DDI_SUCCESS) ||
13060 DDI_SUCCESS) ||
13062 DDI_SUCCESS) ||
13064 DDI_SUCCESS) ||
13066 DDI_SUCCESS) ||
13068 DDI_SUCCESS)) {
13071 }
13073 /* Check all acc handles */
13076 DDI_SUCCESS) ||
13078 DDI_SUCCESS) ||
13080 DDI_SUCCESS) ||
13082 DDI_SUCCESS) ||
13084 DDI_SUCCESS) ||
13086 DDI_SUCCESS) ||
13088 DDI_SUCCESS)) {
13091 }
13095 fail:
13097 }
13099 static int
13101 {
13106 /*
13107 * Check if capabilities list is supported and if so,
13108 * get initial capabilities pointer and clear bits 0,1.
13109 */
13116 }
13118 /*
13119 * Walk capabilities if supported.
13120 */
13123 /*
13124 * Check that we haven't exceeded the maximum number of
13125 * capabilities and that the pointer is in a valid range.
13126 */
13131 }
13135 caps_ptr);
13137 }
13139 /*
13140 * Get next capability and check that it is valid.
13141 * For now, we only support power management.
13142 */
13151 /* Save PMCSR offset */
13154 /*
13155 * The following capabilities are valid. Any others
13156 * will cause a message to be logged.
13157 */
13166 "?mptsas%d unrecognized capability "
13169 }
13171 /*
13172 * Get next capabilities pointer and clear bits 0,1.
13173 */
13176 }
13178 }
13180 static int
13182 {
13185 NULL,
13188 NULL
13189 };
13194 }
13195 /*
13196 * If PCI's capability does not support PM, then don't need
13197 * to registe the pm-components
13198 */
13201 /*
13202 * If power management is supported by this chip, create
13203 * pm-components property for the power management framework
13204 */
13214 }
13216 /*
13217 * Power on device.
13218 */
13226 PCI_PMCSR_D0);
13227 }
13231 }
13233 /*
13234 * Set pm idle delay.
13235 */
13240 }
13242 static int
13244 {
13250 /* Get supported interrupt types */
13255 }
13259 /*
13260 * Try MSI, but fall back to FIXED
13261 */
13267 }
13268 }
13277 }
13278 }
13281 }
13283 static void
13285 {
13287 }
13289 /*
13290 * mptsas_add_intrs:
13291 *
13292 * Register FIXED or MSI interrupts.
13293 */
13294 static int
13296 {
13303 /* Get number of interrupts */
13310 }
13312 /* Get number of available interrupts */
13319 }
13324 }
13326 /* Mpt only have one interrupt routine */
13329 }
13331 /* Allocate an array of interrupt handles */
13337 /* call ddi_intr_alloc() */
13343 ret);
13346 }
13348 /* use interrupt count returned or abort? */
13352 }
13356 /*
13357 * Get priority for first msi, assume remaining are all the same
13358 */
13363 /* Free already allocated intr */
13366 }
13370 }
13372 /* Test for high level mutex */
13377 /* Free already allocated intr */
13380 }
13384 }
13386 /* Call ddi_intr_add_handler() */
13393 /* Free already allocated intr */
13396 }
13400 }
13401 }
13407 /* Free already allocated intr */
13410 }
13414 }
13416 /*
13417 * Enable interrupts
13418 */
13420 /* Call ddi_intr_block_enable() for MSI interrupts */
13423 /* Call ddi_intr_enable for MSI or FIXED interrupts */
13426 }
13427 }
13429 }
13431 /*
13432 * mptsas_rem_intrs:
13433 *
13434 * Unregister FIXED or MSI interrupts
13435 */
13436 static void
13438 {
13443 /* Disable all interrupts */
13445 /* Call ddi_intr_block_disable() */
13450 }
13451 }
13453 /* Call ddi_intr_remove_handler() */
13457 }
13460 }
13462 /*
13463 * The IO fault service error handling callback function
13464 */
13465 /*ARGSUSED*/
13466 static int
13468 {
13469 /*
13470 * as the driver can always deal with an error in any dma or
13471 * access handle, we can just return the fme_status value.
13472 */
13475 }
13477 /*
13478 * mptsas_fm_init - initialize fma capabilities and register with IO
13479 * fault services.
13480 */
13481 static void
13483 {
13484 /*
13485 * Need to change iblock to priority for new MSI intr
13486 */
13487 ddi_iblock_cookie_t fm_ibc;
13489 /* Only register with IO Fault Services if we have some capability */
13491 /* Adjust access and dma attributes for FMA */
13496 /*
13497 * Register capabilities with IO Fault Services.
13498 * mpt->m_fm_capabilities will be updated to indicate
13499 * capabilities actually supported (not requested.)
13500 */
13503 /*
13504 * Initialize pci ereport capabilities if ereport
13505 * capable (should always be.)
13506 */
13510 }
13512 /*
13513 * Register error callback if error callback capable.
13514 */
13518 }
13519 }
13520 }
13522 /*
13523 * mptsas_fm_fini - Releases fma capabilities and un-registers with IO
13524 * fault services.
13525 *
13526 */
13527 static void
13529 {
13530 /* Only unregister FMA capabilities if registered */
13533 /*
13534 * Un-register error callback if error callback capable.
13535 */
13539 }
13541 /*
13542 * Release any resources allocated by pci_ereport_setup()
13543 */
13548 }
13550 /* Unregister from IO Fault Services */
13553 /* Adjust access and dma attributes for FMA */
13558 }
13559 }
13561 int
13563 {
13564 ddi_fm_error_t de;
13570 }
13572 int
13574 {
13575 ddi_fm_error_t de;
13581 }
13583 void
13585 {
13594 }
13595 }
13597 static int
13600 {
13604 mptsas_phymask_t phymask;
13619 }
13622 MPI2_SAS_DEVICE_INFO_SATA_DEVICE |
13626 }
13628 /*
13629 * Check if the dev handle is for a Phys Disk. If so, set return value
13630 * and exit. Don't add Phys Disks to hash.
13631 */
13638 }
13639 }
13640 }
13642 /*
13643 * Get SATA Device Name from SAS device page0 for
13644 * sata device, if device name doesn't exist, set mta_wwn to
13645 * 0 for direct attached SATA. For the device behind the expander
13646 * we still can use STP address assigned by expander.
13647 */
13649 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
13650 /* alloc a temporary target to send the cmd to */
13662 }
13668 }
13672 }
13682 }
13687 }
13689 uint64_t
13691 {
13702 inq83_retry:
13710 }
13711 /* According to SAT2, the first descriptor is logic unit name */
13716 }
13725 /* The data is not ready, wait and retry */
13726 inq83_retry--;
13729 }
13733 }
13734 out:
13737 }
13739 static int
13742 {
13759 }
13773 }
13775 }
13778 }
13780 }
13782 static int
13786 {
13792 /*
13793 * scsi_hba_tran_t->tran_tgt_private is used to pass the address
13794 * information to scsi_init_pkt, allocate a scsi_hba_tran structure
13795 * to simulate the cmds from sd
13796 */
13801 }
13808 }
13819 }
13824 }
13827 }
13830 }
13833 out:
13836 }
13839 }
13842 }
13844 }
13845 static int
13847 {
13859 ptr++;
13862 }
13874 }
13885 }
13892 }
13899 out:
13906 }
13908 /*
13909 * mptsas_parse_smp_name() is to parse sas wwn string
13910 * which format is "wWWN"
13911 */
13912 static int
13914 {
13919 }
13921 ptr++;
13924 }
13926 }
13928 static int
13931 {
13946 }
13951 }
13952 /*
13953 * Hold the nexus across the bus_config
13954 */
13959 /* parse wwid/target name out of name given */
13963 }
13964 ptr++;
13966 /*
13967 * This is a SMP target device
13968 */
13973 }
13976 /*
13977 * OBP could pass down a non-canonical form
13978 * bootpath without LUN part when LUN is 0.
13979 * So driver need adjust the string.
13980 */
13985 ptr++;
13986 }
13988 /*
13989 * The device path is wWWID format and the device
13990 * is not SMP target device.
13991 */
13996 }
14003 childp);
14004 }
14006 /*
14007 * If this is CD/DVD device in OBP path, the
14008 * ndi_busop_bus_config can be skipped as config one
14009 * operation is done above.
14010 */
14016 }
14020 }
14022 /*
14023 * DDI group instructed us to use this flag.
14024 */
14032 }
14037 }
14044 }
14046 static int
14049 {
14063 }
14067 }
14069 static int
14072 {
14078 /*
14079 * Get the physical port associated to the iport
14080 */
14086 /*
14087 * didn't match any device by searching
14088 */
14090 }
14091 /*
14092 * If the LUN already exists and the status is online,
14093 * we just return the pointer to dev_info_t directly.
14094 * For the mdi_pathinfo node, we'll handle it in
14095 * mptsas_create_virt_lun()
14096 * TODO should be also in mptsas_handle_dr
14097 */
14101 /*
14102 * TODO Another senario is, we hotplug the same disk
14103 * on the same slot, the devhdl changed, is this
14104 * possible?
14105 * tgt_private->t_private != ptgt
14106 */
14108 /*
14109 * The device has changed although the devhdl is the
14110 * same (Enclosure mapping mode, change drive on the
14111 * same slot)
14112 */
14114 }
14116 }
14119 /*
14120 * Configure IR volume
14121 */
14124 }
14128 }
14130 static int
14133 {
14136 mptsas_phymask_t phymask;
14139 /*
14140 * Get the physical port associated to the iport
14141 */
14147 /*
14148 * didn't match any device by searching
14149 */
14151 }
14153 /*
14154 * If the LUN already exists and the status is online,
14155 * we just return the pointer to dev_info_t directly.
14156 * For the mdi_pathinfo node, we'll handle it in
14157 * mptsas_create_virt_lun().
14158 */
14163 }
14168 }
14170 static int
14173 {
14180 /* determine report luns addressing type */
14182 /*
14183 * Vendors in the field have been found to be concatenating
14184 * bus/target/lun to equal the complete lun value instead
14185 * of switching to flat space addressing
14186 */
14187 /* 00b - peripheral device addressing method */
14189 /* FALLTHRU */
14190 /* 10b - logical unit addressing method */
14192 /* FALLTHRU */
14193 /* 01b - flat space addressing method */
14195 /* byte0 bit0-5=msb lun byte1 bit0-7=lsb lun */
14203 }
14204 }
14206 static int
14208 {
14235 /*
14236 * It's a SATA without Device Name
14237 * So don't try multi-LUNs
14238 */
14242 /*
14243 * need configure and create node
14244 */
14246 }
14247 }
14249 /*
14250 * WWN (SAS address or Device Name exist)
14251 */
14253 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
14254 /*
14255 * SATA device with Device Name
14256 * So don't try multi-LUNs
14257 */
14262 }
14263 }
14272 retry++;
14274 }
14286 retry++;
14288 }
14294 }
14303 /*
14304 * find out the number of luns returned by the SCSI ReportLun call
14305 * and allocate buffer space
14306 */
14312 }
14317 }
14321 else
14323 ptgt);
14326 MPTSAS_DEV_GONE);
14327 }
14328 }
14333 }
14335 static int
14337 {
14351 }
14362 }
14366 }
14368 /*
14369 * configure all RAID volumes for virtual iport
14370 */
14371 static void
14373 {
14379 /*
14380 * Get latest RAID info and search for any Volume DevHandles. If any
14381 * are found, configure the volume.
14382 */
14394 }
14395 }
14396 }
14398 }
14400 static void
14403 {
14428 }
14433 }
14436 DDI_SUCCESS) {
14438 }
14445 }
14446 }
14449 }
14451 /*
14452 * The lun has not been there already
14453 */
14455 NDI_DEVI_REMOVE);
14456 }
14457 }
14469 }
14474 }
14481 }
14482 }
14485 }
14488 /*
14489 * The lun has not been there already
14490 */
14492 NDI_DEVI_REMOVE);
14493 }
14494 }
14495 }
14497 void
14499 {
14504 mptsas_smp_t smp_node;
14506 /*
14507 * Get latest RAID info.
14508 */
14518 }
14521 }
14523 /*
14524 * Config target devices
14525 */
14528 /*
14529 * Do loop to get sas device page 0 by GetNextHandle till the
14530 * the last handle. If the sas device is a SATA/SSP target,
14531 * we try to config it.
14532 */
14535 page_address =
14537 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
14545 }
14548 }
14550 }
14552 void
14554 {
14560 /*
14561 * TODO after hard reset, update the driver data structures
14562 * 1. update port/phymask mapping table mpt->m_phy_info
14563 * 2. invalid all the entries in hash table
14564 * m_devhdl = 0xffff and m_deviceinfo = 0
14565 * 3. call sas_device_page/expander_page to update hash table
14566 */
14569 /*
14570 * Remove all the devhdls for existing entries but leave their
14571 * addresses alone. In update_hashtab() below, we'll find all
14572 * targets that are still present and reassociate them with
14573 * their potentially new devhdls. Leaving the targets around in
14574 * this fashion allows them to be used on the tx waitq even
14575 * while IOC reset is occurring.
14576 */
14582 }
14587 }
14592 }
14594 static void
14596 {
14600 mptsas_phymask_t phy_mask;
14604 /*
14605 * Get the phymask associated to the iport
14606 */
14610 /*
14611 * Enumerate RAID volumes here (phymask == 0).
14612 */
14616 }
14622 }
14632 }
14633 }
14642 }
14643 }
14645 }
14647 static int
14649 {
14655 /*
14656 * The return value means the SCMD_REPORT_LUNS
14657 * did not execute successfully. The target maybe
14658 * doesn't support such command.
14659 */
14661 }
14663 }
14665 /*
14666 * Return fail if not all the childs/paths are freed.
14667 * if there is any path under the HBA, the return value will be always fail
14668 * because we didn't call mdi_pi_free for path
14669 */
14670 static int
14672 {
14688 }
14691 }
14697 }
14700 NDI_DEVI_REMOVE);
14705 DDI_PROP_SUCCESS) {
14707 "unable to create property for "
14709 }
14710 }
14711 }
14720 }
14724 }
14730 }
14733 NDI_DEVI_REMOVE);
14734 /*
14735 * driver will not invoke mdi_pi_free, so path will not
14736 * be freed forever, return DDI_FAILURE.
14737 */
14739 }
14741 }
14743 static int
14746 {
14759 }
14761 /*
14762 * Make sure node is attached otherwise
14763 * it won't have related cache nodes to
14764 * clean up. i_ddi_devi_attached is
14765 * similiar to i_ddi_node_state(cdip) >=
14766 * DS_ATTACHED.
14767 */
14770 /* Get full devname */
14773 /* Clean cache */
14775 DV_CLEAN_FORCE);
14777 }
14783 }
14786 }
14789 }
14793 {
14804 }
14809 }
14812 }
14814 }
14816 static int
14818 {
14831 /*
14832 * Make sure node is attached otherwise
14833 * it won't have related cache nodes to
14834 * clean up. i_ddi_devi_attached is
14835 * similiar to i_ddi_node_state(cdip) >=
14836 * DS_ATTACHED.
14837 */
14840 /* Get full devname */
14843 /* Clean cache */
14845 DV_CLEAN_FORCE);
14847 }
14852 }
14856 {
14870 }
14874 }
14877 }
14882 }
14887 {
14900 }
14904 {
14913 }
14917 {
14926 }
14930 {
14944 }
14946 static int
14949 {
14955 ddi_devid_t devid;
14961 /*
14962 * For DVD/CD ROM and tape devices and optical
14963 * devices, we won't try to enumerate them under
14964 * scsi_vhci, so no need to try page83
14965 */
14971 /*
14972 * The LCA returns good SCSI status, but corrupt page 83 data the first
14973 * time it is queried. The solution is to keep trying to request page83
14974 * and verify the GUID is not (DDI_NOT_WELL_FORMED) in
14975 * mptsas_inq83_retry_timeout seconds. If the timeout expires, driver
14976 * give up to get VPD page at this stage and fail the enumeration.
14977 */
14990 }
14991 /*
14992 * create DEVID from inquiry data
14993 */
14998 /*
14999 * extract GUID from DEVID
15000 */
15003 /*
15004 * Do not enable MPXIO if the strlen(guid) is greater
15005 * than MPTSAS_MAX_GUID_LEN, this constrain would be
15006 * handled by framework later.
15007 */
15013 "lun:%x doesn't have a valid GUID, "
15014 "multipathing for this drive is "
15016 }
15017 }
15019 /*
15020 * devid no longer needed
15021 */
15025 /*
15026 * return value of ddi_devid_scsi_encode equal to
15027 * DDI_NOT_WELL_FORMED means DEVID_RETRY, it worth
15028 * to retry inquiry page 0x83 and get GUID.
15029 */
15038 }
15039 }
15044 }
15048 create_lun:
15052 }
15057 }
15058 out:
15060 /*
15061 * guid no longer needed
15062 */
15064 }
15068 }
15070 static int
15073 {
15113 }
15122 /*
15123 * Same path back online again.
15124 */
15133 ptgt);
15137 }
15141 lun);
15144 }
15147 /*
15148 * The GUID of the LUN has changed which maybe
15149 * because customer mapped another volume to the
15150 * same LUN.
15151 */
15153 "target:%x, lun:%x was changed, maybe "
15154 "because someone mapped another volume "
15161 "target:%x, lun:%x offline "
15166 }
15167 }
15171 lun);
15175 }
15176 }
15183 }
15184 }
15188 /*
15189 * if nodename can't be determined then print a message and skip it
15190 */
15196 }
15199 /* The property is needed by MPAPI */
15209 }
15223 }
15232 }
15238 target);
15241 }
15244 DDI_PROP_SUCCESS) {
15250 }
15254 "create prop for target %d lun %d "
15260 /*
15261 * Direct attached SATA device without DeviceName
15262 */
15264 "create prop for SAS target %d lun %d "
15268 }
15272 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15283 }
15296 }
15300 /*
15301 * If this device direct attached to the controller
15302 * set the attached-port to the base wwid
15303 */
15307 pdev_sas_wwn);
15309 /*
15310 * Update the iport's attached-port to guid
15311 */
15316 }
15319 DDI_PROP_SUCCESS) {
15321 "mptsas unable to create "
15322 "property for iport target-port"
15324 wwn_str);
15327 }
15331 }
15335 DDI_PROP_SUCCESS) {
15338 attached_wwn_str);
15341 }
15346 /*
15347 * set obp path for pathinfo
15348 */
15353 DDI_SUCCESS) {
15356 component);
15359 }
15360 }
15364 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
15367 DDI_PROP_SUCCESS) {
15369 "failed to create pm-capable "
15373 }
15374 }
15375 /*
15376 * Create the phy-num property
15377 */
15385 }
15393 }
15396 }
15397 virt_create_done:
15402 }
15403 }
15408 }
15411 }
15414 }
15417 }
15419 static int
15422 {
15458 /*
15459 * generate compatible property with binding-set "mpt"
15460 */
15464 /*
15465 * if nodename can't be determined then print a message and skip it
15466 */
15471 }
15476 /*
15477 * if lun alloc success, set props
15478 */
15483 DDI_PROP_SUCCESS) {
15489 }
15494 DDI_PROP_SUCCESS) {
15500 }
15509 }
15511 /*
15512 * We need the SAS WWN for non-multipath devices, so
15513 * we'll use the same property as that multipathing
15514 * devices need to present for MPAPI. If we don't have
15515 * a WWN (e.g. parallel SCSI), don't create the prop.
15516 */
15523 "create property for SAS target %d lun %d "
15527 }
15534 "create property for SAS target %d lun %d "
15540 DDI_PROP_SUCCESS)) {
15541 /*
15542 * Direct attached SATA device without DeviceName
15543 */
15545 "create property for SAS target %d lun %d "
15549 }
15554 "create property for SAS target %d lun %d"
15558 }
15562 "to create guid property for target %d "
15566 }
15568 /*
15569 * The following code is to set properties for SM-HBA support,
15570 * it doesn't apply to RAID volumes
15571 */
15578 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15590 }
15603 }
15607 /*
15608 * If this device direct attached to the controller
15609 * set the attached-port to the base wwid
15610 */
15614 pdev_sas_wwn);
15616 /*
15617 * Update the iport's attached-port to guid
15618 */
15623 }
15626 DDI_PROP_SUCCESS) {
15628 "mptsas unable to create "
15629 "property for iport target-port"
15631 wwn_str);
15634 }
15638 }
15642 DDI_PROP_SUCCESS) {
15644 "mptsas unable to create "
15646 attached_wwn_str);
15649 }
15654 DDI_PROP_SUCCESS) {
15656 "mptsas unable to create "
15660 }
15661 }
15666 DDI_PROP_SUCCESS) {
15668 "mptsas unable to create "
15672 }
15673 }
15675 phys_raid_lun:
15676 /*
15677 * if this is a SAS controller, and the target is a SATA
15678 * drive, set the 'pm-capable' property for sd and if on
15679 * an OPL platform, also check if this is an ATAPI
15680 * device.
15681 */
15684 MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE)) {
15690 DDI_PROP_SUCCESS) {
15692 "failed to create pm-capable "
15696 }
15698 }
15701 /*
15702 * add 'obp-path' properties for devinfo
15703 */
15713 }
15717 "unable to set obp-path for SAS "
15721 }
15722 }
15723 /*
15724 * Create the phy-num property for non-raid disk
15725 */
15729 DDI_PROP_SUCCESS) {
15731 "failed to create phy-num property for "
15735 }
15736 }
15737 phys_create_done:
15738 /*
15739 * If props were setup ok, online the lun
15740 */
15742 /*
15743 * Try to online the new node
15744 */
15746 }
15752 }
15754 /*
15755 * If success set rtn flag, else unwire alloc'd lun
15756 */
15763 }
15764 }
15770 }
15773 }
15777 }
15779 static int
15781 {
15785 /* XXX An HBA driver should not be allocating an smp_device. */
15793 }
15795 static int
15797 {
15803 /*
15804 * Get the physical port associated to the iport
15805 * PHYMASK TODO
15806 */
15809 /*
15810 * Find the smp node in hash table with specified sas address and
15811 * physical port
15812 */
15816 }
15821 }
15823 static int
15826 {
15831 mptsas_smp_t dev_info;
15850 /*
15851 * Probe smp device, prevent the node of removed device from being
15852 * configured succesfully
15853 */
15856 }
15860 }
15864 /*
15865 * if lun alloc success, set props
15866 */
15868 /*
15869 * Set the flavor of the child to be SMP flavored
15870 */
15875 DDI_PROP_SUCCESS) {
15878 wwn_str);
15881 }
15885 DDI_PROP_SUCCESS) {
15888 wwn_str);
15891 }
15902 "mptsas unable to get expander "
15906 }
15910 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15921 }
15924 MPI2_SAS_DEVICE_PGAD_FORM_MASK) |
15936 }
15939 /*
15940 * If this smp direct attached to the controller
15941 * set the attached-port to the base wwid
15942 */
15946 sas_wwn);
15950 }
15954 DDI_PROP_SUCCESS) {
15957 attached_wwn_str);
15960 }
15966 wwn_str);
15969 }
15971 /*
15972 * check the smp to see whether it direct
15973 * attached to the controller
15974 */
15978 }
15983 }
15984 /*
15985 * this iport is an old iport, we need to
15986 * reconfig the props for it.
15987 */
15990 DDI_PROP_SUCCESS) {
15992 MPTSAS_VIRTUAL_PORT);
15996 }
16008 }
16009 }
16013 numphys++;
16014 }
16015 }
16016 /*
16017 * Update PHY info for smhba
16018 */
16024 }
16032 DDI_PROP_SUCCESS) {
16034 MPTSAS_NUM_PHYS);
16038 }
16039 /*
16040 * Add parent's props for SMHBA support
16041 */
16044 DDI_PROP_SUCCESS) {
16046 SCSI_ADDR_PROP_ATTACHED_PORT);
16050 }
16052 smp_create_done:
16053 /*
16054 * If props were setup ok, online the lun
16055 */
16057 /*
16058 * Try to online the new node
16059 */
16061 }
16063 /*
16064 * If success set rtn flag, else unwire alloc'd lun
16065 */
16071 }
16072 }
16075 }
16077 /* smp transport routine */
16079 {
16081 Mpi2SmpPassthroughRequest_t req;
16082 Mpi2SmpPassthroughReply_t rep;
16092 /*
16093 * Need to compose a SMP request message
16094 * and call mptsas_do_passthru() function
16095 */
16106 }
16114 }
16117 }
16131 }
16132 /* do passthrough success, check the smp status */
16149 }
16151 }
16157 }
16160 }
16162 /*
16163 * If we didn't get a match, we need to get sas page0 for each device, and
16164 * untill we get a match. If failed, return NULL
16165 */
16168 {
16175 /*
16176 * PHY named device must be direct attached and attaches to
16177 * narrow port, if the iport is not parent of the device which
16178 * we are looking for.
16179 */
16182 j++;
16183 }
16188 /*
16189 * Must be a narrow port and single device attached to the narrow port
16190 * So the physical port num of device which is equal to the iport's
16191 * port num is the device what we are looking for.
16192 */
16204 }
16209 }
16211 /* If didn't get a match, come here */
16223 }
16227 }
16232 }
16233 }
16237 }
16239 /*
16240 * The ptgt->m_addr.mta_wwn contains the wwid for each disk.
16241 * For Raid volumes, we need to check m_raidvol[x].m_raidwwid
16242 * If we didn't get a match, we need to get sas page0 for each device, and
16243 * untill we get a match
16244 * If failed, return NULL
16245 */
16248 {
16253 mptsas_target_addr_t addr;
16262 }
16265 /*
16266 * It's IR volume
16267 */
16271 }
16274 }
16279 }
16281 /* If didn't get a match, come here */
16294 }
16298 }
16304 }
16305 }
16309 }
16313 {
16318 mptsas_target_addr_t addr;
16327 }
16332 }
16334 /* If didn't get a match, come here */
16344 }
16351 }
16352 }
16356 }
16358 mptsas_target_t *
16361 {
16363 mptsas_target_addr_t addr;
16373 }
16378 }
16384 /* Initialized the tgt structure */
16394 }
16396 static void
16398 {
16403 }
16407 {
16408 mptsas_target_addr_t addr;
16414 /*
16415 * If there's already a matching SMP target, update its fields
16416 * in place. Since the address is not changing, it's safe to do
16417 * this. We cannot just bcopy() here because the structure we've
16418 * been given has invalid hash links.
16419 */
16423 }
16429 }
16431 /*
16432 * Functions for SGPIO LED support
16433 */
16436 {
16447 }
16450 {
16458 }
16463 }
16465 }
16467 static int
16469 {
16472 /* Build an MPI2 Slot Status based on our view of the world */
16480 /* Write it to the controller */
16484 MPI2_SEP_REQ_ACTION_WRITE_STATUS));
16485 }
16487 /*
16488 * send sep request, use enclosure/slot addressing
16489 */
16490 static int
16493 {
16494 Mpi2SepRequest_t req;
16495 Mpi2SepReply_t rep;
16500 /*
16501 * We only support SEP control of directly-attached targets, in which
16502 * case the "SEP" we're talking to is a virtual one contained within
16503 * the HBA itself. This is necessary because DA targets typically have
16504 * no other mechanism for LED control. Targets for which a separate
16505 * enclosure service processor exists should be controlled via ses(7d)
16506 * or sgen(7d). Furthermore, since such requests can time out, they
16507 * should be made in user context rather than in response to
16508 * asynchronous fabric changes.
16509 *
16510 * In addition, we do not support this operation for RAID volumes,
16511 * since there is no slot associated with them.
16512 */
16516 }
16528 }
16535 }
16536 /* do passthrough success, check the ioc status */
16562 }
16563 }
16566 }
16569 }
16571 int
16575 {
16576 ddi_dma_cookie_t new_cookie;
16578 uint_t ncookie;
16586 }
16594 }
16603 }
16606 }
16608 void
16610 {
16618 }