usr/src/uts/common/io/qede/579xx/drivers/ecore/ecore_phy_api.h

   1 /*
   2 * CDDL HEADER START
   3 *
   4 * The contents of this file are subject to the terms of the
   5 * Common Development and Distribution License, v.1,  (the "License").
   6 * You may not use this file except in compliance with the License.
   7 *
   8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9 * or http://opensource.org/licenses/CDDL-1.0.
  10 * See the License for the specific language governing permissions
  11 * and limitations under the License.
  12 *
  13 * When distributing Covered Code, include this CDDL HEADER in each
  14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15 * If applicable, add the following below this CDDL HEADER, with the
  16 * fields enclosed by brackets "[]" replaced with your own identifying
  17 * information: Portions Copyright [yyyy] [name of copyright owner]
  18 *
  19 * CDDL HEADER END
  20 */
  21
  22 /*
  23 * Copyright 2014-2017 Cavium, Inc.
  24 * The contents of this file are subject to the terms of the Common Development
  25 * and Distribution License, v.1,  (the "License").
  26
  27 * You may not use this file except in compliance with the License.
  28
  29 * You can obtain a copy of the License at available
  30 * at http://opensource.org/licenses/CDDL-1.0
  31
  32 * See the License for the specific language governing permissions and
  33 * limitations under the License.
  34 */
  35
  36 #ifndef __ECORE_PHY_API_H__
  37 #define __ECORE_PHY_API_H__
  38
  39 /**
  40  * @brief Phy core write
  41  *
  42  *  @param p_hwfn
  43  *  @param p_ptt
  44  *  @param port
  45  *  @param addr - nvm offset
  46  *  @param p_phy_result_buf - result buffer
  47  *  @param data_hi - low 32 bit of data to write
  48  *  @param data_lo - high 32 bit of data to write
  49  *
  50  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
  51  */
  52 int ecore_phy_core_write(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
  53                           u32 port, u32 addr, u32 data_lo, u32 data_hi,
  54                           char *p_phy_result_buf);
  55
  56 /**
  57  * @brief Phy core read
  58  *
  59  *  @param p_hwfn
  60  *  @param p_ptt
  61  *  @param port
  62  *  @param addr - nvm offset
  63  *  @param p_phy_result_buf - result buffer
  64  *
  65  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
  66  */
  67 int ecore_phy_core_read(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
  68                          u32 port, u32 addr, char *p_phy_result_buf);
  69
  70 /**
  71  * @brief Phy raw write
  72  *
  73  *  @param p_hwfn
  74  *  @param p_ptt
  75  *  @param port
  76  *  @param lane
  77  *  @param addr - nvm offset
  78  *  @param p_phy_result_buf - result buffer
  79  *  @param data_hi - low 32 bit of data to write
  80  *  @param data_lo - high 32 bit of data to write
  81  *
  82  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
  83  */
  84 int ecore_phy_raw_write(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
  85                          u32 port, u32 lane, u32 addr, u32 data_lo,
  86                          u32 data_hi, char *p_phy_result_buf);
  87
  88 /**
  89  * @brief Phy raw read
  90  *
  91  *  @param p_hwfn
  92  *  @param p_ptt
  93  *  @param port
  94  *  @param lane
  95  *  @param addr - nvm offset
  96  *  @param p_phy_result_buf - result buffer
  97  *
  98  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
  99  */
 100 int ecore_phy_raw_read(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
 101                         u32 port, u32 lane, u32 addr, char *p_phy_result_buf);
 102
 103 /**
 104  * @brief Phy mac status
 105  *
 106  *  @param p_hwfn
 107  *  @param p_ptt
 108  *  @param port
 109  *  @param p_phy_result_buf - result buffer
 110  *
 111  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 112  */
 113 int ecore_phy_mac_stat(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
 114                         u32 port, char *p_phy_result_buf);
 115
 116 /**
 117  * @brief Phy info
 118  *
 119  *  @param p_hwfn
 120  *  @param p_ptt
 121  *  @param p_phy_result_buf - result buffer
 122  *
 123  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 124  */
 125 int ecore_phy_info(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
 126                     char *p_phy_result_buf);
 127
 128 /**
 129  * @brief Sfp write
 130  *
 131  *  @param p_hwfn
 132  *  @param p_ptt
 133  *  @param port
 134  *  @param addr - I2C address
 135  *  @param offset - EEPROM offset
 136  *  @param size - number of bytes to write
 137  *  @param val - byte array to write (1, 2 or 4 bytes)
 138  *  @param p_phy_result_buf - result buffer
 139  *
 140  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 141  */
 142 int ecore_phy_sfp_write(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
 143                         u32 port, u32 addr, u32 offset, u32 size,
 144                         u32 val, char *p_phy_result_buf);
 145
 146 /**
 147  * @brief Sfp read
 148  *
 149  *  @param p_hwfn
 150  *  @param p_ptt
 151  *  @param port
 152  *  @param addr - I2C address
 153  *  @param offset - EEPROM offset
 154  *  @param size - number of bytes to read
 155  *  @param p_phy_result_buf - result buffer
 156  *
 157  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 158  */
 159 int ecore_phy_sfp_read(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
 160                        u32 port, u32 addr, u32 offset, u32 size,
 161                        char *p_phy_result_buf);
 162
 163 /**
 164  * @brief Sfp decode
 165  *
 166  *  @param p_hwfn
 167  *  @param p_ptt
 168  *  @param port
 169  *  @param p_phy_result_buf - result buffer
 170  *
 171  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 172  */
 173 int ecore_phy_sfp_decode(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
 174                          u32 port, char *p_phy_result_buf);
 175
 176 /**
 177  * @brief Sfp get inserted
 178  *
 179  *  @param p_hwfn
 180  *  @param p_ptt
 181  *  @param port
 182  *  @param p_phy_result_buf - result buffer
 183  *
 184  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 185  */
 186 int ecore_phy_sfp_get_inserted(struct ecore_hwfn *p_hwfn,
 187                                struct ecore_ptt *p_ptt,
 188                                u32 port, char *p_phy_result_buf);
 189
 190 /**
 191  * @brief Sfp get txdisable
 192  *
 193  *  @param p_hwfn
 194  *  @param p_ptt
 195  *  @param port
 196  *  @param p_phy_result_buf - result buffer
 197  *
 198  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 199  */
 200 int ecore_phy_sfp_get_txdisable(struct ecore_hwfn *p_hwfn,
 201                                 struct ecore_ptt *p_ptt,
 202                                 u32 port, char *p_phy_result_buf);
 203
 204 /**
 205  * @brief Sfp set txdisable
 206  *
 207  *  @param p_hwfn
 208  *  @param p_ptt
 209  *  @param port
 210  *  @param txdisable - tx disable value to set
 211  *  @param p_phy_result_buf - result buffer
 212  *
 213  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 214  */
 215 int ecore_phy_sfp_set_txdisable(struct ecore_hwfn *p_hwfn,
 216                                 struct ecore_ptt *p_ptt,
 217                                 u32 port, u8 txdisable,
 218                                 char *p_phy_result_buf);
 219
 220 /**
 221  * @brief Sfp get txreset
 222  *
 223  *  @param p_hwfn
 224  *  @param p_ptt
 225  *  @param port
 226  *  @param p_phy_result_buf - result buffer
 227  *
 228  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 229  */
 230 int ecore_phy_sfp_get_txreset(struct ecore_hwfn *p_hwfn,
 231                               struct ecore_ptt *p_ptt,
 232                               u32 port, char *p_phy_result_buf);
 233
 234 /**
 235  * @brief Sfp get rxlos
 236  *
 237  *  @param p_hwfn
 238  *  @param p_ptt
 239  *  @param port
 240  *  @param p_phy_result_buf - result buffer
 241  *
 242  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 243  */
 244 int ecore_phy_sfp_get_rxlos(struct ecore_hwfn *p_hwfn,
 245                             struct ecore_ptt *p_ptt,
 246                             u32 port, char *p_phy_result_buf);
 247
 248 /**
 249  * @brief Sfp get eeprom
 250  *
 251  *  @param p_hwfn
 252  *  @param p_ptt
 253  *  @param port
 254  *  @param p_phy_result_buf - result buffer
 255  *
 256  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 257  */
 258 int ecore_phy_sfp_get_eeprom(struct ecore_hwfn *p_hwfn,
 259                              struct ecore_ptt *p_ptt,
 260                              u32 port, char *p_phy_result_buf);
 261
 262 /**
 263  * @brief Gpio write
 264  *
 265  *  @param p_hwfn
 266  *  @param p_ptt
 267  *  @param gpio - gpio number
 268  *  @param gpio_val - value to write to gpio
 269  *  @param p_phy_result_buf - result buffer
 270  *
 271  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 272  */
 273 int ecore_phy_gpio_write(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
 274                          u16 gpio, u16 gpio_val, char *p_phy_result_buf);
 275
 276 /**
 277  * @brief Gpio read
 278  *
 279  *  @param p_hwfn
 280  *  @param p_ptt
 281  *  @param gpio - gpio number
 282  *  @param p_phy_result_buf - result buffer
 283  *
 284  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 285  */
 286 int ecore_phy_gpio_read(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
 287                         u16 gpio, char *p_phy_result_buf);
 288
 289 /**
 290  * @brief Gpio get information
 291  *
 292  *  @param p_hwfn
 293  *  @param p_ptt
 294  *  @param gpio - gpio number
 295  *  @param p_phy_result_buf - result buffer
 296  *
 297  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 298  */
 299 int ecore_phy_gpio_info(struct ecore_hwfn *p_hwfn,
 300                         struct ecore_ptt *p_ptt,
 301                         u16 gpio, char *p_phy_result_buf);
 302
 303 /**
 304  * @brief Ext-Phy Read operation
 305  *
 306  *  @param p_hwfn
 307  *  @param p_ptt
 308  *  @param port - port number
 309  *  @param devad - device address
 310  *  @param reg - register
 311  *  @param p_phy_result_buf - result buffer
 312  *
 313  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 314  */
 315 int ecore_phy_extphy_read(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
 316                           u16 port, u16 devad, u16 reg, char *p_phy_result_buf);
 317
 318 /**
 319  * @brief Ext-Phy Write operation
 320  *
 321  *  @param p_hwfn
 322  *  @param p_ptt
 323  *  @param port - port number
 324  *  @param devad - device address
 325  *  @param reg - register
 326  *  @param val - value to be written
 327  *  @param p_phy_result_buf - result buffer
 328  *
 329  * @return enum _ecore_status_t - ECORE_SUCCESS - operation was successful.
 330  */
 331 int ecore_phy_extphy_write(struct ecore_hwfn *p_hwfn, struct ecore_ptt *p_ptt,
 332                            u16 port, u16 devad, u16 reg, u16 val,
 333                            char *p_phy_result_buf);
 334
 335 #endif