usr/src/uts/common/io/qede/579xx/drivers/ecore/bcm_osal.h

   1 /*
   2 * CDDL HEADER START
   3 *
   4 * The contents of this file are subject to the terms of the
   5 * Common Development and Distribution License, v.1,  (the "License").
   6 * You may not use this file except in compliance with the License.
   7 *
   8 * You can obtain a copy of the license at usr/src/OPENSOLARIS.LICENSE
   9 * or http://opensource.org/licenses/CDDL-1.0.
  10 * See the License for the specific language governing permissions
  11 * and limitations under the License.
  12 *
  13 * When distributing Covered Code, include this CDDL HEADER in each
  14 * file and include the License file at usr/src/OPENSOLARIS.LICENSE.
  15 * If applicable, add the following below this CDDL HEADER, with the
  16 * fields enclosed by brackets "[]" replaced with your own identifying
  17 * information: Portions Copyright [yyyy] [name of copyright owner]
  18 *
  19 * CDDL HEADER END
  20 */
  21
  22 /*
  23 * Copyright 2014-2017 Cavium, Inc.
  24 * The contents of this file are subject to the terms of the Common Development
  25 * and Distribution License, v.1,  (the "License").
  26
  27 * You may not use this file except in compliance with the License.
  28
  29 * You can obtain a copy of the License at available
  30 * at http://opensource.org/licenses/CDDL-1.0
  31
  32 * See the License for the specific language governing permissions and
  33 * limitations under the License.
  34 */
  35
  36 #ifndef _BCM_OSAL_H
  37 #define _BCM_OSAL_H
  38
  39 #include <sys/ddi.h>
  40 #include <sys/sunddi.h>
  41 #include <sys/types.h>
  42 #include <sys/mutex.h>
  43 #include <sys/ksynch.h>
  44 #include <sys/conf.h>
  45 #include <sys/debug.h>
  46 #include <sys/kmem.h>
  47 #include <sys/mac.h>
  48 #include <sys/mac_provider.h>
  49 #include <sys/dditypes.h>
  50 #include <sys/list_impl.h>
  51 #include <sys/byteorder.h>
  52
  53 #include "qede_types.h"
  54 #include "qede_list.h"
  55
  56 /*
  57
  58  * Forward Declarations for ecore data structures
  59  */
  60 struct ecore_dev;
  61 struct ecore_hwfn;
  62
  63 #define nothing do {} while(0)
  64
  65 #define INLINE  inline
  66 #define __iomem
  67 #define OSAL_IOMEM      __iomem
  68
  69 #ifndef likely
  70 #define likely(expr)            (expr)
  71 #endif
  72
  73 #ifndef unlikely
  74 #define unlikely(expr)          (expr)
  75 #endif
  76
  77 /*
  78  * Memory related OSAL
  79  */
  80 #define OSAL_MEM_ZERO(_dest_, _size_) \
  81         (void) memset(_dest_, 0, _size_)
  82 #define OSAL_MEMCPY(_dest_, _src_, _size_) \
  83         memcpy(_dest_, _src_, _size_)
  84 #define OSAL_MEMCMP(_s1_, _s2_, _size_) \
  85         memcmp(_s1_, _s2_, _size_)
  86 #define OSAL_MEMSET(_dest_, _val_, _size_) \
  87         memset(_dest_, _val_, _size_)
  88
  89 /*
  90  * The illumos DDI has sprintf returning a pointer to the resulting character
  91  * buffer and not the actual length. Therefore we simulate sprintf like the
  92  * others do.
  93  */
  94 extern size_t qede_sprintf(char *, const char *, ...);
  95 #define OSAL_SPRINTF    qede_sprintf
  96 #define OSAL_SNPRINTF   (ssize_t)snprintf
  97 #define OSAL_STRCMP     strcmp
  98
  99 #define GFP_KERNEL      KM_SLEEP
 100 #define GFP_ATOMIC      KM_NOSLEEP
 101
 102 /* Not used in ecore */
 103 #define OSAL_CALLOC(dev, GFP, num, size) OSAL_NULL
 104
 105 void *qede_osal_zalloc(struct ecore_dev *, int, size_t);
 106 #define OSAL_ZALLOC(_edev, _flags, _size) \
 107         qede_osal_zalloc(_edev, _flags, _size)
 108 void *qede_osal_alloc(struct ecore_dev *, int, size_t);
 109 #define OSAL_ALLOC(_edev, _flags, _size) \
 110         qede_osal_alloc(_edev, _flags, _size)
 111 void qede_osal_free(struct ecore_dev *, void *addr);
 112 #define OSAL_FREE(_edev, _addr) \
 113         qede_osal_free(_edev, _addr)
 114
 115 #define OSAL_VALLOC(_edev, _size) \
 116         qede_osal_alloc(_edev, GFP_KERNEL, _size)
 117
 118 #define OSAL_VFREE(_edev, _addr) \
 119         qede_osal_free(_edev, _addr)
 120
 121 #define OSAL_VZALLOC(_edev, _size) \
 122         qede_osal_zalloc(_edev, GFP_KERNEL, _size)
 123
 124 void *qede_osal_dma_alloc_coherent(struct ecore_dev *, dma_addr_t *, size_t);
 125 #define OSAL_DMA_ALLOC_COHERENT(_edev_, _paddr_, _mem_size_) \
 126         qede_osal_dma_alloc_coherent(_edev_, _paddr_, _mem_size_)
 127 void qede_osal_dma_free_coherent(struct ecore_dev *, void *, dma_addr_t, size_t);
 128 #define OSAL_DMA_FREE_COHERENT(_edev_, _vaddr_, _paddr_, _mem_size_) \
 129         qede_osal_dma_free_coherent(_edev_, _vaddr_, _paddr_, _mem_size_)
 130
 131 /* Combine given 0xhi and 0xlo into a single U64 in format 0xhilo */
 132 #define HILO_U64(hi, lo)        ((((u64)(hi)) << 32) + (lo))
 133
 134 void qede_osal_dma_sync(struct ecore_dev *edev, void* addr, u32 size, bool is_post);
 135 #define OSAL_DMA_SYNC(dev, addr, length, is_post) \
 136         qede_osal_dma_sync(dev, addr, length, is_post)
 137 /*
 138  * BAR Access Related OSAL
 139  */
 140 void qede_osal_pci_write32(struct ecore_hwfn *hwfn, u32 addr, u32 val);
 141 void qede_osal_pci_write16(struct ecore_hwfn *hwfn, u32 addr, u16 val);
 142 u32 qede_osal_pci_read32(struct ecore_hwfn *hwfn, u32 addr);
 143 u32 *qede_osal_reg_addr(struct ecore_hwfn *hwfn, u32 addr);
 144 void qede_osal_pci_bar2_write32(struct ecore_hwfn *hwfn, u32 offset, u32 val);
 145
 146 #define REG_WR(_hwfn_, _addr_, _value_) \
 147         qede_osal_pci_write32(_hwfn_, _addr_, _value_)
 148
 149 #define REG_WR16(_hwfn_, _addr_, _value_) \
 150         qede_osal_pci_write16(_hwfn_, _addr_, _value_)
 151
 152 #define REG_RD(_hwfn_, _addr_) \
 153         qede_osal_pci_read32(_hwfn_, _addr_)
 154
 155 #define OSAL_REG_ADDR(_hwfn_, _addr_)  \
 156         qede_osal_reg_addr(_hwfn_, _addr_)
 157
 158 #define DOORBELL(_hwfn_, _addr_, _val_) \
 159         qede_osal_pci_bar2_write32(_hwfn_, _addr_, _val_)
 160
 161 void qede_osal_direct_reg_write32(struct ecore_hwfn *hwfn, void *addr, u32 value);
 162 u32 qede_osal_direct_reg_read32(struct ecore_hwfn *hwfn, void *addr);
 163 /* FIXME: not correct Writes to the PCI _addr_ directly */
 164 #define DIRECT_REG_WR(_hwfn, _addr, _val) \
 165         qede_osal_direct_reg_write32(_hwfn, _addr, _val)
 166 #define DIRECT_REG_RD(_hwfn, _addr) \
 167         qede_osal_direct_reg_read32(_hwfn, _addr)
 168
 169 static inline bool OSAL_NVM_IS_ACCESS_ENABLED(void *p_hwfn)
 170 {
 171         return (1);
 172 }
 173
 174 /*
 175  * Bit manipulation Helper functions
 176  */
 177
 178 #define OSAL_BITS_PER_BYTE      (8)
 179 #define OSAL_BITS_PER_UL        (sizeof(unsigned long)*OSAL_BITS_PER_BYTE) /* always a power of 2 */
 180 #define OSAL_BITS_PER_UL_MASK   (OSAL_BITS_PER_UL - 1)
 181
 182 static inline u32 osal_ffsl(unsigned long x)
 183 {
 184         int r = 1;
 185
 186         if (!x)
 187                 return (0);
 188
 189         if (!(x & 0xffffffff)) {
 190                 x >>= 32;
 191                 r += 32;
 192         }
 193
 194         if (!(x & 0xffff)) {
 195                 x >>= 16;
 196                 r += 16;
 197         }
 198
 199         if (!(x & 0xff)) {
 200                 x >>= 8;
 201                 r += 8;
 202         }
 203
 204         if (!(x & 0xf)) {
 205                 x >>= 4;
 206                 r += 4;
 207         }
 208         if (!(x & 3)) {
 209                 x >>= 2;
 210                 r += 2;
 211         }
 212
 213         if (!(x & 1)) {
 214                 x >>= 1;
 215                 r += 1;
 216         }
 217
 218         return (r);
 219 }
 220
 221 static inline u32 osal_ffz(unsigned long word)
 222 {
 223         unsigned long first_zero;
 224
 225         first_zero = osal_ffsl(~word);
 226         return first_zero ? (first_zero-1) : OSAL_BITS_PER_UL;
 227 }
 228
 229 static inline void OSAL_SET_BIT(u32 nr, unsigned long *addr)
 230 {
 231         addr[nr/OSAL_BITS_PER_UL] |= 1UL << (nr & OSAL_BITS_PER_UL_MASK);
 232 }
 233
 234 static inline void OSAL_CLEAR_BIT(u32 nr, unsigned long *addr)
 235 {
 236         addr[nr/OSAL_BITS_PER_UL] &= ~(1UL << (nr & OSAL_BITS_PER_UL_MASK));
 237 }
 238
 239 static inline bool OSAL_TEST_BIT(u32 nr, unsigned long *addr)
 240 {
 241         return !!(addr[nr/OSAL_BITS_PER_UL] & (1UL << (nr & OSAL_BITS_PER_UL_MASK)));
 242 }
 243
 244 static inline u32 OSAL_FIND_FIRST_ZERO_BIT(unsigned long *addr, u32 limit)
 245 {
 246         u32 i;
 247         u32 nwords = 0;
 248
 249         ASSERT(limit);
 250         nwords = (limit - 1)/OSAL_BITS_PER_UL + 1;
 251         for (i = 0; i < nwords && ~(addr[i]) == 0; i++);
 252         return  (i == nwords)  ? limit : i*OSAL_BITS_PER_UL + osal_ffz(addr[i]);
 253 }
 254
 255 static inline u32 OSAL_FIND_FIRST_BIT(unsigned long *addr, u32 limit)
 256 {
 257         u32     i;
 258         u32     nwords = (limit+OSAL_BITS_PER_UL-1)/OSAL_BITS_PER_UL;
 259
 260         for (i = 0; i < nwords ; i++)
 261         {
 262                 if (addr[i]!=0)
 263                 break;
 264         }
 265
 266         if (i == nwords) {
 267                 return limit;
 268         } else {
 269                 return i*OSAL_BITS_PER_UL + osal_ffz(addr[i]);
 270         }
 271 }
 272
 273
 274 /*
 275  * Time related OSAL
 276  */
 277 #define OSAL_UDELAY(_usecs_)            drv_usecwait(_usecs_)
 278 #define OSAL_MSLEEP(_msecs_)            delay(drv_usectohz(_msecs_ * 1000))
 279
 280 /*
 281  * Synchronization related OSAL
 282  */
 283 typedef kmutex_t                osal_mutex_t;
 284 typedef kmutex_t                osal_spinlock_t;
 285
 286 /*
 287  * MUTEX/SPINLOCK Related NOTES:
 288  * 1. Currently initialize all mutex with default intr prio 0.
 289  * 2. Later do mutex_init in OSAL_MUTEX_ALLOC() instead of
 290  * OSAL_MUTEX_INIT, and use proper intr prio.
 291  * 3. Ensure that before calling any ecore api's, intr prio
 292  * is properly configured.
 293  */
 294 #define OSAL_MUTEX_ALLOC(hwfn, lock) nothing
 295 #define OSAL_SPIN_LOCK_ALLOC(hwfn, lock) nothing
 296
 297 #define OSAL_MUTEX_INIT(_lock_) \
 298         mutex_init(_lock_, NULL, MUTEX_DRIVER, 0)
 299 #define OSAL_SPIN_LOCK_INIT(lock) \
 300         mutex_init(lock, NULL, MUTEX_DRIVER, 0)
 301 #define OSAL_MUTEX_DEALLOC(_lock) \
 302         mutex_destroy(_lock)
 303 #define OSAL_SPIN_LOCK_DEALLOC(_lock) \
 304         mutex_destroy(_lock)
 305
 306 #define OSAL_MUTEX_ACQUIRE(lock) \
 307         mutex_enter(lock)
 308 #define OSAL_SPIN_LOCK(lock) \
 309         mutex_enter(lock)
 310 #define OSAL_SPIN_LOCK_IRQSAVE(lock, flags) \
 311         OSAL_SPIN_LOCK(lock)
 312 #define OSAL_MUTEX_RELEASE(lock) \
 313         mutex_exit(lock)
 314 #define OSAL_SPIN_UNLOCK(lock) \
 315         mutex_exit(lock)
 316 #define OSAL_SPIN_UNLOCK_IRQSAVE(lock, flags) \
 317         OSAL_SPIN_UNLOCK(lock)
 318
 319 /*
 320  * TODO: Implement dpc ISR
 321  */
 322 #define OSAL_DPC_ALLOC(hwfn)            OSAL_ALLOC(hwfn->p_dev, GFP_KERNEL, sizeof (u64))
 323 #define OSAL_DPC_INIT(dpc, hwfn)        nothing
 324
 325 /*
 326  * PF recovery handler
 327  */
 328 void qede_osal_recovery_handler(struct ecore_hwfn *hwfn);
 329 #define OSAL_SCHEDULE_RECOVERY_HANDLER(_ptr)    qede_osal_recovery_handler(_ptr)
 330
 331 /*
 332  * Process DCBX Event
 333  */
 334 static inline void OSAL_DCBX_AEN(struct ecore_hwfn *p_hwfn, u32 mib_type)
 335 {
 336 }
 337
 338 /*
 339  * Endianess Related
 340  */
 341 #define LE_TO_HOST_32                   LE_32
 342 #define HOST_TO_LE_32                   LE_32
 343 #define HOST_TO_LE_16                   LE_16
 344
 345 #define OSAL_BE32               u32
 346 #ifdef BIG_ENDIAN
 347 #define OSAL_CPU_TO_BE64(val)   ((val))
 348 #define OSAL_CPU_TO_BE32(val)   ((val))
 349 #define OSAL_BE32_TO_CPU(val)   ((val))
 350 #define OSAL_CPU_TO_LE32(val)   BSWAP_32(val)
 351 #define OSAL_CPU_TO_LE16(val)   BSWAP_16(val)
 352 #define OSAL_LE32_TO_CPU(val)   BSWAP_32(val)
 353 #define OSAL_LE16_TO_CPU(val)   BSWAP_16(val)
 354 #define OSAL_CPU_TO_LE64(val)   BSWAP_64(val)
 355 #else
 356 #define OSAL_CPU_TO_BE64(val)   BSWAP_64(val)
 357 #define OSAL_CPU_TO_BE32(val)   BSWAP_32(val)
 358 #define OSAL_BE32_TO_CPU(val)   BSWAP_32(val)
 359 #define OSAL_CPU_TO_LE32(val)   ((val))
 360 #define OSAL_CPU_TO_LE16(val)   ((val))
 361 #define OSAL_LE32_TO_CPU(val)   ((val))
 362 #define OSAL_LE16_TO_CPU(val)   ((val))
 363 #endif
 364 /*
 365  * Physical Link Handling
 366  */
 367 void qede_osal_link_update(struct ecore_hwfn *hwfn);
 368 #define OSAL_LINK_UPDATE(_hwfn_) \
 369         qede_osal_link_update(_hwfn_)
 370
 371 /*
 372  * Linked List Related OSAL,
 373  * and general Link list API's
 374  * for driver
 375  */
 376 #ifndef container_of
 377 #define container_of(ptr, type, member) \
 378         (type *)((char *)(ptr) - OFFSETOF(type, member))
 379 #endif
 380
 381 typedef u64 osal_size_t;
 382 typedef u64 osal_int_ptr_t;
 383 #define OSAL_NULL       NULL
 384
 385 #define OSAL_LIST_PUSH_HEAD(_entry_at_beg_, _head_) \
 386         QEDE_LIST_ADD(_entry_at_beg_, _head_)
 387
 388 #define OSAL_LIST_PUSH_TAIL(_entry_at_end_, _head_) \
 389         QEDE_LIST_ADD_TAIL(_entry_at_end_, _head_)
 390
 391 #define qede_list_entry(_entry_ptr_, _type_, _member_) \
 392         container_of(_entry_ptr_, _type_, _member_)
 393
 394 #define qede_list_first_entry(_head_, _type_, _member_) \
 395         qede_list_entry((_head_)->next, _type_, _member_)
 396
 397 #define OSAL_LIST_FIRST_ENTRY(_list_, _type_, _member_) \
 398         qede_list_first_entry(_list_, _type_, _member_)
 399
 400 #define OSAL_LIST_REMOVE_ENTRY(_entry_, _list_) \
 401         QEDE_LIST_REMOVE(_entry_, _list_)
 402
 403
 404 #define OSAL_LIST_IS_EMPTY(_head_) \
 405         QEDE_LIST_IS_EMPTY(_head_)
 406
 407 #define qede_list_last_entry(_head_, _type_, _member_) \
 408         qede_list_entry((_head_)->prev, _type_, _member_)
 409
 410 #define qede_list_prev_entry(_entry_, _type_, _member_) \
 411         qede_list_entry((_entry_)->_member_.prev, _type_, _member_)
 412
 413 #define qede_list_for_each_entry(_entry_, _head_, _type_, _member_) \
 414         for (_entry_ = qede_list_last_entry(_head_, _type_, _member_); \
 415             &_entry_->_member_ != (_head_); \
 416             _entry_ = qede_list_prev_entry(_entry_, _type_, _member_))
 417
 418 #define OSAL_LIST_FOR_EACH_ENTRY(_entry_, _list_, _member_, _type_) \
 419         qede_list_for_each_entry(_entry_, _list_, _type_, _member_)
 420
 421 #define qede_list_next_entry(_entry_, _type_, _member_) \
 422         qede_list_entry((_entry_)->_member_.next, _type_, _member_)
 423
 424 #define qede_list_for_each_entry_safe(_entry_, _tmp_, _head_, _type_, _member_) \
 425         for (_entry_ = qede_list_first_entry(_head_, _type_, _member_), \
 426             _tmp_ = qede_list_next_entry(_entry_, _type_, _member_); \
 427             &_entry_->_member_ != (_head_); \
 428             _entry_ = _tmp_, _tmp_ = qede_list_next_entry(_tmp_, _type_, _member_))
 429
 430 #define OSAL_LIST_FOR_EACH_ENTRY_SAFE(_entry_, _tmp_, _list_, \
 431                 _member_, _type_) \
 432         qede_list_for_each_entry_safe(_entry_, _tmp_, _list_, _type_, \
 433             _member_)
 434
 435 /*
 436  * PCI Access Related OSAL
 437  */
 438 void qede_osal_pci_read_config_byte(struct ecore_dev *, u32, u8 *);
 439 #define OSAL_PCI_READ_CONFIG_BYTE(_edev_, _addr_, _dst_) \
 440         qede_osal_pci_read_config_byte(_edev_, _addr_, _dst_)
 441 void qede_osal_pci_read_config_word(struct ecore_dev *, u32, u16 *);
 442 #define OSAL_PCI_READ_CONFIG_WORD(_edev_, _addr_, _dst_) \
 443         qede_osal_pci_read_config_word(_edev_, _addr_, _dst_)
 444 void qede_osal_pci_read_config_dword(struct ecore_dev *, u32, u32 *);
 445 #define OSAL_PCI_READ_CONFIG_DWORD(_edev_, _addr_, _dst_) \
 446         qede_osal_pci_read_config_dword(_edev_, _addr_, _dst_)
 447
 448 int qede_osal_pci_find_ext_capab(struct ecore_dev *, u16);
 449 #define OSAL_PCI_FIND_EXT_CAPABILITY(_edev_, _pcie_id_) \
 450         qede_osal_pci_find_ext_capab(_edev_, _pcie_id_)
 451
 452 void qede_osal_pci_write_config_word(struct ecore_dev *, u32, u16);
 453 #define OSAL_PCI_WRITE_CONFIG_WORD(ecore_dev, address, value)\
 454                 qede_osal_pci_write_config_word(ecore_dev, address, value)
 455
 456 int qede_osal_pci_find_capability(struct ecore_dev *, u16);
 457 #define OSAL_PCI_FIND_CAPABILITY(ecore_dev, pcie_id)\
 458         qede_osal_pci_find_capability(ecore_dev, pcie_id)
 459 /*
 460  * TODO : Can this be turned into a macro ??
 461  */
 462 u32 qede_osal_bar_size(struct ecore_dev *, u8);
 463 #define OSAL_BAR_SIZE(_edev_, _bar_id_) \
 464         (((bar_id) == 0)? 0x2000000: \
 465          ((bar_id) == 1)? 0x800000: 0)
 466
 467 /*
 468  * Memory Barriers related OSAL
 469  */
 470 /*
 471  * TODO :Need to examine the ecore code using this Mem./IO
 472  * barriers and find out whether they are needed on Solaris
 473  */
 474 #define OSAL_MMIOWB(x)  do {} while (0)
 475 #define OSAL_BARRIER(x) do {} while (0)
 476 #define OSAL_SMP_RMB(x) do {} while (0)
 477 #define OSAL_SMP_WMB(x) do {} while (0)
 478 #define OSAL_RMB(x)     do {} while (0)
 479 #define OSAL_WMB(x)     do {} while (0)
 480
 481 /*
 482  * SR-IOV Related OSAL
 483  */
 484 #if 0
 485 enum _ecore_status_t qede_osal_iov_vf_acquire(struct ecore_hwfn *p_hwfn, int vf_id);
 486 #define OSAL_IOV_VF_ACQUIRE(p_hwfn, vf_id)      qede_osal_iov_vf_acquire(p_hwfn, vf_id)
 487 #define OSAL_VF_SEND_MSG2PF()           OSAL_NULL
 488 #define OSAL_VF_HANDLE_BULLETIN()       do {} while (0)
 489 #define OSAL_IOV_CHK_UCAST()            OSAL_NULL
 490 #define OSAL_IOV_GET_OS_TYPE            0
 491 #define OSAL_IOV_VF_CLEANUP(p_hwfn,vf_id)
 492 #define OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vfid, params, tlvs_accepted) (0)
 493 #define OSAL_IOV_POST_START_VPORT(p_hwfn, vfid, vport_id, opaque_fid) {};
 494
 495
 496
 497 #define OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, req, vf_sw_info)  {}
 498 #define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, res) (0)
 499 #else
 500 #define OSAL_VF_SEND_MSG2PF()           OSAL_NULL
 501 #define OSAL_IOV_POST_START_VPORT(p_hwfn, vfid, vport_id, opaque_fid) {};
 502 #define OSAL_IOV_CHK_UCAST(hwfn, vfid, params) (0)
 503 #define OSAL_PF_VF_MSG(hwfn, vfid) (0)
 504 #define OSAL_VF_FLR_UPDATE(hw_fn) {}
 505 #define OSAL_IOV_VF_ACQUIRE(p_hwfn, vf_id) (0)
 506 #define OSAL_IOV_VF_CLEANUP(p_hwfn,vf_id)
 507 #define OSAL_IOV_VF_VPORT_UPDATE(p_hwfn, vfid, params, tlvs_accepted) (0)
 508 #define OSAL_VF_FILL_ACQUIRE_RESC_REQ(p_hwfn, req, vf_sw_info) {};
 509
 510 #define OSAL_VF_UPDATE_ACQUIRE_RESC_RESP(p_hwfn, res) (0)
 511
 512 #define OSAL_IOV_GET_OS_TYPE()  0
 513
 514 #endif
 515 /*
 516  * Miscellaneous OSAL
 517  */
 518 #define OSAL_ASSERT(is_assert)          ASSERT(is_assert)
 519
 520 void qede_print(char *format, ...);
 521 #define OSAL_WARN(is_warn, _fmt, ...) \
 522         if(is_warn) { \
 523                 do { \
 524                         qede_print("!"_fmt, ##__VA_ARGS__); \
 525                 } while (0); \
 526         }
 527 unsigned long log2_align(unsigned long n);
 528
 529 /* TODO: Verify this helper */
 530 #define OSAL_ROUNDUP_POW_OF_TWO         log2_align
 531
 532 u32 LOG2(u32);
 533 #define OSAL_LOG2       LOG2
 534
 535 /* Needed if ecore_roce.c is included */
 536 #define OSAL_NUM_ACTIVE_CPU()                   (0)
 537 #define DIV_ROUND_UP(n, d)              (((n) + (d) - 1) / (d))
 538 #define ROUNDUP(x, y)                   ((((x) + ((y) - 1)) / (y)) * (y))
 539
 540
 541 /*
 542  * @VB: Don't want to include sys/sysmacros.h just
 543  * for the offsetof macro
 544  */
 545 #ifndef OFFSETOF
 546 #define OFFSETOF(type, member)          ((size_t) (&(((type *)0)->member)))
 547 /*#define offsetof(type, member)          ((size_t) (&(((type *)0)->member)))*/
 548 #endif
 549
 550 #ifndef offsetof
 551 #define offsetof(type, member)          ((size_t) (&(((type *)0)->member)))
 552 #endif
 553
 554 void qede_print(char *format, ...);
 555 void qede_print_err(char *format, ...);
 556
 557 #define PRINT(_dp_ctx, _fmt, ...) \
 558         do { \
 559                 qede_print("!"_fmt, ##__VA_ARGS__); \
 560         } while (0);
 561 #define PRINT_ERR(_dp_ctx, _fmt, ...) \
 562         do { \
 563                 qede_print_err("!"_fmt, ##__VA_ARGS__); \
 564         } while (0);
 565
 566 void qede_debug_before_pf_start(struct ecore_dev *edev, u8 id);
 567 void qede_debug_after_pf_stop(void *cdev, u8 my_id);
 568
 569 #define OSAL_BEFORE_PF_START(ptr, id)   qede_debug_before_pf_start(ptr, id)
 570 #define OSAL_AFTER_PF_STOP(ptr, id)     qede_debug_after_pf_stop(ptr, id)
 571
 572 #define cpu_to_le32(val)        ((val))
 573 #define le32_to_cpu(val)        ((val))
 574 #define le16_to_cpu(val)        ((val))
 575 #define cpu_to_le16(val)        ((val))
 576 #define OSAL_BUILD_BUG_ON(cond) nothing
 577 #ifndef ARRAY_SIZE
 578 #define ARRAY_SIZE(_arr)        (sizeof(_arr) / sizeof((_arr)[0]))
 579 #endif
 580 #define BUILD_BUG_ON(cond)      nothing
 581 #define true 1
 582 #define false 0
 583 #define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol) (0)
 584 #define OSAL_INLINE inline
 585 #define OSAL_SPRINTF qede_sprintf
 586 #define OSAL_STRLEN strlen
 587 #define OSAL_STRCPY strcpy
 588 #define OSAL_STRNCPY strncpy
 589 #define OSAL_PAGE_BITS  12
 590 #define OSAL_PAGE_SIZE (1 << OSAL_PAGE_BITS)
 591 #define OSAL_UNLIKELY
 592 #define ARRAY_DECL static const
 593
 594 #define OSAL_BUILD_BUG_ON(cond) nothing
 595
 596 #define OSAL_MIN_T(type, __min1, __min2)        \
 597         ((type)(__min1) < (type)(__min2) ? (type)(__min1) : (type)(__min2))
 598 #define OSAL_MAX_T(type, __max1, __max2)        \
 599         ((type)(__max1) > (type)(__max2) ? (type)(__max1) : (type)(__max2))
 600
 601 #define OSAL_ARRAY_SIZE(arr)    ARRAY_SIZE(arr)
 602
 603 void OSAL_CRC8_POPULATE(u8 * cdu_crc8_table, u8 polynomial);
 604
 605 u8 OSAL_CRC8(u8 * cdu_crc8_table, u8 * data_to_crc, int data_to_crc_len, u8 init_value);
 606
 607 #define OSAL_CACHE_LINE_SIZE 64
 608 #define OSAL_NUM_CPUS()  (0)
 609
 610 void OSAL_DPC_SYNC(struct ecore_hwfn *p_hwfn);
 611 /*
 612  *  * TODO:  Need to implement
 613  *   * Call from the ecore to get the statististics of a protocol driver. Ecore client
 614  *    * need to populate the requested statistics. If the PF has more than one function,
 615  *     * driver should return the statistics sum of all the interfaces under the PF.
 616  *      */
 617 #define OSAL_GET_PROTOCOL_STATS(_ecore_dev, _type, _stats) \
 618         ;
 619
 620 /*
 621  *  * TODO:  Need to implement
 622  *   * Call from ecore to the upper layer driver to request IRQs for the slowpath
 623  *    * interrupts handling.
 624  *     */
 625 #define OSAL_SLOWPATH_IRQ_REQ(p_hwfn) \
 626         (ECORE_SUCCESS)
 627
 628
 629
 630 //void OSAL_HW_ERROR_OCCURRED(struct ecore_hwfn *, enum ecore_hw_err_type);
 631 /*#define OSAL_HW_ERROR_OCCURRED(p_hwfn, err) \
 632         qede_osal_hw_error_occurred(p_hwfn, err)
 633 */
 634
 635 #define OSAL_HW_ERROR_OCCURRED(p_hwfn, err)     nothing
 636
 637 void qede_osal_poll_mode_dpc(struct ecore_hwfn *);
 638 #define OSAL_POLL_MODE_DPC(p_hwfn) \
 639         qede_osal_poll_mode_dpc(p_hwfn)
 640
 641 int qede_osal_bitmap_weight(unsigned long *, uint32_t);
 642 #define OSAL_BITMAP_WEIGHT(bitmap, nbits) \
 643         qede_osal_bitmap_weight(bitmap, nbits)
 644
 645 void qede_osal_mfw_tlv_req(struct ecore_hwfn *);
 646 #define OSAL_MFW_TLV_REQ(p_hwfn) \
 647         qede_osal_mfw_tlv_req(p_hwfn)
 648
 649 u32 qede_osal_crc32(u32, u8 *, u64);
 650 #define OSAL_CRC32(crc, buf, length) \
 651         qede_osal_crc32(crc, buf, length)
 652
 653 void qede_osal_hw_info_change(struct ecore_hwfn *, int);
 654 #define OSAL_HW_INFO_CHANGE(p_hwfn, change) \
 655         qede_osal_hw_info_change(p_hwfn, change)
 656
 657
 658 #endif /* _BCM_OSAL_H */