kernel/drivers/net/e1000g/e1000_osdep.h

   1 /*
   2  * This file is provided under a CDDLv1 license.  When using or
   3  * redistributing this file, you may do so under this license.
   4  * In redistributing this file this license must be included
   5  * and no other modification of this header file is permitted.
   6  *
   7  * CDDL LICENSE SUMMARY
   8  *
   9  * Copyright(c) 1999 - 2009 Intel Corporation. All rights reserved.
  10  *
  11  * The contents of this file are subject to the terms of Version
  12  * 1.0 of the Common Development and Distribution License (the "License").
  13  *
  14  * You should have received a copy of the License with this software.
  15  * You can obtain a copy of the License at
  16  *      http://www.opensolaris.org/os/licensing.
  17  * See the License for the specific language governing permissions
  18  * and limitations under the License.
  19  */
  20
  21 /*
  22  * Copyright 2010 Sun Microsystems, Inc.  All rights reserved.
  23  * Use is subject to license terms of the CDDLv1.
  24  *
  25  * Copyright 2016 Joyent, Inc.
  26  */
  27
  28 #ifndef _E1000_OSDEP_H
  29 #define _E1000_OSDEP_H
  30
  31 #ifdef __cplusplus
  32 extern "C" {
  33 #endif
  34
  35 #include <sys/types.h>
  36 #include <sys/conf.h>
  37 #include <sys/debug.h>
  38 #include <sys/stropts.h>
  39 #include <sys/stream.h>
  40 #include <sys/strlog.h>
  41 #include <sys/kmem.h>
  42 #include <sys/stat.h>
  43 #include <sys/kstat.h>
  44 #include <sys/modctl.h>
  45 #include <sys/errno.h>
  46 #include <sys/ddi.h>
  47 #include <sys/sunddi.h>
  48 #include <sys/stdbool.h>
  49 #include <sys/pci.h>
  50 #include <sys/atomic.h>
  51 #include <sys/note.h>
  52 #include <sys/mutex.h>
  53 #include <sys/pci_cap.h>
  54 #include "e1000g_debug.h"
  55
  56 #define usec_delay(x)           drv_usecwait(x)
  57 #define usec_delay_irq          usec_delay
  58 #define msec_delay(x)           drv_usecwait(x * 1000)
  59 #define msec_delay_irq          msec_delay
  60
  61 #ifdef E1000G_DEBUG
  62 #define DEBUGOUT(S)             \
  63         E1000G_DEBUGLOG_0(NULL, E1000G_INFO_LEVEL, S)
  64 #define DEBUGOUT1(S, A)         \
  65         E1000G_DEBUGLOG_1(NULL, E1000G_INFO_LEVEL, S, A)
  66 #define DEBUGOUT2(S, A, B)      \
  67         E1000G_DEBUGLOG_2(NULL, E1000G_INFO_LEVEL, S, A, B)
  68 #define DEBUGOUT3(S, A, B, C)   \
  69         E1000G_DEBUGLOG_3(NULL, E1000G_INFO_LEVEL, S, A, B, C)
  70 #define DEBUGFUNC(F)            \
  71         E1000G_DEBUGLOG_0(NULL, E1000G_TRACE_LEVEL, F)
  72 #else
  73 #define DEBUGOUT(S)
  74 #define DEBUGOUT1(S, A)
  75 #define DEBUGOUT2(S, A, B)
  76 #define DEBUGOUT3(S, A, B, C)
  77 #define DEBUGFUNC(F)
  78 #endif
  79
  80 #define OS_DEP(hw)              ((struct e1000g_osdep *)((hw)->back))
  81
  82 #define FALSE           false
  83 #define TRUE            true
  84
  85 #define CMD_MEM_WRT_INVALIDATE  0x0010  /* BIT_4 */
  86 #define PCI_COMMAND_REGISTER    0x04
  87 #define PCI_EX_CONF_CAP         0xE0
  88 #define ADAPTER_REG_SET         1 /* solaris mapping of adapter registers */
  89 #define ICH_FLASH_REG_SET       2       /* solaris mapping of flash memory */
  90
  91 #define RECEIVE_BUFFER_ALIGN_SIZE       256
  92 #define E1000_MDALIGN                   4096
  93 #define E1000_MDALIGN_82546             65536
  94 #define E1000_ERT_2048                  0x100
  95
  96 /* PHY Extended Status Register */
  97 #define IEEE_ESR_1000T_HD_CAPS  0x1000  /* 1000T HD capable */
  98 #define IEEE_ESR_1000T_FD_CAPS  0x2000  /* 1000T FD capable */
  99 #define IEEE_ESR_1000X_HD_CAPS  0x4000  /* 1000X HD capable */
 100 #define IEEE_ESR_1000X_FD_CAPS  0x8000  /* 1000X FD capable */
 101
 102 /*
 103  * required by shared code
 104  */
 105 #define E1000_WRITE_FLUSH(a)    (void)E1000_READ_REG(a, E1000_STATUS)
 106
 107 /*
 108  * Note, for all of the following register defines, it's important that these be
 109  * in do {} while loops that only run a single time. Previously they were formed
 110  * as normal blocks. Unfortunately this would fail in the following form which
 111  * is used in the common code:
 112  *
 113  * if (cond)
 114  *      E1000_WRITE_REG
 115  * else
 116  *      ...
 117  *
 118  * When the E1000_WRITE_REG macros was missing the do keyword, the compiler
 119  * would end up associating the outer brace of the block with the if statement
 120  * and thus the else clause would get left behind.
 121  */
 122 #define E1000_WRITE_REG(hw, reg, value) \
 123 do { \
 124         if ((hw)->mac.type != e1000_82542) \
 125                 ddi_put32((OS_DEP(hw))->reg_handle, \
 126                     (uint32_t *)((uintptr_t)(hw)->hw_addr + reg), \
 127                     value); \
 128         else \
 129                 ddi_put32((OS_DEP(hw))->reg_handle, \
 130                     (uint32_t *)((uintptr_t)(hw)->hw_addr + \
 131                     e1000_translate_register_82542(reg)), \
 132                     value); \
 133 } while (0)
 134
 135 #define E1000_READ_REG(hw, reg) (\
 136         ((hw)->mac.type != e1000_82542) ? \
 137             ddi_get32((OS_DEP(hw))->reg_handle, \
 138                 (uint32_t *)((uintptr_t)(hw)->hw_addr + reg)) : \
 139             ddi_get32((OS_DEP(hw))->reg_handle, \
 140                 (uint32_t *)((uintptr_t)(hw)->hw_addr + \
 141                 e1000_translate_register_82542(reg))))
 142
 143 #define E1000_WRITE_REG_ARRAY(hw, reg, offset, value) \
 144 do {\
 145         if ((hw)->mac.type != e1000_82542) \
 146                 ddi_put32((OS_DEP(hw))->reg_handle, \
 147                     (uint32_t *)((uintptr_t)(hw)->hw_addr + \
 148                     reg + ((offset) << 2)),\
 149                     value); \
 150         else \
 151                 ddi_put32((OS_DEP(hw))->reg_handle, \
 152                     (uint32_t *)((uintptr_t)(hw)->hw_addr + \
 153                     e1000_translate_register_82542(reg) + \
 154                     ((offset) << 2)), value); \
 155 } while (0)
 156
 157 #define E1000_READ_REG_ARRAY(hw, reg, offset) (\
 158         ((hw)->mac.type != e1000_82542) ? \
 159             ddi_get32((OS_DEP(hw))->reg_handle, \
 160                 (uint32_t *)((uintptr_t)(hw)->hw_addr + reg + \
 161                 ((offset) << 2))) : \
 162             ddi_get32((OS_DEP(hw))->reg_handle, \
 163                 (uint32_t *)((uintptr_t)(hw)->hw_addr + \
 164                 e1000_translate_register_82542(reg) + \
 165                 ((offset) << 2))))
 166
 167
 168 #define E1000_WRITE_REG_ARRAY_DWORD(a, reg, offset, value)      \
 169         E1000_WRITE_REG_ARRAY(a, reg, offset, value)
 170 #define E1000_READ_REG_ARRAY_DWORD(a, reg, offset)              \
 171         E1000_READ_REG_ARRAY(a, reg, offset)
 172
 173
 174 #define E1000_READ_FLASH_REG(hw, reg)   \
 175         ddi_get32((OS_DEP(hw))->ich_flash_handle, \
 176                 (uint32_t *)((uintptr_t)(hw)->flash_address + (reg)))
 177
 178 #define E1000_READ_FLASH_REG16(hw, reg) \
 179         ddi_get16((OS_DEP(hw))->ich_flash_handle, \
 180                 (uint16_t *)((uintptr_t)(hw)->flash_address + (reg)))
 181
 182 #define E1000_WRITE_FLASH_REG(hw, reg, value)   \
 183         ddi_put32((OS_DEP(hw))->ich_flash_handle, \
 184                 (uint32_t *)((uintptr_t)(hw)->flash_address + (reg)), (value))
 185
 186 #define E1000_WRITE_FLASH_REG16(hw, reg, value) \
 187         ddi_put16((OS_DEP(hw))->ich_flash_handle, \
 188                 (uint16_t *)((uintptr_t)(hw)->flash_address + (reg)), (value))
 189
 190 #define UNREFERENCED_1PARAMETER(_p)             _NOTE(ARGUNUSED(_p))
 191 #define UNREFERENCED_2PARAMETER(_p, _q)         _NOTE(ARGUNUSED(_p, _q))
 192 #define UNREFERENCED_3PARAMETER(_p, _q, _r)     _NOTE(ARGUNUSED(_p, _q, _r))
 193 #define UNREFERENCED_4PARAMETER(_p, _q, _r, _s) _NOTE(ARGUNUSED(_p, _q, _r, _s))
 194 #define UNREFERENCED_5PARAMETER(_p, _q, _r, _s, _t)     \
 195         _NOTE(ARGUNUSED(_p, _q, _r, _s, _t))
 196
 197 typedef int8_t          s8;
 198 typedef int16_t         s16;
 199 typedef int32_t         s32;
 200 typedef int64_t         s64;
 201 typedef uint8_t         u8;
 202 typedef uint16_t        u16;
 203 typedef uint32_t        u32;
 204 typedef uint64_t        u64;
 205
 206 #define __le16 u16
 207 #define __le32 u32
 208 #define __le64 u64
 209
 210 struct e1000g_osdep {
 211         ddi_acc_handle_t reg_handle;
 212         ddi_acc_handle_t cfg_handle;
 213         ddi_acc_handle_t ich_flash_handle;
 214         ddi_acc_handle_t io_reg_handle;
 215         struct e1000g *adapter;
 216 };
 217
 218 /* Shared Code Mutex Defines */
 219 #define E1000_MUTEX                     kmutex_t
 220 #define E1000_MUTEX_INIT(mutex)         mutex_init(mutex, NULL, \
 221         MUTEX_DRIVER, NULL)
 222 #define E1000_MUTEX_DESTROY(mutex)      mutex_destroy(mutex)
 223
 224 #define E1000_MUTEX_LOCK(mutex)         mutex_enter(mutex)
 225 #define E1000_MUTEX_TRYLOCK(mutex)      mutex_tryenter(mutex)
 226 #define E1000_MUTEX_UNLOCK(mutex)       mutex_exit(mutex)
 227
 228 #ifdef __sparc  /* on SPARC, use only memory-mapped routines */
 229 #define E1000_WRITE_REG_IO      E1000_WRITE_REG
 230 #else   /* on x86, use port io routines */
 231 #define E1000_WRITE_REG_IO(a, reg, val) { \
 232         ddi_put32((OS_DEP(a))->io_reg_handle, \
 233             (uint32_t *)(a)->io_base, \
 234             reg); \
 235         ddi_put32((OS_DEP(a))->io_reg_handle, \
 236             (uint32_t *)((a)->io_base + 4), \
 237             val); \
 238 }
 239 #endif  /* __sparc */
 240
 241 #ifdef __cplusplus
 242 }
 243 #endif
 244
 245 #endif  /* _E1000_OSDEP_H */