components/openindiana/drm/drm/i915/src/dvo_ch7xxx.c

   1 /*
   2  * Copyright (c) 2006, 2013, Oracle and/or its affiliates. All rights reserved.
   3  */
   4 /*
   5  * Copyright (c) 2012, 2013 Intel Corporation.  All rights reserved.
   6  */
   7 /**************************************************************************
   8
   9 Copyright © 2006 Dave Airlie
  10
  11 All Rights Reserved.
  12
  13 Permission is hereby granted, free of charge, to any person obtaining a
  14 copy of this software and associated documentation files (the
  15 "Software"), to deal in the Software without restriction, including
  16 without limitation the rights to use, copy, modify, merge, publish,
  17 distribute, sub license, and/or sell copies of the Software, and to
  18 permit persons to whom the Software is furnished to do so, subject to
  19 the following conditions:
  20
  21 The above copyright notice and this permission notice (including the
  22 next paragraph) shall be included in all copies or substantial portions
  23 of the Software.
  24
  25 THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  26 OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  27 MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  28 IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  29 ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  30 TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  31 SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  32
  33 **************************************************************************/
  34
  35 #include "dvo.h"
  36
  37 #define CH7xxx_REG_VID          0x4a
  38 #define CH7xxx_REG_DID          0x4b
  39
  40 #define CH7011_VID              0x83 /* 7010 as well */
  41 #define CH7010B_VID             0x05
  42 #define CH7009A_VID             0x84
  43 #define CH7009B_VID             0x85
  44 #define CH7301_VID              0x95
  45
  46 #define CH7xxx_VID              0x84
  47 #define CH7xxx_DID              0x17
  48 #define CH7010_DID              0x16
  49
  50 #define CH7xxx_NUM_REGS         0x4c
  51
  52 #define CH7xxx_CM               0x1c
  53 #define CH7xxx_CM_XCM           (1<<0)
  54 #define CH7xxx_CM_MCP           (1<<2)
  55 #define CH7xxx_INPUT_CLOCK      0x1d
  56 #define CH7xxx_GPIO             0x1e
  57 #define CH7xxx_GPIO_HPIR        (1<<3)
  58 #define CH7xxx_IDF              0x1f
  59
  60 #define CH7xxx_IDF_HSP          (1<<3)
  61 #define CH7xxx_IDF_VSP          (1<<4)
  62
  63 #define CH7xxx_CONNECTION_DETECT 0x20
  64 #define CH7xxx_CDET_DVI         (1<<5)
  65
  66 #define CH7301_DAC_CNTL         0x21
  67 #define CH7301_HOTPLUG          0x23
  68 #define CH7xxx_TCTL             0x31
  69 #define CH7xxx_TVCO             0x32
  70 #define CH7xxx_TPCP             0x33
  71 #define CH7xxx_TPD              0x34
  72 #define CH7xxx_TPVT             0x35
  73 #define CH7xxx_TLPF             0x36
  74 #define CH7xxx_TCT              0x37
  75 #define CH7301_TEST_PATTERN     0x48
  76
  77 #define CH7xxx_PM               0x49
  78 #define CH7xxx_PM_FPD           (1<<0)
  79 #define CH7301_PM_DACPD0        (1<<1)
  80 #define CH7301_PM_DACPD1        (1<<2)
  81 #define CH7301_PM_DACPD2        (1<<3)
  82 #define CH7xxx_PM_DVIL          (1<<6)
  83 #define CH7xxx_PM_DVIP          (1<<7)
  84
  85 #define CH7301_SYNC_POLARITY    0x56
  86 #define CH7301_SYNC_RGB_YUV     (1<<0)
  87 #define CH7301_SYNC_POL_DVI     (1<<5)
  88
  89 /** @file
  90  * driver for the Chrontel 7xxx DVI chip over DVO.
  91  */
  92
  93 static struct ch7xxx_id_struct {
  94         uint8_t vid;
  95         char *name;
  96 } ch7xxx_ids[] = {
  97         { CH7011_VID, "CH7011" },
  98         { CH7010B_VID, "CH7010B" },
  99         { CH7009A_VID, "CH7009A" },
 100         { CH7009B_VID, "CH7009B" },
 101         { CH7301_VID, "CH7301" },
 102 };
 103
 104 static struct ch7xxx_did_struct {
 105         uint8_t did;
 106         char *name;
 107 } ch7xxx_dids[] = {
 108         { CH7xxx_DID, "CH7XXX" },
 109         { CH7010_DID, "CH7010B" },
 110 };
 111
 112 struct ch7xxx_priv {
 113         bool quiet;
 114 };
 115
 116 static char *ch7xxx_get_id(uint8_t vid)
 117 {
 118         int i;
 119
 120         for (i = 0; i < ARRAY_SIZE(ch7xxx_ids); i++) {
 121                 if (ch7xxx_ids[i].vid == vid)
 122                         return ch7xxx_ids[i].name;
 123         }
 124
 125         return NULL;
 126 }
 127
 128 static char *ch7xxx_get_did(uint8_t did)
 129 {
 130         int i;
 131
 132         for (i = 0; i < ARRAY_SIZE(ch7xxx_dids); i++) {
 133                 if (ch7xxx_dids[i].did == did)
 134                         return ch7xxx_dids[i].name;
 135         }
 136
 137         return NULL;
 138 }
 139
 140 /** Reads an 8 bit register */
 141 static bool ch7xxx_readb(struct intel_dvo_device *dvo, int addr, uint8_t *ch)
 142 {
 143         struct ch7xxx_priv *ch7xxx= dvo->dev_priv;
 144         struct i2c_adapter *adapter = dvo->i2c_bus;
 145         u8 out_buf[2];
 146         u8 in_buf[2];
 147
 148         struct i2c_msg msgs[] = {
 149                 {
 150                         .addr = dvo->slave_addr,
 151                         .flags = 0,
 152                         .len = 1,
 153                         .buf = out_buf,
 154                 },
 155                 {
 156                         .addr = dvo->slave_addr,
 157                         .flags = I2C_M_RD,
 158                         .len = 1,
 159                         .buf = in_buf,
 160                 }
 161         };
 162
 163         out_buf[0] = (u8) addr;
 164         out_buf[1] = 0;
 165
 166         if (i2c_transfer(adapter, msgs, 2) == 2) {
 167                 *ch = in_buf[0];
 168                 return true;
 169         };
 170
 171         if (!ch7xxx->quiet) {
 172                 DRM_DEBUG_KMS("Unable to read register 0x%02x from %s:%02x.\n",
 173                           addr, adapter->name, dvo->slave_addr);
 174         }
 175         return false;
 176 }
 177
 178 /** Writes an 8 bit register */
 179 static bool ch7xxx_writeb(struct intel_dvo_device *dvo, int addr, uint8_t ch)
 180 {
 181         struct ch7xxx_priv *ch7xxx = dvo->dev_priv;
 182         struct i2c_adapter *adapter = dvo->i2c_bus;
 183         uint8_t out_buf[2];
 184         struct i2c_msg msg = {
 185                 .addr = dvo->slave_addr,
 186                 .flags = 0,
 187                 .len = 2,
 188                 .buf = out_buf,
 189         };
 190
 191         out_buf[0] = (uint8_t) addr;
 192         out_buf[1] = ch;
 193
 194         if (i2c_transfer(adapter, &msg, 1) == 1)
 195                 return true;
 196
 197         if (!ch7xxx->quiet) {
 198                 DRM_DEBUG_KMS("Unable to write register 0x%02x to %s:%d.\n",
 199                           addr, adapter->name, dvo->slave_addr);
 200         }
 201
 202         return false;
 203 }
 204
 205 static bool ch7xxx_init(struct intel_dvo_device *dvo,
 206                         struct i2c_adapter *adapter)
 207 {
 208         /* this will detect the CH7xxx chip on the specified i2c bus */
 209         struct ch7xxx_priv *ch7xxx;
 210         uint8_t vendor, device;
 211         char *name, *devid;
 212
 213         ch7xxx = kzalloc(sizeof(struct ch7xxx_priv), GFP_KERNEL);
 214         if (ch7xxx == NULL)
 215                 return false;
 216
 217         dvo->i2c_bus = adapter;
 218         dvo->dev_priv = ch7xxx;
 219         ch7xxx->quiet = true;
 220
 221         if (!ch7xxx_readb(dvo, CH7xxx_REG_VID, &vendor))
 222                 goto out;
 223
 224         name = ch7xxx_get_id(vendor);
 225         if (!name) {
 226                 DRM_DEBUG_KMS("ch7xxx not detected; got 0x%02x from %s "
 227                                 "slave %d.\n",
 228                           vendor, adapter->name, dvo->slave_addr);
 229                 goto out;
 230         }
 231
 232
 233         if (!ch7xxx_readb(dvo, CH7xxx_REG_DID, &device))
 234                 goto out;
 235
 236         devid = ch7xxx_get_did(device);
 237         if (!devid) {
 238                 DRM_DEBUG_KMS("ch7xxx not detected; got 0x%02x from %s "
 239                                 "slave %d.\n",
 240                           vendor, adapter->name, dvo->slave_addr);
 241                 goto out;
 242         }
 243
 244         ch7xxx->quiet = false;
 245         DRM_DEBUG_KMS("Detected %s chipset, vendor/device ID 0x%02x/0x%02x\n",
 246                   name, vendor, device);
 247         return true;
 248 out:
 249         kfree(ch7xxx, sizeof (struct ch7xxx_priv));
 250         return false;
 251 }
 252
 253 static enum drm_connector_status ch7xxx_detect(struct intel_dvo_device *dvo)
 254 {
 255         uint8_t cdet, orig_pm, pm;
 256
 257         (void) ch7xxx_readb(dvo, CH7xxx_PM, &orig_pm);
 258
 259         pm = orig_pm;
 260         pm &= ~CH7xxx_PM_FPD;
 261         pm |= CH7xxx_PM_DVIL | CH7xxx_PM_DVIP;
 262
 263         (void) ch7xxx_writeb(dvo, CH7xxx_PM, pm);
 264
 265         (void) ch7xxx_readb(dvo, CH7xxx_CONNECTION_DETECT, &cdet);
 266
 267         (void) ch7xxx_writeb(dvo, CH7xxx_PM, orig_pm);
 268
 269         if (cdet & CH7xxx_CDET_DVI)
 270                 return connector_status_connected;
 271         return connector_status_disconnected;
 272 }
 273
 274 /* LINTED */
 275 static int ch7xxx_mode_valid(struct intel_dvo_device *dvo,
 276                                               struct drm_display_mode *mode)
 277 {
 278         if (mode->clock > 165000)
 279                 return MODE_CLOCK_HIGH;
 280
 281         return MODE_OK;
 282 }
 283
 284 static void ch7xxx_mode_set(struct intel_dvo_device *dvo,
 285                             struct drm_display_mode *mode,
 286                             /* LINTED */
 287                             struct drm_display_mode *adjusted_mode)
 288 {
 289         uint8_t tvco, tpcp, tpd, tlpf, idf;
 290
 291         if (mode->clock <= 65000) {
 292                 tvco = 0x23;
 293                 tpcp = 0x08;
 294                 tpd = 0x16;
 295                 tlpf = 0x60;
 296         } else {
 297                 tvco = 0x2d;
 298                 tpcp = 0x06;
 299                 tpd = 0x26;
 300                 tlpf = 0xa0;
 301         }
 302
 303         (void) ch7xxx_writeb(dvo, CH7xxx_TCTL, 0x00);
 304         (void) ch7xxx_writeb(dvo, CH7xxx_TVCO, tvco);
 305         (void) ch7xxx_writeb(dvo, CH7xxx_TPCP, tpcp);
 306         (void) ch7xxx_writeb(dvo, CH7xxx_TPD, tpd);
 307         (void) ch7xxx_writeb(dvo, CH7xxx_TPVT, 0x30);
 308         (void) ch7xxx_writeb(dvo, CH7xxx_TLPF, tlpf);
 309         (void) ch7xxx_writeb(dvo, CH7xxx_TCT, 0x00);
 310
 311         (void) ch7xxx_readb(dvo, CH7xxx_IDF, &idf);
 312
 313         idf &= ~(CH7xxx_IDF_HSP | CH7xxx_IDF_VSP);
 314         if (mode->flags & DRM_MODE_FLAG_PHSYNC)
 315                 idf |= CH7xxx_IDF_HSP;
 316
 317         if (mode->flags & DRM_MODE_FLAG_PVSYNC)
 318                 idf |= CH7xxx_IDF_HSP;
 319
 320         (void) ch7xxx_writeb(dvo, CH7xxx_IDF, idf);
 321 }
 322
 323 /* set the CH7xxx power state */
 324 static void ch7xxx_dpms(struct intel_dvo_device *dvo, bool enable)
 325 {
 326         if (enable)
 327                 (void) ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_DVIL | CH7xxx_PM_DVIP);
 328         else
 329                 (void) ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_FPD);
 330 }
 331
 332 static bool ch7xxx_get_hw_state(struct intel_dvo_device *dvo)
 333 {
 334         u8 val;
 335
 336         ch7xxx_readb(dvo, CH7xxx_PM, &val);
 337
 338         if (val & (CH7xxx_PM_DVIL | CH7xxx_PM_DVIP))
 339                 return true;
 340         else
 341                 return false;
 342 }
 343
 344 static void ch7xxx_dump_regs(struct intel_dvo_device *dvo)
 345 {
 346         int i;
 347
 348         for (i = 0; i < CH7xxx_NUM_REGS; i++) {
 349                 uint8_t val;
 350                 if ((i % 8) == 0 )
 351                         DRM_LOG_KMS("\n %02X: ", i);
 352                 (void) ch7xxx_readb(dvo, i, &val);
 353                 DRM_LOG_KMS("%02X ", val);
 354 }
 355 }
 356
 357 static void ch7xxx_destroy(struct intel_dvo_device *dvo)
 358 {
 359         struct ch7xxx_priv *ch7xxx = dvo->dev_priv;
 360
 361         if (ch7xxx) {
 362                 kfree(ch7xxx, sizeof (struct ch7xxx_priv));
 363                 dvo->dev_priv = NULL;
 364         }
 365 }
 366
 367 struct intel_dvo_dev_ops ch7xxx_ops = {
 368         .init = ch7xxx_init,
 369         .detect = ch7xxx_detect,
 370         .mode_valid = ch7xxx_mode_valid,
 371         .mode_set = ch7xxx_mode_set,
 372         .dpms = ch7xxx_dpms,
 373         .get_hw_state = ch7xxx_get_hw_state,
 374         .dump_regs = ch7xxx_dump_regs,
 375         .destroy = ch7xxx_destroy,
 376 };