1 /* Copyright (C) 1997, 1998, 2002, 2003 Free Software Foundation, Inc.
2 This file is part of the GNU C Library.
3 Contributed by Ralf Baechle <ralf@gnu.org>.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, write to the Free
17 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
27 # define __CAT(str1,str2) str1##str2
29 # define __CAT(str1,str2) str1/**/str2
31 # define CAT(str1,str2) __CAT(str1,str2)
35 * Macros to handle different pointer/register sizes for 32/64-bit code
37 * 64 bit address space isn't used yet, so we may use the R3000 32 bit
40 #if (_MIPS_SIM == _MIPS_SIM_ABI32) || (_MIPS_SIM == _MIPS_SIM_NABI32)
44 #elif (_MIPS_SIM == _MIPS_SIM_ABI64)
51 * PIC specific declarations
53 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
55 # define CPRESTORE(register) \
57 # define CPLOAD(register) \
60 # define CPRESTORE(register)
61 # define CPLOAD(register)
64 # define CPADD(register) \
68 * Set gp when at 1st instruction
74 /* Set gp when not at 1st instruction */
75 # define SETUP_GPX(r) \
77 move r, $31; /* Save old ra. */ \
78 bal 10f; /* Find addr of cpload. */ \
84 # define SETUP_GPX_L(r, l) \
86 move r, $31; /* Save old ra. */ \
87 bal l; /* Find addr of cpload. */ \
94 .cprestore x /* Save gp trigger t9/jalr conversion. */
95 # define SETUP_GP64(a, b)
96 # define SETUP_GPX64(a, b)
97 # define SETUP_GPX64_L(cp_reg, ra_save, l)
99 # define USE_ALT_CP(a)
100 # define L(label) $L ## label
101 #else /* (_MIPS_SIM == _MIPS_SIM_ABI64) || (_MIPS_SIM == _MIPS_SIM_NABI32) */
103 * For callee-saved gp calling convention:
106 # define SETUP_GPX(r)
107 # define SETUP_GPX_L(r, l)
110 # define SETUP_GP64(gpoffset, proc) \
111 .cpsetup $25, gpoffset, proc
112 # define SETUP_GPX64(cp_reg, ra_save) \
113 move ra_save, $31; /* Save old ra. */ \
115 bal 10f; /* Find addr of .cpsetup. */ \
119 .cpsetup $31, cp_reg, 10b; \
121 # define SETUP_GPX64_L(cp_reg, ra_save, l) \
122 move ra_save, $31; /* Save old ra. */ \
124 bal l; /* Find addr of .cpsetup. */ \
128 .cpsetup $31, cp_reg, l; \
130 # define RESTORE_GP64 \
132 /* Use alternate register for context pointer. */
133 # define USE_ALT_CP(reg) \
135 # define L(label) .L ## label
136 #endif /* _MIPS_SIM != _MIPS_SIM_ABI32 */
139 * Stack Frame Definitions
141 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
142 # define NARGSAVE 4 /* Space for 4 argument registers must be allocated. */
144 #if (_MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32)
145 # define NARGSAVE 0 /* No caller responsibilities. */
150 * LEAF - declare leaf routine
152 #define LEAF(symbol) \
155 .type symbol,@function; \
157 symbol: .frame sp,0,ra
160 * NESTED - declare nested routine entry point
162 #define NESTED(symbol, framesize, rpc) \
165 .type symbol,@function; \
167 symbol: .frame sp, framesize, rpc
170 * END - mark end of function
173 # define END(function) \
175 .size function,.-function
179 * EXPORT - export definition of symbol
181 #define EXPORT(symbol) \
186 * ABS - export absolute symbol
188 #define ABS(symbol,value) \
202 * Print formated string
204 #define PRINT(string) \
220 #define TTABLE(string) \
229 * MIPS IV pref instruction.
230 * Use with .set noreorder only!
232 * MIPS IV implementations are free to treat this as a nop. The R5000
233 * is one of them. So we should have an option not to use this instruction.
235 #if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
236 (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
237 # define PREF(hint,addr) \
239 # define PREFX(hint,addr) \
247 * MIPS ISA IV/V movn/movz instructions and equivalents for older CPUs.
249 #if _MIPS_ISA == _MIPS_ISA_MIPS1
250 # define MOVN(rd,rs,rt) \
257 # define MOVZ(rd,rs,rt) \
264 #endif /* _MIPS_ISA == _MIPS_ISA_MIPS1 */
265 #if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3)
266 # define MOVN(rd,rs,rt) \
273 # define MOVZ(rd,rs,rt) \
280 #endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */
281 #if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
282 (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
283 # define MOVN(rd,rs,rt) \
285 # define MOVZ(rd,rs,rt) \
287 #endif /* (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) */
292 #if (_MIPS_SIM == _MIPS_SIM_ABI64) || (_MIPS_SIM == _MIPS_SIM_NABI32)
303 #if (_MIPS_SIM == _MIPS_SIM_ABI64) || (_MIPS_SIM == _MIPS_SIM_NABI32)
310 * Use the following macros in assemblercode to load/store registers,
322 * How to add/sub/load/store/shift C int variables.
324 #if (_MIPS_SZINT == 32)
326 # define INT_ADDI addi
327 # define INT_ADDU addu
328 # define INT_ADDIU addiu
330 # define INT_SUBI subi
331 # define INT_SUBU subu
332 # define INT_SUBIU subu
337 #if (_MIPS_SZINT == 64)
338 # define INT_ADD dadd
339 # define INT_ADDI daddi
340 # define INT_ADDU daddu
341 # define INT_ADDIU daddiu
342 # define INT_SUB dadd
343 # define INT_SUBI dsubi
344 # define INT_SUBU dsubu
345 # define INT_SUBIU dsubu
351 * How to add/sub/load/store/shift C long variables.
353 #if (_MIPS_SZLONG == 32)
354 # define LONG_ADD add
355 # define LONG_ADDI addi
356 # define LONG_ADDU addu
357 # define LONG_ADDIU addiu
358 # define LONG_SUB add
359 # define LONG_SUBI subi
360 # define LONG_SUBU subu
361 # define LONG_SUBIU subu
364 # define LONG_SLL sll
365 # define LONG_SLLV sllv
366 # define LONG_SRL srl
367 # define LONG_SRLV srlv
368 # define LONG_SRA sra
369 # define LONG_SRAV srav
372 #if (_MIPS_SZLONG == 64)
373 # define LONG_ADD dadd
374 # define LONG_ADDI daddi
375 # define LONG_ADDU daddu
376 # define LONG_ADDIU daddiu
377 # define LONG_SUB dadd
378 # define LONG_SUBI dsubi
379 # define LONG_SUBU dsubu
380 # define LONG_SUBIU dsubu
383 # define LONG_SLL dsll
384 # define LONG_SLLV dsllv
385 # define LONG_SRL dsrl
386 # define LONG_SRLV dsrlv
387 # define LONG_SRA dsra
388 # define LONG_SRAV dsrav
392 * How to add/sub/load/store/shift pointers.
394 #if (_MIPS_SIM == _MIPS_SIM_ABI32 && _MIPS_SZPTR == 32)
396 # define PTR_ADDI addi
397 # define PTR_ADDU addu
398 # define PTR_ADDIU addiu
400 # define PTR_SUBI subi
401 # define PTR_SUBU subu
402 # define PTR_SUBIU subu
407 # define PTR_SLLV sllv
409 # define PTR_SRLV srlv
411 # define PTR_SRAV srav
413 # define PTR_SCALESHIFT 2
416 #if _MIPS_SIM == _MIPS_SIM_NABI32
418 # define PTR_ADDI addi
419 # define PTR_ADDU add /* no u */
420 # define PTR_ADDIU addi /* no u */
422 # define PTR_SUBI subi
423 # define PTR_SUBU sub /* no u */
424 # define PTR_SUBIU sub /* no u */
429 # define PTR_SLLV sllv
431 # define PTR_SRLV srlv
433 # define PTR_SRAV srav
435 # define PTR_SCALESHIFT 2
438 #if (_MIPS_SIM == _MIPS_SIM_ABI32 && _MIPS_SZPTR == 64 /* o64??? */) \
439 || _MIPS_SIM == _MIPS_SIM_ABI64
440 # define PTR_ADD dadd
441 # define PTR_ADDI daddi
442 # define PTR_ADDU daddu
443 # define PTR_ADDIU daddiu
444 # define PTR_SUB dadd
445 # define PTR_SUBI dsubi
446 # define PTR_SUBU dsubu
447 # define PTR_SUBIU dsubu
451 # define PTR_SLL dsll
452 # define PTR_SLLV dsllv
453 # define PTR_SRL dsrl
454 # define PTR_SRLV dsrlv
455 # define PTR_SRA dsra
456 # define PTR_SRAV dsrav
458 # define PTR_SCALESHIFT 3
462 * Some cp0 registers were extended to 64bit for MIPS III.
464 #if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
465 (_MIPS_ISA == _MIPS_ISA_MIPS32)
469 #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
470 (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
475 #endif /* sys/asm.h */