It fixes the following warnings seen on mips build.
[uclibc-ng.git] / libc / sysdeps / linux / mips / sys / asm.h
blob79d1439753b59bdb08f56808c152c86183bde04b
1 /* Copyright (C) 1997, 1998, 2002, 2003 Free Software Foundation, Inc.
2 This file is part of the GNU C Library.
3 Contributed by Ralf Baechle <ralf@gnu.org>.
5 The GNU C Library is free software; you can redistribute it and/or
6 modify it under the terms of the GNU Lesser General Public
7 License as published by the Free Software Foundation; either
8 version 2.1 of the License, or (at your option) any later version.
10 The GNU C Library is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
13 Lesser General Public License for more details.
15 You should have received a copy of the GNU Lesser General Public
16 License along with the GNU C Library; if not, write to the Free
17 Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
18 02111-1307 USA. */
20 #ifndef _SYS_ASM_H
21 #define _SYS_ASM_H
23 #include <sgidefs.h>
25 #ifndef CAT
26 # ifdef __STDC__
27 # define __CAT(str1,str2) str1##str2
28 # else
29 # define __CAT(str1,str2) str1/**/str2
30 # endif
31 # define CAT(str1,str2) __CAT(str1,str2)
32 #endif
35 * Macros to handle different pointer/register sizes for 32/64-bit code
37 * 64 bit address space isn't used yet, so we may use the R3000 32 bit
38 * defines for now.
40 #if (_MIPS_SIM == _MIPS_SIM_ABI32) || (_MIPS_SIM == _MIPS_SIM_NABI32)
41 # define PTR .word
42 # define PTRSIZE 4
43 # define PTRLOG 2
44 #elif (_MIPS_SIM == _MIPS_SIM_ABI64)
45 # define PTR .dword
46 # define PTRSIZE 8
47 # define PTRLOG 3
48 #endif
51 * PIC specific declarations
53 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
54 # ifdef __PIC__
55 # define CPRESTORE(register) \
56 .cprestore register
57 # define CPLOAD(register) \
58 .cpload register
59 # else
60 # define CPRESTORE(register)
61 # define CPLOAD(register)
62 # endif
64 # define CPADD(register) \
65 .cpadd register
68 * Set gp when at 1st instruction
70 # define SETUP_GP \
71 .set noreorder; \
72 .cpload $25; \
73 .set reorder
74 /* Set gp when not at 1st instruction */
75 # define SETUP_GPX(r) \
76 .set noreorder; \
77 move r, $31; /* Save old ra. */ \
78 bal 10f; /* Find addr of cpload. */ \
79 nop; \
80 10: \
81 .cpload $31; \
82 move $31, r; \
83 .set reorder
84 # define SETUP_GPX_L(r, l) \
85 .set noreorder; \
86 move r, $31; /* Save old ra. */ \
87 bal l; /* Find addr of cpload. */ \
88 nop; \
89 l: \
90 .cpload $31; \
91 move $31, r; \
92 .set reorder
93 # define SAVE_GP(x) \
94 .cprestore x /* Save gp trigger t9/jalr conversion. */
95 # define SETUP_GP64(a, b)
96 # define SETUP_GPX64(a, b)
97 # define SETUP_GPX64_L(cp_reg, ra_save, l)
98 # define RESTORE_GP64
99 # define USE_ALT_CP(a)
100 # define L(label) $L ## label
101 #else /* (_MIPS_SIM == _MIPS_SIM_ABI64) || (_MIPS_SIM == _MIPS_SIM_NABI32) */
103 * For callee-saved gp calling convention:
105 # define SETUP_GP
106 # define SETUP_GPX(r)
107 # define SETUP_GPX_L(r, l)
108 # define SAVE_GP(x)
110 # define SETUP_GP64(gpoffset, proc) \
111 .cpsetup $25, gpoffset, proc
112 # define SETUP_GPX64(cp_reg, ra_save) \
113 move ra_save, $31; /* Save old ra. */ \
114 .set noreorder; \
115 bal 10f; /* Find addr of .cpsetup. */ \
116 nop; \
117 10: \
118 .set reorder; \
119 .cpsetup $31, cp_reg, 10b; \
120 move $31, ra_save
121 # define SETUP_GPX64_L(cp_reg, ra_save, l) \
122 move ra_save, $31; /* Save old ra. */ \
123 .set noreorder; \
124 bal l; /* Find addr of .cpsetup. */ \
125 nop; \
126 l: \
127 .set reorder; \
128 .cpsetup $31, cp_reg, l; \
129 move $31, ra_save
130 # define RESTORE_GP64 \
131 .cpreturn
132 /* Use alternate register for context pointer. */
133 # define USE_ALT_CP(reg) \
134 .cplocal reg
135 # define L(label) .L ## label
136 #endif /* _MIPS_SIM != _MIPS_SIM_ABI32 */
139 * Stack Frame Definitions
141 #if (_MIPS_SIM == _MIPS_SIM_ABI32)
142 # define NARGSAVE 4 /* Space for 4 argument registers must be allocated. */
143 #endif
144 #if (_MIPS_SIM == _MIPS_SIM_ABI64 || _MIPS_SIM == _MIPS_SIM_NABI32)
145 # define NARGSAVE 0 /* No caller responsibilities. */
146 #endif
150 * LEAF - declare leaf routine
152 #define LEAF(symbol) \
153 .globl symbol; \
154 .align 2; \
155 .type symbol,@function; \
156 .ent symbol,0; \
157 symbol: .frame sp,0,ra
160 * NESTED - declare nested routine entry point
162 #define NESTED(symbol, framesize, rpc) \
163 .globl symbol; \
164 .align 2; \
165 .type symbol,@function; \
166 .ent symbol,0; \
167 symbol: .frame sp, framesize, rpc
170 * END - mark end of function
172 #ifndef END
173 # define END(function) \
174 .end function; \
175 .size function,.-function
176 #endif
179 * EXPORT - export definition of symbol
181 #define EXPORT(symbol) \
182 .globl symbol; \
183 symbol:
186 * ABS - export absolute symbol
188 #define ABS(symbol,value) \
189 .globl symbol; \
190 symbol = value
192 #define PANIC(msg) \
193 .set push; \
194 .set reorder; \
195 la a0,8f; \
196 jal panic; \
197 9: b 9b; \
198 .set pop; \
199 TEXT(msg)
202 * Print formated string
204 #define PRINT(string) \
205 .set push; \
206 .set reorder; \
207 la a0,8f; \
208 jal printk; \
209 .set pop; \
210 TEXT(string)
212 #define TEXT(msg) \
213 .data; \
214 8: .asciiz msg; \
215 .previous;
218 * Build text tables
220 #define TTABLE(string) \
221 .text; \
222 .word 1f; \
223 .previous; \
224 .data; \
225 1: .asciz string; \
226 .previous
229 * MIPS IV pref instruction.
230 * Use with .set noreorder only!
232 * MIPS IV implementations are free to treat this as a nop. The R5000
233 * is one of them. So we should have an option not to use this instruction.
235 #if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
236 (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
237 # define PREF(hint,addr) \
238 pref hint,addr
239 # define PREFX(hint,addr) \
240 prefx hint,addr
241 #else
242 # define PREF
243 # define PREFX
244 #endif
247 * MIPS ISA IV/V movn/movz instructions and equivalents for older CPUs.
249 #if _MIPS_ISA == _MIPS_ISA_MIPS1
250 # define MOVN(rd,rs,rt) \
251 .set push; \
252 .set reorder; \
253 beqz rt,9f; \
254 move rd,rs; \
255 .set pop; \
257 # define MOVZ(rd,rs,rt) \
258 .set push; \
259 .set reorder; \
260 bnez rt,9f; \
261 move rd,rt; \
262 .set pop; \
264 #endif /* _MIPS_ISA == _MIPS_ISA_MIPS1 */
265 #if (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3)
266 # define MOVN(rd,rs,rt) \
267 .set push; \
268 .set noreorder; \
269 bnezl rt,9f; \
270 move rd,rs; \
271 .set pop; \
273 # define MOVZ(rd,rs,rt) \
274 .set push; \
275 .set noreorder; \
276 beqzl rt,9f; \
277 movz rd,rs; \
278 .set pop; \
280 #endif /* (_MIPS_ISA == _MIPS_ISA_MIPS2) || (_MIPS_ISA == _MIPS_ISA_MIPS3) */
281 #if (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) || \
282 (_MIPS_ISA == _MIPS_ISA_MIPS32) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
283 # define MOVN(rd,rs,rt) \
284 movn rd,rs,rt
285 # define MOVZ(rd,rs,rt) \
286 movz rd,rs,rt
287 #endif /* (_MIPS_ISA == _MIPS_ISA_MIPS4) || (_MIPS_ISA == _MIPS_ISA_MIPS5) */
290 * Stack alignment
292 #if (_MIPS_SIM == _MIPS_SIM_ABI64) || (_MIPS_SIM == _MIPS_SIM_NABI32)
293 # define ALSZ 15
294 # define ALMASK ~15
295 #else
296 # define ALSZ 7
297 # define ALMASK ~7
298 #endif
301 * Size of a register
303 #if (_MIPS_SIM == _MIPS_SIM_ABI64) || (_MIPS_SIM == _MIPS_SIM_NABI32)
304 # define SZREG 8
305 #else
306 # define SZREG 4
307 #endif
310 * Use the following macros in assemblercode to load/store registers,
311 * pointers etc.
313 #if (SZREG == 4)
314 # define REG_S sw
315 # define REG_L lw
316 #else
317 # define REG_S sd
318 # define REG_L ld
319 #endif
322 * How to add/sub/load/store/shift C int variables.
324 #if (_MIPS_SZINT == 32)
325 # define INT_ADD add
326 # define INT_ADDI addi
327 # define INT_ADDU addu
328 # define INT_ADDIU addiu
329 # define INT_SUB add
330 # define INT_SUBI subi
331 # define INT_SUBU subu
332 # define INT_SUBIU subu
333 # define INT_L lw
334 # define INT_S sw
335 #endif
337 #if (_MIPS_SZINT == 64)
338 # define INT_ADD dadd
339 # define INT_ADDI daddi
340 # define INT_ADDU daddu
341 # define INT_ADDIU daddiu
342 # define INT_SUB dadd
343 # define INT_SUBI dsubi
344 # define INT_SUBU dsubu
345 # define INT_SUBIU dsubu
346 # define INT_L ld
347 # define INT_S sd
348 #endif
351 * How to add/sub/load/store/shift C long variables.
353 #if (_MIPS_SZLONG == 32)
354 # define LONG_ADD add
355 # define LONG_ADDI addi
356 # define LONG_ADDU addu
357 # define LONG_ADDIU addiu
358 # define LONG_SUB add
359 # define LONG_SUBI subi
360 # define LONG_SUBU subu
361 # define LONG_SUBIU subu
362 # define LONG_L lw
363 # define LONG_S sw
364 # define LONG_SLL sll
365 # define LONG_SLLV sllv
366 # define LONG_SRL srl
367 # define LONG_SRLV srlv
368 # define LONG_SRA sra
369 # define LONG_SRAV srav
370 #endif
372 #if (_MIPS_SZLONG == 64)
373 # define LONG_ADD dadd
374 # define LONG_ADDI daddi
375 # define LONG_ADDU daddu
376 # define LONG_ADDIU daddiu
377 # define LONG_SUB dadd
378 # define LONG_SUBI dsubi
379 # define LONG_SUBU dsubu
380 # define LONG_SUBIU dsubu
381 # define LONG_L ld
382 # define LONG_S sd
383 # define LONG_SLL dsll
384 # define LONG_SLLV dsllv
385 # define LONG_SRL dsrl
386 # define LONG_SRLV dsrlv
387 # define LONG_SRA dsra
388 # define LONG_SRAV dsrav
389 #endif
392 * How to add/sub/load/store/shift pointers.
394 #if (_MIPS_SIM == _MIPS_SIM_ABI32 && _MIPS_SZPTR == 32)
395 # define PTR_ADD add
396 # define PTR_ADDI addi
397 # define PTR_ADDU addu
398 # define PTR_ADDIU addiu
399 # define PTR_SUB add
400 # define PTR_SUBI subi
401 # define PTR_SUBU subu
402 # define PTR_SUBIU subu
403 # define PTR_L lw
404 # define PTR_LA la
405 # define PTR_S sw
406 # define PTR_SLL sll
407 # define PTR_SLLV sllv
408 # define PTR_SRL srl
409 # define PTR_SRLV srlv
410 # define PTR_SRA sra
411 # define PTR_SRAV srav
413 # define PTR_SCALESHIFT 2
414 #endif
416 #if _MIPS_SIM == _MIPS_SIM_NABI32
417 # define PTR_ADD add
418 # define PTR_ADDI addi
419 # define PTR_ADDU add /* no u */
420 # define PTR_ADDIU addi /* no u */
421 # define PTR_SUB add
422 # define PTR_SUBI subi
423 # define PTR_SUBU sub /* no u */
424 # define PTR_SUBIU sub /* no u */
425 # define PTR_L lw
426 # define PTR_LA la
427 # define PTR_S sw
428 # define PTR_SLL sll
429 # define PTR_SLLV sllv
430 # define PTR_SRL srl
431 # define PTR_SRLV srlv
432 # define PTR_SRA sra
433 # define PTR_SRAV srav
435 # define PTR_SCALESHIFT 2
436 #endif
438 #if (_MIPS_SIM == _MIPS_SIM_ABI32 && _MIPS_SZPTR == 64 /* o64??? */) \
439 || _MIPS_SIM == _MIPS_SIM_ABI64
440 # define PTR_ADD dadd
441 # define PTR_ADDI daddi
442 # define PTR_ADDU daddu
443 # define PTR_ADDIU daddiu
444 # define PTR_SUB dadd
445 # define PTR_SUBI dsubi
446 # define PTR_SUBU dsubu
447 # define PTR_SUBIU dsubu
448 # define PTR_L ld
449 # define PTR_LA dla
450 # define PTR_S sd
451 # define PTR_SLL dsll
452 # define PTR_SLLV dsllv
453 # define PTR_SRL dsrl
454 # define PTR_SRLV dsrlv
455 # define PTR_SRA dsra
456 # define PTR_SRAV dsrav
458 # define PTR_SCALESHIFT 3
459 #endif
462 * Some cp0 registers were extended to 64bit for MIPS III.
464 #if (_MIPS_ISA == _MIPS_ISA_MIPS1) || (_MIPS_ISA == _MIPS_ISA_MIPS2) || \
465 (_MIPS_ISA == _MIPS_ISA_MIPS32)
466 # define MFC0 mfc0
467 # define MTC0 mtc0
468 #endif
469 #if (_MIPS_ISA == _MIPS_ISA_MIPS3) || (_MIPS_ISA == _MIPS_ISA_MIPS4) || \
470 (_MIPS_ISA == _MIPS_ISA_MIPS5) || (_MIPS_ISA == _MIPS_ISA_MIPS64)
471 # define MFC0 dmfc0
472 # define MTC0 dmtc0
473 #endif
475 #endif /* sys/asm.h */