include/configs/versatile.h

   1 /*
   2  * (C) Copyright 2003
   3  * Texas Instruments.
   4  * Kshitij Gupta <kshitij@ti.com>
   5  * Configuation settings for the TI OMAP Innovator board.
   6  *
   7  * (C) Copyright 2004
   8  * ARM Ltd.
   9  * Philippe Robin, <philippe.robin@arm.com>
  10  * Configuration for Versatile PB.
  11  *
  12  * See file CREDITS for list of people who contributed to this
  13  * project.
  14  *
  15  * This program is free software; you can redistribute it and/or
  16  * modify it under the terms of the GNU General Public License as
  17  * published by the Free Software Foundation; either version 2 of
  18  * the License, or (at your option) any later version.
  19  *
  20  * This program is distributed in the hope that it will be useful,
  21  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  23  * GNU General Public License for more details.
  24  *
  25  * You should have received a copy of the GNU General Public License
  26  * along with this program; if not, write to the Free Software
  27  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  28  * MA 02111-1307 USA
  29  */
  30
  31 #ifndef __CONFIG_H
  32 #define __CONFIG_H
  33
  34 /*
  35  * High Level Configuration Options
  36  * (easy to change)
  37  */
  38 #define CONFIG_ARM926EJS        1       /* This is an arm926ejs CPU core  */
  39 #define CONFIG_VERSATILE        1       /* in Versatile Platform Board  */
  40 #define CONFIG_ARCH_VERSATILE   1       /* Specifically, a Versatile    */
  41
  42
  43 #define CFG_MEMTEST_START       0x100000
  44 #define CFG_MEMTEST_END         0x10000000
  45 #define CFG_HZ                  (1000000 / 256)
  46 #define CFG_TIMERBASE           0x101E2000      /* Timer 0 and 1 base */
  47
  48 #define CFG_TIMER_INTERVAL      10000
  49 #define CFG_TIMER_RELOAD        (CFG_TIMER_INTERVAL >> 4)       /* Divide by 16 */
  50 #define CFG_TIMER_CTRL          0x84                            /* Enable, Clock / 16 */
  51
  52 /*
  53  * control registers
  54  */
  55 #define VERSATILE_SCTL_BASE            0x101E0000       /* System controller */
  56
  57 /*
  58  * System controller bit assignment
  59  */
  60 #define VERSATILE_REFCLK        0
  61 #define VERSATILE_TIMCLK        1
  62
  63 #define VERSATILE_TIMER1_EnSel  15
  64 #define VERSATILE_TIMER2_EnSel  17
  65 #define VERSATILE_TIMER3_EnSel  19
  66 #define VERSATILE_TIMER4_EnSel  21
  67
  68 #define CONFIG_CMDLINE_TAG              1       /* enable passing of ATAGs  */
  69 #define CONFIG_SETUP_MEMORY_TAGS        1
  70 #define CONFIG_MISC_INIT_R              1       /* call misc_init_r during start up */
  71 /*
  72  * Size of malloc() pool
  73  */
  74 #define CFG_MALLOC_LEN  (CFG_ENV_SIZE + 128*1024)
  75 #define CFG_GBL_DATA_SIZE       128     /* size in bytes reserved for initial data */
  76
  77 /*
  78  * Hardware drivers
  79  */
  80
  81 #define CONFIG_DRIVER_SMC91111
  82 #define CONFIG_SMC_USE_32_BIT
  83 #define CONFIG_SMC91111_BASE            0x10010000
  84 #undef CONFIG_SMC91111_EXT_PHY
  85
  86 /*
  87  * NS16550 Configuration
  88  */
  89 #define CFG_PL011_SERIAL
  90 #define CONFIG_PL011_CLOCK      24000000
  91 #define CONFIG_PL01x_PORTS      { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1 }
  92 #define CONFIG_CONS_INDEX       0
  93
  94 #define CONFIG_BAUDRATE         38400
  95 #define CFG_BAUDRATE_TABLE      { 9600, 19200, 38400, 57600, 115200 }
  96 #define CFG_SERIAL0             0x101F1000
  97 #define CFG_SERIAL1             0x101F2000
  98
  99
 100 /*
 101  * Command line configuration.
 102  */
 103
 104 #define CONFIG_CMD_DHCP
 105 #define CONFIG_CMD_IMI
 106 #define CONFIG_CMD_NET
 107 #define CONFIG_CMD_PING
 108 #define CONFIG_CMD_BDI
 109 #define CONFIG_CMD_MEMORY
 110 #define CONFIG_CMD_FLASH
 111 #define CONFIG_CMD_ENV
 112
 113
 114 /*
 115  * BOOTP options
 116  */
 117 #define CONFIG_BOOTP_SUBNETMASK
 118 #define CONFIG_BOOTP_GATEWAY
 119 #define CONFIG_BOOTP_HOSTNAME
 120 #define CONFIG_BOOTP_BOOTPATH
 121
 122
 123 #define CONFIG_BOOTDELAY        2
 124 #define CONFIG_BOOTARGS "root=/dev/nfs mem=128M ip=dhcp netdev=25,0,0xf1010000,0xf1010010,eth0"
 125 /*#define CONFIG_BOOTCOMMAND "bootp ; bootm" */
 126
 127 /*
 128  * Static configuration when assigning fixed address
 129  */
 130 /*#define CONFIG_NETMASK        255.255.255.0   /--* talk on MY local net */
 131 /*#define CONFIG_IPADDR         xx.xx.xx.xx     /--* static IP I currently own */
 132 /*#define CONFIG_SERVERIP       xx.xx.xx.xx     /--* current IP of my dev pc */
 133 #define CONFIG_BOOTFILE     "/tftpboot/uImage" /* file to load */
 134
 135
 136 /*
 137  * Miscellaneous configurable options
 138  */
 139 #define CFG_LONGHELP    /* undef to save memory     */
 140 #define CFG_PROMPT      "Versatile # "  /* Monitor Command Prompt   */
 141 #define CFG_CBSIZE      256             /* Console I/O Buffer Size  */
 142 /* Print Buffer Size */
 143 #define CFG_PBSIZE      (CFG_CBSIZE+sizeof(CFG_PROMPT)+16)
 144 #define CFG_MAXARGS     16              /* max number of command args   */
 145 #define CFG_BARGSIZE    CFG_CBSIZE      /* Boot Argument Buffer Size    */
 146
 147 #undef  CFG_CLKS_IN_HZ          /* everything, incl board info, in Hz */
 148 #define CFG_LOAD_ADDR   0x7fc0  /* default load address */
 149
 150 /*-----------------------------------------------------------------------
 151  * Stack sizes
 152  *
 153  * The stack sizes are set up in start.S using the settings below
 154  */
 155 #define CONFIG_STACKSIZE        (128*1024)      /* regular stack */
 156 #ifdef CONFIG_USE_IRQ
 157 #define CONFIG_STACKSIZE_IRQ    (4*1024)        /* IRQ stack */
 158 #define CONFIG_STACKSIZE_FIQ    (4*1024)        /* FIQ stack */
 159 #endif
 160
 161 /*-----------------------------------------------------------------------
 162  * Physical Memory Map
 163  */
 164 #define CONFIG_NR_DRAM_BANKS    1       /* we have 1 bank of DRAM */
 165 #define PHYS_SDRAM_1            0x00000000      /* SDRAM Bank #1 */
 166 #define PHYS_SDRAM_1_SIZE       0x08000000      /* 128 MB */
 167
 168 #define CFG_FLASH_BASE          0x34000000
 169
 170 /*-----------------------------------------------------------------------
 171  * FLASH and environment organization
 172  */
 173
 174 #define VERSATILE_SYS_BASE                    0x10000000
 175 #define VERSATILE_SYS_FLASH_OFFSET            0x4C
 176 #define VERSATILE_FLASHCTRL                   (VERSATILE_SYS_BASE + VERSATILE_SYS_FLASH_OFFSET)
 177 #define VERSATILE_FLASHPROG_FLVPPEN           (1 << 0)  /* Enable writing to flash */
 178
 179 #define CFG_MAX_FLASH_BANKS     1               /* max number of memory banks */
 180 #define PHYS_FLASH_SIZE         0x34000000      /* 64MB */
 181 /* timeout values are in ticks */
 182 #define CFG_FLASH_ERASE_TOUT    (20*CFG_HZ)     /* Timeout for Flash Erase */
 183 #define CFG_FLASH_WRITE_TOUT    (20*CFG_HZ)     /* Timeout for Flash Write */
 184 #define CFG_MAX_FLASH_SECT      (256)
 185
 186 #define PHYS_FLASH_1            (CFG_FLASH_BASE)
 187
 188 #define CFG_ENV_IS_IN_FLASH     1               /* env in flash instead of CFG_ENV_IS_NOWHERE */
 189 #define CFG_ENV_SECT_SIZE       0x00020000      /* 256 KB sectors (x2) */
 190 #define CFG_ENV_SIZE            0x10000         /* Total Size of Environment Sector */
 191 #define CFG_ENV_OFFSET          0x01f00000      /* environment starts here  */
 192 #define CFG_ENV_ADDR            (CFG_FLASH_BASE + CFG_ENV_OFFSET)
 193
 194 #endif                                                  /* __CONFIG_H */