include/asm-blackfin/ptrace.h

   1 /*
   2  * U-boot - ptrace.h
   3  *
   4  * Copyright (c) 2005-2007 Analog Devices Inc.
   5  *
   6  * See file CREDITS for list of people who contributed to this
   7  * project.
   8  *
   9  * This program is free software; you can redistribute it and/or
  10  * modify it under the terms of the GNU General Public License as
  11  * published by the Free Software Foundation; either version 2 of
  12  * the License, or (at your option) any later version.
  13  *
  14  * This program is distributed in the hope that it will be useful,
  15  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17  * GNU General Public License for more details.
  18  *
  19  * You should have received a copy of the GNU General Public License
  20  * along with this program; if not, write to the Free Software
  21  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston,
  22  * MA 02110-1301 USA
  23  */
  24
  25 #ifndef _BLACKFIN_PTRACE_H
  26 #define _BLACKFIN_PTRACE_H
  27
  28 #define NEW_PT_REGS
  29
  30 /*
  31  * GCC defines register number like this:
  32  * -----------------------------
  33  *       0 - 7 are data registers R0-R7
  34  *       8 - 15 are address registers P0-P7
  35  *      16 - 31 dsp registers I/B/L0 -- I/B/L3 & M0--M3
  36  *      32 - 33 A registers A0 & A1
  37  *      34 -    status register
  38  *
  39  * We follows above, except:
  40  *      32-33 --- Low 32-bit of A0&1
  41  *      34-35 --- High 8-bit of A0&1
  42  */
  43
  44 #if defined(NEW_PT_REGS)
  45
  46 #define PT_IPEND        0
  47 #define PT_SYSCFG       (PT_IPEND+4)
  48 #define PT_SEQSTAT      (PT_SYSCFG+4)
  49 #define PT_RETE         (PT_SEQSTAT+4)
  50 #define PT_RETN         (PT_RETE+4)
  51 #define PT_RETX         (PT_RETN+4)
  52 #define PT_RETI         (PT_RETX+4)
  53 #define PT_PC           PT_RETI
  54 #define PT_RETS         (PT_RETI+4)
  55 #define PT_RESERVED     (PT_RETS+4)
  56 #define PT_ASTAT        (PT_RESERVED+4)
  57 #define PT_LB1          (PT_ASTAT+4)
  58 #define PT_LB0          (PT_LB1+4)
  59 #define PT_LT1          (PT_LB0+4)
  60 #define PT_LT0          (PT_LT1+4)
  61 #define PT_LC1          (PT_LT0+4)
  62 #define PT_LC0          (PT_LC1+4)
  63 #define PT_A1W          (PT_LC0+4)
  64 #define PT_A1X          (PT_A1W+4)
  65 #define PT_A0W          (PT_A1X+4)
  66 #define PT_A0X          (PT_A0W+4)
  67 #define PT_B3           (PT_A0X+4)
  68 #define PT_B2           (PT_B3+4)
  69 #define PT_B1           (PT_B2+4)
  70 #define PT_B0           (PT_B1+4)
  71 #define PT_L3           (PT_B0+4)
  72 #define PT_L2           (PT_L3+4)
  73 #define PT_L1           (PT_L2+4)
  74 #define PT_L0           (PT_L1+4)
  75 #define PT_M3           (PT_L0+4)
  76 #define PT_M2           (PT_M3+4)
  77 #define PT_M1           (PT_M2+4)
  78 #define PT_M0           (PT_M1+4)
  79 #define PT_I3           (PT_M0+4)
  80 #define PT_I2           (PT_I3+4)
  81 #define PT_I1           (PT_I2+4)
  82 #define PT_I0           (PT_I1+4)
  83 #define PT_USP          (PT_I0+4)
  84 #define PT_FP           (PT_USP+4)
  85 #define PT_P5           (PT_FP+4)
  86 #define PT_P4           (PT_P5+4)
  87 #define PT_P3           (PT_P4+4)
  88 #define PT_P2           (PT_P3+4)
  89 #define PT_P1           (PT_P2+4)
  90 #define PT_P0           (PT_P1+4)
  91 #define PT_R7           (PT_P0+4)
  92 #define PT_R6           (PT_R7+4)
  93 #define PT_R5           (PT_R6+4)
  94 #define PT_R4           (PT_R5+4)
  95 #define PT_R3           (PT_R4+4)
  96 #define PT_R2           (PT_R3+4)
  97 #define PT_R1           (PT_R2+4)
  98 #define PT_R0           (PT_R1+4)
  99 #define PT_ORIG_R0      (PT_R0+4)
 100 #define PT_SR           PT_SEQSTAT
 101
 102 #else
 103 /*
 104  * Here utilize blackfin : dpregs = [pregs + imm16s4]
 105  *                     [pregs + imm16s4] = dpregs
 106  * to access defferent saved reg in stack
 107  */
 108 #define PT_R3           0
 109 #define PT_R4           4
 110 #define PT_R2           8
 111 #define PT_R1           12
 112 #define PT_P5           16
 113 #define PT_P4           20
 114 #define PT_P3           24
 115 #define PT_P2           28
 116 #define PT_P1           32
 117 #define PT_P0           36
 118 #define PT_R7           40
 119 #define PT_R6           44
 120 #define PT_R5           48
 121 #define PT_PC           52
 122 #define PT_SEQSTAT      56      /* so-called SR reg */
 123 #define PT_SR           PT_SEQSTAT
 124 #define PT_ASTAT        60
 125 #define PT_RETS         64
 126 #define PT_A1w          68
 127 #define PT_A0w          72
 128 #define PT_A1x          76
 129 #define PT_A0x          80
 130 #define PT_ORIG_R0      84
 131 #define PT_R0           88
 132 #define PT_USP          92
 133 #define PT_FP           96
 134 #define PT_SP           100
 135
 136 /* Added by HuTao, May26 2003 3:18PM */
 137 #define PT_IPEND        100
 138
 139 /* Add SYSCFG register for single stepping support */
 140 #define PT_SYSCFG       104
 141
 142 #endif
 143
 144 #ifndef __ASSEMBLY__
 145
 146 #if defined(NEW_PT_REGS)
 147 /* this struct defines the way the registers are stored on the
 148  * stack during a system call.
 149  */
 150 struct pt_regs {
 151         long ipend;
 152         long syscfg;
 153         long seqstat;
 154         long rete;
 155         long retn;
 156         long retx;
 157         long pc;
 158         long rets;
 159         long reserved;
 160         long astat;
 161         long lb1;
 162         long lb0;
 163         long lt1;
 164         long lt0;
 165         long lc1;
 166         long lc0;
 167         long a1w;
 168         long a1x;
 169         long a0w;
 170         long a0x;
 171         long b3;
 172         long b2;
 173         long b1;
 174         long b0;
 175         long l3;
 176         long l2;
 177         long l1;
 178         long l0;
 179         long m3;
 180         long m2;
 181         long m1;
 182         long m0;
 183         long i3;
 184         long i2;
 185         long i1;
 186         long i0;
 187         long usp;
 188         long fp;
 189         long p5;
 190         long p4;
 191         long p3;
 192         long p2;
 193         long p1;
 194         long p0;
 195         long r7;
 196         long r6;
 197         long r5;
 198         long r4;
 199         long r3;
 200         long r2;
 201         long r1;
 202         long r0;
 203         long orig_r0;
 204 };
 205
 206 #else
 207 /* now we don't know what regs the system call will use */
 208 struct pt_regs {
 209         long r3;
 210         long r4;
 211         long r2;
 212         long r1;
 213         long p5;
 214         long p4;
 215         long p3;
 216         long p2;
 217         long p1;
 218         long p0;
 219         long r7;
 220         long r6;
 221         long r5;
 222         unsigned long pc;
 223         unsigned long seqstat;
 224         unsigned long astat;
 225         unsigned long rets;
 226         long a1w;
 227         long a0w;
 228         long a1x;
 229         long a0x;
 230         long orig_r0;
 231         long r0;
 232         long usp;
 233         long fp;
 234 /*
 235  * Added for supervisor/user mode switch.
 236  *
 237  * HuTao May26 03 3:23PM
 238  */
 239         long ipend;
 240         long syscfg;
 241 };
 242
 243 #endif
 244
 245 /* Arbitrarily choose the same ptrace numbers as used by the Sparc code. */
 246 #define PTRACE_GETREGS          12
 247 #define PTRACE_SETREGS          13      /* ptrace signal */
 248
 249 #ifdef __KERNEL__
 250
 251 #ifndef PS_S
 252 #define PS_S                    (0x0c00)
 253
 254 /* Bit 11:10 of SEQSTAT defines user/supervisor/debug mode
 255  *        00: user
 256  *        01: supervisor
 257  *        1x: debug
 258  */
 259
 260 #define PS_M                    (0x1000)        /* I am not sure why this is required here Akbar */
 261 #endif
 262
 263 #define user_mode(regs)                 (!((regs)->seqstat & PS_S))
 264 #define instruction_pointer(regs)       ((regs)->pc)
 265 extern void show_regs(struct pt_regs *);
 266
 267 #endif
 268 #endif
 269 #endif