Modified patch originates from Andy Green <andy@openmoko.com>
[u-boot-openmoko/mini2440.git] / board / atum8548 / law.c
blob3606cbb52f4d5006992b0172b6483865a73c17a1
1 /*
2 * Copyright 2008 Freescale Semiconductor, Inc.
4 * (C) Copyright 2000
5 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
7 * See file CREDITS for list of people who contributed to this
8 * project.
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23 * MA 02111-1307 USA
26 #include <common.h>
27 #include <asm/fsl_law.h>
28 #include <asm/mmu.h>
31 * LAW(Local Access Window) configuration:
33 * 0x0000_0000 0x7fff_ffff DDR 2G
34 * 0x8000_0000 0x9fff_ffff PCI1 MEM 512M
35 * 0xa000_0000 0xbfff_ffff PCIe MEM 512M
36 * 0xc000_0000 0xdfff_ffff PCI2 MEM 512M
37 * 0xe000_0000 0xe000_ffff CCSR 1M
38 * 0xe200_0000 0xe10f_ffff PCI1 IO 1M
39 * 0xe280_0000 0xe20f_ffff PCI2 IO 1M
40 * 0xe300_0000 0xe30f_ffff PCIe IO 1M
41 * 0xf800_0000 0xffff_ffff FLASH (boot bank) 128M
43 * Notes:
44 * CCSRBAR and L2-as-SRAM don't need a configured Local Access Window.
45 * If flash is 8M at default position (last 8M), no LAW needed.
47 * LAW 0 is reserved for boot mapping
50 struct law_entry law_table[] = {
51 SET_LAW_ENTRY(2, CFG_PCI1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_1),
52 SET_LAW_ENTRY(3, CFG_PCI1_IO_PHYS, LAWAR_SIZE_1M, LAW_TRGT_IF_PCI_1),
53 SET_LAW_ENTRY(4, CFG_PCI2_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCI_2),
54 SET_LAW_ENTRY(5, CFG_PCI2_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCI_2),
55 SET_LAW_ENTRY(6, CFG_PCIE1_MEM_PHYS, LAW_SIZE_512M, LAW_TRGT_IF_PCIE_1),
56 SET_LAW_ENTRY(7, CFG_PCIE1_IO_PHYS, LAW_SIZE_1M, LAW_TRGT_IF_PCIE_1),
57 /* LBC window - maps 256M 0xf0000000 -> 0xffffffff */
58 SET_LAW_ENTRY(8, CFG_LBC_CACHE_BASE, LAW_SIZE_256M, LAW_TRGT_IF_LBC),
61 int num_law_entries = ARRAY_SIZE(law_table);