1 By Thomas.Lange@corelatus.se 2004-Oct-05
2 ----------------------------------------
3 DbAu1xx0 are development boards from AMD containing
4 an Alchemy AU1xx0 series cpu with mips32 core.
5 Existing cpu:s are Au1000, Au1100, Au1500 and Au1550
9 Support was originally big endian only.
10 I have not tested, but several u-boot users report working
11 configurations in little endian mode.
13 I named the board dbau1x00, to allow
14 support for all three development boards
15 ( dbau1000, dbau1100 and dbau1500 ).
16 Now there is a new board called dbau1550 also, which
17 should be supported RSN.
19 I only have a dbau1000, so my testing is limited
22 The board has two different flash banks, that can
23 be selected via dip switch. This makes it possible
24 to test new bootloaders without thrashing the YAMON
25 boot loader delivered with board.
27 NOTE! When you switch between the two boot flashes, the
28 base addresses will be swapped.
29 Have this in mind when you compile u-boot. TEXT_BASE has
30 to match the address where u-boot is located when you
33 Ethernet only supported for mac0.
35 PCMCIA only supported for slot 0, only 3.3V.
37 PCMCIA IDE tested with Sandisk Compact Flash and
40 ###################################
41 ######## NOTE!!!!!! #########
42 ###################################
43 If you partition a disk on another system (e.g. laptop),
44 all bytes will be swapped on 16bit level when using
45 PCMCIA and running cpu in big endian mode!!!!
47 This is probably due to an error in Au1000 chip.
51 a) Boot via network and partition disk directly from
52 dbau1x00. The endian will then be correct.
54 b) Partition disk on "laptop" and fill it with all files
55 you need. Then write a simple program that endian swaps
59 Original "laptop" byte order:
60 B0 B1 B2 B3 B4 B5 B6 B7 B8 B9...
62 Dbau1000 byte order will then be:
63 B1 B0 B3 B2 B5 B4 B7 B6 B9 B8...