include/usbdcore_mpc8xx.h

   1 /*
   2  * Copyright (C) 2006 Bryan O'Donoghue, CodeHermit
   3  * bodonoghue@codehermit.ie
   4  *
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the
  18  * Free Software Foundation, Inc.,
  19  * 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
  20  *
  21  */
  22
  23 #include <commproc.h>
  24
  25 /* Mode Register */
  26 #define USMOD_EN        0x01
  27 #define USMOD_HOST      0x02
  28 #define USMOD_TEST      0x04
  29 #define USMOD_SFTE      0x08
  30 #define USMOD_RESUME    0x40
  31 #define USMOD_LSS       0x80
  32
  33 /* Endpoint Registers */
  34 #define USEP_RHS_NORM   0x00
  35 #define USEP_RHS_IGNORE 0x01
  36 #define USEP_RHS_NAK    0x02
  37 #define USEP_RHS_STALL  0x03
  38
  39 #define USEP_THS_NORM   0x00
  40 #define USEP_THS_IGNORE 0x04
  41 #define USEP_THS_NAK    0x08
  42 #define USEP_THS_STALL  0x0C
  43
  44 #define USEP_RTE        0x10
  45 #define USEP_MF         0x20
  46
  47 #define USEP_TM_CONTROL 0x00
  48 #define USEP_TM_INT     0x100
  49 #define USEP_TM_BULK    0x200
  50 #define USEP_TM_ISO     0x300
  51
  52 /* Command Register */
  53 #define USCOM_EP0       0x00
  54 #define USCOM_EP1       0x01
  55 #define USCOM_EP2       0x02
  56 #define USCOM_EP3       0x03
  57
  58 #define USCOM_FLUSH     0x40
  59 #define USCOM_STR       0x80
  60
  61 /* Event Register */
  62 #define USB_E_RXB       0x0001
  63 #define USB_E_TXB       0x0002
  64 #define USB_E_BSY       0x0004
  65 #define USB_E_SOF       0x0008
  66 #define USB_E_TXE1      0x0010
  67 #define USB_E_TXE2      0x0020
  68 #define USB_E_TXE3      0x0040
  69 #define USB_E_TXE4      0x0080
  70 #define USB_TX_ERRMASK (USB_E_TXE1|USB_E_TXE2|USB_E_TXE3|USB_E_TXE4)
  71 #define USB_E_IDLE      0x0100
  72 #define USB_E_RESET     0x0200
  73
  74 /* Mask Register */
  75 #define USBS_IDLE       0x01
  76
  77 /* RX Buffer Descriptor */
  78 #define RX_BD_OV        0x02
  79 #define RX_BD_CR        0x04
  80 #define RX_BD_AB        0x08
  81 #define RX_BD_NO        0x10
  82 #define RX_BD_PID_DATA0 0x00
  83 #define RX_BD_PID_DATA1 0x40
  84 #define RX_BD_PID_SETUP 0x80
  85 #define RX_BD_F         0x400
  86 #define RX_BD_L         0x800
  87 #define RX_BD_I         0x1000
  88 #define RX_BD_W         0x2000
  89 #define RX_BD_E         0x8000
  90
  91 /* Useful masks */
  92 #define RX_BD_PID_BITMASK (RX_BD_PID_DATA1 | RX_BD_PID_SETUP)
  93 #define STALL_BITMASK (USEP_THS_STALL | USEP_RHS_STALL)
  94 #define NAK_BITMASK (USEP_THS_NAK | USEP_RHS_NAK)
  95 #define CBD_TX_BITMASK (TX_BD_R | TX_BD_L | TX_BD_TC | TX_BD_I | TX_BD_CNF)
  96
  97 /* TX Buffer Descriptor */
  98 #define TX_BD_UN        0x02
  99 #define TX_BD_TO        0x04
 100 #define TX_BD_NO_PID    0x00
 101 #define TX_BD_PID_DATA0 0x80
 102 #define TX_BD_PID_DATA1 0xC0
 103 #define TX_BD_CNF       0x200
 104 #define TX_BD_TC        0x400
 105 #define TX_BD_L         0x800
 106 #define TX_BD_I         0x1000
 107 #define TX_BD_W         0x2000
 108 #define TX_BD_R         0x8000
 109
 110 /* Implementation specific defines */
 111
 112 #define EP_MIN_PACKET_SIZE 0x08
 113 #define MAX_ENDPOINTS   0x04
 114 #define FIFO_SIZE       0x10
 115 #define EP_MAX_PKT      FIFO_SIZE
 116 #define TX_RING_SIZE    0x04
 117 #define RX_RING_SIZE    0x06
 118 #define USB_MAX_PKT     0x40
 119 #define TOGGLE_TX_PID(x) x= ((~x)&0x40)|0x80
 120 #define TOGGLE_RX_PID(x) x^= 0x40
 121 #define EP_ATTACHED     0x01    /* Endpoint has a urb attached or not */
 122 #define EP_SEND_ZLP     0x02    /* Send ZLP y/n ? */
 123
 124 #define PROFF_USB       0x00000000
 125 #define CPM_USB_BASE    0x00000A00
 126
 127 /* UDC device defines */
 128 #define EP0_MAX_PACKET_SIZE     EP_MAX_PKT
 129 #define UDC_OUT_ENDPOINT        0x02
 130 #define UDC_OUT_PACKET_SIZE     EP_MIN_PACKET_SIZE
 131 #define UDC_IN_ENDPOINT         0x03
 132 #define UDC_IN_PACKET_SIZE      EP_MIN_PACKET_SIZE
 133 #define UDC_INT_ENDPOINT        0x01
 134 #define UDC_INT_PACKET_SIZE     UDC_IN_PACKET_SIZE
 135 #define UDC_BULK_PACKET_SIZE    EP_MIN_PACKET_SIZE
 136
 137 struct mpc8xx_ep {
 138         struct urb * urb;
 139         unsigned char pid;
 140         unsigned char sc;
 141         volatile cbd_t * prx;
 142 };
 143
 144 typedef struct mpc8xx_usb{
 145         char usmod;     /* Mode Register */
 146         char usaddr;    /* Slave Address Register */
 147         char uscom;     /* Command Register */
 148         char res1;      /* Reserved */
 149         ushort usep[4];
 150         ulong res2;     /* Reserved */
 151         ushort usber;   /* Event Register */
 152         ushort res3;    /* Reserved */
 153         ushort usbmr;   /* Mask Register */
 154         char res4;      /* Reserved */
 155         char usbs;      /* Status Register */
 156         char res5[8];   /* Reserved */
 157 }usb_t;
 158
 159 typedef struct mpc8xx_parameter_ram{
 160         ushort ep0ptr;  /* Endpoint Pointer Register 0 */
 161         ushort ep1ptr;  /* Endpoint Pointer Register 1 */
 162         ushort ep2ptr;  /* Endpoint Pointer Register 2 */
 163         ushort ep3ptr;  /* Endpoint Pointer Register 3 */
 164         uint rstate;    /* Receive state */
 165         uint rptr;      /* Receive internal data pointer */
 166         ushort frame_n; /* Frame number */
 167         ushort rbcnt;   /* Receive byte count */
 168         uint rtemp;     /* Receive temp cp use only */
 169         uint rxusb;     /* Rx Data Temp */
 170         ushort rxuptr;  /* Rx microcode return address temp */
 171 }usb_pram_t;
 172
 173 typedef struct endpoint_parameter_block_pointer{
 174         ushort rbase;   /* RxBD base address */
 175         ushort tbase;   /* TxBD base address */
 176         char rfcr;      /* Rx Function code */
 177         char tfcr;      /* Tx Function code */
 178         ushort mrblr;   /* Maximum Receive Buffer Length */
 179         ushort rbptr;   /* RxBD pointer Next Buffer Descriptor */
 180         ushort tbptr;   /* TxBD pointer Next Buffer Descriptor  */
 181         ulong tstate;   /* Transmit internal state */
 182         ulong tptr;     /* Transmit internal data pointer */
 183         ushort tcrc;    /* Transmit temp CRC */
 184         ushort tbcnt;   /* Transmit internal bye count */
 185         ulong ttemp;    /* Tx temp */
 186         ushort txuptr;  /* Tx microcode return address */
 187         ushort res1;    /* Reserved */
 188 }usb_epb_t;
 189
 190 typedef enum mpc8xx_udc_state{
 191         STATE_NOT_READY,
 192         STATE_ERROR,
 193         STATE_READY,
 194 }mpc8xx_udc_state_t;
 195
 196 /* Declarations */
 197 int udc_init(void);
 198 void udc_irq(void);
 199 int udc_endpoint_write(struct usb_endpoint_instance *endpoint);
 200 void udc_setup_ep(struct usb_device_instance *device, unsigned int ep,
 201                   struct usb_endpoint_instance *endpoint);
 202 void udc_connect(void);
 203 void udc_disconnect(void);
 204 void udc_enable(struct usb_device_instance *device);
 205 void udc_disable(void);
 206 void udc_startup_events(struct usb_device_instance *device);
 207
 208 /* Flow control */
 209 void udc_set_nak(int epid);
 210 void udc_unset_nak (int epid);