uboot-dfu.patch
[u-boot-openmoko/mini2440.git] / include / configs / qt2410.h
blobba6abd00dd7a88e00343de0b37349ea615430258
1 /*
2 * (C) Copyright 2002
3 * Sysgo Real-Time Solutions, GmbH <www.elinos.com>
4 * Marius Groeger <mgroeger@sysgo.de>
5 * Gary Jennejohn <gj@denx.de>
6 * David Mueller <d.mueller@elsoft.ch>
8 * Configuation settings for the Armzone QT2410 board.
10 * See file CREDITS for list of people who contributed to this
11 * project.
13 * This program is free software; you can redistribute it and/or
14 * modify it under the terms of the GNU General Public License as
15 * published by the Free Software Foundation; either version 2 of
16 * the License, or (at your option) any later version.
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
23 * You should have received a copy of the GNU General Public License
24 * along with this program; if not, write to the Free Software
25 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * MA 02111-1307 USA
29 #ifndef __CONFIG_H
30 #define __CONFIG_H
32 #if 0
33 /* If we want to start u-boot from usb bootloader in NOR flash */
34 #define CONFIG_SKIP_RELOCATE_UBOOT 1
35 #define CONFIG_SKIP_LOWLEVEL_INIT 1
36 #else
37 /* If we want to start u-boot directly from within NAND flash */
38 #define CONFIG_S3C2410_NAND_BOOT 1
39 #define CONFIG_S3C2410_NAND_SKIP_BAD 1
40 #endif
42 #define CFG_UBOOT_SIZE 0x40000
45 * High Level Configuration Options
46 * (easy to change)
48 #define CONFIG_ARM920T 1 /* This is an ARM920T Core */
49 #define CONFIG_S3C2410 1 /* in a SAMSUNG S3C2410 SoC */
50 #define CONFIG_SMDK2410 1 /* on a SAMSUNG SMDK2410 Board */
52 /* input clock of PLL */
53 #define CONFIG_SYS_CLK_FREQ 12000000/* the SMDK2410 has 12MHz input clock */
56 #define USE_920T_MMU 1
57 #define CONFIG_USE_IRQ 1
60 * Size of malloc() pool
62 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 400*1024)
63 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
66 * Hardware drivers
68 #if 0
69 #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
70 #define CS8900_BASE 0x19000300
71 #define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
72 #endif
75 * select serial console configuration
77 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on SMDK2410 */
78 #define CONFIG_HWFLOW 1
80 /************************************************************
81 * RTC
82 ************************************************************/
83 #define CONFIG_RTC_S3C24X0 1
85 /* allow to overwrite serial and ethaddr */
86 #define CONFIG_ENV_OVERWRITE
88 #define CONFIG_BAUDRATE 115200
90 /***********************************************************
91 * Command definition
92 ***********************************************************/
93 #define CONFIG_CMD_BDI
94 #define CONFIG_CMD_LOADS
95 #define CONFIG_CMD_LOADB
96 #define CONFIG_CMD_IMI
97 #define CONFIG_CMD_CACHE
98 #define CONFIG_CMD_ENV
99 #define CONFIG_CMD_BOOTD
100 #define CONFIG_CMD_CONSOLE
101 #define CONFIG_CMD_BPM
102 #define CONFIG_CMD_ASKENV
103 #define CONFIG_CMD_RUN
104 #define CONFIG_CMD_ECHO
105 #define CONFIG_CMD_I2C
106 #define CONFIG_CMD_REGINFO
107 #define CONFIG_CMD_IMMAP
108 #define CONFIG_CMD_DATE
109 #define CONFIG_CMD_AUTOSCRIPT
110 #define CONFIG_CMD_BSP
111 #define CONFIG_CMD_ELF
112 #define CONFIG_CMD_MISC
113 #define CONFIG_CMD_JFFS2
114 #define CONFIG_CMD_DIAG
115 #define CONFIG_CMD_HWFLOW
116 #define CONFIG_CMD_SAVES
117 #define CONFIG_CMD_NAND
118 #define CONFIG_CMD_PORTIO
119 #define CONFIG_CMD_MMC
120 #define CONFIG_CMD_FAT
121 #define CONFIG_CMD_EXT2
123 #if 0
124 CFG_CMD_DHCP | \
125 CFG_CMD_PING | \
126 CFG_CMD_NET | \
128 #endif
130 #define CONFIG_BOOTDELAY 3
131 #define CONFIG_BOOTARGS "rootfstype=jffs2 root=/dev/mtdblock4 console=ttySAC0,115200 console=tty0 loglevel=8"
132 #define CONFIG_ETHADDR 01:ab:cd:ef:fe:dc
133 #define CONFIG_NETMASK 255.255.255.0
134 #define CONFIG_IPADDR 10.0.0.110
135 #define CONFIG_SERVERIP 10.0.0.1
136 /*#define CONFIG_BOOTFILE "elinos-lart" */
137 #define CONFIG_BOOTCOMMAND "nand load 0x32000000 0x34000 0x200000; bootm 0x32000000"
139 #define CONFIG_DOS_PARTITION 1
141 #if defined(CONFIG_CMD_KGDB)
142 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
143 /* what's this ? it's not used anywhere */
144 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
145 #endif
148 * Miscellaneous configurable options
150 #define CFG_LONGHELP /* undef to save memory */
151 #define CFG_PROMPT "QT2410 # " /* Monitor Command Prompt */
152 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
153 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
154 #define CFG_MAXARGS 64 /* max number of command args */
155 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
157 #define CFG_MEMTEST_START 0x30000000 /* memtest works on */
158 #define CFG_MEMTEST_END 0x33F00000 /* 63 MB in DRAM */
160 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
162 #define CFG_LOAD_ADDR 0x33000000 /* default load address */
164 /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
165 /* it to wrap 100 times (total 1562500) to get 1 sec. */
166 #define CFG_HZ 1562500
168 /* valid baudrates */
169 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
171 /*-----------------------------------------------------------------------
172 * Stack sizes
174 * The stack sizes are set up in start.S using the settings below
176 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
177 #ifdef CONFIG_USE_IRQ
178 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
179 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
180 #endif
182 #define CONFIG_USB_OHCI 1
184 #define CONFIG_USB_DEVICE 1
185 #define CONFIG_USB_TTY 1
186 #define CFG_CONSOLE_IS_IN_ENV 1
187 #define CONFIG_USBD_VENDORID 0x1457 /* Linux/NetChip */
188 #define CONFIG_USBD_PRODUCTID_GSERIAL 0x5120 /* gserial */
189 #define CONFIG_USBD_PRODUCTID_CDCACM 0x511d /* CDC ACM */
190 #define CONFIG_USBD_MANUFACTURER "Armzone"
191 #define CONFIG_USBD_PRODUCT_NAME "QT2410 Bootloader " U_BOOT_VERSION
192 #define CONFIG_EXTRA_ENV_SETTINGS "usbtty=cdc_acm\0"
193 #define CONFIG_USBD_DFU 1
194 #define CONFIG_USBD_DFU_XFER_SIZE 4096
195 #define CONFIG_USBD_DFU_INTERFACE 2
197 /*-----------------------------------------------------------------------
198 * Physical Memory Map
200 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
201 #define PHYS_SDRAM_1 0x30000000 /* SDRAM Bank #1 */
202 #define PHYS_SDRAM_1_SIZE 0x04000000 /* 64 MB */
203 #define PHYS_SDRAM_RES_SIZE 0x00200000 /* 2 MB for frame buffer */
205 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
207 #define CFG_FLASH_BASE PHYS_FLASH_1
209 /*-----------------------------------------------------------------------
210 * FLASH and environment organization
213 #define CONFIG_AMD_LV400 1 /* uncomment this if you have a LV400 flash */
215 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
216 #define PHYS_FLASH_SIZE 0x00080000 /* 512KB */
217 #define CFG_MAX_FLASH_SECT (11) /* max number of sectors on one chip */
219 /* timeout values are in ticks */
220 #define CFG_FLASH_ERASE_TOUT (5*CFG_HZ) /* Timeout for Flash Erase */
221 #define CFG_FLASH_WRITE_TOUT (5*CFG_HZ) /* Timeout for Flash Write */
223 #define CFG_ENV_IS_IN_NAND 1
224 #define CFG_ENV_SIZE 0x4000 /* 16k Total Size of Environment Sector */
225 #define CFG_ENV_OFFSET_OOB 1 /* Location of ENV stored in block 0 OOB */
227 #define NAND_MAX_CHIPS 1
228 #define CFG_NAND_BASE 0x4e000000
229 #define CFG_MAX_NAND_DEVICE 1
231 #define CONFIG_MMC 1
232 #define CFG_MMC_BASE 0xff000000
234 #define CONFIG_EXT2 1
236 /* FAT driver in u-boot is broken currently */
237 #define CONFIG_FAT 1
238 #define CONFIG_SUPPORT_VFAT
240 #if 1
241 /* JFFS2 driver */
242 #define CONFIG_JFFS2_CMDLINE 1
243 #define CONFIG_JFFS2_NAND 1
244 #define CONFIG_JFFS2_NAND_DEV 0
245 //#define CONFIG_JFFS2_NAND_OFF 0x634000
246 //#define CONFIG_JFFS2_NAND_SIZE 0x39cc000
247 #endif
249 /* ATAG configuration */
250 #define CONFIG_INITRD_TAG 1
251 #define CONFIG_SETUP_MEMORY_TAGS 1
252 #define CONFIG_CMDLINE_TAG 1
254 #define CONFIG_DRIVER_S3C24X0_I2C 1
255 #define CONFIG_HARD_I2C 1
256 #define CFG_I2C_SPEED 400000 /* 400kHz according to PCF50606 data sheet */
257 #define CFG_I2C_SLAVE 0x7f
259 #define CONFIG_VIDEO
260 #define CONFIG_VIDEO_S3C2410
261 #define CONFIG_CFB_CONSOLE
262 #define CONFIG_VIDEO_LOGO
263 #define CONFIG_SPLASH_SCREEN
264 #define CFG_VIDEO_LOGO_MAX_SIZE (640*480+1024+100) /* 100 = slack */
265 #define CONFIG_VIDEO_BMP_GZIP
266 #define CONFIG_VGA_AS_SINGLE_DEVICE
267 #define CONFIG_CMD_UNZIP
269 #define VIDEO_KBD_INIT_FCT 0
270 #define VIDEO_TSTC_FCT serial_tstc
271 #define VIDEO_GETC_FCT serial_getc
273 #define LCD_VIDEO_ADDR 0x33d00000
275 #define CONFIG_S3C2410_NAND_BBT 1
277 #define MTDIDS_DEFAULT "nand0=qt2410-nand"
278 #define MTPARTS_DEFAULT "qt2410-nand:192k(u-boot),8k(u-boot_env),2M(kernel),2M(splash),-(jffs2)"
279 #define CFG_NAND_DYNPART_MTD_KERNEL_NAME "qt2410-nand"
280 #define CONFIG_NAND_DYNPART
282 #endif /* __CONFIG_H */